| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.cpp | 380 return BuildMI(MF, MI.getDebugLoc(), MI.getDesc())
436 BuildMI(MBB, MI, DL, get(Opcode));
653 BuildMI(&MBB, DL, get(PPC::B)).addMBB(TBB);
655 BuildMI(&MBB, DL, get(Cond[0].getImm() ?
659 BuildMI(&MBB, DL, get(PPC::BC)).addOperand(Cond[1]).addMBB(TBB);
661 BuildMI(&MBB, DL, get(PPC::BCn)).addOperand(Cond[1]).addMBB(TBB);
663 BuildMI(&MBB, DL, get(PPC::BCC))
670 BuildMI(&MBB, DL, get(Cond[0].getImm() ?
674 BuildMI(&MBB, DL, get(PPC::BC)).addOperand(Cond[1]).addMBB(TBB);
676 BuildMI(&MBB, DL, get(PPC::BCn)).addOperand(Cond[1]).addMBB(TBB)
[all...] |
| PPCEarlyReturn.cpp | 85 BuildMI(**PI, J, J->getDebugLoc(), TII->get(I->getOpcode()))
97 BuildMI(**PI, J, J->getDebugLoc(), TII->get(PPC::BCCLR))
111 BuildMI(
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86FastISel.cpp | 225 addFullAddress(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt,
244 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
263 addFullAddress(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt,
292 addFullAddress(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt,
549 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc), LoadReg);
784 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::COPY),
792 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(X86::RET));
870 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(CompareImmOpc))
882 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(CompareOpc))
906 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(X86::SETEr), EReg)
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| SILowerI1Copies.cpp | 118 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::V_MOV_B32_e32))
126 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::V_CNDMASK_B32_e64))
134 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(AMDGPU::V_CMP_NE_I32_e64))
|
| SIInstrInfo.cpp | 397 BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B32), DestReg)
404 BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B64), AMDGPU::VCC)
409 BuildMI(MBB, MI, DL, get(AMDGPU::V_CMP_NE_I32_e32))
418 BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B64), DestReg)
440 BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DestReg)
489 MachineInstrBuilder Builder = BuildMI(MBB, MI, DL,
602 BuildMI(MBB, MI, DL, get(Opcode))
614 BuildMI(MBB, MI, DL, get(AMDGPU::KILL))
624 BuildMI(MBB, MI, DL, get(Opcode))
698 BuildMI(MBB, MI, DL, get(Opcode), DestReg
[all...] |
| R600ControlFlowFinalizer.cpp | 337 MachineInstr *MIb = BuildMI(MBB, ClauseHead, MBB.findDebugLoc(ClauseHead),
386 InsertPos = BuildMI(MBB, InsertPos->getDebugLoc(),
428 MachineInstrBuilder MILit = BuildMI(MBB, I, I->getDebugLoc(),
458 BuildMI(BB, InsertPos->getDebugLoc(), TII->get(AMDGPU::FETCH_CLAUSE))
472 BuildMI(BB, InsertPos->getDebugLoc(), TII->get(AMDGPU::ALU_CLAUSE))
510 BuildMI(MBB, MBB.begin(), MBB.findDebugLoc(MBB.begin()),
540 BuildMI(MBB, MI, MBB.findDebugLoc(MI), TII->get(AMDGPU::CF_PUSH_EG))
557 MachineInstr *MIb = BuildMI(MBB, MI, MBB.findDebugLoc(MI),
574 BuildMI(MBB, MI, MBB.findDebugLoc(MI), getHWInstrDesc(CF_END_LOOP))
582 MachineInstr *MIb = BuildMI(MBB, MI, MBB.findDebugLoc(MI)
[all...] |
| SIDebuggerInsertNops.cpp | 88 BuildMI(MBB, *MI, DL, TII->get(AMDGPU::S_NOP))
|
| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| SparcRegisterInfo.cpp | 68 BuildMI(MBB, I, dl, TII.get(SP::ADDri), SP::O6).addReg(SP::O6).addImm(Size);
102 BuildMI(*MI.getParent(), II, dl, TII.get(SP::SETHIi), SP::G1).addImm(OffHi);
104 BuildMI(*MI.getParent(), II, dl, TII.get(SP::ADDrr), SP::G1).addReg(SP::G1)
|
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyFastISel.cpp | 334 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), Reg)
403 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
408 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
430 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
435 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
441 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
459 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
478 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
509 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
517 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMExpandPseudoInsts.cpp | 401 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
466 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
520 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
604 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc));
[all...] |
| ARMFastISel.cpp | 288 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II,
291 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II)
293 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
314 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II, ResultReg)
318 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II)
321 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
340 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II, ResultReg)
344 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II)
347 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
368 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II, ResultReg
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64CleanupLocalDynamicTLSPass.cpp | 102 MachineInstr *Copy = BuildMI(*I.getParent(), I, I.getDebugLoc(),
124 BuildMI(*I.getParent(), ++I.getIterator(), I.getDebugLoc(),
|
| /external/llvm/lib/Target/AVR/ |
| AVRInstrInfo.cpp | 59 BuildMI(MBB, MI, DL, get(Opc), DestReg)
130 BuildMI(MBB, MI, DL, get(Opcode))
166 BuildMI(MBB, MI, DL, get(Opcode), DestReg)
333 BuildMI(MBB, UnCondBrIter, MBB.findDebugLoc(I), get(JNCC))
335 BuildMI(MBB, UnCondBrIter, MBB.findDebugLoc(I), get(AVR::RJMPk))
388 BuildMI(&MBB, DL, get(AVR::RJMPk)).addMBB(TBB);
395 BuildMI(&MBB, DL, getBrCond(CC)).addMBB(TBB);
400 BuildMI(&MBB, DL, get(AVR::RJMPk)).addMBB(FBB);
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430BranchSelector.cpp | 158 BuildMI(MBB, I, dl, TII->get(MSP430::JCC))
164 I = BuildMI(MBB, I, dl, TII->get(MSP430::Bi)).addMBB(Dest);
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZLDCleanup.cpp | 120 MachineInstr *Copy = BuildMI(*I->getParent(), I, I->getDebugLoc(),
140 MachineInstr *Copy = BuildMI(*I->getParent(), Next, I->getDebugLoc(),
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| Thumb1FrameLowering.cpp | 136 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr)
168 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), BasePtr)
248 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr),
252 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr),
276 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tPOP)))
281 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tBX_RET_vararg))
302 MachineInstrBuilder MIB = BuildMI(MBB, MI, DL, TII.get(ARM::tPUSH));
341 MachineInstrBuilder MIB = BuildMI(MF, DL, TII.get(ARM::tPOP));
|
| /external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
| MSP430BranchSelector.cpp | 155 BuildMI(MBB, I, dl, TII->get(MSP430::JCC))
161 I = BuildMI(MBB, I, dl, TII->get(MSP430::Bi)).addMBB(Dest);
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| PPCBranchSelector.cpp | 151 BuildMI(MBB, I, dl, TII->get(PPC::BCC))
155 I = BuildMI(MBB, I, dl, TII->get(PPC::B)).addMBB(Dest);
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonInstrInfo.cpp | 598 BuildMI(&MBB, DL, get(BOpc)).addMBB(TBB);
609 BuildMI(&MBB, DL, get(EndLoopOp)).addMBB(TBB);
619 BuildMI(&MBB, DL, get(BccOpc)).addReg(Cond[1].getReg(), Flags1).
622 BuildMI(&MBB, DL, get(BccOpc)).addReg(Cond[1].getReg(), Flags1).
630 BuildMI(&MBB, DL, get(BccOpc)).addReg(RO.getReg(), Flags).addMBB(TBB);
649 BuildMI(&MBB, DL, get(EndLoopOp)).addMBB(TBB);
653 BuildMI(&MBB, DL, get(BccOpc)).addReg(RO.getReg(), Flags).addMBB(TBB);
655 BuildMI(&MBB, DL, get(BOpc)).addMBB(FBB);
715 MachineInstr *NewCmp = BuildMI(&MBB, DL, get(Hexagon::C2_cmpgtui), LoopEnd).
718 MachineInstr *NewAdd = BuildMI(&MBB, DL, get(Hexagon::A2_addi), NewLoopCount)
[all...] |
| HexagonFrameLowering.cpp | 547 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::S2_allocframe))
554 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::CONST32_Int_Real),
556 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::A2_sub), SP)
560 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::S2_allocframe))
566 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::A2_andir), SP)
575 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::CALLstk))
601 BuildMI(MBB, InsertPt, DL, HII.get(Hexagon::L2_deallocframe));
602 BuildMI(MBB, InsertPt, DL, HII.get(Hexagon::A2_add), SP)
642 BuildMI(MBB, InsertPt, DL, HII.get(Hexagon::L2_deallocframe));
646 MachineInstr *NewI = BuildMI(MBB, RetI, DL, HII.get(NewOpc))
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreFrameLowering.cpp | 67 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
77 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
87 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
107 BuildMI(MBB, MBBI, dl, TII.get(Opcode)).addImm(OpImm);
129 BuildMI(MBB, MBBI, dl, TII.get(Opcode), XCore::SP).addImm(OpImm);
201 BuildMI(MBB, MBBI, dl, TII.get(Opcode), SpillList[i].Reg)
241 BuildMI(MBB, MBBI, dl, TII.get(XCore::LDWSP_ru6), XCore::R11).addImm(0);
263 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(Opcode));
288 BuildMI(MBB, MBBI, dl, TII.get(Opcode))
306 BuildMI(MBB, MBBI, dl, TII.get(XCore::LDAWSP_ru6), FramePtr).addImm(0)
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| MBlazeISelLowering.cpp | 293 BuildMI(MBB, dl, TII->get(MBlaze::ANDI), IAMT)
298 BuildMI(MBB, dl, TII->get(MBlaze::ADDIK), IVAL)
302 BuildMI(MBB, dl, TII->get(MBlaze::BEQID))
308 BuildMI(loop, dl, TII->get(MBlaze::PHI), DST)
314 BuildMI(loop, dl, TII->get(MBlaze::PHI), SAMT)
319 BuildMI(loop, dl, TII->get(MBlaze::ADD), NDST).addReg(DST).addReg(DST);
321 BuildMI(loop, dl, TII->get(MBlaze::SRA), NDST).addReg(DST);
323 BuildMI(loop, dl, TII->get(MBlaze::SRL), NDST).addReg(DST);
327 BuildMI(loop, dl, TII->get(MBlaze::ADDIK), NAMT)
331 BuildMI(loop, dl, TII->get(MBlaze::BNEID)
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| FastISel.cpp | 258 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
651 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AdjStackDown));
657 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
664 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AdjStackUp))
836 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, CLI.Call, DbgLoc,
[all...] |
| /external/llvm/lib/CodeGen/ |
| PatchableFunction.cpp | 72 auto MIB = BuildMI(FirstMBB, FirstActualI, FirstActualI->getDebugLoc(),
|
| /external/llvm/lib/Target/Mips/ |
| Mips16ISelLowering.cpp | 556 BuildMI(BB, DL, TII->get(Opc))
573 BuildMI(*BB, BB->begin(), DL, TII->get(Mips::PHI), MI.getOperand(0).getReg())
619 BuildMI(BB, DL, TII->get(Opc2))
622 BuildMI(BB, DL, TII->get(Opc1)).addMBB(sinkMBB);
637 BuildMI(*BB, BB->begin(), DL, TII->get(Mips::PHI), MI.getOperand(0).getReg())
685 BuildMI(BB, DL, TII->get(Opc2))
688 BuildMI(BB, DL, TII->get(Opc1)).addMBB(sinkMBB);
703 BuildMI(*BB, BB->begin(), DL, TII->get(Mips::PHI), MI.getOperand(0).getReg())
724 BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(CmpOpc))
727 BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(BtOpc)).addMBB(target)
[all...] |
