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      1 //======- Thumb1FrameLowering.cpp - Thumb1 Frame Information ---*- C++ -*-====//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This file contains the Thumb1 implementation of TargetFrameLowering class.
     11 //
     12 //===----------------------------------------------------------------------===//
     13 
     14 #include "Thumb1FrameLowering.h"
     15 #include "ARMBaseInstrInfo.h"
     16 #include "ARMMachineFunctionInfo.h"
     17 #include "llvm/CodeGen/MachineFrameInfo.h"
     18 #include "llvm/CodeGen/MachineFunction.h"
     19 #include "llvm/CodeGen/MachineInstrBuilder.h"
     20 #include "llvm/CodeGen/MachineRegisterInfo.h"
     21 
     22 using namespace llvm;
     23 
     24 bool Thumb1FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const{
     25   const MachineFrameInfo *FFI = MF.getFrameInfo();
     26   unsigned CFSize = FFI->getMaxCallFrameSize();
     27   // It's not always a good idea to include the call frame as part of the
     28   // stack frame. ARM (especially Thumb) has small immediate offset to
     29   // address the stack frame. So a large call frame can cause poor codegen
     30   // and may even makes it impossible to scavenge a register.
     31   if (CFSize >= ((1 << 8) - 1) * 4 / 2) // Half of imm8 * 4
     32     return false;
     33 
     34   return !MF.getFrameInfo()->hasVarSizedObjects();
     35 }
     36 
     37 static void
     38 emitSPUpdate(MachineBasicBlock &MBB,
     39              MachineBasicBlock::iterator &MBBI,
     40              const TargetInstrInfo &TII, DebugLoc dl,
     41              const Thumb1RegisterInfo &MRI,
     42              int NumBytes, unsigned MIFlags = MachineInstr::NoFlags)  {
     43   emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes, TII,
     44                             MRI, MIFlags);
     45 }
     46 
     47 void Thumb1FrameLowering::emitPrologue(MachineFunction &MF) const {
     48   MachineBasicBlock &MBB = MF.front();
     49   MachineBasicBlock::iterator MBBI = MBB.begin();
     50   MachineFrameInfo  *MFI = MF.getFrameInfo();
     51   ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
     52   const Thumb1RegisterInfo *RegInfo =
     53     static_cast<const Thumb1RegisterInfo*>(MF.getTarget().getRegisterInfo());
     54   const Thumb1InstrInfo &TII =
     55     *static_cast<const Thumb1InstrInfo*>(MF.getTarget().getInstrInfo());
     56 
     57   unsigned VARegSaveSize = AFI->getVarArgsRegSaveSize();
     58   unsigned NumBytes = MFI->getStackSize();
     59   const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
     60   DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
     61   unsigned FramePtr = RegInfo->getFrameRegister(MF);
     62   unsigned BasePtr = RegInfo->getBaseRegister();
     63 
     64   // Thumb add/sub sp, imm8 instructions implicitly multiply the offset by 4.
     65   NumBytes = (NumBytes + 3) & ~3;
     66   MFI->setStackSize(NumBytes);
     67 
     68   // Determine the sizes of each callee-save spill areas and record which frame
     69   // belongs to which callee-save spill areas.
     70   unsigned GPRCS1Size = 0, GPRCS2Size = 0, DPRCSSize = 0;
     71   int FramePtrSpillFI = 0;
     72 
     73   if (VARegSaveSize)
     74     emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -VARegSaveSize,
     75                  MachineInstr::FrameSetup);
     76 
     77   if (!AFI->hasStackFrame()) {
     78     if (NumBytes != 0)
     79       emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes,
     80                    MachineInstr::FrameSetup);
     81     return;
     82   }
     83 
     84   for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
     85     unsigned Reg = CSI[i].getReg();
     86     int FI = CSI[i].getFrameIdx();
     87     switch (Reg) {
     88     case ARM::R4:
     89     case ARM::R5:
     90     case ARM::R6:
     91     case ARM::R7:
     92     case ARM::LR:
     93       if (Reg == FramePtr)
     94         FramePtrSpillFI = FI;
     95       AFI->addGPRCalleeSavedArea1Frame(FI);
     96       GPRCS1Size += 4;
     97       break;
     98     case ARM::R8:
     99     case ARM::R9:
    100     case ARM::R10:
    101     case ARM::R11:
    102       if (Reg == FramePtr)
    103         FramePtrSpillFI = FI;
    104       if (STI.isTargetDarwin()) {
    105         AFI->addGPRCalleeSavedArea2Frame(FI);
    106         GPRCS2Size += 4;
    107       } else {
    108         AFI->addGPRCalleeSavedArea1Frame(FI);
    109         GPRCS1Size += 4;
    110       }
    111       break;
    112     default:
    113       AFI->addDPRCalleeSavedAreaFrame(FI);
    114       DPRCSSize += 8;
    115     }
    116   }
    117 
    118   if (MBBI != MBB.end() && MBBI->getOpcode() == ARM::tPUSH) {
    119     ++MBBI;
    120     if (MBBI != MBB.end())
    121       dl = MBBI->getDebugLoc();
    122   }
    123 
    124   // Determine starting offsets of spill areas.
    125   unsigned DPRCSOffset  = NumBytes - (GPRCS1Size + GPRCS2Size + DPRCSSize);
    126   unsigned GPRCS2Offset = DPRCSOffset + DPRCSSize;
    127   unsigned GPRCS1Offset = GPRCS2Offset + GPRCS2Size;
    128   AFI->setFramePtrSpillOffset(MFI->getObjectOffset(FramePtrSpillFI) + NumBytes);
    129   AFI->setGPRCalleeSavedArea1Offset(GPRCS1Offset);
    130   AFI->setGPRCalleeSavedArea2Offset(GPRCS2Offset);
    131   AFI->setDPRCalleeSavedAreaOffset(DPRCSOffset);
    132   NumBytes = DPRCSOffset;
    133 
    134   // Adjust FP so it point to the stack slot that contains the previous FP.
    135   if (hasFP(MF)) {
    136     AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr)
    137       .addFrameIndex(FramePtrSpillFI).addImm(0)
    138       .setMIFlags(MachineInstr::FrameSetup));
    139     if (NumBytes > 508)
    140       // If offset is > 508 then sp cannot be adjusted in a single instruction,
    141       // try restoring from fp instead.
    142       AFI->setShouldRestoreSPFromFP(true);
    143   }
    144 
    145   if (NumBytes)
    146     // Insert it after all the callee-save spills.
    147     emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes,
    148                  MachineInstr::FrameSetup);
    149 
    150   if (STI.isTargetELF() && hasFP(MF))
    151     MFI->setOffsetAdjustment(MFI->getOffsetAdjustment() -
    152                              AFI->getFramePtrSpillOffset());
    153 
    154   AFI->setGPRCalleeSavedArea1Size(GPRCS1Size);
    155   AFI->setGPRCalleeSavedArea2Size(GPRCS2Size);
    156   AFI->setDPRCalleeSavedAreaSize(DPRCSSize);
    157 
    158   // Thumb1 does not currently support dynamic stack realignment.  Report a
    159   // fatal error rather then silently generate bad code.
    160   if (RegInfo->needsStackRealignment(MF))
    161       report_fatal_error("Dynamic stack realignment not supported for thumb1.");
    162 
    163   // If we need a base pointer, set it up here. It's whatever the value
    164   // of the stack pointer is at this point. Any variable size objects
    165   // will be allocated after this, so we can still use the base pointer
    166   // to reference locals.
    167   if (RegInfo->hasBasePointer(MF))
    168     AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), BasePtr)
    169                    .addReg(ARM::SP));
    170 
    171   // If the frame has variable sized objects then the epilogue must restore
    172   // the sp from fp. We can assume there's an FP here since hasFP already
    173   // checks for hasVarSizedObjects.
    174   if (MFI->hasVarSizedObjects())
    175     AFI->setShouldRestoreSPFromFP(true);
    176 }
    177 
    178 static bool isCalleeSavedRegister(unsigned Reg, const unsigned *CSRegs) {
    179   for (unsigned i = 0; CSRegs[i]; ++i)
    180     if (Reg == CSRegs[i])
    181       return true;
    182   return false;
    183 }
    184 
    185 static bool isCSRestore(MachineInstr *MI, const unsigned *CSRegs) {
    186   if (MI->getOpcode() == ARM::tLDRspi &&
    187       MI->getOperand(1).isFI() &&
    188       isCalleeSavedRegister(MI->getOperand(0).getReg(), CSRegs))
    189     return true;
    190   else if (MI->getOpcode() == ARM::tPOP) {
    191     // The first two operands are predicates. The last two are
    192     // imp-def and imp-use of SP. Check everything in between.
    193     for (int i = 2, e = MI->getNumOperands() - 2; i != e; ++i)
    194       if (!isCalleeSavedRegister(MI->getOperand(i).getReg(), CSRegs))
    195         return false;
    196     return true;
    197   }
    198   return false;
    199 }
    200 
    201 void Thumb1FrameLowering::emitEpilogue(MachineFunction &MF,
    202                                    MachineBasicBlock &MBB) const {
    203   MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
    204   assert((MBBI->getOpcode() == ARM::tBX_RET ||
    205           MBBI->getOpcode() == ARM::tPOP_RET) &&
    206          "Can only insert epilog into returning blocks");
    207   DebugLoc dl = MBBI->getDebugLoc();
    208   MachineFrameInfo *MFI = MF.getFrameInfo();
    209   ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
    210   const Thumb1RegisterInfo *RegInfo =
    211     static_cast<const Thumb1RegisterInfo*>(MF.getTarget().getRegisterInfo());
    212   const Thumb1InstrInfo &TII =
    213     *static_cast<const Thumb1InstrInfo*>(MF.getTarget().getInstrInfo());
    214 
    215   unsigned VARegSaveSize = AFI->getVarArgsRegSaveSize();
    216   int NumBytes = (int)MFI->getStackSize();
    217   const unsigned *CSRegs = RegInfo->getCalleeSavedRegs();
    218   unsigned FramePtr = RegInfo->getFrameRegister(MF);
    219 
    220   if (!AFI->hasStackFrame()) {
    221     if (NumBytes != 0)
    222       emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, NumBytes);
    223   } else {
    224     // Unwind MBBI to point to first LDR / VLDRD.
    225     if (MBBI != MBB.begin()) {
    226       do
    227         --MBBI;
    228       while (MBBI != MBB.begin() && isCSRestore(MBBI, CSRegs));
    229       if (!isCSRestore(MBBI, CSRegs))
    230         ++MBBI;
    231     }
    232 
    233     // Move SP to start of FP callee save spill area.
    234     NumBytes -= (AFI->getGPRCalleeSavedArea1Size() +
    235                  AFI->getGPRCalleeSavedArea2Size() +
    236                  AFI->getDPRCalleeSavedAreaSize());
    237 
    238     if (AFI->shouldRestoreSPFromFP()) {
    239       NumBytes = AFI->getFramePtrSpillOffset() - NumBytes;
    240       // Reset SP based on frame pointer only if the stack frame extends beyond
    241       // frame pointer stack slot, the target is ELF and the function has FP, or
    242       // the target uses var sized objects.
    243       if (NumBytes) {
    244         assert(MF.getRegInfo().isPhysRegUsed(ARM::R4) &&
    245                "No scratch register to restore SP from FP!");
    246         emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes,
    247                                   TII, *RegInfo);
    248         AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr),
    249                                ARM::SP)
    250           .addReg(ARM::R4));
    251       } else
    252         AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr),
    253                                ARM::SP)
    254           .addReg(FramePtr));
    255     } else {
    256       if (MBBI->getOpcode() == ARM::tBX_RET &&
    257           &MBB.front() != MBBI &&
    258           prior(MBBI)->getOpcode() == ARM::tPOP) {
    259         MachineBasicBlock::iterator PMBBI = prior(MBBI);
    260         emitSPUpdate(MBB, PMBBI, TII, dl, *RegInfo, NumBytes);
    261       } else
    262         emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, NumBytes);
    263     }
    264   }
    265 
    266   if (VARegSaveSize) {
    267     // Unlike T2 and ARM mode, the T1 pop instruction cannot restore
    268     // to LR, and we can't pop the value directly to the PC since
    269     // we need to update the SP after popping the value. Therefore, we
    270     // pop the old LR into R3 as a temporary.
    271 
    272     // Move back past the callee-saved register restoration
    273     while (MBBI != MBB.end() && isCSRestore(MBBI, CSRegs))
    274       ++MBBI;
    275     // Epilogue for vararg functions: pop LR to R3 and branch off it.
    276     AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tPOP)))
    277       .addReg(ARM::R3, RegState::Define);
    278 
    279     emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, VARegSaveSize);
    280 
    281     AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tBX_RET_vararg))
    282       .addReg(ARM::R3, RegState::Kill));
    283     // erase the old tBX_RET instruction
    284     MBB.erase(MBBI);
    285   }
    286 }
    287 
    288 bool Thumb1FrameLowering::
    289 spillCalleeSavedRegisters(MachineBasicBlock &MBB,
    290                           MachineBasicBlock::iterator MI,
    291                           const std::vector<CalleeSavedInfo> &CSI,
    292                           const TargetRegisterInfo *TRI) const {
    293   if (CSI.empty())
    294     return false;
    295 
    296   DebugLoc DL;
    297   MachineFunction &MF = *MBB.getParent();
    298   const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
    299 
    300   if (MI != MBB.end()) DL = MI->getDebugLoc();
    301 
    302   MachineInstrBuilder MIB = BuildMI(MBB, MI, DL, TII.get(ARM::tPUSH));
    303   AddDefaultPred(MIB);
    304   for (unsigned i = CSI.size(); i != 0; --i) {
    305     unsigned Reg = CSI[i-1].getReg();
    306     bool isKill = true;
    307 
    308     // Add the callee-saved register as live-in unless it's LR and
    309     // @llvm.returnaddress is called. If LR is returned for @llvm.returnaddress
    310     // then it's already added to the function and entry block live-in sets.
    311     if (Reg == ARM::LR) {
    312       MachineFunction &MF = *MBB.getParent();
    313       if (MF.getFrameInfo()->isReturnAddressTaken() &&
    314           MF.getRegInfo().isLiveIn(Reg))
    315         isKill = false;
    316     }
    317 
    318     if (isKill)
    319       MBB.addLiveIn(Reg);
    320 
    321     MIB.addReg(Reg, getKillRegState(isKill));
    322   }
    323   MIB.setMIFlags(MachineInstr::FrameSetup);
    324   return true;
    325 }
    326 
    327 bool Thumb1FrameLowering::
    328 restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
    329                             MachineBasicBlock::iterator MI,
    330                             const std::vector<CalleeSavedInfo> &CSI,
    331                             const TargetRegisterInfo *TRI) const {
    332   if (CSI.empty())
    333     return false;
    334 
    335   MachineFunction &MF = *MBB.getParent();
    336   ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
    337   const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
    338 
    339   bool isVarArg = AFI->getVarArgsRegSaveSize() > 0;
    340   DebugLoc DL = MI->getDebugLoc();
    341   MachineInstrBuilder MIB = BuildMI(MF, DL, TII.get(ARM::tPOP));
    342   AddDefaultPred(MIB);
    343 
    344   bool NumRegs = false;
    345   for (unsigned i = CSI.size(); i != 0; --i) {
    346     unsigned Reg = CSI[i-1].getReg();
    347     if (Reg == ARM::LR) {
    348       // Special epilogue for vararg functions. See emitEpilogue
    349       if (isVarArg)
    350         continue;
    351       Reg = ARM::PC;
    352       (*MIB).setDesc(TII.get(ARM::tPOP_RET));
    353       MI = MBB.erase(MI);
    354     }
    355     MIB.addReg(Reg, getDefRegState(true));
    356     NumRegs = true;
    357   }
    358 
    359   // It's illegal to emit pop instruction without operands.
    360   if (NumRegs)
    361     MBB.insert(MI, &*MIB);
    362   else
    363     MF.DeleteMachineInstr(MIB);
    364 
    365   return true;
    366 }
    367