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  /external/swiftshader/third_party/LLVM/lib/Target/Mips/InstPrinter/
MipsInstPrinter.cpp 68 void MipsInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
69 OS << '$' << LowercaseString(getRegisterName(RegNo));
  /external/swiftshader/third_party/LLVM/lib/Target/X86/InstPrinter/
X86ATTInstPrinter.cpp 38 unsigned RegNo) const {
39 OS << '%' << getRegisterName(RegNo);
X86ATTInstPrinter.h 27 virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
37 static const char *getRegisterName(unsigned RegNo);
X86IntelInstPrinter.cpp 31 void X86IntelInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
32 OS << getRegisterName(RegNo);
X86IntelInstPrinter.h 29 virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
35 static const char *getRegisterName(unsigned RegNo);
  /external/llvm/lib/Target/Hexagon/MCTargetDesc/
HexagonInstPrinter.cpp 41 void HexagonInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const {
42 O << getRegName(RegNo);
45 StringRef HexagonInstPrinter::getRegName(unsigned RegNo) const {
46 return getRegisterName(RegNo);
  /external/llvm/lib/Target/Lanai/Disassembler/
LanaiDisassembler.cpp 50 DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo,
163 DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo,
165 if (RegNo > 31)
168 unsigned Reg = GPRDecoderTable[RegNo];
  /external/llvm/lib/Target/NVPTX/InstPrinter/
NVPTXInstPrinter.cpp 35 void NVPTXInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
38 unsigned RCId = (RegNo >> 28);
44 OS << getRegisterName(RegNo);
66 unsigned VReg = RegNo & 0x0FFFFFFF;
  /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
CallingConvLower.h 68 unsigned RegNo, MVT LocVT,
72 Ret.Loc = RegNo;
82 unsigned RegNo, MVT LocVT,
85 Ret = getReg(ValNo, ValVT, RegNo, LocVT, HTP);
  /external/swiftshader/third_party/LLVM/lib/CodeGen/
MachineRegisterInfo.cpp 158 bool MachineRegisterInfo::hasOneUse(unsigned RegNo) const {
159 use_iterator UI = use_begin(RegNo);
165 bool MachineRegisterInfo::hasOneNonDBGUse(unsigned RegNo) const {
166 use_nodbg_iterator UI = use_nodbg_begin(RegNo);
  /external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/
X86MCTargetDesc.h 62 unsigned getX86RegNum(unsigned RegNo);
  /external/swiftshader/third_party/LLVM/lib/Target/X86/
X86RegisterInfo.h 58 static unsigned getX86RegNum(unsigned RegNo);
X86FloatingPoint.cpp 188 unsigned getSlot(unsigned RegNo) const {
189 assert(RegNo < NumFPRegs && "Regno out of range!");
190 return RegMap[RegNo];
193 /// isLive - Is RegNo currently live in the stack?
194 bool isLive(unsigned RegNo) const {
195 unsigned Slot = getSlot(RegNo);
196 return Slot < StackTop && Stack[Slot] == RegNo;
207 /// isScratchReg - Returns trus if RegNo is a scratch FP register.
208 bool isScratchReg(unsigned RegNo) {
    [all...]
  /external/llvm/lib/Target/X86/AsmParser/
X86AsmParser.cpp 752 bool OmitRegisterFromClobberLists(unsigned RegNo) override;
813 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) override;
815 void SetFrameRegister(unsigned RegNo) override;
869 bool X86AsmParser::ParseRegister(unsigned &RegNo,
872 RegNo = 0;
890 RegNo = MatchRegisterName(Tok.getString());
893 if (RegNo == 0)
894 RegNo = MatchRegisterName(Tok.getString().lower());
898 if (isParsingInlineAsm() && isParsingIntelSyntax() && RegNo == X86::EFLAGS)
899 RegNo = 0
    [all...]
  /external/llvm/lib/Target/AMDGPU/MCTargetDesc/
R600MCCodeEmitter.cpp 58 unsigned getHWReg(unsigned regNo) const;
151 unsigned R600MCCodeEmitter::getHWReg(unsigned RegNo) const {
152 return MRI.getEncodingValue(RegNo) & HW_REG_MASK;
  /external/llvm/lib/Target/Sparc/InstPrinter/
SparcInstPrinter.cpp 42 void SparcInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const
44 OS << '%' << StringRef(getRegisterName(RegNo)).lower();
  /external/swiftshader/third_party/LLVM/lib/Target/PTX/InstPrinter/
PTXInstPrinter.cpp 40 void PTXInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
41 OS << getRegisterName(RegNo);
  /external/llvm/include/llvm/MC/
MCInstPrinter.h 80 virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
  /external/llvm/lib/MC/
MCInstPrinter.cpp 37 void MCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
  /external/llvm/lib/Target/AMDGPU/InstPrinter/
AMDGPUInstPrinter.h 28 static const char *getRegisterName(unsigned RegNo);
32 static void printRegOperand(unsigned RegNo, raw_ostream &O,
63 void printRegOperand(unsigned RegNo, raw_ostream &O);
  /external/llvm/lib/Target/WebAssembly/InstPrinter/
WebAssemblyInstPrinter.cpp 41 unsigned RegNo) const {
42 assert(RegNo != WebAssemblyFunctionInfo::UnusedReg);
44 OS << "$" << RegNo;
  /external/llvm/lib/CodeGen/
LiveDebugValues.cpp 93 uint32_t RegNo;
106 if (int RegNo = isDbgValueDescribedByReg(MI)) {
108 Loc.RegisterLoc.RegNo = RegNo;
124 return Loc.RegisterLoc.RegNo;
  /external/llvm/lib/Target/X86/
X86FloatingPoint.cpp 176 unsigned getSlot(unsigned RegNo) const {
177 assert(RegNo < NumFPRegs && "Regno out of range!");
178 return RegMap[RegNo];
181 /// isLive - Is RegNo currently live in the stack?
182 bool isLive(unsigned RegNo) const {
183 unsigned Slot = getSlot(RegNo);
184 return Slot < StackTop && Stack[Slot] == RegNo;
195 /// FP<RegNo> register.
196 unsigned getSTReg(unsigned RegNo) const
    [all...]
  /external/llvm/lib/Target/Mips/MCTargetDesc/
MipsTargetStreamer.cpp 53 void MipsTargetStreamer::emitDirectiveSetAtWithArg(unsigned RegNo) {
99 void MipsTargetStreamer::emitDirectiveCpLoad(unsigned RegNo) {}
106 void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
399 void MipsTargetAsmStreamer::emitDirectiveSetAtWithArg(unsigned RegNo) {
400 OS << "\t.set\tat=$" << Twine(RegNo) << "\n";
401 MipsTargetStreamer::emitDirectiveSetAtWithArg(RegNo);
582 void MipsTargetAsmStreamer::emitDirectiveCpLoad(unsigned RegNo) {
584 << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << "\n";
596 void MipsTargetAsmStreamer::emitDirectiveCpsetup(unsigned RegNo,
601 << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << ", "
    [all...]
  /external/llvm/lib/Target/XCore/Disassembler/
XCoreDisassembler.cpp 70 static unsigned getReg(const void *D, unsigned RC, unsigned RegNo) {
73 return *(RegInfo->getRegClass(RC).begin() + RegNo);
77 unsigned RegNo,
82 unsigned RegNo,
200 unsigned RegNo,
204 if (RegNo > 11)
206 unsigned Reg = getReg(Decoder, XCore::GRRegsRegClassID, RegNo);
212 unsigned RegNo,
216 if (RegNo > 15)
218 unsigned Reg = getReg(Decoder, XCore::RRegsRegClassID, RegNo);
    [all...]

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