Home | History | Annotate | Download | only in PowerPC 
      1 //===-- PPCTOCRegDeps.cpp - Add Extra TOC Register Dependencies -----------===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // When resolving an address using the ELF ABI TOC pointer, two relocations are
     11 // generally required: one for the high part and one for the low part. Only
     12 // the high part generally explicitly depends on r2 (the TOC pointer). And, so,
     13 // we might produce code like this:
     14 //
     15 // .Ltmp526:
     16 //         addis 3, 2, .LC12@toc@ha
     17 // .Ltmp1628:
     18 //         std 2, 40(1)
     19 //         ld 5, 0(27)
     20 //         ld 2, 8(27)
     21 //         ld 11, 16(27)
     22 //         ld 3, .LC12@toc@l(3)
     23 //         rldicl 4, 4, 0, 32
     24 //         mtctr 5
     25 //         bctrl
     26 //         ld 2, 40(1)
     27 //
     28 // And there is nothing wrong with this code, as such, but there is a linker bug
     29 // in binutils (https://sourceware.org/bugzilla/show_bug.cgi?id=18414) that will
     30 // misoptimize this code sequence to this:
     31 //         nop
     32 //         std     r2,40(r1)
     33 //         ld      r5,0(r27)
     34 //         ld      r2,8(r27)
     35 //         ld      r11,16(r27)
     36 //         ld      r3,-32472(r2)
     37 //         clrldi  r4,r4,32
     38 //         mtctr   r5
     39 //         bctrl
     40 //         ld      r2,40(r1)
     41 // because the linker does not know (and does not check) that the value in r2
     42 // changed in between the instruction using the .LC12@toc@ha (TOC-relative)
     43 // relocation and the instruction using the .LC12@toc@l(3) relocation.
     44 // Because it finds these instructions using the relocations (and not by
     45 // scanning the instructions), it has been asserted that there is no good way
     46 // to detect the change of r2 in between. As a result, this bug may never be
     47 // fixed (i.e. it may become part of the definition of the ABI). GCC was
     48 // updated to add extra dependencies on r2 to instructions using the @toc@l
     49 // relocations to avoid this problem, and we'll do the same here.
     50 //
     51 // This is done as a separate pass because:
     52 //  1. These extra r2 dependencies are not really properties of the
     53 //     instructions, but rather due to a linker bug, and maybe one day we'll be
     54 //     able to get rid of them when targeting linkers without this bug (and,
     55 //     thus, keeping the logic centralized here will make that
     56 //     straightforward).
     57 //  2. There are ISel-level peephole optimizations that propagate the @toc@l
     58 //     relocations to some user instructions, and so the exta dependencies do
     59 //     not apply only to a fixed set of instructions (without undesirable
     60 //     definition replication).
     61 //
     62 //===----------------------------------------------------------------------===//
     63 
     64 #include "PPC.h"
     65 #include "MCTargetDesc/PPCPredicates.h"
     66 #include "PPCInstrBuilder.h"
     67 #include "PPCInstrInfo.h"
     68 #include "PPCMachineFunctionInfo.h"
     69 #include "PPCTargetMachine.h"
     70 #include "llvm/ADT/STLExtras.h"
     71 #include "llvm/ADT/Statistic.h"
     72 #include "llvm/CodeGen/MachineFrameInfo.h"
     73 #include "llvm/CodeGen/MachineFunctionPass.h"
     74 #include "llvm/CodeGen/MachineInstr.h"
     75 #include "llvm/CodeGen/MachineRegisterInfo.h"
     76 #include "llvm/MC/MCAsmInfo.h"
     77 #include "llvm/Support/Debug.h"
     78 #include "llvm/Support/ErrorHandling.h"
     79 #include "llvm/Support/TargetRegistry.h"
     80 #include "llvm/Support/raw_ostream.h"
     81 
     82 using namespace llvm;
     83 
     84 #define DEBUG_TYPE "ppc-toc-reg-deps"
     85 
     86 namespace llvm {
     87   void initializePPCTOCRegDepsPass(PassRegistry&);
     88 }
     89 
     90 namespace {
     91   // PPCTOCRegDeps pass - For simple functions without epilogue code, move
     92   // returns up, and create conditional returns, to avoid unnecessary
     93   // branch-to-blr sequences.
     94   struct PPCTOCRegDeps : public MachineFunctionPass {
     95     static char ID;
     96     PPCTOCRegDeps() : MachineFunctionPass(ID) {
     97       initializePPCTOCRegDepsPass(*PassRegistry::getPassRegistry());
     98     }
     99 
    100 protected:
    101     bool hasTOCLoReloc(const MachineInstr &MI) {
    102       if (MI.getOpcode() == PPC::LDtocL ||
    103           MI.getOpcode() == PPC::ADDItocL)
    104         return true;
    105 
    106       for (const MachineOperand &MO : MI.operands()) {
    107         if ((MO.getTargetFlags() & PPCII::MO_ACCESS_MASK) == PPCII::MO_TOC_LO)
    108           return true;
    109       }
    110 
    111       return false;
    112     }
    113 
    114     bool processBlock(MachineBasicBlock &MBB) {
    115       bool Changed = false;
    116 
    117       for (auto &MI : MBB) {
    118         if (!hasTOCLoReloc(MI))
    119           continue;
    120 
    121         MI.addOperand(MachineOperand::CreateReg(PPC::X2,
    122                                                 false  /*IsDef*/,
    123                                                 true  /*IsImp*/));
    124         Changed = true;
    125       }
    126 
    127       return Changed;
    128     }
    129 
    130 public:
    131     bool runOnMachineFunction(MachineFunction &MF) override {
    132       bool Changed = false;
    133 
    134       for (MachineFunction::iterator I = MF.begin(); I != MF.end();) {
    135         MachineBasicBlock &B = *I++;
    136         if (processBlock(B))
    137           Changed = true;
    138       }
    139 
    140       return Changed;
    141     }
    142 
    143     void getAnalysisUsage(AnalysisUsage &AU) const override {
    144       MachineFunctionPass::getAnalysisUsage(AU);
    145     }
    146   };
    147 }
    148 
    149 INITIALIZE_PASS(PPCTOCRegDeps, DEBUG_TYPE,
    150                 "PowerPC TOC Register Dependencies", false, false)
    151 
    152 char PPCTOCRegDeps::ID = 0;
    153 FunctionPass*
    154 llvm::createPPCTOCRegDepsPass() { return new PPCTOCRegDeps(); }
    155 
    156