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      1 //===--  MipsExpandPseudo.cpp - Expand pseudo instructions ----------------===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This pass expands pseudo instructions into target instructions after register
     11 // allocation but before post-RA scheduling.
     12 //
     13 //===----------------------------------------------------------------------===//
     14 
     15 #define DEBUG_TYPE "mips-expand-pseudo"
     16 
     17 #include "Mips.h"
     18 #include "MipsTargetMachine.h"
     19 #include "llvm/CodeGen/MachineFunctionPass.h"
     20 #include "llvm/CodeGen/MachineInstrBuilder.h"
     21 #include "llvm/Target/TargetInstrInfo.h"
     22 #include "llvm/ADT/Statistic.h"
     23 
     24 using namespace llvm;
     25 
     26 namespace {
     27   struct MipsExpandPseudo : public MachineFunctionPass {
     28 
     29     TargetMachine &TM;
     30     const TargetInstrInfo *TII;
     31 
     32     static char ID;
     33     MipsExpandPseudo(TargetMachine &tm)
     34       : MachineFunctionPass(ID), TM(tm), TII(tm.getInstrInfo()) { }
     35 
     36     virtual const char *getPassName() const {
     37       return "Mips PseudoInstrs Expansion";
     38     }
     39 
     40     bool runOnMachineFunction(MachineFunction &F);
     41     bool runOnMachineBasicBlock(MachineBasicBlock &MBB);
     42 
     43   private:
     44     void ExpandBuildPairF64(MachineBasicBlock&, MachineBasicBlock::iterator);
     45     void ExpandExtractElementF64(MachineBasicBlock&,
     46                                  MachineBasicBlock::iterator);
     47   };
     48   char MipsExpandPseudo::ID = 0;
     49 } // end of anonymous namespace
     50 
     51 bool MipsExpandPseudo::runOnMachineFunction(MachineFunction& F) {
     52   bool Changed = false;
     53 
     54   for (MachineFunction::iterator I = F.begin(); I != F.end(); ++I)
     55     Changed |= runOnMachineBasicBlock(*I);
     56 
     57   return Changed;
     58 }
     59 
     60 bool MipsExpandPseudo::runOnMachineBasicBlock(MachineBasicBlock& MBB) {
     61 
     62   bool Changed = false;
     63   for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end();) {
     64     const MCInstrDesc& MCid = I->getDesc();
     65 
     66     switch(MCid.getOpcode()) {
     67     default:
     68       ++I;
     69       continue;
     70     case Mips::BuildPairF64:
     71       ExpandBuildPairF64(MBB, I);
     72       break;
     73     case Mips::ExtractElementF64:
     74       ExpandExtractElementF64(MBB, I);
     75       break;
     76     }
     77 
     78     // delete original instr
     79     MBB.erase(I++);
     80     Changed = true;
     81   }
     82 
     83   return Changed;
     84 }
     85 
     86 void MipsExpandPseudo::ExpandBuildPairF64(MachineBasicBlock& MBB,
     87                                             MachineBasicBlock::iterator I) {
     88   unsigned DstReg = I->getOperand(0).getReg();
     89   unsigned LoReg = I->getOperand(1).getReg(), HiReg = I->getOperand(2).getReg();
     90   const MCInstrDesc& Mtc1Tdd = TII->get(Mips::MTC1);
     91   DebugLoc dl = I->getDebugLoc();
     92   const unsigned* SubReg =
     93     TM.getRegisterInfo()->getSubRegisters(DstReg);
     94 
     95   // mtc1 Lo, $fp
     96   // mtc1 Hi, $fp + 1
     97   BuildMI(MBB, I, dl, Mtc1Tdd, *SubReg).addReg(LoReg);
     98   BuildMI(MBB, I, dl, Mtc1Tdd, *(SubReg + 1)).addReg(HiReg);
     99 }
    100 
    101 void MipsExpandPseudo::ExpandExtractElementF64(MachineBasicBlock& MBB,
    102                                                MachineBasicBlock::iterator I) {
    103   unsigned DstReg = I->getOperand(0).getReg();
    104   unsigned SrcReg = I->getOperand(1).getReg();
    105   unsigned N = I->getOperand(2).getImm();
    106   const MCInstrDesc& Mfc1Tdd = TII->get(Mips::MFC1);
    107   DebugLoc dl = I->getDebugLoc();
    108   const unsigned* SubReg = TM.getRegisterInfo()->getSubRegisters(SrcReg);
    109 
    110   BuildMI(MBB, I, dl, Mfc1Tdd, DstReg).addReg(*(SubReg + N));
    111 }
    112 
    113 /// createMipsMipsExpandPseudoPass - Returns a pass that expands pseudo
    114 /// instrs into real instrs
    115 FunctionPass *llvm::createMipsExpandPseudoPass(MipsTargetMachine &tm) {
    116   return new MipsExpandPseudo(tm);
    117 }
    118