/device/linaro/bootloader/edk2/MdePkg/Library/DxeSalLibEsal/ |
DxeSalLibEsal.c | 61 SAL_RETURN_REGS Regs;
66 Regs.r9 = 0;
67 Regs.r10 = 0;
68 Regs.r11 = 0;
69 Regs.Status = EFI_SAL_INVALID_ARGUMENT;
283 return Regs;
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/device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/ |
LegacyBbs.c | 292 EFI_IA32_REGISTER_SET Regs;
348 ZeroMem (&Regs, sizeof (EFI_IA32_REGISTER_SET));
349 Regs.X.AX = Legacy16UpdateBbs;
355 Regs.X.ES = NORMALIZE_EFI_SEGMENT ((UINT32) TempData);
356 Regs.X.BX = NORMALIZE_EFI_OFFSET ((UINT32) TempData);
362 &Regs,
370 if (Regs.X.AX != 0) {
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LegacyBios.c | 125 EFI_IA32_REGISTER_SET Regs;
132 ZeroMem (&Regs, sizeof (EFI_IA32_REGISTER_SET));
133 Regs.X.AX = Legacy16GetTableAddress;
134 Regs.X.BX = (UINT16) Region;
135 Regs.X.CX = (UINT16) LegacyMemorySize;
136 Regs.X.DX = (UINT16) Alignment;
141 &Regs,
146 if (Regs.X.AX == 0) {
147 *LegacyMemoryAddress = (VOID *) (UINTN) ((Regs.X.DS << 4) + Regs.X.BX); [all...] |
LegacyBootSupport.c | 649 EFI_IA32_REGISTER_SET Regs;
692 ZeroMem (&Regs, sizeof (EFI_IA32_REGISTER_SET));
693 Regs.X.AX = Legacy16GetTableAddress;
694 Regs.X.CX = (UINT16) TableSize;
695 Regs.X.BX = (UINT16) Location;
696 Regs.X.DX = (UINT16) Alignment;
701 &Regs,
706 if (Regs.X.AX != 0) {
723 Regs.X.DS,
724 Regs.X.BX [all...] |
LegacyPci.c | 793 EFI_IA32_REGISTER_SET Regs;
809 ZeroMem (&Regs, sizeof (EFI_IA32_REGISTER_SET));
811 Regs.X.AX = Legacy16GetTableAddress;
812 Regs.X.CX = (UINT16) PirqTableSize;
816 Regs.X.BX = (UINT16) 0x1;
821 Regs.X.DX = 0x10;
826 &Regs,
831 Private->Legacy16Table->IrqRoutingTablePointer = (UINT32) (Regs.X.DS * 16 + Regs.X.BX);
832 if (Regs.X.AX != 0) { [all...] |
/external/llvm/lib/Target/WebAssembly/ |
WebAssemblyRegisterInfo.cpp | 127 static const unsigned Regs[2][2] = { 132 return Regs[TFI->hasFP(MF)][TT.isArch64Bit()];
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/system/core/libunwindstack/include/unwindstack/ |
Regs.h | 33 class Regs { 48 Regs(uint16_t total_regs, uint16_t sp_reg, const Location& return_loc) 50 virtual ~Regs() = default; 68 static Regs* RemoteGet(pid_t pid, uint32_t* machine_type); 69 static Regs* CreateFromUcontext(uint32_t machine_type, void* ucontext); 70 static Regs* CreateFromLocal(); 79 class RegsImpl : public Regs { 82 : Regs(total_regs, sp_reg, return_loc), regs_(total_regs) {}
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/device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Csm/BiosThunk/BlockIoDxe/ |
BiosInt13.c | 143 EFI_IA32_REGISTER_SET Regs;
145 ZeroMem (&Regs, sizeof (EFI_IA32_REGISTER_SET));
147 Regs.H.AH = 0x08;
148 Regs.H.DL = Drive->Number;
149 CarryFlag = BiosBlockIoDev->LegacyBios->Int86 (BiosBlockIoDev->LegacyBios, 0x13, &Regs);
150 DEBUG ((DEBUG_INIT, "Int13GetDeviceParameters: INT 13 08 DL=%02x : CF=%d AH=%02x\n", Drive->Number, CarryFlag, Regs.H.AH));
151 if (CarryFlag != 0 || Regs.H.AH != 0x00) {
152 Drive->ErrorCode = Regs.H.AH;
157 if (Regs.H.BL == 0x10) {
160 Drive->MaxHead = Regs.H.DH; [all...] |
/device/linaro/bootloader/edk2/MdePkg/Library/DxeExtendedSalLib/ |
ExtendedSalLib.c | 432 SAL_RETURN_REGS Regs;
434 Regs = EsalCall (
447 *McaBuffer = (UINT8 *) Regs.r9;
448 *BufferSize = Regs.r10;
450 return Regs;
948 SAL_RETURN_REGS Regs;
950 Regs = EsalCall (
963 *StateBufferPointer = (EFI_PHYSICAL_ADDRESS) Regs.r9;
964 *RequiredStateBufferSize = (UINT64) Regs.r10;
966 return Regs;
[all...] |
/device/linaro/bootloader/edk2/MdePkg/Library/DxeRuntimeExtendedSalLib/ |
ExtendedSalLib.c | 555 SAL_RETURN_REGS Regs;
557 Regs = EsalCall (
570 *McaBuffer = (UINT8 *) Regs.r9;
571 *BufferSize = Regs.r10;
573 return Regs;
[all...] |
/device/linaro/bootloader/edk2/OvmfPkg/Csm/CsmSupportLib/ |
LegacyPlatform.c | 631 EFI_IA32_REGISTER_SET Regs;
646 Regs.H.AH = 0x00;
647 Regs.H.AL = 0x03;
648 Status = LegacyBios->Int86 (LegacyBios, 0x10, &Regs);
[all...] |
/external/llvm/lib/CodeGen/ |
ExecutionDepsFix.cpp | 655 SmallVector<LiveReg, 4> Regs; 667 for (SmallVectorImpl<LiveReg>::iterator i = Regs.begin(), e = Regs.end(); 671 Regs.insert(i, LR); 675 Regs.push_back(LR); 681 while (!Regs.empty()) { 683 dv = Regs.pop_back_val().Value; 690 DomainValue *Latest = Regs.pop_back_val().Value;
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/external/llvm/utils/TableGen/ |
CodeGenTarget.cpp | 235 const StringMap<CodeGenRegister*> &Regs = getRegBank().getRegistersByName(); 236 StringMap<CodeGenRegister*>::const_iterator I = Regs.find(Name); 237 if (I == Regs.end())
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RegisterInfoEmitter.cpp | 72 void EmitRegMapping(raw_ostream &o, const std::deque<CodeGenRegister> &Regs, 75 const std::deque<CodeGenRegister> &Regs, 93 assert(Registers.size() <= 0xffff && "Too many regs to fit in tables"); 200 const CodeGenRegister::Vec &Regs = RC.getMembers(); 201 if (Regs.empty()) 206 OS << " {" << (*Regs.begin())->getWeight(RegBank) 338 raw_ostream &OS, const std::deque<CodeGenRegister> &Regs, bool isCtor) { 345 for (auto &RE : Regs) { 364 std::string Namespace = Regs.front().TheDef->getValueAsString("Namespace"); 412 for (auto &RE : Regs) { [all...] |
/external/swiftshader/third_party/LLVM/utils/TableGen/ |
CodeGenTarget.cpp | 175 const std::vector<CodeGenRegister*> &Regs = getRegBank().getRegisters(); 176 for (unsigned i = 0, e = Regs.size(); i != e; ++i) 177 if (Regs[i]->TheDef->getValueAsString("AsmName") == Name) 178 return Regs[i];
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RegisterInfoEmitter.cpp | 99 const std::vector<CodeGenRegister*> &Regs, 108 for (unsigned i = 0, e = Regs.size(); i != e; ++i) { 109 Record *Reg = Regs[i]->TheDef; 162 for (unsigned i = 0, e = Regs.size(); i != e; ++i) { 163 Record *Reg = Regs[i]->TheDef; 262 const std::vector<CodeGenRegister*> &Regs = RegBank.getRegisters(); 265 for (unsigned i = 0, e = Regs.size(); i != e; ++i) { 266 const CodeGenRegister *Reg = Regs[i]; 282 for (unsigned i = 0, e = Regs.size(); i != e; ++i) { 283 const CodeGenRegister &Reg = *Regs[i] [all...] |
CodeGenRegisters.cpp | 523 std::vector<Record*> Regs = Records.getAllDerivedDefinitions("Register"); 524 std::sort(Regs.begin(), Regs.end(), LessRecord()); 525 Registers.reserve(Regs.size()); 527 for (unsigned i = 0, e = Regs.size(); i != e; ++i) 528 getReg(Regs[i]);
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/device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Csm/BiosThunk/KeyboardDxe/ |
BiosKeyboard.c | 202 EFI_IA32_REGISTER_SET Regs;
394 Regs.H.AH = 0xc0;
398 &Regs
406 if (*(UINT8 *)(UINTN) ((Regs.X.ES << 4) + Regs.X.BX + 0x06) & 0x40) {
410 Regs.H.AH = 0x09;
414 &Regs
422 if ((Regs.H.AL & 0x40) != 0) {
[all...] |
/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Include/Guid/ |
PlatformCpuInfo.h | 123 EFI_CPUID_REGISTER Regs; // CPUID.1.EAX
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
ARMFrameLowering.cpp | 561 SmallVector<std::pair<unsigned,bool>, 4> Regs; 589 Regs.push_back(std::make_pair(Reg, isKill)); 592 if (Regs.empty()) 594 if (Regs.size() > 1 || StrOpc== 0) { 598 for (unsigned i = 0, e = Regs.size(); i < e; ++i) 599 MIB.addReg(Regs[i].first, getKillRegState(Regs[i].second)); 600 } else if (Regs.size() == 1) { 603 .addReg(Regs[0].first, getKillRegState(Regs[0].second) [all...] |
/device/linaro/bootloader/edk2/DuetPkg/BiosVideoThunkDxe/ |
BiosVideo.c | 602 IA32_REGISTER_SET Regs;
684 gBS->SetMem (&Regs, sizeof (Regs), 0);
689 Regs.H.AH = 0x00;
690 Regs.H.AL = 0x03;
691 LegacyBiosInt86 (BiosVideoPrivate, 0x10, &Regs);
693 Regs.H.AH = 0x11;
694 Regs.H.AL = 0x14;
695 Regs.H.BL = 0;
696 LegacyBiosInt86 (BiosVideoPrivate, 0x10, &Regs);
[all...] |
/device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Csm/BiosThunk/VideoDxe/ |
BiosVideo.c | 848 EFI_IA32_REGISTER_SET Regs;
892 Regs.H.AH = 0x00;
893 Regs.H.AL = 0x03;
894 BiosVideoPrivate->LegacyBios->Int86 (BiosVideoPrivate->LegacyBios, 0x10, &Regs);
896 Regs.H.AH = 0x11;
897 Regs.H.AL = 0x14;
898 Regs.H.BL = 0;
899 BiosVideoPrivate->LegacyBios->Int86 (BiosVideoPrivate->LegacyBios, 0x10, &Regs);
[all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGBuilder.h | [all...] |
/external/llvm/lib/Target/ARM/ |
ARMLoadStoreOptimizer.cpp | 155 ArrayRef<std::pair<unsigned, bool>> Regs); 160 ArrayRef<std::pair<unsigned, bool>> Regs) const; 550 /// Return the first register of class \p RegClass that is not in \p Regs. 582 static bool ContainsReg(const ArrayRef<std::pair<unsigned, bool>> &Regs, 584 for (const std::pair<unsigned, bool> &R : Regs) 591 /// Regs as the register operands that would be loaded / stored. It returns 597 ArrayRef<std::pair<unsigned, bool>> Regs) { 598 unsigned NumRegs = Regs.size(); 612 if (isThumb1 && isi32Load(Opcode) && ContainsReg(Regs, Base)) { 653 NewBase = Regs[NumRegs-1].first [all...] |
/external/llvm/lib/Target/Mips/Disassembler/ |
MipsDisassembler.cpp | [all...] |