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      1 /*
      2  * Copyright  2009 Corbin Simpson
      3  * Copyright  2015 Advanced Micro Devices, Inc.
      4  * All Rights Reserved.
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining
      7  * a copy of this software and associated documentation files (the
      8  * "Software"), to deal in the Software without restriction, including
      9  * without limitation the rights to use, copy, modify, merge, publish,
     10  * distribute, sub license, and/or sell copies of the Software, and to
     11  * permit persons to whom the Software is furnished to do so, subject to
     12  * the following conditions:
     13  *
     14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     15  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
     16  * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     17  * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
     18  * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
     19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     20  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
     21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
     22  *
     23  * The above copyright notice and this permission notice (including the
     24  * next paragraph) shall be included in all copies or substantial portions
     25  * of the Software.
     26  */
     27 /*
     28  * Authors:
     29  *      Marek Olk <maraeo (at) gmail.com>
     30  */
     31 
     32 #ifndef AMDGPU_WINSYS_H
     33 #define AMDGPU_WINSYS_H
     34 
     35 #include "pipebuffer/pb_cache.h"
     36 #include "pipebuffer/pb_slab.h"
     37 #include "gallium/drivers/radeon/radeon_winsys.h"
     38 #include "addrlib/addrinterface.h"
     39 #include "util/u_queue.h"
     40 #include <amdgpu.h>
     41 
     42 struct amdgpu_cs;
     43 
     44 #define AMDGPU_SLAB_MIN_SIZE_LOG2 9
     45 #define AMDGPU_SLAB_MAX_SIZE_LOG2 14
     46 
     47 struct amdgpu_winsys {
     48    struct radeon_winsys base;
     49    struct pipe_reference reference;
     50    struct pb_cache bo_cache;
     51    struct pb_slabs bo_slabs;
     52 
     53    amdgpu_device_handle dev;
     54 
     55    pipe_mutex bo_fence_lock;
     56 
     57    int num_cs; /* The number of command streams created. */
     58    uint32_t next_bo_unique_id;
     59    uint64_t allocated_vram;
     60    uint64_t allocated_gtt;
     61    uint64_t mapped_vram;
     62    uint64_t mapped_gtt;
     63    uint64_t buffer_wait_time; /* time spent in buffer_wait in ns */
     64    uint64_t num_gfx_IBs;
     65    uint64_t num_sdma_IBs;
     66 
     67    struct radeon_info info;
     68 
     69    /* multithreaded IB submission */
     70    struct util_queue cs_queue;
     71 
     72    struct amdgpu_gpu_info amdinfo;
     73    ADDR_HANDLE addrlib;
     74    uint32_t rev_id;
     75    unsigned family;
     76 
     77    bool check_vm;
     78 
     79    /* List of all allocated buffers */
     80    pipe_mutex global_bo_list_lock;
     81    struct list_head global_bo_list;
     82    unsigned num_buffers;
     83 };
     84 
     85 static inline struct amdgpu_winsys *
     86 amdgpu_winsys(struct radeon_winsys *base)
     87 {
     88    return (struct amdgpu_winsys*)base;
     89 }
     90 
     91 void amdgpu_surface_init_functions(struct amdgpu_winsys *ws);
     92 ADDR_HANDLE amdgpu_addr_create(struct amdgpu_winsys *ws);
     93 
     94 #endif
     95