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Searched
refs:ImmIdx
(Results
1 - 11
of
11
) sorted by null
/external/llvm/lib/Target/PowerPC/
PPCTargetTransformInfo.cpp
119
unsigned
ImmIdx
= ~0U;
145
ImmIdx
= 1;
149
ImmIdx
= 1;
165
if (Idx ==
ImmIdx
&& Imm.getBitWidth() <= 64) {
/external/llvm/lib/Target/ARM/
ARMBaseRegisterInfo.cpp
455
unsigned
ImmIdx
= 0;
473
ImmIdx
= Idx+2;
474
InstrOffs = ARM_AM::getAM2Offset(MI->getOperand(
ImmIdx
).getImm());
475
if (ARM_AM::getAM2Op(MI->getOperand(
ImmIdx
).getImm()) == ARM_AM::sub)
480
ImmIdx
= Idx+2;
481
InstrOffs = ARM_AM::getAM3Offset(MI->getOperand(
ImmIdx
).getImm());
482
if (ARM_AM::getAM3Op(MI->getOperand(
ImmIdx
).getImm()) == ARM_AM::sub)
487
ImmIdx
= Idx+1;
488
InstrOffs = MI->getOperand(
ImmIdx
).getImm();
ThumbRegisterInfo.cpp
376
unsigned
ImmIdx
= FrameRegIdx + 1;
377
int InstrOffs = MI.getOperand(
ImmIdx
).getImm();
385
MachineOperand &ImmOp = MI.getOperand(
ImmIdx
);
ARMBaseInstrInfo.cpp
[
all
...]
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
ARMBaseRegisterInfo.cpp
897
unsigned
ImmIdx
= 0;
915
ImmIdx
= Idx+2;
916
InstrOffs = ARM_AM::getAM2Offset(MI->getOperand(
ImmIdx
).getImm());
917
if (ARM_AM::getAM2Op(MI->getOperand(
ImmIdx
).getImm()) == ARM_AM::sub)
922
ImmIdx
= Idx+2;
923
InstrOffs = ARM_AM::getAM3Offset(MI->getOperand(
ImmIdx
).getImm());
924
if (ARM_AM::getAM3Op(MI->getOperand(
ImmIdx
).getImm()) == ARM_AM::sub)
929
ImmIdx
= Idx+1;
930
InstrOffs = MI->getOperand(
ImmIdx
).getImm();
[
all
...]
ARMBaseInstrInfo.cpp
[
all
...]
Thumb1RegisterInfo.cpp
484
unsigned
ImmIdx
= FrameRegIdx + 1;
485
int InstrOffs = MI.getOperand(
ImmIdx
).getImm();
493
MachineOperand &ImmOp = MI.getOperand(
ImmIdx
);
/external/llvm/lib/Target/AArch64/
AArch64TargetTransformInfo.cpp
74
unsigned
ImmIdx
= ~0U;
84
ImmIdx
= 0;
97
ImmIdx
= 1;
120
if (Idx ==
ImmIdx
) {
AArch64InstrInfo.cpp
[
all
...]
/external/llvm/lib/Target/X86/
X86TargetTransformInfo.cpp
[
all
...]
/external/llvm/lib/Target/AMDGPU/
R600ISelLowering.cpp
[
all
...]
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