1 /* 2 * Copyright 2010 Jerome Glisse <glisse (at) freedesktop.org> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 #ifndef R600_ASM_H 24 #define R600_ASM_H 25 26 #include "r600_pipe.h" 27 #include "r600_isa.h" 28 29 struct r600_bytecode_alu_src { 30 unsigned sel; 31 unsigned chan; 32 unsigned neg; 33 unsigned abs; 34 unsigned rel; 35 unsigned kc_bank; 36 unsigned kc_rel; 37 uint32_t value; 38 }; 39 40 struct r600_bytecode_alu_dst { 41 unsigned sel; 42 unsigned chan; 43 unsigned clamp; 44 unsigned write; 45 unsigned rel; 46 }; 47 48 struct r600_bytecode_alu { 49 struct list_head list; 50 struct r600_bytecode_alu_src src[3]; 51 struct r600_bytecode_alu_dst dst; 52 unsigned op; 53 unsigned last; 54 unsigned is_op3; 55 unsigned is_lds_idx_op; 56 unsigned execute_mask; 57 unsigned update_pred; 58 unsigned pred_sel; 59 unsigned bank_swizzle; 60 unsigned bank_swizzle_force; 61 unsigned omod; 62 unsigned index_mode; 63 unsigned lds_idx; 64 }; 65 66 struct r600_bytecode_tex { 67 struct list_head list; 68 unsigned op; 69 unsigned inst_mod; 70 unsigned resource_id; 71 unsigned src_gpr; 72 unsigned src_rel; 73 unsigned dst_gpr; 74 unsigned dst_rel; 75 unsigned dst_sel_x; 76 unsigned dst_sel_y; 77 unsigned dst_sel_z; 78 unsigned dst_sel_w; 79 unsigned lod_bias; 80 unsigned coord_type_x; 81 unsigned coord_type_y; 82 unsigned coord_type_z; 83 unsigned coord_type_w; 84 int offset_x; 85 int offset_y; 86 int offset_z; 87 unsigned sampler_id; 88 unsigned src_sel_x; 89 unsigned src_sel_y; 90 unsigned src_sel_z; 91 unsigned src_sel_w; 92 /* indexed samplers/resources only on evergreen/cayman */ 93 unsigned sampler_index_mode; 94 unsigned resource_index_mode; 95 }; 96 97 struct r600_bytecode_vtx { 98 struct list_head list; 99 unsigned op; 100 unsigned fetch_type; 101 unsigned buffer_id; 102 unsigned src_gpr; 103 unsigned src_sel_x; 104 unsigned mega_fetch_count; 105 unsigned dst_gpr; 106 unsigned dst_sel_x; 107 unsigned dst_sel_y; 108 unsigned dst_sel_z; 109 unsigned dst_sel_w; 110 unsigned use_const_fields; 111 unsigned data_format; 112 unsigned num_format_all; 113 unsigned format_comp_all; 114 unsigned srf_mode_all; 115 unsigned offset; 116 unsigned endian; 117 unsigned buffer_index_mode; 118 }; 119 120 struct r600_bytecode_gds { 121 struct list_head list; 122 unsigned op; 123 unsigned gds_op; 124 unsigned src_gpr; 125 unsigned src_rel; 126 unsigned src_sel_x; 127 unsigned src_sel_y; 128 unsigned src_sel_z; 129 unsigned src_gpr2; 130 unsigned dst_gpr; 131 unsigned dst_rel; 132 unsigned dst_sel_x; 133 unsigned dst_sel_y; 134 unsigned dst_sel_z; 135 unsigned dst_sel_w; 136 }; 137 138 struct r600_bytecode_output { 139 unsigned array_base; 140 unsigned array_size; 141 unsigned comp_mask; 142 unsigned type; 143 144 unsigned op; 145 146 unsigned elem_size; 147 unsigned gpr; 148 unsigned swizzle_x; 149 unsigned swizzle_y; 150 unsigned swizzle_z; 151 unsigned swizzle_w; 152 unsigned burst_count; 153 unsigned index_gpr; 154 }; 155 156 struct r600_bytecode_kcache { 157 unsigned bank; 158 unsigned mode; 159 unsigned addr; 160 unsigned index_mode; 161 }; 162 163 struct r600_bytecode_cf { 164 struct list_head list; 165 166 unsigned op; 167 unsigned addr; 168 unsigned ndw; 169 unsigned id; 170 unsigned cond; 171 unsigned pop_count; 172 unsigned count; 173 unsigned cf_addr; /* control flow addr */ 174 struct r600_bytecode_kcache kcache[4]; 175 unsigned r6xx_uses_waterfall; 176 unsigned eg_alu_extended; 177 unsigned barrier; 178 unsigned end_of_program; 179 struct list_head alu; 180 struct list_head tex; 181 struct list_head vtx; 182 struct list_head gds; 183 struct r600_bytecode_output output; 184 struct r600_bytecode_alu *curr_bs_head; 185 struct r600_bytecode_alu *prev_bs_head; 186 struct r600_bytecode_alu *prev2_bs_head; 187 unsigned isa[2]; 188 }; 189 190 #define FC_NONE 0 191 #define FC_IF 1 192 #define FC_LOOP 2 193 #define FC_REP 3 194 #define FC_PUSH_VPM 4 195 #define FC_PUSH_WQM 5 196 197 struct r600_cf_stack_entry { 198 int type; 199 struct r600_bytecode_cf *start; 200 struct r600_bytecode_cf **mid; /* used to store the else point */ 201 int num_mid; 202 }; 203 204 #define SQ_MAX_CALL_DEPTH 0x00000020 205 206 #define AR_HANDLE_NORMAL 0 207 #define AR_HANDLE_RV6XX 1 /* except RV670 */ 208 209 struct r600_stack_info { 210 /* current level of non-WQM PUSH operations 211 * (PUSH, PUSH_ELSE, ALU_PUSH_BEFORE) */ 212 int push; 213 /* current level of WQM PUSH operations 214 * (PUSH, PUSH_ELSE, PUSH_WQM) */ 215 int push_wqm; 216 /* current loop level */ 217 int loop; 218 219 /* required depth */ 220 int max_entries; 221 /* subentries per entry */ 222 int entry_size; 223 }; 224 225 struct r600_bytecode { 226 enum chip_class chip_class; 227 enum radeon_family family; 228 bool has_compressed_msaa_texturing; 229 int type; 230 struct list_head cf; 231 struct r600_bytecode_cf *cf_last; 232 unsigned ndw; 233 unsigned ncf; 234 unsigned ngpr; 235 unsigned nstack; 236 unsigned nlds_dw; 237 unsigned nresource; 238 unsigned force_add_cf; 239 uint32_t *bytecode; 240 uint32_t fc_sp; 241 struct r600_cf_stack_entry fc_stack[32]; 242 struct r600_stack_info stack; 243 unsigned ar_loaded; 244 unsigned ar_reg; 245 unsigned ar_chan; 246 unsigned ar_handling; 247 unsigned r6xx_nop_after_rel_dst; 248 bool index_loaded[2]; 249 unsigned index_reg[2]; /* indexing register CF_INDEX_[01] */ 250 unsigned debug_id; 251 struct r600_isa* isa; 252 }; 253 254 /* eg_asm.c */ 255 int eg_bytecode_cf_build(struct r600_bytecode *bc, struct r600_bytecode_cf *cf); 256 int egcm_load_index_reg(struct r600_bytecode *bc, unsigned id, bool inside_alu_clause); 257 int eg_bytecode_gds_build(struct r600_bytecode *bc, struct r600_bytecode_gds *gds, unsigned id); 258 int eg_bytecode_alu_build(struct r600_bytecode *bc, 259 struct r600_bytecode_alu *alu, unsigned id); 260 /* r600_asm.c */ 261 void r600_bytecode_init(struct r600_bytecode *bc, 262 enum chip_class chip_class, 263 enum radeon_family family, 264 bool has_compressed_msaa_texturing); 265 void r600_bytecode_clear(struct r600_bytecode *bc); 266 int r600_bytecode_add_alu(struct r600_bytecode *bc, 267 const struct r600_bytecode_alu *alu); 268 int r600_bytecode_add_vtx(struct r600_bytecode *bc, 269 const struct r600_bytecode_vtx *vtx); 270 int r600_bytecode_add_tex(struct r600_bytecode *bc, 271 const struct r600_bytecode_tex *tex); 272 int r600_bytecode_add_gds(struct r600_bytecode *bc, 273 const struct r600_bytecode_gds *gds); 274 int r600_bytecode_add_output(struct r600_bytecode *bc, 275 const struct r600_bytecode_output *output); 276 int r600_bytecode_build(struct r600_bytecode *bc); 277 int r600_bytecode_add_cf(struct r600_bytecode *bc); 278 int r600_bytecode_add_cfinst(struct r600_bytecode *bc, 279 unsigned op); 280 int r600_bytecode_add_alu_type(struct r600_bytecode *bc, 281 const struct r600_bytecode_alu *alu, unsigned type); 282 void r600_bytecode_special_constants(uint32_t value, 283 unsigned *sel, unsigned *neg, unsigned abs); 284 void r600_bytecode_disasm(struct r600_bytecode *bc); 285 void r600_bytecode_alu_read(struct r600_bytecode *bc, 286 struct r600_bytecode_alu *alu, uint32_t word0, uint32_t word1); 287 288 int cm_bytecode_add_cf_end(struct r600_bytecode *bc); 289 290 void *r600_create_vertex_fetch_shader(struct pipe_context *ctx, 291 unsigned count, 292 const struct pipe_vertex_element *elements); 293 294 /* r700_asm.c */ 295 void r700_bytecode_cf_vtx_build(uint32_t *bytecode, 296 const struct r600_bytecode_cf *cf); 297 int r700_bytecode_alu_build(struct r600_bytecode *bc, 298 struct r600_bytecode_alu *alu, unsigned id); 299 void r700_bytecode_alu_read(struct r600_bytecode *bc, 300 struct r600_bytecode_alu *alu, uint32_t word0, uint32_t word1); 301 void r600_bytecode_export_read(struct r600_bytecode *bc, 302 struct r600_bytecode_output *output, uint32_t word0, uint32_t word1); 303 void eg_bytecode_export_read(struct r600_bytecode *bc, 304 struct r600_bytecode_output *output, uint32_t word0, uint32_t word1); 305 306 void r600_vertex_data_type(enum pipe_format pformat, unsigned *format, 307 unsigned *num_format, unsigned *format_comp, unsigned *endian); 308 309 static inline int fp64_switch(int i) 310 { 311 switch (i) { 312 case 0: 313 return 1; 314 case 1: 315 return 0; 316 case 2: 317 return 3; 318 case 3: 319 return 2; 320 } 321 return 0; 322 } 323 #endif 324
