| /external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
| nv50_ir_lowering_gm107.cpp | 123 bld.mkOp2(OP_SHFL, TYPE_F32, crd[c], i->getSrc(c + array), bld.mkImm(l));
124 add = bld.mkOp2(OP_QUADOP, TYPE_F32, crd[c], crd[c], zero);
131 bld.mkOp2(OP_SHFL, TYPE_F32, tmp, i->dPdx[c].get(), bld.mkImm(l));
132 add = bld.mkOp2(OP_QUADOP, TYPE_F32, crd[c], tmp, crd[c]);
139 bld.mkOp2(OP_SHFL, TYPE_F32, tmp, i->dPdy[c].get(), bld.mkImm(l));
140 add = bld.mkOp2(OP_QUADOP, TYPE_F32, crd[c], tmp, crd[c]);
148 src[c] = bld.mkOp1v(OP_ABS, TYPE_F32, bld.getSSA(), crd[c]);
150 bld.mkOp2(OP_MAX, TYPE_F32, val, src[0], src[1]);
151 bld.mkOp2(OP_MAX, TYPE_F32, val, src[2], val);
152 bld.mkOp1(OP_RCP, TYPE_F32, val, val)
[all...] |
| nv50_ir_lowering_nv50.cpp | 499 bld.mkCvt(OP_CVT, TYPE_F32, af, ty, div->getSrc(0));
500 bld.mkCvt(OP_CVT, TYPE_F32, bf, ty, div->getSrc(1));
514 bf = bld.mkOp1v(OP_RCP, TYPE_F32, bld.getSSA(), bf);
517 bld.mkOp2(OP_MUL, TYPE_F32, (qf = bld.getSSA()), af, bf)->rnd = ROUND_Z;
518 bld.mkCvt(OP_CVT, ty, (q0 = bld.getSSA()), TYPE_F32, qf)->rnd = ROUND_Z;
525 bld.mkCvt(OP_CVT, TYPE_F32, (aR = bld.getSSA()), TYPE_U32, aRf);
527 bld.mkOp2(OP_MUL, TYPE_F32, (qRf = bld.getSSA()), aR, bf)->rnd = ROUND_Z;
528 bld.mkCvt(OP_CVT, TYPE_U32, (qR = bld.getSSA()), TYPE_F32, qRf)
734 src[c] = bld.mkOp1v(OP_ABS, TYPE_F32, bld.getSSA(), i->getSrc(c));
736 bld.mkOp2(OP_MAX, TYPE_F32, val, src[0], src[1])
[all...] |
| nv50_ir_from_tgsi.cpp | 634 return nv50_ir::TYPE_F32;
659 return nv50_ir::TYPE_F32;
[all...] |
| nv50_ir_target_nvc0.cpp | 194 opInfo[i].srcTypes = 1 << (int)TYPE_F32;
195 opInfo[i].dstTypes = 1 << (int)TYPE_F32;
359 case TYPE_F32:
385 if (i->op == OP_ADD && i->sType == TYPE_F32) {
450 if (insn->sType != TYPE_F32)
498 if (insn->op == OP_ADD && insn->sType == TYPE_F32) {
504 return insn->dType == TYPE_F32;
540 if (i->op == OP_MUL && i->dType != TYPE_F32)
567 if (i->dType == TYPE_F32) {
657 return (a->dType == TYPE_F32 || a->op == OP_ADD |
[all...] |
| nv50_ir_inlines.h | 64 case TYPE_F32:
88 case TYPE_F32:
116 return flt ? TYPE_F32 : (sgn ? TYPE_S32 : TYPE_U32);
|
| nv50_ir_lowering_nvc0.cpp | 91 i->setType(TYPE_F32);
103 assert(i->sType == TYPE_F32);
164 if (i->sType == TYPE_F32 && prog->getType() != Program::TYPE_COMPUTE)
170 if (i->sType != TYPE_F32)
691 src[c] = bld.mkOp1v(OP_ABS, TYPE_F32, bld.getSSA(), i->getSrc(c));
693 bld.mkOp2(OP_MAX, TYPE_F32, val, src[0], src[1]);
694 bld.mkOp2(OP_MAX, TYPE_F32, val, src[2], val);
695 bld.mkOp1(OP_RCP, TYPE_F32, val, val);
697 i->setSrc(c, bld.mkOp2v(OP_MUL, TYPE_F32, bld.getSSA(),
772 DataType sTy = (i->op == OP_TXF) ? TYPE_U32 : TYPE_F32;
[all...] |
| nv50_ir_target_nv50.cpp | 146 opInfo[i].srcTypes = 1 << (int)TYPE_F32;
147 opInfo[i].dstTypes = 1 << (int)TYPE_F32;
476 if (insn->sType != TYPE_F32)
504 if (insn->dType != TYPE_F32)
537 if (i->dType == TYPE_F32) {
|
| nv50_ir_peephole.cpp | 449 case TYPE_F32:
530 if (i->dnz && i->dType == TYPE_F32) {
537 case TYPE_F32:
561 case TYPE_F32: res.data.f32 = a->data.f32 / b->data.f32; break;
571 case TYPE_F32: res.data.f32 = a->data.f32 + b->data.f32; break;
581 case TYPE_F32: res.data.f32 = a->data.f32 - b->data.f32; break;
591 case TYPE_F32: res.data.f32 = pow(a->data.f32, b->data.f32); break;
599 case TYPE_F32: res.data.f32 = MAX2(a->data.f32, b->data.f32); break;
609 case TYPE_F32: res.data.f32 = MIN2(a->data.f32, b->data.f32); break;
756 case TYPE_F32
[all...] |
| nv50_ir.cpp | 338 reg.type = TYPE_F32;
399 case TYPE_F32:
416 case TYPE_F32: return reg.data.u32 & (1 << 31);
449 case TYPE_F32:
464 if (reg.type != TYPE_F32)
593 dType = sType = TYPE_F32;
902 : Instruction(fn, op, TYPE_F32)
1041 : Instruction(fn, op, TYPE_F32)
|
| nv50_ir_emit_gk110.cpp | 207 return imm && (imm->reg.data.u32 & ((ty == TYPE_F32) ? 0xfff : 0xfff00000));
330 if (i->sType == TYPE_F32) {
489 assert(!isLIMM(i->src(1), TYPE_F32));
558 if (isLIMM(i->src(1), TYPE_F32)) {
637 if (isLIMM(i->src(1), TYPE_F32)) {
977 case TYPE_F32:
1073 case TYPE_F32: op2 = 0x1d8; op1 = 0xb58; break;
1100 case TYPE_F32: op2 = 0x000; op1 = 0x800; break;
1119 if (i->dType == TYPE_F32) {
1154 if (i->dType == TYPE_F32) {
[all...] |
| nv50_ir_emit_nv50.cpp | 585 case TYPE_F32: // fall through
611 case TYPE_F32:
953 case TYPE_F32: code[0] |= 0x80000000; break;
1301 case TYPE_F32: code[0] |= 0x80000000; break;
[all...] |
| nv50_ir_build_util.cpp | 154 DataType ty = TYPE_F32;
266 Instruction *quadop = mkOp2(OP_QUADOP, TYPE_F32, def, src0, src1);
404 return mkOp1v(OP_MOV, TYPE_F32, dst ? dst : getScratch(), mkImm(f));
455 sym->reg.type = TYPE_F32;
|
| nv50_ir_print.cpp | 452 case TYPE_F32: PRINT("%f", reg.data.f32); break;
|
| nv50_ir_emit_nvc0.cpp | 211 return imm && (imm->reg.data.u32 & ((ty == TYPE_F32) ? 0xfff : 0xfff00000));
525 if (isLIMM(i->src(1), TYPE_F32)) {
582 if (isLIMM(i->src(1), TYPE_F32)) {
652 if (isLIMM(i->src(1), TYPE_F32)) {
1177 if (i->sType == TYPE_F32)
1209 case TYPE_F32:
[all...] |
| nv50_ir_emit_gm107.cpp | 335 if (insn->sType == TYPE_F32 || insn->sType == TYPE_F16) {
1156 emitField(0x34, 1, insn->dType == TYPE_F32);
[all...] |
| nv50_ir.h | 266 TYPE_F32,
[all...] |
| /external/mesa3d/src/gallium/drivers/freedreno/ir3/ |
| ir3_group.c | 53 ir3_MOV(instr->block, instr, TYPE_F32);
73 instr->cat1.src_type = TYPE_F32;
74 instr->cat1.dst_type = TYPE_F32;
89 ir3_MOV(instr->block, instr, TYPE_F32);
|
| ir3_compiler_nir.c | 407 mov->cat1.src_type = TYPE_F32;
408 mov->cat1.dst_type = TYPE_F32;
584 instr = ir3_COV(block, instr, TYPE_U32, TYPE_F32);
726 dst[0] = ir3_COV(b, src[0], TYPE_F32, TYPE_S32);
729 dst[0] = ir3_COV(b, src[0], TYPE_F32, TYPE_U32);
732 dst[0] = ir3_COV(b, src[0], TYPE_S32, TYPE_F32);
735 dst[0] = ir3_COV(b, src[0], TYPE_U32, TYPE_F32);
741 dst[0] = ir3_MOV(b, src[0], TYPE_F32);
749 dst[0] = ir3_COV(b, ir3_b2n(b, src[0]), TYPE_U32, TYPE_F32);
786 dst[0]->cat5.type = TYPE_F32;
[all...] |
| instr-a3xx.h | 217 TYPE_F32 = 1,
229 case TYPE_F32:
248 return (type == TYPE_F32) || (type == TYPE_F16);
|
| ir3_print.c | 70 [TYPE_F32] = "f32",
|
| disasm-a3xx.c | 62 [TYPE_F32] = "f32",
|
| ir3.h | 710 case TYPE_F32: return TYPE_F16;
|
