| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| r6.s | 184 bltc $2, $3, ext
185 bltc $2, $3, . + 4 + (-32768 << 2)
186 bltc $2, $3, . + 4 + (32767 << 2)
187 bltc $2, $3, 1f
188 bltc $3, $2, 1f
|
| r6-n32.d | 334 0+03e0 <[^>]*> 5c430000 bltc v0,v1,000003e4 <[^>]*>
337 0+03e8 <[^>]*> 5c430000 bltc v0,v1,000003ec <[^>]*>
340 0+03f0 <[^>]*> 5c430000 bltc v0,v1,000003f4 <[^>]*>
343 0+03f8 <[^>]*> 5c430000 bltc v0,v1,000003fc <[^>]*>
346 0+0400 <[^>]*> 5c620000 bltc v1,v0,00000404 <[^>]*>
|
| r6.d | 333 0+03e0 <[^>]*> 5c43ffff bltc v0,v1,000003e0 <[^>]*>
336 0+03e8 <[^>]*> 5c438000 bltc v0,v1,fffe03ec <[^>]*>
339 0+03f0 <[^>]*> 5c437fff bltc v0,v1,000203f0 <[^>]*>
342 0+03f8 <[^>]*> 5c43ffff bltc v0,v1,000003f8 <[^>]*>
345 0+0400 <[^>]*> 5c62ffff bltc v1,v0,00000400 <[^>]*>
|
| r6-n64.d | 484 0+03e0 <[^>]*> 5c430000 bltc v0,v1,0+03e4 <[^>]*>
489 0+03e8 <[^>]*> 5c430000 bltc v0,v1,0+03ec <[^>]*>
494 0+03f0 <[^>]*> 5c430000 bltc v0,v1,0+03f4 <[^>]*>
499 0+03f8 <[^>]*> 5c430000 bltc v0,v1,0+03fc <[^>]*>
504 0+0400 <[^>]*> 5c620000 bltc v1,v0,0+0404 <[^>]*>
|
| /art/runtime/interpreter/mterp/mips64/ |
| header.S | 31 * idioms, which should translate into bgec and bltc respectively with swapped
39 bltc \rreg, \lreg, \target
|
| /external/v8/src/mips/ |
| assembler-mips.h | 656 void bltc(Register rs, Register rt, int16_t offset);
657 inline void bltc(Register rs, Register rt, Label* L) {
658 bltc(rs, rt, shifted_branch_offset(L));
[all...] |
| disasm-mips.cc | [all...] |
| macro-assembler-mips.cc | [all...] |
| assembler-mips.cc | 1381 void Assembler::bltc(Register rs, Register rt, int16_t offset) { function in class:v8::Assembler
[all...] |
| /external/v8/src/mips64/ |
| assembler-mips64.h | 660 void bltc(Register rs, Register rt, int16_t offset);
661 inline void bltc(Register rs, Register rt, Label* L) {
662 bltc(rs, rt, shifted_branch_offset(L));
[all...] |
| assembler-mips64.cc | 1368 void Assembler::bltc(Register rs, Register rt, int16_t offset) { function in class:v8::internal::Assembler
[all...] |
| macro-assembler-mips64.cc | [all...] |
| /external/llvm/test/MC/Mips/micromips32r6/ |
| valid.s | 26 bltc $3,$4, 16 # CHECK: bltc $3, $4, 16 # encoding: [0xc4,0x83,0x00,0x08]
[all...] |
| /art/runtime/interpreter/mterp/out/ |
| mterp_mips64.S | 38 * idioms, which should translate into bgec and bltc respectively with swapped
46 bltc \rreg, \lreg, \target
[all...] |
