| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/InstPrinter/ |
| MBlazeInstPrinter.cpp | 40 } else if (Op.isImm()) {
51 if (MO.isImm())
60 if (MO.isImm())
|
| /external/llvm/lib/Target/BPF/InstPrinter/ |
| BPFInstPrinter.cpp | 58 } else if (Op.isImm()) {
71 if (OffsetOp.isImm())
84 if (Op.isImm())
|
| /external/llvm/lib/Target/MSP430/InstPrinter/ |
| MSP430InstPrinter.cpp | 38 if (Op.isImm())
52 } else if (Op.isImm()) {
81 assert(Disp.isImm() && "Expected immediate in displacement field");
|
| /external/swiftshader/third_party/LLVM/lib/Target/MSP430/InstPrinter/ |
| MSP430InstPrinter.cpp | 37 if (Op.isImm())
51 } else if (Op.isImm()) {
79 assert(Disp.isImm() && "Expected immediate in displacement field");
|
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64MCCodeEmitter.cpp | 192 assert(MO.isImm() && "did not expect relocated expression");
203 if (MO.isImm())
224 if (MO.isImm())
255 if (MO.isImm())
277 if (MO.isImm())
299 if (MO.isImm())
327 if (MO.isImm())
347 if (MO.isImm())
369 if (MO.isImm())
395 assert(MO.isImm() && "Expected an immediate value for the shift amount!")
[all...] |
| /external/llvm/lib/Target/Lanai/MCTargetDesc/ |
| LanaiMCCodeEmitter.cpp | 117 if (MCOp.isImm())
148 ((Op2.isImm() && Op2.getImm() != 0) ||
156 if (LPAC::modifiesOp(AluCode) && ((Op2.isImm() && Op2.getImm() != 0) ||
197 assert((Op2.isImm() || Op2.isExpr()) &&
203 if (Op2.isImm()) {
233 assert(AluMCOp.isImm() && "Third operator is not immediate.");
268 assert((Op2.isImm() || Op2.isExpr()) &&
274 if (Op2.isImm()) {
295 if (MCOp.isReg() || MCOp.isImm())
308 if (MCOp.isReg() || MCOp.isImm())
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/MCTargetDesc/ |
| PPCMCCodeEmitter.cpp | 89 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups);
100 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups);
111 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups);
122 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups);
138 if (MO.isImm())
156 if (MO.isImm())
187 assert(MO.isImm() &&
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMMCTargetDesc.cpp | 37 (MI.getOperand(0).isImm() && MI.getOperand(0).getImm() == 15) &&
38 (MI.getOperand(1).isImm() && MI.getOperand(1).getImm() == 0) &&
41 (MI.getOperand(3).isImm() && MI.getOperand(3).getImm() == 7)) {
42 if ((MI.getOperand(5).isImm() && MI.getOperand(5).getImm() == 4)) {
43 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 5) {
50 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 10) {
57 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 10 &&
58 (MI.getOperand(5).isImm() && MI.getOperand(5).getImm() == 5)) {
68 if (STI.getFeatureBits()[llvm::ARM::HasV8Ops] && MI.getOperand(1).isImm() &&
|
| /external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| PPCMCCodeEmitter.cpp | 157 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI);
169 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI);
182 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI);
195 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI);
207 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI);
224 if (MO.isImm())
243 if (MO.isImm())
261 assert(MO.isImm());
276 assert(MO.isImm());
292 assert(MO.isImm());
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/X86/InstPrinter/ |
| X86ATTInstPrinter.cpp | 81 if (Op.isImm())
95 } else if (Op.isImm()) {
121 if (DispSpec.isImm()) {
|
| X86IntelInstPrinter.cpp | 69 if (Op.isImm())
87 } else if (Op.isImm()) {
126 if (!DispSpec.isImm()) {
|
| /external/llvm/include/llvm/MC/MCParser/ |
| MCParsedAsmOperand.h | 56 /// isImm - Is this an immediate operand?
57 virtual bool isImm() const = 0;
|
| /prebuilts/clang/host/darwin-x86/clang-3957855/prebuilt_include/llvm/include/llvm/MC/MCParser/ |
| MCParsedAsmOperand.h | 57 /// isImm - Is this an immediate operand?
58 virtual bool isImm() const = 0;
|
| /prebuilts/clang/host/darwin-x86/clang-3960126/prebuilt_include/llvm/include/llvm/MC/MCParser/ |
| MCParsedAsmOperand.h | 57 /// isImm - Is this an immediate operand?
58 virtual bool isImm() const = 0;
|
| /prebuilts/clang/host/darwin-x86/clang-3977809/prebuilt_include/llvm/include/llvm/MC/MCParser/ |
| MCParsedAsmOperand.h | 57 /// isImm - Is this an immediate operand?
58 virtual bool isImm() const = 0;
|
| /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/MC/MCParser/ |
| MCParsedAsmOperand.h | 57 /// isImm - Is this an immediate operand?
58 virtual bool isImm() const = 0;
|
| /prebuilts/clang/host/linux-x86/clang-3957855/prebuilt_include/llvm/include/llvm/MC/MCParser/ |
| MCParsedAsmOperand.h | 57 /// isImm - Is this an immediate operand?
58 virtual bool isImm() const = 0;
|
| /prebuilts/clang/host/linux-x86/clang-3960126/prebuilt_include/llvm/include/llvm/MC/MCParser/ |
| MCParsedAsmOperand.h | 57 /// isImm - Is this an immediate operand?
58 virtual bool isImm() const = 0;
|
| /prebuilts/clang/host/linux-x86/clang-3977809/prebuilt_include/llvm/include/llvm/MC/MCParser/ |
| MCParsedAsmOperand.h | 57 /// isImm - Is this an immediate operand?
58 virtual bool isImm() const = 0;
|
| /prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/MC/MCParser/ |
| MCParsedAsmOperand.h | 57 /// isImm - Is this an immediate operand?
58 virtual bool isImm() const = 0;
|
| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| SPUAsmPrinter.cpp | 67 } else if (MO.isImm()) {
152 assert(MI->getOperand(OpNo).isImm() &&
167 if (MI->getOperand(OpNo).isImm()) {
171 if (MI->getOperand(OpNo+1).isImm()) {
199 if (MI->getOperand(OpNo).isImm()) {
208 if (MI->getOperand(OpNo).isImm()) {
223 if (MI->getOperand(OpNo).isImm()) {
234 assert(MI->getOperand(OpNo).isImm() &&
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| PPCCodeEmitter.cpp | 182 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO);
198 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO);
207 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO);
221 if (MO.isImm())
237 if (MO.isImm())
256 assert(MO.isImm() &&
|
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsMCCodeEmitter.cpp | 55 assert(Inst.getOperand(2).isImm());
101 assert(InstIn.getOperand(2).isImm());
103 assert(InstIn.getOperand(3).isImm());
276 if (MO.isImm()) return MO.getImm() >> 2;
299 if (MO.isImm()) return MO.getImm() >> 1;
322 if (MO.isImm())
346 if (MO.isImm()) return MO.getImm() >> 1;
368 if (MO.isImm()) return MO.getImm() >> 1;
390 if (MO.isImm()) return MO.getImm() >> 1;
413 if (MO.isImm()) return MO.getImm() >> 2
[all...] |
| /external/llvm/lib/Target/Lanai/InstPrinter/ |
| LanaiInstPrinter.cpp | 152 else if (Op.isImm())
163 if (Op.isImm()) {
177 if (Op.isImm()) {
189 if (Op.isImm()) {
201 if (Op.isImm()) {
226 assert((OffsetOp.isImm() || OffsetOp.isExpr()) && "Immediate expected");
227 if (OffsetOp.isImm()) {
|
| /external/llvm/lib/Target/Lanai/ |
| LanaiMemAluCombiner.cpp | 186 (Op.isImm() && Op.getImm() == 0));
247 assert((AluOffset.isReg() || AluOffset.isImm()) &&
252 unsigned NewOpc = mergedOpcode(MemInstr->getOpcode(), AluOffset.isImm());
266 else if (AluOffset.isImm())
302 if (Op2.isImm()) {
311 if (Offset.isImm() &&
373 assert(AluOperand.isImm() && "Unexpected memory operator type");
|
