| /toolchain/binutils/binutils-2.25/opcodes/ |
| iq2000-opc.c | 383 /* sllv ${rd-rt},$rs */
389 /* sllv $rd,$rt,$rs */
[all...] |
| micromips-opc.c | [all...] |
| /art/compiler/utils/mips/ |
| assembler_mips.h | 264 void Sllv(Register rd, Register rt, Register rs);
[all...] |
| /art/compiler/utils/mips64/ |
| assembler_mips64.h | 493 void Sllv(GpuRegister rd, GpuRegister rt, GpuRegister rs);
[all...] |
| assembler_mips64.cc | 492 void Mips64Assembler::Sllv(GpuRegister rd, GpuRegister rt, GpuRegister rs) {
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsFastISel.cpp | [all...] |
| /external/pcre/dist2/src/sljit/ |
| sljitNativeMIPS_common.c | 166 #define SLLV (HI(0) | LO(4))
[all...] |
| /external/v8/src/compiler/mips/ |
| code-generator-mips.cc | [all...] |
| /external/v8/src/mips/ |
| assembler-mips.h | 759 void sllv(Register rd, Register rt, Register rs);
[all...] |
| simulator-mips.cc | [all...] |
| /external/v8/src/mips64/ |
| assembler-mips64.h | 785 void sllv(Register rd, Register rt, Register rs);
[all...] |
| code-stubs-mips64.cc | 179 __ sllv(input_high, input_high, scratch);
191 __ sllv(input_low, input_low, scratch);
[all...] |
| /art/compiler/optimizing/ |
| intrinsics_mips.cc | [all...] |
| intrinsics_mips64.cc | [all...] |
| code_generator_mips64.cc | [all...] |
| /external/v8/src/compiler/mips64/ |
| code-generator-mips64.cc | [all...] |
| /external/v8/src/full-codegen/mips/ |
| full-codegen-mips.cc | [all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| micromips-insn32.d | [all...] |
| micromips-noinsn32.d | [all...] |
| micromips-trap.d | [all...] |
| micromips.d | [all...] |
| micromips.s | 1884 sllv $2, $3, $4
1885 sllv $2, $2, $4
[all...] |
| /external/llvm/lib/Target/Mips/AsmParser/ |
| MipsAsmParser.cpp | [all...] |
| /art/runtime/arch/mips/ |
| quick_entrypoints_mips.S | [all...] |
| /external/valgrind/VEX/priv/ |
| host_mips_defs.c | 727 ret = immR ? (sz32 ? "sll" : "dsll") : (sz32 ? "sllv" : "dsllv");
[all...] |
