| /prebuilts/clang/host/darwin-x86/clang-3960126/prebuilt_include/llvm/include/llvm/CodeGen/ |
| MachineOperand.h | 283 unsigned getSubReg() const {
347 return !isUndef() && !isInternalRead() && (isUse() || getSubReg());
|
| /prebuilts/clang/host/darwin-x86/clang-3977809/prebuilt_include/llvm/include/llvm/CodeGen/ |
| MachineOperand.h | 283 unsigned getSubReg() const {
347 return !isUndef() && !isInternalRead() && (isUse() || getSubReg());
|
| /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/CodeGen/ |
| MachineOperand.h | 283 unsigned getSubReg() const {
347 return !isUndef() && !isInternalRead() && (isUse() || getSubReg());
|
| /prebuilts/clang/host/linux-x86/clang-3957855/prebuilt_include/llvm/include/llvm/CodeGen/ |
| MachineOperand.h | 283 unsigned getSubReg() const {
347 return !isUndef() && !isInternalRead() && (isUse() || getSubReg());
|
| /prebuilts/clang/host/linux-x86/clang-3960126/prebuilt_include/llvm/include/llvm/CodeGen/ |
| MachineOperand.h | 283 unsigned getSubReg() const {
347 return !isUndef() && !isInternalRead() && (isUse() || getSubReg());
|
| /prebuilts/clang/host/linux-x86/clang-3977809/prebuilt_include/llvm/include/llvm/CodeGen/ |
| MachineOperand.h | 283 unsigned getSubReg() const {
347 return !isUndef() && !isInternalRead() && (isUse() || getSubReg());
|
| /prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/CodeGen/ |
| MachineOperand.h | 283 unsigned getSubReg() const {
347 return !isUndef() && !isInternalRead() && (isUse() || getSubReg());
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| LiveRangeEdit.cpp | 184 if (MO.getSubReg())
|
| RegAllocLinearScan.cpp | 477 if(CopyMI->getOperand(0).getSubReg())
[all...] |
| /external/llvm/lib/CodeGen/ |
| TailDuplicator.cpp | 312 unsigned SrcSubReg = MI->getOperand(SrcOpIdx).getSubReg();
386 MO.setSubReg(TRI->composeSubRegIndices(MO.getSubReg(),
589 if (PU.getSubReg() != 0)
[all...] |
| TwoAddressInstructionPass.cpp | [all...] |
| MachineVerifier.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.cpp | 821 if (TRI->regsOverlap(SrcReg, TRI->getSubReg(DestReg, BeginIdx))) {
829 unsigned Dst = TRI->getSubReg(DestReg, BeginIdx + i * Spacing);
830 unsigned Src = TRI->getSubReg(SrcReg, BeginIdx + i * Spacing);
859 return MIB.addReg(TRI->getSubReg(Reg, SubIdx), State);
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetRegisterInfo.h | 48 /// getSubReg(Reg, A) overlaps getSubReg(Reg, B)
[all...] |
| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| AArch64InstPrinter.cpp | [all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| R600MachineScheduler.cpp | 260 unsigned DestSubReg = MI->getOperand(0).getSubReg();
|
| /external/llvm/lib/Target/Hexagon/ |
| BitTracker.h | 95 : Reg(MO.getReg()), Sub(MO.getSubReg()) {}
|
| /prebuilts/clang/host/darwin-x86/clang-3957855/prebuilt_include/llvm/include/llvm/Target/ |
| TargetRegisterInfo.h | [all...] |
| /prebuilts/clang/host/darwin-x86/clang-3960126/prebuilt_include/llvm/include/llvm/Target/ |
| TargetRegisterInfo.h | [all...] |
| /prebuilts/clang/host/darwin-x86/clang-3977809/prebuilt_include/llvm/include/llvm/Target/ |
| TargetRegisterInfo.h | [all...] |
| /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/Target/ |
| TargetRegisterInfo.h | [all...] |
| /prebuilts/clang/host/linux-x86/clang-3957855/prebuilt_include/llvm/include/llvm/Target/ |
| TargetRegisterInfo.h | [all...] |
| /prebuilts/clang/host/linux-x86/clang-3960126/prebuilt_include/llvm/include/llvm/Target/ |
| TargetRegisterInfo.h | [all...] |
| /prebuilts/clang/host/linux-x86/clang-3977809/prebuilt_include/llvm/include/llvm/Target/ |
| TargetRegisterInfo.h | [all...] |
| /prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/Target/ |
| TargetRegisterInfo.h | [all...] |
