1 /* 2 * This file was generated automatically by gen-mterp.py for 'x86'. 3 * 4 * --> DO NOT EDIT <-- 5 */ 6 7 /* File: x86/header.S */ 8 /* 9 * Copyright (C) 2016 The Android Open Source Project 10 * 11 * Licensed under the Apache License, Version 2.0 (the "License"); 12 * you may not use this file except in compliance with the License. 13 * You may obtain a copy of the License at 14 * 15 * http://www.apache.org/licenses/LICENSE-2.0 16 * 17 * Unless required by applicable law or agreed to in writing, software 18 * distributed under the License is distributed on an "AS IS" BASIS, 19 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 * See the License for the specific language governing permissions and 21 * limitations under the License. 22 */ 23 24 /* 25 Art assembly interpreter notes: 26 27 First validate assembly code by implementing ExecuteXXXImpl() style body (doesn't 28 handle invoke, allows higher-level code to create frame & shadow frame. 29 30 Once that's working, support direct entry code & eliminate shadow frame (and 31 excess locals allocation. 32 33 Some (hopefully) temporary ugliness. We'll treat rFP as pointing to the 34 base of the vreg array within the shadow frame. Access the other fields, 35 dex_pc_, method_ and number_of_vregs_ via negative offsets. For now, we'll continue 36 the shadow frame mechanism of double-storing object references - via rFP & 37 number_of_vregs_. 38 39 */ 40 41 /* 42 x86 ABI general notes: 43 44 Caller save set: 45 eax, edx, ecx, st(0)-st(7) 46 Callee save set: 47 ebx, esi, edi, ebp 48 Return regs: 49 32-bit in eax 50 64-bit in edx:eax (low-order 32 in eax) 51 fp on top of fp stack st(0) 52 53 Parameters passed on stack, pushed right-to-left. On entry to target, first 54 parm is at 4(%esp). Traditional entry code is: 55 56 functEntry: 57 push %ebp # save old frame pointer 58 mov %ebp,%esp # establish new frame pointer 59 sub FrameSize,%esp # Allocate storage for spill, locals & outs 60 61 Once past the prologue, arguments are referenced at ((argno + 2)*4)(%ebp) 62 63 Stack must be 16-byte aligned to support SSE in native code. 64 65 If we're not doing variable stack allocation (alloca), the frame pointer can be 66 eliminated and all arg references adjusted to be esp relative. 67 */ 68 69 /* 70 Mterp and x86 notes: 71 72 Some key interpreter variables will be assigned to registers. 73 74 nick reg purpose 75 rPC esi interpreted program counter, used for fetching instructions 76 rFP edi interpreted frame pointer, used for accessing locals and args 77 rINSTw bx first 16-bit code of current instruction 78 rINSTbl bl opcode portion of instruction word 79 rINSTbh bh high byte of inst word, usually contains src/tgt reg names 80 rIBASE edx base of instruction handler table 81 rREFS ebp base of object references in shadow frame. 82 83 Notes: 84 o High order 16 bits of ebx must be zero on entry to handler 85 o rPC, rFP, rINSTw/rINSTbl valid on handler entry and exit 86 o eax and ecx are scratch, rINSTw/ebx sometimes scratch 87 88 Macros are provided for common operations. Each macro MUST emit only 89 one instruction to make instruction-counting easier. They MUST NOT alter 90 unspecified registers or condition codes. 91 */ 92 93 /* 94 * This is a #include, not a %include, because we want the C pre-processor 95 * to expand the macros into assembler assignment statements. 96 */ 97 #include "asm_support.h" 98 99 /* 100 * Handle mac compiler specific 101 */ 102 #if defined(__APPLE__) 103 #define MACRO_LITERAL(value) $(value) 104 #define FUNCTION_TYPE(name) 105 #define SIZE(start,end) 106 // Mac OS' symbols have an _ prefix. 107 #define SYMBOL(name) _ ## name 108 #else 109 #define MACRO_LITERAL(value) $value 110 #define FUNCTION_TYPE(name) .type name, @function 111 #define SIZE(start,end) .size start, .-end 112 #define SYMBOL(name) name 113 #endif 114 115 .macro PUSH _reg 116 pushl \_reg 117 .cfi_adjust_cfa_offset 4 118 .cfi_rel_offset \_reg, 0 119 .endm 120 121 .macro POP _reg 122 popl \_reg 123 .cfi_adjust_cfa_offset -4 124 .cfi_restore \_reg 125 .endm 126 127 /* 128 * Instead of holding a pointer to the shadow frame, we keep rFP at the base of the vregs. So, 129 * to access other shadow frame fields, we need to use a backwards offset. Define those here. 130 */ 131 #define OFF_FP(a) (a - SHADOWFRAME_VREGS_OFFSET) 132 #define OFF_FP_NUMBER_OF_VREGS OFF_FP(SHADOWFRAME_NUMBER_OF_VREGS_OFFSET) 133 #define OFF_FP_DEX_PC OFF_FP(SHADOWFRAME_DEX_PC_OFFSET) 134 #define OFF_FP_LINK OFF_FP(SHADOWFRAME_LINK_OFFSET) 135 #define OFF_FP_METHOD OFF_FP(SHADOWFRAME_METHOD_OFFSET) 136 #define OFF_FP_RESULT_REGISTER OFF_FP(SHADOWFRAME_RESULT_REGISTER_OFFSET) 137 #define OFF_FP_DEX_PC_PTR OFF_FP(SHADOWFRAME_DEX_PC_PTR_OFFSET) 138 #define OFF_FP_CODE_ITEM OFF_FP(SHADOWFRAME_CODE_ITEM_OFFSET) 139 #define OFF_FP_COUNTDOWN_OFFSET OFF_FP(SHADOWFRAME_HOTNESS_COUNTDOWN_OFFSET) 140 #define OFF_FP_SHADOWFRAME OFF_FP(0) 141 142 /* Frame size must be 16-byte aligned. 143 * Remember about 4 bytes for return address + 4 * 4 for spills 144 */ 145 #define FRAME_SIZE 28 146 147 /* Frame diagram while executing ExecuteMterpImpl, high to low addresses */ 148 #define IN_ARG3 (FRAME_SIZE + 16 + 16) 149 #define IN_ARG2 (FRAME_SIZE + 16 + 12) 150 #define IN_ARG1 (FRAME_SIZE + 16 + 8) 151 #define IN_ARG0 (FRAME_SIZE + 16 + 4) 152 /* Spill offsets relative to %esp */ 153 #define LOCAL0 (FRAME_SIZE - 4) 154 #define LOCAL1 (FRAME_SIZE - 8) 155 #define LOCAL2 (FRAME_SIZE - 12) 156 /* Out Arg offsets, relative to %esp */ 157 #define OUT_ARG3 ( 12) 158 #define OUT_ARG2 ( 8) 159 #define OUT_ARG1 ( 4) 160 #define OUT_ARG0 ( 0) /* <- ExecuteMterpImpl esp + 0 */ 161 162 /* During bringup, we'll use the shadow frame model instead of rFP */ 163 /* single-purpose registers, given names for clarity */ 164 #define rSELF IN_ARG0(%esp) 165 #define rPC %esi 166 #define rFP %edi 167 #define rINST %ebx 168 #define rINSTw %bx 169 #define rINSTbh %bh 170 #define rINSTbl %bl 171 #define rIBASE %edx 172 #define rREFS %ebp 173 #define rPROFILE OFF_FP_COUNTDOWN_OFFSET(rFP) 174 175 #define MTERP_LOGGING 0 176 177 /* 178 * "export" the PC to dex_pc field in the shadow frame, f/b/o future exception objects. Must 179 * be done *before* something throws. 180 * 181 * It's okay to do this more than once. 182 * 183 * NOTE: the fast interpreter keeps track of dex pc as a direct pointer to the mapped 184 * dex byte codes. However, the rest of the runtime expects dex pc to be an instruction 185 * offset into the code_items_[] array. For effiency, we will "export" the 186 * current dex pc as a direct pointer using the EXPORT_PC macro, and rely on GetDexPC 187 * to convert to a dex pc when needed. 188 */ 189 .macro EXPORT_PC 190 movl rPC, OFF_FP_DEX_PC_PTR(rFP) 191 .endm 192 193 /* 194 * Refresh handler table. 195 */ 196 .macro REFRESH_IBASE 197 movl rSELF, rIBASE 198 movl THREAD_CURRENT_IBASE_OFFSET(rIBASE), rIBASE 199 .endm 200 201 /* 202 * Refresh handler table. 203 * IBase handles uses the caller save register so we must restore it after each call. 204 * Also it is used as a result of some 64-bit operations (like imul) and we should 205 * restore it in such cases also. 206 * 207 * TODO: Consider spilling the IBase instead of restoring it from Thread structure. 208 */ 209 .macro RESTORE_IBASE 210 movl rSELF, rIBASE 211 movl THREAD_CURRENT_IBASE_OFFSET(rIBASE), rIBASE 212 .endm 213 214 /* 215 * If rSELF is already loaded then we can use it from known reg. 216 */ 217 .macro RESTORE_IBASE_FROM_SELF _reg 218 movl THREAD_CURRENT_IBASE_OFFSET(\_reg), rIBASE 219 .endm 220 221 /* 222 * Refresh rINST. 223 * At enter to handler rINST does not contain the opcode number. 224 * However some utilities require the full value, so this macro 225 * restores the opcode number. 226 */ 227 .macro REFRESH_INST _opnum 228 movb rINSTbl, rINSTbh 229 movb MACRO_LITERAL(\_opnum), rINSTbl 230 .endm 231 232 /* 233 * Fetch the next instruction from rPC into rINSTw. Does not advance rPC. 234 */ 235 .macro FETCH_INST 236 movzwl (rPC), rINST 237 .endm 238 239 /* 240 * Remove opcode from rINST, compute the address of handler and jump to it. 241 */ 242 .macro GOTO_NEXT 243 movzx rINSTbl,%eax 244 movzbl rINSTbh,rINST 245 shll MACRO_LITERAL(7), %eax 246 addl rIBASE, %eax 247 jmp *%eax 248 .endm 249 250 /* 251 * Advance rPC by instruction count. 252 */ 253 .macro ADVANCE_PC _count 254 leal 2*\_count(rPC), rPC 255 .endm 256 257 /* 258 * Advance rPC by instruction count, fetch instruction and jump to handler. 259 */ 260 .macro ADVANCE_PC_FETCH_AND_GOTO_NEXT _count 261 ADVANCE_PC \_count 262 FETCH_INST 263 GOTO_NEXT 264 .endm 265 266 /* 267 * Get/set the 32-bit value from a Dalvik register. 268 */ 269 #define VREG_ADDRESS(_vreg) (rFP,_vreg,4) 270 #define VREG_HIGH_ADDRESS(_vreg) 4(rFP,_vreg,4) 271 #define VREG_REF_ADDRESS(_vreg) (rREFS,_vreg,4) 272 #define VREG_REF_HIGH_ADDRESS(_vreg) 4(rREFS,_vreg,4) 273 274 .macro GET_VREG _reg _vreg 275 movl (rFP,\_vreg,4), \_reg 276 .endm 277 278 /* Read wide value to xmm. */ 279 .macro GET_WIDE_FP_VREG _reg _vreg 280 movq (rFP,\_vreg,4), \_reg 281 .endm 282 283 .macro SET_VREG _reg _vreg 284 movl \_reg, (rFP,\_vreg,4) 285 movl MACRO_LITERAL(0), (rREFS,\_vreg,4) 286 .endm 287 288 /* Write wide value from xmm. xmm is clobbered. */ 289 .macro SET_WIDE_FP_VREG _reg _vreg 290 movq \_reg, (rFP,\_vreg,4) 291 pxor \_reg, \_reg 292 movq \_reg, (rREFS,\_vreg,4) 293 .endm 294 295 .macro SET_VREG_OBJECT _reg _vreg 296 movl \_reg, (rFP,\_vreg,4) 297 movl \_reg, (rREFS,\_vreg,4) 298 .endm 299 300 .macro GET_VREG_HIGH _reg _vreg 301 movl 4(rFP,\_vreg,4), \_reg 302 .endm 303 304 .macro SET_VREG_HIGH _reg _vreg 305 movl \_reg, 4(rFP,\_vreg,4) 306 movl MACRO_LITERAL(0), 4(rREFS,\_vreg,4) 307 .endm 308 309 .macro CLEAR_REF _vreg 310 movl MACRO_LITERAL(0), (rREFS,\_vreg,4) 311 .endm 312 313 .macro CLEAR_WIDE_REF _vreg 314 movl MACRO_LITERAL(0), (rREFS,\_vreg,4) 315 movl MACRO_LITERAL(0), 4(rREFS,\_vreg,4) 316 .endm 317 318 /* File: x86/entry.S */ 319 /* 320 * Copyright (C) 2016 The Android Open Source Project 321 * 322 * Licensed under the Apache License, Version 2.0 (the "License"); 323 * you may not use this file except in compliance with the License. 324 * You may obtain a copy of the License at 325 * 326 * http://www.apache.org/licenses/LICENSE-2.0 327 * 328 * Unless required by applicable law or agreed to in writing, software 329 * distributed under the License is distributed on an "AS IS" BASIS, 330 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 331 * See the License for the specific language governing permissions and 332 * limitations under the License. 333 */ 334 /* 335 * Interpreter entry point. 336 */ 337 338 .text 339 .global SYMBOL(ExecuteMterpImpl) 340 FUNCTION_TYPE(ExecuteMterpImpl) 341 342 /* 343 * On entry: 344 * 0 Thread* self 345 * 1 code_item 346 * 2 ShadowFrame 347 * 3 JValue* result_register 348 * 349 */ 350 351 SYMBOL(ExecuteMterpImpl): 352 .cfi_startproc 353 .cfi_def_cfa esp, 4 354 355 /* Spill callee save regs */ 356 PUSH %ebp 357 PUSH %edi 358 PUSH %esi 359 PUSH %ebx 360 361 /* Allocate frame */ 362 subl $FRAME_SIZE, %esp 363 .cfi_adjust_cfa_offset FRAME_SIZE 364 365 /* Load ShadowFrame pointer */ 366 movl IN_ARG2(%esp), %edx 367 368 /* Remember the return register */ 369 movl IN_ARG3(%esp), %eax 370 movl %eax, SHADOWFRAME_RESULT_REGISTER_OFFSET(%edx) 371 372 /* Remember the code_item */ 373 movl IN_ARG1(%esp), %ecx 374 movl %ecx, SHADOWFRAME_CODE_ITEM_OFFSET(%edx) 375 376 /* set up "named" registers */ 377 movl SHADOWFRAME_NUMBER_OF_VREGS_OFFSET(%edx), %eax 378 leal SHADOWFRAME_VREGS_OFFSET(%edx), rFP 379 leal (rFP, %eax, 4), rREFS 380 movl SHADOWFRAME_DEX_PC_OFFSET(%edx), %eax 381 lea CODEITEM_INSNS_OFFSET(%ecx), rPC 382 lea (rPC, %eax, 2), rPC 383 EXPORT_PC 384 385 /* Set up for backwards branches & osr profiling */ 386 movl OFF_FP_METHOD(rFP), %eax 387 movl %eax, OUT_ARG0(%esp) 388 leal OFF_FP_SHADOWFRAME(rFP), %ecx 389 movl %ecx, OUT_ARG1(%esp) 390 call SYMBOL(MterpSetUpHotnessCountdown) 391 392 /* Starting ibase */ 393 REFRESH_IBASE 394 395 /* start executing the instruction at rPC */ 396 FETCH_INST 397 GOTO_NEXT 398 /* NOTE: no fallthrough */ 399 400 401 .global SYMBOL(artMterpAsmInstructionStart) 402 FUNCTION_TYPE(SYMBOL(artMterpAsmInstructionStart)) 403 SYMBOL(artMterpAsmInstructionStart) = .L_op_nop 404 .text 405 406 /* ------------------------------ */ 407 .balign 128 408 .L_op_nop: /* 0x00 */ 409 /* File: x86/op_nop.S */ 410 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 411 412 /* ------------------------------ */ 413 .balign 128 414 .L_op_move: /* 0x01 */ 415 /* File: x86/op_move.S */ 416 /* for move, move-object, long-to-int */ 417 /* op vA, vB */ 418 movzbl rINSTbl, %eax # eax <- BA 419 andb $0xf, %al # eax <- A 420 shrl $4, rINST # rINST <- B 421 GET_VREG rINST, rINST 422 .if 0 423 SET_VREG_OBJECT rINST, %eax # fp[A] <- fp[B] 424 .else 425 SET_VREG rINST, %eax # fp[A] <- fp[B] 426 .endif 427 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 428 429 /* ------------------------------ */ 430 .balign 128 431 .L_op_move_from16: /* 0x02 */ 432 /* File: x86/op_move_from16.S */ 433 /* for: move/from16, move-object/from16 */ 434 /* op vAA, vBBBB */ 435 movzx rINSTbl, %eax # eax <- AA 436 movw 2(rPC), rINSTw # rINSTw <- BBBB 437 GET_VREG rINST, rINST # rINST <- fp[BBBB] 438 .if 0 439 SET_VREG_OBJECT rINST, %eax # fp[A] <- fp[B] 440 .else 441 SET_VREG rINST, %eax # fp[A] <- fp[B] 442 .endif 443 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 444 445 /* ------------------------------ */ 446 .balign 128 447 .L_op_move_16: /* 0x03 */ 448 /* File: x86/op_move_16.S */ 449 /* for: move/16, move-object/16 */ 450 /* op vAAAA, vBBBB */ 451 movzwl 4(rPC), %ecx # ecx <- BBBB 452 movzwl 2(rPC), %eax # eax <- AAAA 453 GET_VREG rINST, %ecx 454 .if 0 455 SET_VREG_OBJECT rINST, %eax # fp[A] <- fp[B] 456 .else 457 SET_VREG rINST, %eax # fp[A] <- fp[B] 458 .endif 459 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 460 461 /* ------------------------------ */ 462 .balign 128 463 .L_op_move_wide: /* 0x04 */ 464 /* File: x86/op_move_wide.S */ 465 /* move-wide vA, vB */ 466 /* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */ 467 movzbl rINSTbl, %ecx # ecx <- BA 468 sarl $4, rINST # rINST <- B 469 andb $0xf, %cl # ecx <- A 470 GET_WIDE_FP_VREG %xmm0, rINST # xmm0 <- v[B] 471 SET_WIDE_FP_VREG %xmm0, %ecx # v[A] <- xmm0 472 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 473 474 /* ------------------------------ */ 475 .balign 128 476 .L_op_move_wide_from16: /* 0x05 */ 477 /* File: x86/op_move_wide_from16.S */ 478 /* move-wide/from16 vAA, vBBBB */ 479 /* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */ 480 movzwl 2(rPC), %ecx # ecx <- BBBB 481 movzbl rINSTbl, %eax # eax <- AAAA 482 GET_WIDE_FP_VREG %xmm0, %ecx # xmm0 <- v[B] 483 SET_WIDE_FP_VREG %xmm0, %eax # v[A] <- xmm0 484 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 485 486 /* ------------------------------ */ 487 .balign 128 488 .L_op_move_wide_16: /* 0x06 */ 489 /* File: x86/op_move_wide_16.S */ 490 /* move-wide/16 vAAAA, vBBBB */ 491 /* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */ 492 movzwl 4(rPC), %ecx # ecx<- BBBB 493 movzwl 2(rPC), %eax # eax<- AAAA 494 GET_WIDE_FP_VREG %xmm0, %ecx # xmm0 <- v[B] 495 SET_WIDE_FP_VREG %xmm0, %eax # v[A] <- xmm0 496 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 497 498 /* ------------------------------ */ 499 .balign 128 500 .L_op_move_object: /* 0x07 */ 501 /* File: x86/op_move_object.S */ 502 /* File: x86/op_move.S */ 503 /* for move, move-object, long-to-int */ 504 /* op vA, vB */ 505 movzbl rINSTbl, %eax # eax <- BA 506 andb $0xf, %al # eax <- A 507 shrl $4, rINST # rINST <- B 508 GET_VREG rINST, rINST 509 .if 1 510 SET_VREG_OBJECT rINST, %eax # fp[A] <- fp[B] 511 .else 512 SET_VREG rINST, %eax # fp[A] <- fp[B] 513 .endif 514 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 515 516 517 /* ------------------------------ */ 518 .balign 128 519 .L_op_move_object_from16: /* 0x08 */ 520 /* File: x86/op_move_object_from16.S */ 521 /* File: x86/op_move_from16.S */ 522 /* for: move/from16, move-object/from16 */ 523 /* op vAA, vBBBB */ 524 movzx rINSTbl, %eax # eax <- AA 525 movw 2(rPC), rINSTw # rINSTw <- BBBB 526 GET_VREG rINST, rINST # rINST <- fp[BBBB] 527 .if 1 528 SET_VREG_OBJECT rINST, %eax # fp[A] <- fp[B] 529 .else 530 SET_VREG rINST, %eax # fp[A] <- fp[B] 531 .endif 532 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 533 534 535 /* ------------------------------ */ 536 .balign 128 537 .L_op_move_object_16: /* 0x09 */ 538 /* File: x86/op_move_object_16.S */ 539 /* File: x86/op_move_16.S */ 540 /* for: move/16, move-object/16 */ 541 /* op vAAAA, vBBBB */ 542 movzwl 4(rPC), %ecx # ecx <- BBBB 543 movzwl 2(rPC), %eax # eax <- AAAA 544 GET_VREG rINST, %ecx 545 .if 1 546 SET_VREG_OBJECT rINST, %eax # fp[A] <- fp[B] 547 .else 548 SET_VREG rINST, %eax # fp[A] <- fp[B] 549 .endif 550 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 551 552 553 /* ------------------------------ */ 554 .balign 128 555 .L_op_move_result: /* 0x0a */ 556 /* File: x86/op_move_result.S */ 557 /* for: move-result, move-result-object */ 558 /* op vAA */ 559 movl OFF_FP_RESULT_REGISTER(rFP), %eax # get pointer to result JType. 560 movl (%eax), %eax # r0 <- result.i. 561 .if 0 562 SET_VREG_OBJECT %eax, rINST # fp[A] <- fp[B] 563 .else 564 SET_VREG %eax, rINST # fp[A] <- fp[B] 565 .endif 566 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 567 568 /* ------------------------------ */ 569 .balign 128 570 .L_op_move_result_wide: /* 0x0b */ 571 /* File: x86/op_move_result_wide.S */ 572 /* move-result-wide vAA */ 573 movl OFF_FP_RESULT_REGISTER(rFP), %eax # get pointer to result JType. 574 movl 4(%eax), %ecx # Get high 575 movl (%eax), %eax # Get low 576 SET_VREG %eax, rINST # v[AA+0] <- eax 577 SET_VREG_HIGH %ecx, rINST # v[AA+1] <- ecx 578 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 579 580 /* ------------------------------ */ 581 .balign 128 582 .L_op_move_result_object: /* 0x0c */ 583 /* File: x86/op_move_result_object.S */ 584 /* File: x86/op_move_result.S */ 585 /* for: move-result, move-result-object */ 586 /* op vAA */ 587 movl OFF_FP_RESULT_REGISTER(rFP), %eax # get pointer to result JType. 588 movl (%eax), %eax # r0 <- result.i. 589 .if 1 590 SET_VREG_OBJECT %eax, rINST # fp[A] <- fp[B] 591 .else 592 SET_VREG %eax, rINST # fp[A] <- fp[B] 593 .endif 594 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 595 596 597 /* ------------------------------ */ 598 .balign 128 599 .L_op_move_exception: /* 0x0d */ 600 /* File: x86/op_move_exception.S */ 601 /* move-exception vAA */ 602 movl rSELF, %ecx 603 movl THREAD_EXCEPTION_OFFSET(%ecx), %eax 604 SET_VREG_OBJECT %eax, rINST # fp[AA] <- exception object 605 movl $0, THREAD_EXCEPTION_OFFSET(%ecx) 606 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 607 608 /* ------------------------------ */ 609 .balign 128 610 .L_op_return_void: /* 0x0e */ 611 /* File: x86/op_return_void.S */ 612 .extern MterpThreadFenceForConstructor 613 call SYMBOL(MterpThreadFenceForConstructor) 614 movl rSELF, %eax 615 testl $(THREAD_SUSPEND_OR_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(%eax) 616 jz 1f 617 movl %eax, OUT_ARG0(%esp) 618 call SYMBOL(MterpSuspendCheck) 619 1: 620 xorl %eax, %eax 621 xorl %ecx, %ecx 622 jmp MterpReturn 623 624 /* ------------------------------ */ 625 .balign 128 626 .L_op_return: /* 0x0f */ 627 /* File: x86/op_return.S */ 628 /* 629 * Return a 32-bit value. 630 * 631 * for: return, return-object 632 */ 633 /* op vAA */ 634 .extern MterpThreadFenceForConstructor 635 call SYMBOL(MterpThreadFenceForConstructor) 636 movl rSELF, %eax 637 testl $(THREAD_SUSPEND_OR_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(%eax) 638 jz 1f 639 movl %eax, OUT_ARG0(%esp) 640 call SYMBOL(MterpSuspendCheck) 641 1: 642 GET_VREG %eax, rINST # eax <- vAA 643 xorl %ecx, %ecx 644 jmp MterpReturn 645 646 /* ------------------------------ */ 647 .balign 128 648 .L_op_return_wide: /* 0x10 */ 649 /* File: x86/op_return_wide.S */ 650 /* 651 * Return a 64-bit value. 652 */ 653 /* return-wide vAA */ 654 .extern MterpThreadFenceForConstructor 655 call SYMBOL(MterpThreadFenceForConstructor) 656 movl rSELF, %eax 657 testl $(THREAD_SUSPEND_OR_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(%eax) 658 jz 1f 659 movl %eax, OUT_ARG0(%esp) 660 call SYMBOL(MterpSuspendCheck) 661 1: 662 GET_VREG %eax, rINST # eax <- v[AA+0] 663 GET_VREG_HIGH %ecx, rINST # ecx <- v[AA+1] 664 jmp MterpReturn 665 666 /* ------------------------------ */ 667 .balign 128 668 .L_op_return_object: /* 0x11 */ 669 /* File: x86/op_return_object.S */ 670 /* File: x86/op_return.S */ 671 /* 672 * Return a 32-bit value. 673 * 674 * for: return, return-object 675 */ 676 /* op vAA */ 677 .extern MterpThreadFenceForConstructor 678 call SYMBOL(MterpThreadFenceForConstructor) 679 movl rSELF, %eax 680 testl $(THREAD_SUSPEND_OR_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(%eax) 681 jz 1f 682 movl %eax, OUT_ARG0(%esp) 683 call SYMBOL(MterpSuspendCheck) 684 1: 685 GET_VREG %eax, rINST # eax <- vAA 686 xorl %ecx, %ecx 687 jmp MterpReturn 688 689 690 /* ------------------------------ */ 691 .balign 128 692 .L_op_const_4: /* 0x12 */ 693 /* File: x86/op_const_4.S */ 694 /* const/4 vA, #+B */ 695 movsx rINSTbl, %eax # eax <-ssssssBx 696 movl $0xf, rINST 697 andl %eax, rINST # rINST <- A 698 sarl $4, %eax 699 SET_VREG %eax, rINST 700 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 701 702 /* ------------------------------ */ 703 .balign 128 704 .L_op_const_16: /* 0x13 */ 705 /* File: x86/op_const_16.S */ 706 /* const/16 vAA, #+BBBB */ 707 movswl 2(rPC), %ecx # ecx <- ssssBBBB 708 SET_VREG %ecx, rINST # vAA <- ssssBBBB 709 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 710 711 /* ------------------------------ */ 712 .balign 128 713 .L_op_const: /* 0x14 */ 714 /* File: x86/op_const.S */ 715 /* const vAA, #+BBBBbbbb */ 716 movl 2(rPC), %eax # grab all 32 bits at once 717 SET_VREG %eax, rINST # vAA<- eax 718 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 719 720 /* ------------------------------ */ 721 .balign 128 722 .L_op_const_high16: /* 0x15 */ 723 /* File: x86/op_const_high16.S */ 724 /* const/high16 vAA, #+BBBB0000 */ 725 movzwl 2(rPC), %eax # eax <- 0000BBBB 726 sall $16, %eax # eax <- BBBB0000 727 SET_VREG %eax, rINST # vAA <- eax 728 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 729 730 /* ------------------------------ */ 731 .balign 128 732 .L_op_const_wide_16: /* 0x16 */ 733 /* File: x86/op_const_wide_16.S */ 734 /* const-wide/16 vAA, #+BBBB */ 735 movswl 2(rPC), %eax # eax <- ssssBBBB 736 movl rIBASE, %ecx # preserve rIBASE (cltd trashes it) 737 cltd # rIBASE:eax <- ssssssssssssBBBB 738 SET_VREG_HIGH rIBASE, rINST # store msw 739 SET_VREG %eax, rINST # store lsw 740 movl %ecx, rIBASE # restore rIBASE 741 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 742 743 /* ------------------------------ */ 744 .balign 128 745 .L_op_const_wide_32: /* 0x17 */ 746 /* File: x86/op_const_wide_32.S */ 747 /* const-wide/32 vAA, #+BBBBbbbb */ 748 movl 2(rPC), %eax # eax <- BBBBbbbb 749 movl rIBASE, %ecx # preserve rIBASE (cltd trashes it) 750 cltd # rIBASE:eax <- ssssssssssssBBBB 751 SET_VREG_HIGH rIBASE, rINST # store msw 752 SET_VREG %eax, rINST # store lsw 753 movl %ecx, rIBASE # restore rIBASE 754 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 755 756 /* ------------------------------ */ 757 .balign 128 758 .L_op_const_wide: /* 0x18 */ 759 /* File: x86/op_const_wide.S */ 760 /* const-wide vAA, #+HHHHhhhhBBBBbbbb */ 761 movl 2(rPC), %eax # eax <- lsw 762 movzbl rINSTbl, %ecx # ecx <- AA 763 movl 6(rPC), rINST # rINST <- msw 764 SET_VREG %eax, %ecx 765 SET_VREG_HIGH rINST, %ecx 766 ADVANCE_PC_FETCH_AND_GOTO_NEXT 5 767 768 /* ------------------------------ */ 769 .balign 128 770 .L_op_const_wide_high16: /* 0x19 */ 771 /* File: x86/op_const_wide_high16.S */ 772 /* const-wide/high16 vAA, #+BBBB000000000000 */ 773 movzwl 2(rPC), %eax # eax <- 0000BBBB 774 sall $16, %eax # eax <- BBBB0000 775 SET_VREG_HIGH %eax, rINST # v[AA+1] <- eax 776 xorl %eax, %eax 777 SET_VREG %eax, rINST # v[AA+0] <- eax 778 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 779 780 /* ------------------------------ */ 781 .balign 128 782 .L_op_const_string: /* 0x1a */ 783 /* File: x86/op_const_string.S */ 784 /* const/string vAA, String@BBBB */ 785 EXPORT_PC 786 movzwl 2(rPC), %eax # eax <- BBBB 787 movl %eax, OUT_ARG0(%esp) 788 movl rINST, OUT_ARG1(%esp) 789 leal OFF_FP_SHADOWFRAME(rFP), %eax 790 movl %eax, OUT_ARG2(%esp) 791 movl rSELF, %eax 792 movl %eax, OUT_ARG3(%esp) 793 call SYMBOL(MterpConstString) # (index, tgt_reg, shadow_frame, self) 794 RESTORE_IBASE 795 testb %al, %al 796 jnz MterpPossibleException 797 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 798 799 /* ------------------------------ */ 800 .balign 128 801 .L_op_const_string_jumbo: /* 0x1b */ 802 /* File: x86/op_const_string_jumbo.S */ 803 /* const/string vAA, String@BBBBBBBB */ 804 EXPORT_PC 805 movl 2(rPC), %eax # eax <- BBBB 806 movl %eax, OUT_ARG0(%esp) 807 movl rINST, OUT_ARG1(%esp) 808 leal OFF_FP_SHADOWFRAME(rFP), %eax 809 movl %eax, OUT_ARG2(%esp) 810 movl rSELF, %eax 811 movl %eax, OUT_ARG3(%esp) 812 call SYMBOL(MterpConstString) # (index, tgt_reg, shadow_frame, self) 813 RESTORE_IBASE 814 testb %al, %al 815 jnz MterpPossibleException 816 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 817 818 /* ------------------------------ */ 819 .balign 128 820 .L_op_const_class: /* 0x1c */ 821 /* File: x86/op_const_class.S */ 822 /* const/class vAA, Class@BBBB */ 823 EXPORT_PC 824 movzwl 2(rPC), %eax # eax<- BBBB 825 movl %eax, OUT_ARG0(%esp) 826 movl rINST, OUT_ARG1(%esp) 827 leal OFF_FP_SHADOWFRAME(rFP), %eax 828 movl %eax, OUT_ARG2(%esp) 829 movl rSELF, %eax 830 movl %eax, OUT_ARG3(%esp) 831 call SYMBOL(MterpConstClass) # (index, tgt_reg, shadow_frame, self) 832 RESTORE_IBASE 833 testb %al, %al 834 jnz MterpPossibleException 835 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 836 837 /* ------------------------------ */ 838 .balign 128 839 .L_op_monitor_enter: /* 0x1d */ 840 /* File: x86/op_monitor_enter.S */ 841 /* 842 * Synchronize on an object. 843 */ 844 /* monitor-enter vAA */ 845 EXPORT_PC 846 GET_VREG %ecx, rINST 847 movl %ecx, OUT_ARG0(%esp) 848 movl rSELF, %eax 849 movl %eax, OUT_ARG1(%esp) 850 call SYMBOL(artLockObjectFromCode) # (object, self) 851 RESTORE_IBASE 852 testb %al, %al 853 jnz MterpException 854 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 855 856 /* ------------------------------ */ 857 .balign 128 858 .L_op_monitor_exit: /* 0x1e */ 859 /* File: x86/op_monitor_exit.S */ 860 /* 861 * Unlock an object. 862 * 863 * Exceptions that occur when unlocking a monitor need to appear as 864 * if they happened at the following instruction. See the Dalvik 865 * instruction spec. 866 */ 867 /* monitor-exit vAA */ 868 EXPORT_PC 869 GET_VREG %ecx, rINST 870 movl %ecx, OUT_ARG0(%esp) 871 movl rSELF, %eax 872 movl %eax, OUT_ARG1(%esp) 873 call SYMBOL(artUnlockObjectFromCode) # (object, self) 874 RESTORE_IBASE 875 testb %al, %al 876 jnz MterpException 877 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 878 879 /* ------------------------------ */ 880 .balign 128 881 .L_op_check_cast: /* 0x1f */ 882 /* File: x86/op_check_cast.S */ 883 /* 884 * Check to see if a cast from one class to another is allowed. 885 */ 886 /* check-cast vAA, class@BBBB */ 887 EXPORT_PC 888 movzwl 2(rPC), %eax # eax <- BBBB 889 movl %eax, OUT_ARG0(%esp) 890 leal VREG_ADDRESS(rINST), %ecx 891 movl %ecx, OUT_ARG1(%esp) 892 movl OFF_FP_METHOD(rFP),%eax 893 movl %eax, OUT_ARG2(%esp) 894 movl rSELF, %ecx 895 movl %ecx, OUT_ARG3(%esp) 896 call SYMBOL(MterpCheckCast) # (index, &obj, method, self) 897 RESTORE_IBASE 898 testb %al, %al 899 jnz MterpPossibleException 900 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 901 902 /* ------------------------------ */ 903 .balign 128 904 .L_op_instance_of: /* 0x20 */ 905 /* File: x86/op_instance_of.S */ 906 /* 907 * Check to see if an object reference is an instance of a class. 908 * 909 * Most common situation is a non-null object, being compared against 910 * an already-resolved class. 911 */ 912 /* instance-of vA, vB, class@CCCC */ 913 EXPORT_PC 914 movzwl 2(rPC), %eax # eax <- BBBB 915 movl %eax, OUT_ARG0(%esp) 916 movl rINST, %eax # eax <- BA 917 sarl $4, %eax # eax <- B 918 leal VREG_ADDRESS(%eax), %ecx # Get object address 919 movl %ecx, OUT_ARG1(%esp) 920 movl OFF_FP_METHOD(rFP),%eax 921 movl %eax, OUT_ARG2(%esp) 922 movl rSELF, %ecx 923 movl %ecx, OUT_ARG3(%esp) 924 call SYMBOL(MterpInstanceOf) # (index, &obj, method, self) 925 movl rSELF, %ecx 926 RESTORE_IBASE_FROM_SELF %ecx 927 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 928 jnz MterpException 929 andb $0xf, rINSTbl # rINSTbl <- A 930 SET_VREG %eax, rINST 931 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 932 933 /* ------------------------------ */ 934 .balign 128 935 .L_op_array_length: /* 0x21 */ 936 /* File: x86/op_array_length.S */ 937 /* 938 * Return the length of an array. 939 */ 940 mov rINST, %eax # eax <- BA 941 sarl $4, rINST # rINST <- B 942 GET_VREG %ecx, rINST # ecx <- vB (object ref) 943 testl %ecx, %ecx # is null? 944 je common_errNullObject 945 andb $0xf, %al # eax <- A 946 movl MIRROR_ARRAY_LENGTH_OFFSET(%ecx), rINST 947 SET_VREG rINST, %eax 948 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 949 950 /* ------------------------------ */ 951 .balign 128 952 .L_op_new_instance: /* 0x22 */ 953 /* File: x86/op_new_instance.S */ 954 /* 955 * Create a new instance of a class. 956 */ 957 /* new-instance vAA, class@BBBB */ 958 EXPORT_PC 959 leal OFF_FP_SHADOWFRAME(rFP), %eax 960 movl %eax, OUT_ARG0(%esp) 961 movl rSELF, %ecx 962 movl %ecx, OUT_ARG1(%esp) 963 REFRESH_INST 34 964 movl rINST, OUT_ARG2(%esp) 965 call SYMBOL(MterpNewInstance) 966 RESTORE_IBASE 967 testb %al, %al # 0 means an exception is thrown 968 jz MterpPossibleException 969 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 970 971 /* ------------------------------ */ 972 .balign 128 973 .L_op_new_array: /* 0x23 */ 974 /* File: x86/op_new_array.S */ 975 /* 976 * Allocate an array of objects, specified with the array class 977 * and a count. 978 * 979 * The verifier guarantees that this is an array class, so we don't 980 * check for it here. 981 */ 982 /* new-array vA, vB, class@CCCC */ 983 EXPORT_PC 984 leal OFF_FP_SHADOWFRAME(rFP), %eax 985 movl %eax, OUT_ARG0(%esp) 986 movl rPC, OUT_ARG1(%esp) 987 REFRESH_INST 35 988 movl rINST, OUT_ARG2(%esp) 989 movl rSELF, %ecx 990 movl %ecx, OUT_ARG3(%esp) 991 call SYMBOL(MterpNewArray) 992 RESTORE_IBASE 993 testb %al, %al # 0 means an exception is thrown 994 jz MterpPossibleException 995 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 996 997 /* ------------------------------ */ 998 .balign 128 999 .L_op_filled_new_array: /* 0x24 */ 1000 /* File: x86/op_filled_new_array.S */ 1001 /* 1002 * Create a new array with elements filled from registers. 1003 * 1004 * for: filled-new-array, filled-new-array/range 1005 */ 1006 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 1007 /* op {vCCCC..v(CCCC+AA-1)}, type@BBBB */ 1008 .extern MterpFilledNewArray 1009 EXPORT_PC 1010 leal OFF_FP_SHADOWFRAME(rFP), %eax 1011 movl %eax, OUT_ARG0(%esp) 1012 movl rPC, OUT_ARG1(%esp) 1013 movl rSELF, %ecx 1014 movl %ecx, OUT_ARG2(%esp) 1015 call SYMBOL(MterpFilledNewArray) 1016 REFRESH_IBASE 1017 testb %al, %al # 0 means an exception is thrown 1018 jz MterpPossibleException 1019 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 1020 1021 /* ------------------------------ */ 1022 .balign 128 1023 .L_op_filled_new_array_range: /* 0x25 */ 1024 /* File: x86/op_filled_new_array_range.S */ 1025 /* File: x86/op_filled_new_array.S */ 1026 /* 1027 * Create a new array with elements filled from registers. 1028 * 1029 * for: filled-new-array, filled-new-array/range 1030 */ 1031 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 1032 /* op {vCCCC..v(CCCC+AA-1)}, type@BBBB */ 1033 .extern MterpFilledNewArrayRange 1034 EXPORT_PC 1035 leal OFF_FP_SHADOWFRAME(rFP), %eax 1036 movl %eax, OUT_ARG0(%esp) 1037 movl rPC, OUT_ARG1(%esp) 1038 movl rSELF, %ecx 1039 movl %ecx, OUT_ARG2(%esp) 1040 call SYMBOL(MterpFilledNewArrayRange) 1041 REFRESH_IBASE 1042 testb %al, %al # 0 means an exception is thrown 1043 jz MterpPossibleException 1044 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 1045 1046 1047 /* ------------------------------ */ 1048 .balign 128 1049 .L_op_fill_array_data: /* 0x26 */ 1050 /* File: x86/op_fill_array_data.S */ 1051 /* fill-array-data vAA, +BBBBBBBB */ 1052 EXPORT_PC 1053 movl 2(rPC), %ecx # ecx <- BBBBbbbb 1054 leal (rPC,%ecx,2), %ecx # ecx <- PC + BBBBbbbb*2 1055 GET_VREG %eax, rINST # eax <- vAA (array object) 1056 movl %eax, OUT_ARG0(%esp) 1057 movl %ecx, OUT_ARG1(%esp) 1058 call SYMBOL(MterpFillArrayData) # (obj, payload) 1059 REFRESH_IBASE 1060 testb %al, %al # 0 means an exception is thrown 1061 jz MterpPossibleException 1062 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 1063 1064 /* ------------------------------ */ 1065 .balign 128 1066 .L_op_throw: /* 0x27 */ 1067 /* File: x86/op_throw.S */ 1068 /* 1069 * Throw an exception object in the current thread. 1070 */ 1071 /* throw vAA */ 1072 EXPORT_PC 1073 GET_VREG %eax, rINST # eax<- vAA (exception object) 1074 testl %eax, %eax 1075 jz common_errNullObject 1076 movl rSELF,%ecx 1077 movl %eax, THREAD_EXCEPTION_OFFSET(%ecx) 1078 jmp MterpException 1079 1080 /* ------------------------------ */ 1081 .balign 128 1082 .L_op_goto: /* 0x28 */ 1083 /* File: x86/op_goto.S */ 1084 /* 1085 * Unconditional branch, 8-bit offset. 1086 * 1087 * The branch distance is a signed code-unit offset, which we need to 1088 * double to get a byte offset. 1089 */ 1090 /* goto +AA */ 1091 movsbl rINSTbl, rINST # rINST <- ssssssAA 1092 testl rINST, rINST 1093 jmp MterpCommonTakenBranch 1094 1095 /* ------------------------------ */ 1096 .balign 128 1097 .L_op_goto_16: /* 0x29 */ 1098 /* File: x86/op_goto_16.S */ 1099 /* 1100 * Unconditional branch, 16-bit offset. 1101 * 1102 * The branch distance is a signed code-unit offset, which we need to 1103 * double to get a byte offset. 1104 */ 1105 /* goto/16 +AAAA */ 1106 movswl 2(rPC), rINST # rINST <- ssssAAAA 1107 testl rINST, rINST 1108 jmp MterpCommonTakenBranch 1109 1110 /* ------------------------------ */ 1111 .balign 128 1112 .L_op_goto_32: /* 0x2a */ 1113 /* File: x86/op_goto_32.S */ 1114 /* 1115 * Unconditional branch, 32-bit offset. 1116 * 1117 * The branch distance is a signed code-unit offset, which we need to 1118 * double to get a byte offset. 1119 * 1120 * Unlike most opcodes, this one is allowed to branch to itself, so 1121 * our "backward branch" test must be "<=0" instead of "<0". Because 1122 * we need the V bit set, we'll use an adds to convert from Dalvik 1123 * offset to byte offset. 1124 */ 1125 /* goto/32 +AAAAAAAA */ 1126 movl 2(rPC), rINST # rINST <- AAAAAAAA 1127 testl rINST, rINST 1128 jmp MterpCommonTakenBranch 1129 1130 /* ------------------------------ */ 1131 .balign 128 1132 .L_op_packed_switch: /* 0x2b */ 1133 /* File: x86/op_packed_switch.S */ 1134 /* 1135 * Handle a packed-switch or sparse-switch instruction. In both cases 1136 * we decode it and hand it off to a helper function. 1137 * 1138 * We don't really expect backward branches in a switch statement, but 1139 * they're perfectly legal, so we check for them here. 1140 * 1141 * for: packed-switch, sparse-switch 1142 */ 1143 /* op vAA, +BBBB */ 1144 movl 2(rPC), %ecx # ecx <- BBBBbbbb 1145 GET_VREG %eax, rINST # eax <- vAA 1146 leal (rPC,%ecx,2), %ecx # ecx <- PC + BBBBbbbb*2 1147 movl %eax, OUT_ARG1(%esp) # ARG1 <- vAA 1148 movl %ecx, OUT_ARG0(%esp) # ARG0 <- switchData 1149 call SYMBOL(MterpDoPackedSwitch) 1150 REFRESH_IBASE 1151 testl %eax, %eax 1152 movl %eax, rINST 1153 jmp MterpCommonTakenBranch 1154 1155 /* ------------------------------ */ 1156 .balign 128 1157 .L_op_sparse_switch: /* 0x2c */ 1158 /* File: x86/op_sparse_switch.S */ 1159 /* File: x86/op_packed_switch.S */ 1160 /* 1161 * Handle a packed-switch or sparse-switch instruction. In both cases 1162 * we decode it and hand it off to a helper function. 1163 * 1164 * We don't really expect backward branches in a switch statement, but 1165 * they're perfectly legal, so we check for them here. 1166 * 1167 * for: packed-switch, sparse-switch 1168 */ 1169 /* op vAA, +BBBB */ 1170 movl 2(rPC), %ecx # ecx <- BBBBbbbb 1171 GET_VREG %eax, rINST # eax <- vAA 1172 leal (rPC,%ecx,2), %ecx # ecx <- PC + BBBBbbbb*2 1173 movl %eax, OUT_ARG1(%esp) # ARG1 <- vAA 1174 movl %ecx, OUT_ARG0(%esp) # ARG0 <- switchData 1175 call SYMBOL(MterpDoSparseSwitch) 1176 REFRESH_IBASE 1177 testl %eax, %eax 1178 movl %eax, rINST 1179 jmp MterpCommonTakenBranch 1180 1181 1182 /* ------------------------------ */ 1183 .balign 128 1184 .L_op_cmpl_float: /* 0x2d */ 1185 /* File: x86/op_cmpl_float.S */ 1186 /* File: x86/fpcmp.S */ 1187 /* 1188 * Compare two floating-point values. Puts 0, 1, or -1 into the 1189 * destination register based on the results of the comparison. 1190 * 1191 * int compare(x, y) { 1192 * if (x == y) { 1193 * return 0; 1194 * } else if (x < y) { 1195 * return -1; 1196 * } else if (x > y) { 1197 * return 1; 1198 * } else { 1199 * return nanval ? 1 : -1; 1200 * } 1201 * } 1202 */ 1203 /* op vAA, vBB, vCC */ 1204 movzbl 3(rPC), %ecx # ecx<- CC 1205 movzbl 2(rPC), %eax # eax<- BB 1206 movss VREG_ADDRESS(%eax), %xmm0 1207 xor %eax, %eax 1208 ucomiss VREG_ADDRESS(%ecx), %xmm0 1209 jp .Lop_cmpl_float_nan_is_neg 1210 je .Lop_cmpl_float_finish 1211 jb .Lop_cmpl_float_less 1212 .Lop_cmpl_float_nan_is_pos: 1213 incl %eax 1214 jmp .Lop_cmpl_float_finish 1215 .Lop_cmpl_float_nan_is_neg: 1216 .Lop_cmpl_float_less: 1217 decl %eax 1218 .Lop_cmpl_float_finish: 1219 SET_VREG %eax, rINST 1220 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1221 1222 1223 /* ------------------------------ */ 1224 .balign 128 1225 .L_op_cmpg_float: /* 0x2e */ 1226 /* File: x86/op_cmpg_float.S */ 1227 /* File: x86/fpcmp.S */ 1228 /* 1229 * Compare two floating-point values. Puts 0, 1, or -1 into the 1230 * destination register based on the results of the comparison. 1231 * 1232 * int compare(x, y) { 1233 * if (x == y) { 1234 * return 0; 1235 * } else if (x < y) { 1236 * return -1; 1237 * } else if (x > y) { 1238 * return 1; 1239 * } else { 1240 * return nanval ? 1 : -1; 1241 * } 1242 * } 1243 */ 1244 /* op vAA, vBB, vCC */ 1245 movzbl 3(rPC), %ecx # ecx<- CC 1246 movzbl 2(rPC), %eax # eax<- BB 1247 movss VREG_ADDRESS(%eax), %xmm0 1248 xor %eax, %eax 1249 ucomiss VREG_ADDRESS(%ecx), %xmm0 1250 jp .Lop_cmpg_float_nan_is_pos 1251 je .Lop_cmpg_float_finish 1252 jb .Lop_cmpg_float_less 1253 .Lop_cmpg_float_nan_is_pos: 1254 incl %eax 1255 jmp .Lop_cmpg_float_finish 1256 .Lop_cmpg_float_nan_is_neg: 1257 .Lop_cmpg_float_less: 1258 decl %eax 1259 .Lop_cmpg_float_finish: 1260 SET_VREG %eax, rINST 1261 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1262 1263 1264 /* ------------------------------ */ 1265 .balign 128 1266 .L_op_cmpl_double: /* 0x2f */ 1267 /* File: x86/op_cmpl_double.S */ 1268 /* File: x86/fpcmp.S */ 1269 /* 1270 * Compare two floating-point values. Puts 0, 1, or -1 into the 1271 * destination register based on the results of the comparison. 1272 * 1273 * int compare(x, y) { 1274 * if (x == y) { 1275 * return 0; 1276 * } else if (x < y) { 1277 * return -1; 1278 * } else if (x > y) { 1279 * return 1; 1280 * } else { 1281 * return nanval ? 1 : -1; 1282 * } 1283 * } 1284 */ 1285 /* op vAA, vBB, vCC */ 1286 movzbl 3(rPC), %ecx # ecx<- CC 1287 movzbl 2(rPC), %eax # eax<- BB 1288 movsd VREG_ADDRESS(%eax), %xmm0 1289 xor %eax, %eax 1290 ucomisd VREG_ADDRESS(%ecx), %xmm0 1291 jp .Lop_cmpl_double_nan_is_neg 1292 je .Lop_cmpl_double_finish 1293 jb .Lop_cmpl_double_less 1294 .Lop_cmpl_double_nan_is_pos: 1295 incl %eax 1296 jmp .Lop_cmpl_double_finish 1297 .Lop_cmpl_double_nan_is_neg: 1298 .Lop_cmpl_double_less: 1299 decl %eax 1300 .Lop_cmpl_double_finish: 1301 SET_VREG %eax, rINST 1302 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1303 1304 1305 /* ------------------------------ */ 1306 .balign 128 1307 .L_op_cmpg_double: /* 0x30 */ 1308 /* File: x86/op_cmpg_double.S */ 1309 /* File: x86/fpcmp.S */ 1310 /* 1311 * Compare two floating-point values. Puts 0, 1, or -1 into the 1312 * destination register based on the results of the comparison. 1313 * 1314 * int compare(x, y) { 1315 * if (x == y) { 1316 * return 0; 1317 * } else if (x < y) { 1318 * return -1; 1319 * } else if (x > y) { 1320 * return 1; 1321 * } else { 1322 * return nanval ? 1 : -1; 1323 * } 1324 * } 1325 */ 1326 /* op vAA, vBB, vCC */ 1327 movzbl 3(rPC), %ecx # ecx<- CC 1328 movzbl 2(rPC), %eax # eax<- BB 1329 movsd VREG_ADDRESS(%eax), %xmm0 1330 xor %eax, %eax 1331 ucomisd VREG_ADDRESS(%ecx), %xmm0 1332 jp .Lop_cmpg_double_nan_is_pos 1333 je .Lop_cmpg_double_finish 1334 jb .Lop_cmpg_double_less 1335 .Lop_cmpg_double_nan_is_pos: 1336 incl %eax 1337 jmp .Lop_cmpg_double_finish 1338 .Lop_cmpg_double_nan_is_neg: 1339 .Lop_cmpg_double_less: 1340 decl %eax 1341 .Lop_cmpg_double_finish: 1342 SET_VREG %eax, rINST 1343 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1344 1345 1346 /* ------------------------------ */ 1347 .balign 128 1348 .L_op_cmp_long: /* 0x31 */ 1349 /* File: x86/op_cmp_long.S */ 1350 /* 1351 * Compare two 64-bit values. Puts 0, 1, or -1 into the destination 1352 * register based on the results of the comparison. 1353 */ 1354 /* cmp-long vAA, vBB, vCC */ 1355 movzbl 2(rPC), %eax # eax <- BB 1356 movzbl 3(rPC), %ecx # ecx <- CC 1357 GET_VREG_HIGH %eax, %eax # eax <- v[BB+1], BB is clobbered 1358 cmpl VREG_HIGH_ADDRESS(%ecx), %eax 1359 jl .Lop_cmp_long_smaller 1360 jg .Lop_cmp_long_bigger 1361 movzbl 2(rPC), %eax # eax <- BB, restore BB 1362 GET_VREG %eax, %eax # eax <- v[BB] 1363 sub VREG_ADDRESS(%ecx), %eax 1364 ja .Lop_cmp_long_bigger 1365 jb .Lop_cmp_long_smaller 1366 .Lop_cmp_long_finish: 1367 SET_VREG %eax, rINST 1368 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1369 1370 .Lop_cmp_long_bigger: 1371 movl $1, %eax 1372 jmp .Lop_cmp_long_finish 1373 1374 .Lop_cmp_long_smaller: 1375 movl $-1, %eax 1376 jmp .Lop_cmp_long_finish 1377 1378 /* ------------------------------ */ 1379 .balign 128 1380 .L_op_if_eq: /* 0x32 */ 1381 /* File: x86/op_if_eq.S */ 1382 /* File: x86/bincmp.S */ 1383 /* 1384 * Generic two-operand compare-and-branch operation. Provide a "revcmp" 1385 * fragment that specifies the *reverse* comparison to perform, e.g. 1386 * for "if-le" you would use "gt". 1387 * 1388 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 1389 */ 1390 /* if-cmp vA, vB, +CCCC */ 1391 movzx rINSTbl, %ecx # ecx <- A+ 1392 andb $0xf, %cl # ecx <- A 1393 GET_VREG %eax, %ecx # eax <- vA 1394 sarl $4, rINST # rINST <- B 1395 cmpl VREG_ADDRESS(rINST), %eax # compare (vA, vB) 1396 jne 1f 1397 movswl 2(rPC), rINST # Get signed branch offset 1398 testl rINST, rINST 1399 jmp MterpCommonTakenBranch 1400 1: 1401 cmpw $JIT_CHECK_OSR, rPROFILE 1402 je .L_check_not_taken_osr 1403 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1404 1405 1406 /* ------------------------------ */ 1407 .balign 128 1408 .L_op_if_ne: /* 0x33 */ 1409 /* File: x86/op_if_ne.S */ 1410 /* File: x86/bincmp.S */ 1411 /* 1412 * Generic two-operand compare-and-branch operation. Provide a "revcmp" 1413 * fragment that specifies the *reverse* comparison to perform, e.g. 1414 * for "if-le" you would use "gt". 1415 * 1416 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 1417 */ 1418 /* if-cmp vA, vB, +CCCC */ 1419 movzx rINSTbl, %ecx # ecx <- A+ 1420 andb $0xf, %cl # ecx <- A 1421 GET_VREG %eax, %ecx # eax <- vA 1422 sarl $4, rINST # rINST <- B 1423 cmpl VREG_ADDRESS(rINST), %eax # compare (vA, vB) 1424 je 1f 1425 movswl 2(rPC), rINST # Get signed branch offset 1426 testl rINST, rINST 1427 jmp MterpCommonTakenBranch 1428 1: 1429 cmpw $JIT_CHECK_OSR, rPROFILE 1430 je .L_check_not_taken_osr 1431 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1432 1433 1434 /* ------------------------------ */ 1435 .balign 128 1436 .L_op_if_lt: /* 0x34 */ 1437 /* File: x86/op_if_lt.S */ 1438 /* File: x86/bincmp.S */ 1439 /* 1440 * Generic two-operand compare-and-branch operation. Provide a "revcmp" 1441 * fragment that specifies the *reverse* comparison to perform, e.g. 1442 * for "if-le" you would use "gt". 1443 * 1444 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 1445 */ 1446 /* if-cmp vA, vB, +CCCC */ 1447 movzx rINSTbl, %ecx # ecx <- A+ 1448 andb $0xf, %cl # ecx <- A 1449 GET_VREG %eax, %ecx # eax <- vA 1450 sarl $4, rINST # rINST <- B 1451 cmpl VREG_ADDRESS(rINST), %eax # compare (vA, vB) 1452 jge 1f 1453 movswl 2(rPC), rINST # Get signed branch offset 1454 testl rINST, rINST 1455 jmp MterpCommonTakenBranch 1456 1: 1457 cmpw $JIT_CHECK_OSR, rPROFILE 1458 je .L_check_not_taken_osr 1459 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1460 1461 1462 /* ------------------------------ */ 1463 .balign 128 1464 .L_op_if_ge: /* 0x35 */ 1465 /* File: x86/op_if_ge.S */ 1466 /* File: x86/bincmp.S */ 1467 /* 1468 * Generic two-operand compare-and-branch operation. Provide a "revcmp" 1469 * fragment that specifies the *reverse* comparison to perform, e.g. 1470 * for "if-le" you would use "gt". 1471 * 1472 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 1473 */ 1474 /* if-cmp vA, vB, +CCCC */ 1475 movzx rINSTbl, %ecx # ecx <- A+ 1476 andb $0xf, %cl # ecx <- A 1477 GET_VREG %eax, %ecx # eax <- vA 1478 sarl $4, rINST # rINST <- B 1479 cmpl VREG_ADDRESS(rINST), %eax # compare (vA, vB) 1480 jl 1f 1481 movswl 2(rPC), rINST # Get signed branch offset 1482 testl rINST, rINST 1483 jmp MterpCommonTakenBranch 1484 1: 1485 cmpw $JIT_CHECK_OSR, rPROFILE 1486 je .L_check_not_taken_osr 1487 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1488 1489 1490 /* ------------------------------ */ 1491 .balign 128 1492 .L_op_if_gt: /* 0x36 */ 1493 /* File: x86/op_if_gt.S */ 1494 /* File: x86/bincmp.S */ 1495 /* 1496 * Generic two-operand compare-and-branch operation. Provide a "revcmp" 1497 * fragment that specifies the *reverse* comparison to perform, e.g. 1498 * for "if-le" you would use "gt". 1499 * 1500 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 1501 */ 1502 /* if-cmp vA, vB, +CCCC */ 1503 movzx rINSTbl, %ecx # ecx <- A+ 1504 andb $0xf, %cl # ecx <- A 1505 GET_VREG %eax, %ecx # eax <- vA 1506 sarl $4, rINST # rINST <- B 1507 cmpl VREG_ADDRESS(rINST), %eax # compare (vA, vB) 1508 jle 1f 1509 movswl 2(rPC), rINST # Get signed branch offset 1510 testl rINST, rINST 1511 jmp MterpCommonTakenBranch 1512 1: 1513 cmpw $JIT_CHECK_OSR, rPROFILE 1514 je .L_check_not_taken_osr 1515 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1516 1517 1518 /* ------------------------------ */ 1519 .balign 128 1520 .L_op_if_le: /* 0x37 */ 1521 /* File: x86/op_if_le.S */ 1522 /* File: x86/bincmp.S */ 1523 /* 1524 * Generic two-operand compare-and-branch operation. Provide a "revcmp" 1525 * fragment that specifies the *reverse* comparison to perform, e.g. 1526 * for "if-le" you would use "gt". 1527 * 1528 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 1529 */ 1530 /* if-cmp vA, vB, +CCCC */ 1531 movzx rINSTbl, %ecx # ecx <- A+ 1532 andb $0xf, %cl # ecx <- A 1533 GET_VREG %eax, %ecx # eax <- vA 1534 sarl $4, rINST # rINST <- B 1535 cmpl VREG_ADDRESS(rINST), %eax # compare (vA, vB) 1536 jg 1f 1537 movswl 2(rPC), rINST # Get signed branch offset 1538 testl rINST, rINST 1539 jmp MterpCommonTakenBranch 1540 1: 1541 cmpw $JIT_CHECK_OSR, rPROFILE 1542 je .L_check_not_taken_osr 1543 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1544 1545 1546 /* ------------------------------ */ 1547 .balign 128 1548 .L_op_if_eqz: /* 0x38 */ 1549 /* File: x86/op_if_eqz.S */ 1550 /* File: x86/zcmp.S */ 1551 /* 1552 * Generic one-operand compare-and-branch operation. Provide a "revcmp" 1553 * fragment that specifies the *reverse* comparison to perform, e.g. 1554 * for "if-le" you would use "gt". 1555 * 1556 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 1557 */ 1558 /* if-cmp vAA, +BBBB */ 1559 cmpl $0, VREG_ADDRESS(rINST) # compare (vA, 0) 1560 jne 1f 1561 movswl 2(rPC), rINST # fetch signed displacement 1562 testl rINST, rINST 1563 jmp MterpCommonTakenBranch 1564 1: 1565 cmpw $JIT_CHECK_OSR, rPROFILE 1566 je .L_check_not_taken_osr 1567 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1568 1569 1570 /* ------------------------------ */ 1571 .balign 128 1572 .L_op_if_nez: /* 0x39 */ 1573 /* File: x86/op_if_nez.S */ 1574 /* File: x86/zcmp.S */ 1575 /* 1576 * Generic one-operand compare-and-branch operation. Provide a "revcmp" 1577 * fragment that specifies the *reverse* comparison to perform, e.g. 1578 * for "if-le" you would use "gt". 1579 * 1580 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 1581 */ 1582 /* if-cmp vAA, +BBBB */ 1583 cmpl $0, VREG_ADDRESS(rINST) # compare (vA, 0) 1584 je 1f 1585 movswl 2(rPC), rINST # fetch signed displacement 1586 testl rINST, rINST 1587 jmp MterpCommonTakenBranch 1588 1: 1589 cmpw $JIT_CHECK_OSR, rPROFILE 1590 je .L_check_not_taken_osr 1591 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1592 1593 1594 /* ------------------------------ */ 1595 .balign 128 1596 .L_op_if_ltz: /* 0x3a */ 1597 /* File: x86/op_if_ltz.S */ 1598 /* File: x86/zcmp.S */ 1599 /* 1600 * Generic one-operand compare-and-branch operation. Provide a "revcmp" 1601 * fragment that specifies the *reverse* comparison to perform, e.g. 1602 * for "if-le" you would use "gt". 1603 * 1604 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 1605 */ 1606 /* if-cmp vAA, +BBBB */ 1607 cmpl $0, VREG_ADDRESS(rINST) # compare (vA, 0) 1608 jge 1f 1609 movswl 2(rPC), rINST # fetch signed displacement 1610 testl rINST, rINST 1611 jmp MterpCommonTakenBranch 1612 1: 1613 cmpw $JIT_CHECK_OSR, rPROFILE 1614 je .L_check_not_taken_osr 1615 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1616 1617 1618 /* ------------------------------ */ 1619 .balign 128 1620 .L_op_if_gez: /* 0x3b */ 1621 /* File: x86/op_if_gez.S */ 1622 /* File: x86/zcmp.S */ 1623 /* 1624 * Generic one-operand compare-and-branch operation. Provide a "revcmp" 1625 * fragment that specifies the *reverse* comparison to perform, e.g. 1626 * for "if-le" you would use "gt". 1627 * 1628 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 1629 */ 1630 /* if-cmp vAA, +BBBB */ 1631 cmpl $0, VREG_ADDRESS(rINST) # compare (vA, 0) 1632 jl 1f 1633 movswl 2(rPC), rINST # fetch signed displacement 1634 testl rINST, rINST 1635 jmp MterpCommonTakenBranch 1636 1: 1637 cmpw $JIT_CHECK_OSR, rPROFILE 1638 je .L_check_not_taken_osr 1639 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1640 1641 1642 /* ------------------------------ */ 1643 .balign 128 1644 .L_op_if_gtz: /* 0x3c */ 1645 /* File: x86/op_if_gtz.S */ 1646 /* File: x86/zcmp.S */ 1647 /* 1648 * Generic one-operand compare-and-branch operation. Provide a "revcmp" 1649 * fragment that specifies the *reverse* comparison to perform, e.g. 1650 * for "if-le" you would use "gt". 1651 * 1652 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 1653 */ 1654 /* if-cmp vAA, +BBBB */ 1655 cmpl $0, VREG_ADDRESS(rINST) # compare (vA, 0) 1656 jle 1f 1657 movswl 2(rPC), rINST # fetch signed displacement 1658 testl rINST, rINST 1659 jmp MterpCommonTakenBranch 1660 1: 1661 cmpw $JIT_CHECK_OSR, rPROFILE 1662 je .L_check_not_taken_osr 1663 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1664 1665 1666 /* ------------------------------ */ 1667 .balign 128 1668 .L_op_if_lez: /* 0x3d */ 1669 /* File: x86/op_if_lez.S */ 1670 /* File: x86/zcmp.S */ 1671 /* 1672 * Generic one-operand compare-and-branch operation. Provide a "revcmp" 1673 * fragment that specifies the *reverse* comparison to perform, e.g. 1674 * for "if-le" you would use "gt". 1675 * 1676 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 1677 */ 1678 /* if-cmp vAA, +BBBB */ 1679 cmpl $0, VREG_ADDRESS(rINST) # compare (vA, 0) 1680 jg 1f 1681 movswl 2(rPC), rINST # fetch signed displacement 1682 testl rINST, rINST 1683 jmp MterpCommonTakenBranch 1684 1: 1685 cmpw $JIT_CHECK_OSR, rPROFILE 1686 je .L_check_not_taken_osr 1687 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1688 1689 1690 /* ------------------------------ */ 1691 .balign 128 1692 .L_op_unused_3e: /* 0x3e */ 1693 /* File: x86/op_unused_3e.S */ 1694 /* File: x86/unused.S */ 1695 /* 1696 * Bail to reference interpreter to throw. 1697 */ 1698 jmp MterpFallback 1699 1700 1701 /* ------------------------------ */ 1702 .balign 128 1703 .L_op_unused_3f: /* 0x3f */ 1704 /* File: x86/op_unused_3f.S */ 1705 /* File: x86/unused.S */ 1706 /* 1707 * Bail to reference interpreter to throw. 1708 */ 1709 jmp MterpFallback 1710 1711 1712 /* ------------------------------ */ 1713 .balign 128 1714 .L_op_unused_40: /* 0x40 */ 1715 /* File: x86/op_unused_40.S */ 1716 /* File: x86/unused.S */ 1717 /* 1718 * Bail to reference interpreter to throw. 1719 */ 1720 jmp MterpFallback 1721 1722 1723 /* ------------------------------ */ 1724 .balign 128 1725 .L_op_unused_41: /* 0x41 */ 1726 /* File: x86/op_unused_41.S */ 1727 /* File: x86/unused.S */ 1728 /* 1729 * Bail to reference interpreter to throw. 1730 */ 1731 jmp MterpFallback 1732 1733 1734 /* ------------------------------ */ 1735 .balign 128 1736 .L_op_unused_42: /* 0x42 */ 1737 /* File: x86/op_unused_42.S */ 1738 /* File: x86/unused.S */ 1739 /* 1740 * Bail to reference interpreter to throw. 1741 */ 1742 jmp MterpFallback 1743 1744 1745 /* ------------------------------ */ 1746 .balign 128 1747 .L_op_unused_43: /* 0x43 */ 1748 /* File: x86/op_unused_43.S */ 1749 /* File: x86/unused.S */ 1750 /* 1751 * Bail to reference interpreter to throw. 1752 */ 1753 jmp MterpFallback 1754 1755 1756 /* ------------------------------ */ 1757 .balign 128 1758 .L_op_aget: /* 0x44 */ 1759 /* File: x86/op_aget.S */ 1760 /* 1761 * Array get, 32 bits or less. vAA <- vBB[vCC]. 1762 * 1763 * for: aget, aget-boolean, aget-byte, aget-char, aget-short 1764 * 1765 */ 1766 /* op vAA, vBB, vCC */ 1767 movzbl 2(rPC), %eax # eax <- BB 1768 movzbl 3(rPC), %ecx # ecx <- CC 1769 GET_VREG %eax, %eax # eax <- vBB (array object) 1770 GET_VREG %ecx, %ecx # ecx <- vCC (requested index) 1771 testl %eax, %eax # null array object? 1772 je common_errNullObject # bail if so 1773 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1774 jae common_errArrayIndex # index >= length, bail. 1775 movl MIRROR_INT_ARRAY_DATA_OFFSET(%eax,%ecx,4), %eax 1776 SET_VREG %eax, rINST 1777 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1778 1779 /* ------------------------------ */ 1780 .balign 128 1781 .L_op_aget_wide: /* 0x45 */ 1782 /* File: x86/op_aget_wide.S */ 1783 /* 1784 * Array get, 64 bits. vAA <- vBB[vCC]. 1785 */ 1786 /* aget-wide vAA, vBB, vCC */ 1787 movzbl 2(rPC), %eax # eax <- BB 1788 movzbl 3(rPC), %ecx # ecx <- CC 1789 GET_VREG %eax, %eax # eax <- vBB (array object) 1790 GET_VREG %ecx, %ecx # ecx <- vCC (requested index) 1791 testl %eax, %eax # null array object? 1792 je common_errNullObject # bail if so 1793 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1794 jae common_errArrayIndex # index >= length, bail. 1795 leal MIRROR_WIDE_ARRAY_DATA_OFFSET(%eax,%ecx,8), %eax 1796 movq (%eax), %xmm0 # xmm0 <- vBB[vCC] 1797 SET_WIDE_FP_VREG %xmm0, rINST # vAA <- xmm0 1798 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1799 1800 /* ------------------------------ */ 1801 .balign 128 1802 .L_op_aget_object: /* 0x46 */ 1803 /* File: x86/op_aget_object.S */ 1804 /* 1805 * Array object get. vAA <- vBB[vCC]. 1806 * 1807 * for: aget-object 1808 */ 1809 /* op vAA, vBB, vCC */ 1810 movzbl 2(rPC), %eax # eax <- BB 1811 movzbl 3(rPC), %ecx # ecx <- CC 1812 GET_VREG %eax, %eax # eax <- vBB (array object) 1813 GET_VREG %ecx, %ecx # ecs <- vCC (requested index) 1814 EXPORT_PC 1815 movl %eax, OUT_ARG0(%esp) 1816 movl %ecx, OUT_ARG1(%esp) 1817 call SYMBOL(artAGetObjectFromMterp) # (array, index) 1818 movl rSELF, %ecx 1819 RESTORE_IBASE_FROM_SELF %ecx 1820 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 1821 jnz MterpException 1822 SET_VREG_OBJECT %eax, rINST 1823 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1824 1825 /* ------------------------------ */ 1826 .balign 128 1827 .L_op_aget_boolean: /* 0x47 */ 1828 /* File: x86/op_aget_boolean.S */ 1829 /* File: x86/op_aget.S */ 1830 /* 1831 * Array get, 32 bits or less. vAA <- vBB[vCC]. 1832 * 1833 * for: aget, aget-boolean, aget-byte, aget-char, aget-short 1834 * 1835 */ 1836 /* op vAA, vBB, vCC */ 1837 movzbl 2(rPC), %eax # eax <- BB 1838 movzbl 3(rPC), %ecx # ecx <- CC 1839 GET_VREG %eax, %eax # eax <- vBB (array object) 1840 GET_VREG %ecx, %ecx # ecx <- vCC (requested index) 1841 testl %eax, %eax # null array object? 1842 je common_errNullObject # bail if so 1843 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1844 jae common_errArrayIndex # index >= length, bail. 1845 movzbl MIRROR_BOOLEAN_ARRAY_DATA_OFFSET(%eax,%ecx,1), %eax 1846 SET_VREG %eax, rINST 1847 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1848 1849 1850 /* ------------------------------ */ 1851 .balign 128 1852 .L_op_aget_byte: /* 0x48 */ 1853 /* File: x86/op_aget_byte.S */ 1854 /* File: x86/op_aget.S */ 1855 /* 1856 * Array get, 32 bits or less. vAA <- vBB[vCC]. 1857 * 1858 * for: aget, aget-boolean, aget-byte, aget-char, aget-short 1859 * 1860 */ 1861 /* op vAA, vBB, vCC */ 1862 movzbl 2(rPC), %eax # eax <- BB 1863 movzbl 3(rPC), %ecx # ecx <- CC 1864 GET_VREG %eax, %eax # eax <- vBB (array object) 1865 GET_VREG %ecx, %ecx # ecx <- vCC (requested index) 1866 testl %eax, %eax # null array object? 1867 je common_errNullObject # bail if so 1868 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1869 jae common_errArrayIndex # index >= length, bail. 1870 movsbl MIRROR_BYTE_ARRAY_DATA_OFFSET(%eax,%ecx,1), %eax 1871 SET_VREG %eax, rINST 1872 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1873 1874 1875 /* ------------------------------ */ 1876 .balign 128 1877 .L_op_aget_char: /* 0x49 */ 1878 /* File: x86/op_aget_char.S */ 1879 /* File: x86/op_aget.S */ 1880 /* 1881 * Array get, 32 bits or less. vAA <- vBB[vCC]. 1882 * 1883 * for: aget, aget-boolean, aget-byte, aget-char, aget-short 1884 * 1885 */ 1886 /* op vAA, vBB, vCC */ 1887 movzbl 2(rPC), %eax # eax <- BB 1888 movzbl 3(rPC), %ecx # ecx <- CC 1889 GET_VREG %eax, %eax # eax <- vBB (array object) 1890 GET_VREG %ecx, %ecx # ecx <- vCC (requested index) 1891 testl %eax, %eax # null array object? 1892 je common_errNullObject # bail if so 1893 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1894 jae common_errArrayIndex # index >= length, bail. 1895 movzwl MIRROR_CHAR_ARRAY_DATA_OFFSET(%eax,%ecx,2), %eax 1896 SET_VREG %eax, rINST 1897 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1898 1899 1900 /* ------------------------------ */ 1901 .balign 128 1902 .L_op_aget_short: /* 0x4a */ 1903 /* File: x86/op_aget_short.S */ 1904 /* File: x86/op_aget.S */ 1905 /* 1906 * Array get, 32 bits or less. vAA <- vBB[vCC]. 1907 * 1908 * for: aget, aget-boolean, aget-byte, aget-char, aget-short 1909 * 1910 */ 1911 /* op vAA, vBB, vCC */ 1912 movzbl 2(rPC), %eax # eax <- BB 1913 movzbl 3(rPC), %ecx # ecx <- CC 1914 GET_VREG %eax, %eax # eax <- vBB (array object) 1915 GET_VREG %ecx, %ecx # ecx <- vCC (requested index) 1916 testl %eax, %eax # null array object? 1917 je common_errNullObject # bail if so 1918 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1919 jae common_errArrayIndex # index >= length, bail. 1920 movswl MIRROR_SHORT_ARRAY_DATA_OFFSET(%eax,%ecx,2), %eax 1921 SET_VREG %eax, rINST 1922 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1923 1924 1925 /* ------------------------------ */ 1926 .balign 128 1927 .L_op_aput: /* 0x4b */ 1928 /* File: x86/op_aput.S */ 1929 /* 1930 * Array put, 32 bits or less. vBB[vCC] <- vAA. 1931 * 1932 * for: aput, aput-boolean, aput-byte, aput-char, aput-short 1933 * 1934 */ 1935 /* op vAA, vBB, vCC */ 1936 movzbl 2(rPC), %eax # eax <- BB 1937 movzbl 3(rPC), %ecx # ecx <- CC 1938 GET_VREG %eax, %eax # eax <- vBB (array object) 1939 GET_VREG %ecx, %ecx # ecx <- vCC (requested index) 1940 testl %eax, %eax # null array object? 1941 je common_errNullObject # bail if so 1942 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1943 jae common_errArrayIndex # index >= length, bail. 1944 leal MIRROR_INT_ARRAY_DATA_OFFSET(%eax,%ecx,4), %eax 1945 GET_VREG rINST, rINST 1946 movl rINST, (%eax) 1947 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1948 1949 /* ------------------------------ */ 1950 .balign 128 1951 .L_op_aput_wide: /* 0x4c */ 1952 /* File: x86/op_aput_wide.S */ 1953 /* 1954 * Array put, 64 bits. vBB[vCC] <- vAA. 1955 * 1956 */ 1957 /* aput-wide vAA, vBB, vCC */ 1958 movzbl 2(rPC), %eax # eax <- BB 1959 movzbl 3(rPC), %ecx # ecx <- CC 1960 GET_VREG %eax, %eax # eax <- vBB (array object) 1961 GET_VREG %ecx, %ecx # ecx <- vCC (requested index) 1962 testl %eax, %eax # null array object? 1963 je common_errNullObject # bail if so 1964 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1965 jae common_errArrayIndex # index >= length, bail. 1966 leal MIRROR_WIDE_ARRAY_DATA_OFFSET(%eax,%ecx,8), %eax 1967 GET_WIDE_FP_VREG %xmm0, rINST # xmm0 <- vAA 1968 movq %xmm0, (%eax) # vBB[vCC] <- xmm0 1969 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1970 1971 /* ------------------------------ */ 1972 .balign 128 1973 .L_op_aput_object: /* 0x4d */ 1974 /* File: x86/op_aput_object.S */ 1975 /* 1976 * Store an object into an array. vBB[vCC] <- vAA. 1977 */ 1978 /* op vAA, vBB, vCC */ 1979 EXPORT_PC 1980 leal OFF_FP_SHADOWFRAME(rFP), %eax 1981 movl %eax, OUT_ARG0(%esp) 1982 movl rPC, OUT_ARG1(%esp) 1983 REFRESH_INST 77 1984 movl rINST, OUT_ARG2(%esp) 1985 call SYMBOL(MterpAputObject) # (array, index) 1986 RESTORE_IBASE 1987 testb %al, %al 1988 jz MterpPossibleException 1989 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1990 1991 /* ------------------------------ */ 1992 .balign 128 1993 .L_op_aput_boolean: /* 0x4e */ 1994 /* File: x86/op_aput_boolean.S */ 1995 /* File: x86/op_aput.S */ 1996 /* 1997 * Array put, 32 bits or less. vBB[vCC] <- vAA. 1998 * 1999 * for: aput, aput-boolean, aput-byte, aput-char, aput-short 2000 * 2001 */ 2002 /* op vAA, vBB, vCC */ 2003 movzbl 2(rPC), %eax # eax <- BB 2004 movzbl 3(rPC), %ecx # ecx <- CC 2005 GET_VREG %eax, %eax # eax <- vBB (array object) 2006 GET_VREG %ecx, %ecx # ecx <- vCC (requested index) 2007 testl %eax, %eax # null array object? 2008 je common_errNullObject # bail if so 2009 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 2010 jae common_errArrayIndex # index >= length, bail. 2011 leal MIRROR_BOOLEAN_ARRAY_DATA_OFFSET(%eax,%ecx,1), %eax 2012 GET_VREG rINST, rINST 2013 movb rINSTbl, (%eax) 2014 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2015 2016 2017 /* ------------------------------ */ 2018 .balign 128 2019 .L_op_aput_byte: /* 0x4f */ 2020 /* File: x86/op_aput_byte.S */ 2021 /* File: x86/op_aput.S */ 2022 /* 2023 * Array put, 32 bits or less. vBB[vCC] <- vAA. 2024 * 2025 * for: aput, aput-boolean, aput-byte, aput-char, aput-short 2026 * 2027 */ 2028 /* op vAA, vBB, vCC */ 2029 movzbl 2(rPC), %eax # eax <- BB 2030 movzbl 3(rPC), %ecx # ecx <- CC 2031 GET_VREG %eax, %eax # eax <- vBB (array object) 2032 GET_VREG %ecx, %ecx # ecx <- vCC (requested index) 2033 testl %eax, %eax # null array object? 2034 je common_errNullObject # bail if so 2035 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 2036 jae common_errArrayIndex # index >= length, bail. 2037 leal MIRROR_BYTE_ARRAY_DATA_OFFSET(%eax,%ecx,1), %eax 2038 GET_VREG rINST, rINST 2039 movb rINSTbl, (%eax) 2040 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2041 2042 2043 /* ------------------------------ */ 2044 .balign 128 2045 .L_op_aput_char: /* 0x50 */ 2046 /* File: x86/op_aput_char.S */ 2047 /* File: x86/op_aput.S */ 2048 /* 2049 * Array put, 32 bits or less. vBB[vCC] <- vAA. 2050 * 2051 * for: aput, aput-boolean, aput-byte, aput-char, aput-short 2052 * 2053 */ 2054 /* op vAA, vBB, vCC */ 2055 movzbl 2(rPC), %eax # eax <- BB 2056 movzbl 3(rPC), %ecx # ecx <- CC 2057 GET_VREG %eax, %eax # eax <- vBB (array object) 2058 GET_VREG %ecx, %ecx # ecx <- vCC (requested index) 2059 testl %eax, %eax # null array object? 2060 je common_errNullObject # bail if so 2061 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 2062 jae common_errArrayIndex # index >= length, bail. 2063 leal MIRROR_CHAR_ARRAY_DATA_OFFSET(%eax,%ecx,2), %eax 2064 GET_VREG rINST, rINST 2065 movw rINSTw, (%eax) 2066 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2067 2068 2069 /* ------------------------------ */ 2070 .balign 128 2071 .L_op_aput_short: /* 0x51 */ 2072 /* File: x86/op_aput_short.S */ 2073 /* File: x86/op_aput.S */ 2074 /* 2075 * Array put, 32 bits or less. vBB[vCC] <- vAA. 2076 * 2077 * for: aput, aput-boolean, aput-byte, aput-char, aput-short 2078 * 2079 */ 2080 /* op vAA, vBB, vCC */ 2081 movzbl 2(rPC), %eax # eax <- BB 2082 movzbl 3(rPC), %ecx # ecx <- CC 2083 GET_VREG %eax, %eax # eax <- vBB (array object) 2084 GET_VREG %ecx, %ecx # ecx <- vCC (requested index) 2085 testl %eax, %eax # null array object? 2086 je common_errNullObject # bail if so 2087 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 2088 jae common_errArrayIndex # index >= length, bail. 2089 leal MIRROR_SHORT_ARRAY_DATA_OFFSET(%eax,%ecx,2), %eax 2090 GET_VREG rINST, rINST 2091 movw rINSTw, (%eax) 2092 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2093 2094 2095 /* ------------------------------ */ 2096 .balign 128 2097 .L_op_iget: /* 0x52 */ 2098 /* File: x86/op_iget.S */ 2099 /* 2100 * General instance field get. 2101 * 2102 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short 2103 */ 2104 EXPORT_PC 2105 movzwl 2(rPC), %eax # eax <- 0000CCCC 2106 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2107 movzbl rINSTbl, %ecx # ecx <- BA 2108 sarl $4, %ecx # ecx <- B 2109 GET_VREG %ecx, %ecx 2110 movl %ecx, OUT_ARG1(%esp) # the object pointer 2111 movl OFF_FP_METHOD(rFP), %eax 2112 movl %eax, OUT_ARG2(%esp) # referrer 2113 mov rSELF, %ecx 2114 movl %ecx, OUT_ARG3(%esp) # self 2115 call SYMBOL(artGet32InstanceFromCode) 2116 movl rSELF, %ecx 2117 RESTORE_IBASE_FROM_SELF %ecx 2118 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 2119 jnz MterpException # bail out 2120 andb $0xf, rINSTbl # rINST <- A 2121 .if 0 2122 SET_VREG_OBJECT %eax, rINST # fp[A] <-value 2123 .else 2124 SET_VREG %eax, rINST # fp[A] <-value 2125 .endif 2126 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2127 2128 /* ------------------------------ */ 2129 .balign 128 2130 .L_op_iget_wide: /* 0x53 */ 2131 /* File: x86/op_iget_wide.S */ 2132 /* 2133 * 64-bit instance field get. 2134 * 2135 * for: iget-wide 2136 */ 2137 EXPORT_PC 2138 movzwl 2(rPC), %eax # eax <- 0000CCCC 2139 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2140 movzbl rINSTbl, %ecx # ecx <- BA 2141 sarl $4, %ecx # ecx <- B 2142 GET_VREG %ecx, %ecx 2143 movl %ecx, OUT_ARG1(%esp) # the object pointer 2144 movl OFF_FP_METHOD(rFP), %eax 2145 movl %eax, OUT_ARG2(%esp) # referrer 2146 mov rSELF, %ecx 2147 movl %ecx, OUT_ARG3(%esp) # self 2148 call SYMBOL(artGet64InstanceFromCode) 2149 mov rSELF, %ecx 2150 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 2151 jnz MterpException # bail out 2152 andb $0xf, rINSTbl # rINST <- A 2153 SET_VREG %eax, rINST 2154 SET_VREG_HIGH %edx, rINST 2155 RESTORE_IBASE_FROM_SELF %ecx 2156 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2157 2158 /* ------------------------------ */ 2159 .balign 128 2160 .L_op_iget_object: /* 0x54 */ 2161 /* File: x86/op_iget_object.S */ 2162 /* File: x86/op_iget.S */ 2163 /* 2164 * General instance field get. 2165 * 2166 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short 2167 */ 2168 EXPORT_PC 2169 movzwl 2(rPC), %eax # eax <- 0000CCCC 2170 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2171 movzbl rINSTbl, %ecx # ecx <- BA 2172 sarl $4, %ecx # ecx <- B 2173 GET_VREG %ecx, %ecx 2174 movl %ecx, OUT_ARG1(%esp) # the object pointer 2175 movl OFF_FP_METHOD(rFP), %eax 2176 movl %eax, OUT_ARG2(%esp) # referrer 2177 mov rSELF, %ecx 2178 movl %ecx, OUT_ARG3(%esp) # self 2179 call SYMBOL(artGetObjInstanceFromCode) 2180 movl rSELF, %ecx 2181 RESTORE_IBASE_FROM_SELF %ecx 2182 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 2183 jnz MterpException # bail out 2184 andb $0xf, rINSTbl # rINST <- A 2185 .if 1 2186 SET_VREG_OBJECT %eax, rINST # fp[A] <-value 2187 .else 2188 SET_VREG %eax, rINST # fp[A] <-value 2189 .endif 2190 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2191 2192 2193 /* ------------------------------ */ 2194 .balign 128 2195 .L_op_iget_boolean: /* 0x55 */ 2196 /* File: x86/op_iget_boolean.S */ 2197 /* File: x86/op_iget.S */ 2198 /* 2199 * General instance field get. 2200 * 2201 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short 2202 */ 2203 EXPORT_PC 2204 movzwl 2(rPC), %eax # eax <- 0000CCCC 2205 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2206 movzbl rINSTbl, %ecx # ecx <- BA 2207 sarl $4, %ecx # ecx <- B 2208 GET_VREG %ecx, %ecx 2209 movl %ecx, OUT_ARG1(%esp) # the object pointer 2210 movl OFF_FP_METHOD(rFP), %eax 2211 movl %eax, OUT_ARG2(%esp) # referrer 2212 mov rSELF, %ecx 2213 movl %ecx, OUT_ARG3(%esp) # self 2214 call SYMBOL(artGetBooleanInstanceFromCode) 2215 movl rSELF, %ecx 2216 RESTORE_IBASE_FROM_SELF %ecx 2217 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 2218 jnz MterpException # bail out 2219 andb $0xf, rINSTbl # rINST <- A 2220 .if 0 2221 SET_VREG_OBJECT %eax, rINST # fp[A] <-value 2222 .else 2223 SET_VREG %eax, rINST # fp[A] <-value 2224 .endif 2225 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2226 2227 2228 /* ------------------------------ */ 2229 .balign 128 2230 .L_op_iget_byte: /* 0x56 */ 2231 /* File: x86/op_iget_byte.S */ 2232 /* File: x86/op_iget.S */ 2233 /* 2234 * General instance field get. 2235 * 2236 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short 2237 */ 2238 EXPORT_PC 2239 movzwl 2(rPC), %eax # eax <- 0000CCCC 2240 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2241 movzbl rINSTbl, %ecx # ecx <- BA 2242 sarl $4, %ecx # ecx <- B 2243 GET_VREG %ecx, %ecx 2244 movl %ecx, OUT_ARG1(%esp) # the object pointer 2245 movl OFF_FP_METHOD(rFP), %eax 2246 movl %eax, OUT_ARG2(%esp) # referrer 2247 mov rSELF, %ecx 2248 movl %ecx, OUT_ARG3(%esp) # self 2249 call SYMBOL(artGetByteInstanceFromCode) 2250 movl rSELF, %ecx 2251 RESTORE_IBASE_FROM_SELF %ecx 2252 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 2253 jnz MterpException # bail out 2254 andb $0xf, rINSTbl # rINST <- A 2255 .if 0 2256 SET_VREG_OBJECT %eax, rINST # fp[A] <-value 2257 .else 2258 SET_VREG %eax, rINST # fp[A] <-value 2259 .endif 2260 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2261 2262 2263 /* ------------------------------ */ 2264 .balign 128 2265 .L_op_iget_char: /* 0x57 */ 2266 /* File: x86/op_iget_char.S */ 2267 /* File: x86/op_iget.S */ 2268 /* 2269 * General instance field get. 2270 * 2271 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short 2272 */ 2273 EXPORT_PC 2274 movzwl 2(rPC), %eax # eax <- 0000CCCC 2275 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2276 movzbl rINSTbl, %ecx # ecx <- BA 2277 sarl $4, %ecx # ecx <- B 2278 GET_VREG %ecx, %ecx 2279 movl %ecx, OUT_ARG1(%esp) # the object pointer 2280 movl OFF_FP_METHOD(rFP), %eax 2281 movl %eax, OUT_ARG2(%esp) # referrer 2282 mov rSELF, %ecx 2283 movl %ecx, OUT_ARG3(%esp) # self 2284 call SYMBOL(artGetCharInstanceFromCode) 2285 movl rSELF, %ecx 2286 RESTORE_IBASE_FROM_SELF %ecx 2287 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 2288 jnz MterpException # bail out 2289 andb $0xf, rINSTbl # rINST <- A 2290 .if 0 2291 SET_VREG_OBJECT %eax, rINST # fp[A] <-value 2292 .else 2293 SET_VREG %eax, rINST # fp[A] <-value 2294 .endif 2295 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2296 2297 2298 /* ------------------------------ */ 2299 .balign 128 2300 .L_op_iget_short: /* 0x58 */ 2301 /* File: x86/op_iget_short.S */ 2302 /* File: x86/op_iget.S */ 2303 /* 2304 * General instance field get. 2305 * 2306 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short 2307 */ 2308 EXPORT_PC 2309 movzwl 2(rPC), %eax # eax <- 0000CCCC 2310 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2311 movzbl rINSTbl, %ecx # ecx <- BA 2312 sarl $4, %ecx # ecx <- B 2313 GET_VREG %ecx, %ecx 2314 movl %ecx, OUT_ARG1(%esp) # the object pointer 2315 movl OFF_FP_METHOD(rFP), %eax 2316 movl %eax, OUT_ARG2(%esp) # referrer 2317 mov rSELF, %ecx 2318 movl %ecx, OUT_ARG3(%esp) # self 2319 call SYMBOL(artGetShortInstanceFromCode) 2320 movl rSELF, %ecx 2321 RESTORE_IBASE_FROM_SELF %ecx 2322 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 2323 jnz MterpException # bail out 2324 andb $0xf, rINSTbl # rINST <- A 2325 .if 0 2326 SET_VREG_OBJECT %eax, rINST # fp[A] <-value 2327 .else 2328 SET_VREG %eax, rINST # fp[A] <-value 2329 .endif 2330 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2331 2332 2333 /* ------------------------------ */ 2334 .balign 128 2335 .L_op_iput: /* 0x59 */ 2336 /* File: x86/op_iput.S */ 2337 /* 2338 * General 32-bit instance field put. 2339 * 2340 * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short 2341 */ 2342 /* op vA, vB, field@CCCC */ 2343 .extern artSet32InstanceFromMterp 2344 EXPORT_PC 2345 movzwl 2(rPC), %eax # eax<- 0000CCCC 2346 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2347 movzbl rINSTbl, %ecx # ecx<- BA 2348 sarl $4, %ecx # ecx<- B 2349 GET_VREG %ecx, %ecx 2350 movl %ecx, OUT_ARG1(%esp) # the object pointer 2351 andb $0xf, rINSTbl # rINST<- A 2352 GET_VREG %eax, rINST 2353 movl %eax, OUT_ARG2(%esp) # fp[A] 2354 movl OFF_FP_METHOD(rFP), %eax 2355 movl %eax, OUT_ARG3(%esp) # referrer 2356 call SYMBOL(artSet32InstanceFromMterp) 2357 testb %al, %al 2358 jnz MterpPossibleException 2359 RESTORE_IBASE 2360 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2361 2362 /* ------------------------------ */ 2363 .balign 128 2364 .L_op_iput_wide: /* 0x5a */ 2365 /* File: x86/op_iput_wide.S */ 2366 /* iput-wide vA, vB, field@CCCC */ 2367 .extern artSet64InstanceFromMterp 2368 EXPORT_PC 2369 movzwl 2(rPC), %eax # eax <- 0000CCCC 2370 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2371 movzbl rINSTbl,%ecx # ecx <- BA 2372 sarl $4,%ecx # ecx <- B 2373 GET_VREG %ecx, %ecx 2374 movl %ecx, OUT_ARG1(%esp) # the object pointer 2375 andb $0xf,rINSTbl # rINST <- A 2376 leal VREG_ADDRESS(rINST), %eax 2377 movl %eax, OUT_ARG2(%esp) # &fp[A] 2378 movl OFF_FP_METHOD(rFP), %eax 2379 movl %eax, OUT_ARG3(%esp) # referrer 2380 call SYMBOL(artSet64InstanceFromMterp) 2381 testb %al, %al 2382 jnz MterpPossibleException 2383 RESTORE_IBASE 2384 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2385 2386 /* ------------------------------ */ 2387 .balign 128 2388 .L_op_iput_object: /* 0x5b */ 2389 /* File: x86/op_iput_object.S */ 2390 EXPORT_PC 2391 leal OFF_FP_SHADOWFRAME(rFP), %eax 2392 movl %eax, OUT_ARG0(%esp) 2393 movl rPC, OUT_ARG1(%esp) 2394 REFRESH_INST 91 2395 movl rINST, OUT_ARG2(%esp) 2396 movl rSELF, %eax 2397 movl %eax, OUT_ARG3(%esp) 2398 call SYMBOL(MterpIputObject) 2399 testb %al, %al 2400 jz MterpException 2401 RESTORE_IBASE 2402 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2403 2404 /* ------------------------------ */ 2405 .balign 128 2406 .L_op_iput_boolean: /* 0x5c */ 2407 /* File: x86/op_iput_boolean.S */ 2408 /* File: x86/op_iput.S */ 2409 /* 2410 * General 32-bit instance field put. 2411 * 2412 * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short 2413 */ 2414 /* op vA, vB, field@CCCC */ 2415 .extern artSet8InstanceFromMterp 2416 EXPORT_PC 2417 movzwl 2(rPC), %eax # eax<- 0000CCCC 2418 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2419 movzbl rINSTbl, %ecx # ecx<- BA 2420 sarl $4, %ecx # ecx<- B 2421 GET_VREG %ecx, %ecx 2422 movl %ecx, OUT_ARG1(%esp) # the object pointer 2423 andb $0xf, rINSTbl # rINST<- A 2424 GET_VREG %eax, rINST 2425 movl %eax, OUT_ARG2(%esp) # fp[A] 2426 movl OFF_FP_METHOD(rFP), %eax 2427 movl %eax, OUT_ARG3(%esp) # referrer 2428 call SYMBOL(artSet8InstanceFromMterp) 2429 testb %al, %al 2430 jnz MterpPossibleException 2431 RESTORE_IBASE 2432 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2433 2434 2435 /* ------------------------------ */ 2436 .balign 128 2437 .L_op_iput_byte: /* 0x5d */ 2438 /* File: x86/op_iput_byte.S */ 2439 /* File: x86/op_iput.S */ 2440 /* 2441 * General 32-bit instance field put. 2442 * 2443 * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short 2444 */ 2445 /* op vA, vB, field@CCCC */ 2446 .extern artSet8InstanceFromMterp 2447 EXPORT_PC 2448 movzwl 2(rPC), %eax # eax<- 0000CCCC 2449 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2450 movzbl rINSTbl, %ecx # ecx<- BA 2451 sarl $4, %ecx # ecx<- B 2452 GET_VREG %ecx, %ecx 2453 movl %ecx, OUT_ARG1(%esp) # the object pointer 2454 andb $0xf, rINSTbl # rINST<- A 2455 GET_VREG %eax, rINST 2456 movl %eax, OUT_ARG2(%esp) # fp[A] 2457 movl OFF_FP_METHOD(rFP), %eax 2458 movl %eax, OUT_ARG3(%esp) # referrer 2459 call SYMBOL(artSet8InstanceFromMterp) 2460 testb %al, %al 2461 jnz MterpPossibleException 2462 RESTORE_IBASE 2463 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2464 2465 2466 /* ------------------------------ */ 2467 .balign 128 2468 .L_op_iput_char: /* 0x5e */ 2469 /* File: x86/op_iput_char.S */ 2470 /* File: x86/op_iput.S */ 2471 /* 2472 * General 32-bit instance field put. 2473 * 2474 * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short 2475 */ 2476 /* op vA, vB, field@CCCC */ 2477 .extern artSet16InstanceFromMterp 2478 EXPORT_PC 2479 movzwl 2(rPC), %eax # eax<- 0000CCCC 2480 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2481 movzbl rINSTbl, %ecx # ecx<- BA 2482 sarl $4, %ecx # ecx<- B 2483 GET_VREG %ecx, %ecx 2484 movl %ecx, OUT_ARG1(%esp) # the object pointer 2485 andb $0xf, rINSTbl # rINST<- A 2486 GET_VREG %eax, rINST 2487 movl %eax, OUT_ARG2(%esp) # fp[A] 2488 movl OFF_FP_METHOD(rFP), %eax 2489 movl %eax, OUT_ARG3(%esp) # referrer 2490 call SYMBOL(artSet16InstanceFromMterp) 2491 testb %al, %al 2492 jnz MterpPossibleException 2493 RESTORE_IBASE 2494 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2495 2496 2497 /* ------------------------------ */ 2498 .balign 128 2499 .L_op_iput_short: /* 0x5f */ 2500 /* File: x86/op_iput_short.S */ 2501 /* File: x86/op_iput.S */ 2502 /* 2503 * General 32-bit instance field put. 2504 * 2505 * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short 2506 */ 2507 /* op vA, vB, field@CCCC */ 2508 .extern artSet16InstanceFromMterp 2509 EXPORT_PC 2510 movzwl 2(rPC), %eax # eax<- 0000CCCC 2511 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2512 movzbl rINSTbl, %ecx # ecx<- BA 2513 sarl $4, %ecx # ecx<- B 2514 GET_VREG %ecx, %ecx 2515 movl %ecx, OUT_ARG1(%esp) # the object pointer 2516 andb $0xf, rINSTbl # rINST<- A 2517 GET_VREG %eax, rINST 2518 movl %eax, OUT_ARG2(%esp) # fp[A] 2519 movl OFF_FP_METHOD(rFP), %eax 2520 movl %eax, OUT_ARG3(%esp) # referrer 2521 call SYMBOL(artSet16InstanceFromMterp) 2522 testb %al, %al 2523 jnz MterpPossibleException 2524 RESTORE_IBASE 2525 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2526 2527 2528 /* ------------------------------ */ 2529 .balign 128 2530 .L_op_sget: /* 0x60 */ 2531 /* File: x86/op_sget.S */ 2532 /* 2533 * General SGET handler wrapper. 2534 * 2535 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short 2536 */ 2537 /* op vAA, field@BBBB */ 2538 .extern MterpGet32Static 2539 EXPORT_PC 2540 movzwl 2(rPC), %eax 2541 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2542 movl OFF_FP_METHOD(rFP), %eax 2543 movl %eax, OUT_ARG1(%esp) # referrer 2544 movl rSELF, %ecx 2545 movl %ecx, OUT_ARG2(%esp) # self 2546 call SYMBOL(MterpGet32Static) 2547 movl rSELF, %ecx 2548 RESTORE_IBASE_FROM_SELF %ecx 2549 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 2550 jnz MterpException 2551 .if 0 2552 SET_VREG_OBJECT %eax, rINST # fp[A] <- value 2553 .else 2554 SET_VREG %eax, rINST # fp[A] <- value 2555 .endif 2556 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2557 2558 /* ------------------------------ */ 2559 .balign 128 2560 .L_op_sget_wide: /* 0x61 */ 2561 /* File: x86/op_sget_wide.S */ 2562 /* 2563 * SGET_WIDE handler wrapper. 2564 * 2565 */ 2566 /* sget-wide vAA, field@BBBB */ 2567 .extern MterpGet64Static 2568 EXPORT_PC 2569 movzwl 2(rPC), %eax 2570 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2571 movl OFF_FP_METHOD(rFP), %eax 2572 movl %eax, OUT_ARG1(%esp) # referrer 2573 movl rSELF, %ecx 2574 movl %ecx, OUT_ARG2(%esp) # self 2575 call SYMBOL(MterpGet64Static) 2576 movl rSELF, %ecx 2577 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 2578 jnz MterpException 2579 SET_VREG %eax, rINST # fp[A]<- low part 2580 SET_VREG_HIGH %edx, rINST # fp[A+1]<- high part 2581 RESTORE_IBASE_FROM_SELF %ecx 2582 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2583 2584 /* ------------------------------ */ 2585 .balign 128 2586 .L_op_sget_object: /* 0x62 */ 2587 /* File: x86/op_sget_object.S */ 2588 /* File: x86/op_sget.S */ 2589 /* 2590 * General SGET handler wrapper. 2591 * 2592 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short 2593 */ 2594 /* op vAA, field@BBBB */ 2595 .extern MterpGetObjStatic 2596 EXPORT_PC 2597 movzwl 2(rPC), %eax 2598 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2599 movl OFF_FP_METHOD(rFP), %eax 2600 movl %eax, OUT_ARG1(%esp) # referrer 2601 movl rSELF, %ecx 2602 movl %ecx, OUT_ARG2(%esp) # self 2603 call SYMBOL(MterpGetObjStatic) 2604 movl rSELF, %ecx 2605 RESTORE_IBASE_FROM_SELF %ecx 2606 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 2607 jnz MterpException 2608 .if 1 2609 SET_VREG_OBJECT %eax, rINST # fp[A] <- value 2610 .else 2611 SET_VREG %eax, rINST # fp[A] <- value 2612 .endif 2613 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2614 2615 2616 /* ------------------------------ */ 2617 .balign 128 2618 .L_op_sget_boolean: /* 0x63 */ 2619 /* File: x86/op_sget_boolean.S */ 2620 /* File: x86/op_sget.S */ 2621 /* 2622 * General SGET handler wrapper. 2623 * 2624 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short 2625 */ 2626 /* op vAA, field@BBBB */ 2627 .extern MterpGetBooleanStatic 2628 EXPORT_PC 2629 movzwl 2(rPC), %eax 2630 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2631 movl OFF_FP_METHOD(rFP), %eax 2632 movl %eax, OUT_ARG1(%esp) # referrer 2633 movl rSELF, %ecx 2634 movl %ecx, OUT_ARG2(%esp) # self 2635 call SYMBOL(MterpGetBooleanStatic) 2636 movl rSELF, %ecx 2637 RESTORE_IBASE_FROM_SELF %ecx 2638 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 2639 jnz MterpException 2640 .if 0 2641 SET_VREG_OBJECT %eax, rINST # fp[A] <- value 2642 .else 2643 SET_VREG %eax, rINST # fp[A] <- value 2644 .endif 2645 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2646 2647 2648 /* ------------------------------ */ 2649 .balign 128 2650 .L_op_sget_byte: /* 0x64 */ 2651 /* File: x86/op_sget_byte.S */ 2652 /* File: x86/op_sget.S */ 2653 /* 2654 * General SGET handler wrapper. 2655 * 2656 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short 2657 */ 2658 /* op vAA, field@BBBB */ 2659 .extern MterpGetByteStatic 2660 EXPORT_PC 2661 movzwl 2(rPC), %eax 2662 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2663 movl OFF_FP_METHOD(rFP), %eax 2664 movl %eax, OUT_ARG1(%esp) # referrer 2665 movl rSELF, %ecx 2666 movl %ecx, OUT_ARG2(%esp) # self 2667 call SYMBOL(MterpGetByteStatic) 2668 movl rSELF, %ecx 2669 RESTORE_IBASE_FROM_SELF %ecx 2670 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 2671 jnz MterpException 2672 .if 0 2673 SET_VREG_OBJECT %eax, rINST # fp[A] <- value 2674 .else 2675 SET_VREG %eax, rINST # fp[A] <- value 2676 .endif 2677 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2678 2679 2680 /* ------------------------------ */ 2681 .balign 128 2682 .L_op_sget_char: /* 0x65 */ 2683 /* File: x86/op_sget_char.S */ 2684 /* File: x86/op_sget.S */ 2685 /* 2686 * General SGET handler wrapper. 2687 * 2688 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short 2689 */ 2690 /* op vAA, field@BBBB */ 2691 .extern MterpGetCharStatic 2692 EXPORT_PC 2693 movzwl 2(rPC), %eax 2694 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2695 movl OFF_FP_METHOD(rFP), %eax 2696 movl %eax, OUT_ARG1(%esp) # referrer 2697 movl rSELF, %ecx 2698 movl %ecx, OUT_ARG2(%esp) # self 2699 call SYMBOL(MterpGetCharStatic) 2700 movl rSELF, %ecx 2701 RESTORE_IBASE_FROM_SELF %ecx 2702 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 2703 jnz MterpException 2704 .if 0 2705 SET_VREG_OBJECT %eax, rINST # fp[A] <- value 2706 .else 2707 SET_VREG %eax, rINST # fp[A] <- value 2708 .endif 2709 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2710 2711 2712 /* ------------------------------ */ 2713 .balign 128 2714 .L_op_sget_short: /* 0x66 */ 2715 /* File: x86/op_sget_short.S */ 2716 /* File: x86/op_sget.S */ 2717 /* 2718 * General SGET handler wrapper. 2719 * 2720 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short 2721 */ 2722 /* op vAA, field@BBBB */ 2723 .extern MterpGetShortStatic 2724 EXPORT_PC 2725 movzwl 2(rPC), %eax 2726 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2727 movl OFF_FP_METHOD(rFP), %eax 2728 movl %eax, OUT_ARG1(%esp) # referrer 2729 movl rSELF, %ecx 2730 movl %ecx, OUT_ARG2(%esp) # self 2731 call SYMBOL(MterpGetShortStatic) 2732 movl rSELF, %ecx 2733 RESTORE_IBASE_FROM_SELF %ecx 2734 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 2735 jnz MterpException 2736 .if 0 2737 SET_VREG_OBJECT %eax, rINST # fp[A] <- value 2738 .else 2739 SET_VREG %eax, rINST # fp[A] <- value 2740 .endif 2741 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2742 2743 2744 /* ------------------------------ */ 2745 .balign 128 2746 .L_op_sput: /* 0x67 */ 2747 /* File: x86/op_sput.S */ 2748 /* 2749 * General SPUT handler wrapper. 2750 * 2751 * for: sput, sput-boolean, sput-byte, sput-char, sput-short 2752 */ 2753 /* op vAA, field@BBBB */ 2754 .extern MterpSet32Static 2755 EXPORT_PC 2756 movzwl 2(rPC), %eax 2757 movl %eax, OUT_ARG0(%esp) # field ref BBBB 2758 GET_VREG rINST, rINST 2759 movl rINST, OUT_ARG1(%esp) # fp[AA] 2760 movl OFF_FP_METHOD(rFP), %eax 2761 movl %eax, OUT_ARG2(%esp) # referrer 2762 movl rSELF, %ecx 2763 movl %ecx, OUT_ARG3(%esp) # self 2764 call SYMBOL(MterpSet32Static) 2765 testb %al, %al 2766 jnz MterpException 2767 RESTORE_IBASE 2768 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2769 2770 /* ------------------------------ */ 2771 .balign 128 2772 .L_op_sput_wide: /* 0x68 */ 2773 /* File: x86/op_sput_wide.S */ 2774 /* 2775 * SPUT_WIDE handler wrapper. 2776 * 2777 */ 2778 /* sput-wide vAA, field@BBBB */ 2779 .extern MterpSet64Static 2780 EXPORT_PC 2781 movzwl 2(rPC), %eax 2782 movl %eax, OUT_ARG0(%esp) # field ref BBBB 2783 leal VREG_ADDRESS(rINST), %eax 2784 movl %eax, OUT_ARG1(%esp) # &fp[AA] 2785 movl OFF_FP_METHOD(rFP), %eax 2786 movl %eax, OUT_ARG2(%esp) # referrer 2787 movl rSELF, %ecx 2788 movl %ecx, OUT_ARG3(%esp) # self 2789 call SYMBOL(MterpSet64Static) 2790 testb %al, %al 2791 jnz MterpException 2792 RESTORE_IBASE 2793 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2794 2795 /* ------------------------------ */ 2796 .balign 128 2797 .L_op_sput_object: /* 0x69 */ 2798 /* File: x86/op_sput_object.S */ 2799 EXPORT_PC 2800 leal OFF_FP_SHADOWFRAME(rFP), %eax 2801 movl %eax, OUT_ARG0(%esp) 2802 movl rPC, OUT_ARG1(%esp) 2803 REFRESH_INST 105 2804 movl rINST, OUT_ARG2(%esp) 2805 movl rSELF, %ecx 2806 movl %ecx, OUT_ARG3(%esp) 2807 call SYMBOL(MterpSputObject) 2808 testb %al, %al 2809 jz MterpException 2810 RESTORE_IBASE 2811 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2812 2813 /* ------------------------------ */ 2814 .balign 128 2815 .L_op_sput_boolean: /* 0x6a */ 2816 /* File: x86/op_sput_boolean.S */ 2817 /* File: x86/op_sput.S */ 2818 /* 2819 * General SPUT handler wrapper. 2820 * 2821 * for: sput, sput-boolean, sput-byte, sput-char, sput-short 2822 */ 2823 /* op vAA, field@BBBB */ 2824 .extern MterpSetBooleanStatic 2825 EXPORT_PC 2826 movzwl 2(rPC), %eax 2827 movl %eax, OUT_ARG0(%esp) # field ref BBBB 2828 GET_VREG rINST, rINST 2829 movl rINST, OUT_ARG1(%esp) # fp[AA] 2830 movl OFF_FP_METHOD(rFP), %eax 2831 movl %eax, OUT_ARG2(%esp) # referrer 2832 movl rSELF, %ecx 2833 movl %ecx, OUT_ARG3(%esp) # self 2834 call SYMBOL(MterpSetBooleanStatic) 2835 testb %al, %al 2836 jnz MterpException 2837 RESTORE_IBASE 2838 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2839 2840 2841 /* ------------------------------ */ 2842 .balign 128 2843 .L_op_sput_byte: /* 0x6b */ 2844 /* File: x86/op_sput_byte.S */ 2845 /* File: x86/op_sput.S */ 2846 /* 2847 * General SPUT handler wrapper. 2848 * 2849 * for: sput, sput-boolean, sput-byte, sput-char, sput-short 2850 */ 2851 /* op vAA, field@BBBB */ 2852 .extern MterpSetByteStatic 2853 EXPORT_PC 2854 movzwl 2(rPC), %eax 2855 movl %eax, OUT_ARG0(%esp) # field ref BBBB 2856 GET_VREG rINST, rINST 2857 movl rINST, OUT_ARG1(%esp) # fp[AA] 2858 movl OFF_FP_METHOD(rFP), %eax 2859 movl %eax, OUT_ARG2(%esp) # referrer 2860 movl rSELF, %ecx 2861 movl %ecx, OUT_ARG3(%esp) # self 2862 call SYMBOL(MterpSetByteStatic) 2863 testb %al, %al 2864 jnz MterpException 2865 RESTORE_IBASE 2866 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2867 2868 2869 /* ------------------------------ */ 2870 .balign 128 2871 .L_op_sput_char: /* 0x6c */ 2872 /* File: x86/op_sput_char.S */ 2873 /* File: x86/op_sput.S */ 2874 /* 2875 * General SPUT handler wrapper. 2876 * 2877 * for: sput, sput-boolean, sput-byte, sput-char, sput-short 2878 */ 2879 /* op vAA, field@BBBB */ 2880 .extern MterpSetCharStatic 2881 EXPORT_PC 2882 movzwl 2(rPC), %eax 2883 movl %eax, OUT_ARG0(%esp) # field ref BBBB 2884 GET_VREG rINST, rINST 2885 movl rINST, OUT_ARG1(%esp) # fp[AA] 2886 movl OFF_FP_METHOD(rFP), %eax 2887 movl %eax, OUT_ARG2(%esp) # referrer 2888 movl rSELF, %ecx 2889 movl %ecx, OUT_ARG3(%esp) # self 2890 call SYMBOL(MterpSetCharStatic) 2891 testb %al, %al 2892 jnz MterpException 2893 RESTORE_IBASE 2894 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2895 2896 2897 /* ------------------------------ */ 2898 .balign 128 2899 .L_op_sput_short: /* 0x6d */ 2900 /* File: x86/op_sput_short.S */ 2901 /* File: x86/op_sput.S */ 2902 /* 2903 * General SPUT handler wrapper. 2904 * 2905 * for: sput, sput-boolean, sput-byte, sput-char, sput-short 2906 */ 2907 /* op vAA, field@BBBB */ 2908 .extern MterpSetShortStatic 2909 EXPORT_PC 2910 movzwl 2(rPC), %eax 2911 movl %eax, OUT_ARG0(%esp) # field ref BBBB 2912 GET_VREG rINST, rINST 2913 movl rINST, OUT_ARG1(%esp) # fp[AA] 2914 movl OFF_FP_METHOD(rFP), %eax 2915 movl %eax, OUT_ARG2(%esp) # referrer 2916 movl rSELF, %ecx 2917 movl %ecx, OUT_ARG3(%esp) # self 2918 call SYMBOL(MterpSetShortStatic) 2919 testb %al, %al 2920 jnz MterpException 2921 RESTORE_IBASE 2922 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2923 2924 2925 /* ------------------------------ */ 2926 .balign 128 2927 .L_op_invoke_virtual: /* 0x6e */ 2928 /* File: x86/op_invoke_virtual.S */ 2929 /* File: x86/invoke.S */ 2930 /* 2931 * Generic invoke handler wrapper. 2932 */ 2933 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 2934 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 2935 .extern MterpInvokeVirtual 2936 EXPORT_PC 2937 movl rSELF, %ecx 2938 movl %ecx, OUT_ARG0(%esp) 2939 leal OFF_FP_SHADOWFRAME(rFP), %eax 2940 movl %eax, OUT_ARG1(%esp) 2941 movl rPC, OUT_ARG2(%esp) 2942 REFRESH_INST 110 2943 movl rINST, OUT_ARG3(%esp) 2944 call SYMBOL(MterpInvokeVirtual) 2945 testb %al, %al 2946 jz MterpException 2947 ADVANCE_PC 3 2948 call SYMBOL(MterpShouldSwitchInterpreters) 2949 testb %al, %al 2950 jnz MterpFallback 2951 RESTORE_IBASE 2952 FETCH_INST 2953 GOTO_NEXT 2954 2955 /* 2956 * Handle a virtual method call. 2957 * 2958 * for: invoke-virtual, invoke-virtual/range 2959 */ 2960 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 2961 /* op vAA, {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 2962 2963 /* ------------------------------ */ 2964 .balign 128 2965 .L_op_invoke_super: /* 0x6f */ 2966 /* File: x86/op_invoke_super.S */ 2967 /* File: x86/invoke.S */ 2968 /* 2969 * Generic invoke handler wrapper. 2970 */ 2971 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 2972 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 2973 .extern MterpInvokeSuper 2974 EXPORT_PC 2975 movl rSELF, %ecx 2976 movl %ecx, OUT_ARG0(%esp) 2977 leal OFF_FP_SHADOWFRAME(rFP), %eax 2978 movl %eax, OUT_ARG1(%esp) 2979 movl rPC, OUT_ARG2(%esp) 2980 REFRESH_INST 111 2981 movl rINST, OUT_ARG3(%esp) 2982 call SYMBOL(MterpInvokeSuper) 2983 testb %al, %al 2984 jz MterpException 2985 ADVANCE_PC 3 2986 call SYMBOL(MterpShouldSwitchInterpreters) 2987 testb %al, %al 2988 jnz MterpFallback 2989 RESTORE_IBASE 2990 FETCH_INST 2991 GOTO_NEXT 2992 2993 /* 2994 * Handle a "super" method call. 2995 * 2996 * for: invoke-super, invoke-super/range 2997 */ 2998 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 2999 /* op vAA, {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 3000 3001 /* ------------------------------ */ 3002 .balign 128 3003 .L_op_invoke_direct: /* 0x70 */ 3004 /* File: x86/op_invoke_direct.S */ 3005 /* File: x86/invoke.S */ 3006 /* 3007 * Generic invoke handler wrapper. 3008 */ 3009 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 3010 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 3011 .extern MterpInvokeDirect 3012 EXPORT_PC 3013 movl rSELF, %ecx 3014 movl %ecx, OUT_ARG0(%esp) 3015 leal OFF_FP_SHADOWFRAME(rFP), %eax 3016 movl %eax, OUT_ARG1(%esp) 3017 movl rPC, OUT_ARG2(%esp) 3018 REFRESH_INST 112 3019 movl rINST, OUT_ARG3(%esp) 3020 call SYMBOL(MterpInvokeDirect) 3021 testb %al, %al 3022 jz MterpException 3023 ADVANCE_PC 3 3024 call SYMBOL(MterpShouldSwitchInterpreters) 3025 testb %al, %al 3026 jnz MterpFallback 3027 RESTORE_IBASE 3028 FETCH_INST 3029 GOTO_NEXT 3030 3031 3032 /* ------------------------------ */ 3033 .balign 128 3034 .L_op_invoke_static: /* 0x71 */ 3035 /* File: x86/op_invoke_static.S */ 3036 /* File: x86/invoke.S */ 3037 /* 3038 * Generic invoke handler wrapper. 3039 */ 3040 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 3041 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 3042 .extern MterpInvokeStatic 3043 EXPORT_PC 3044 movl rSELF, %ecx 3045 movl %ecx, OUT_ARG0(%esp) 3046 leal OFF_FP_SHADOWFRAME(rFP), %eax 3047 movl %eax, OUT_ARG1(%esp) 3048 movl rPC, OUT_ARG2(%esp) 3049 REFRESH_INST 113 3050 movl rINST, OUT_ARG3(%esp) 3051 call SYMBOL(MterpInvokeStatic) 3052 testb %al, %al 3053 jz MterpException 3054 ADVANCE_PC 3 3055 call SYMBOL(MterpShouldSwitchInterpreters) 3056 testb %al, %al 3057 jnz MterpFallback 3058 RESTORE_IBASE 3059 FETCH_INST 3060 GOTO_NEXT 3061 3062 3063 3064 /* ------------------------------ */ 3065 .balign 128 3066 .L_op_invoke_interface: /* 0x72 */ 3067 /* File: x86/op_invoke_interface.S */ 3068 /* File: x86/invoke.S */ 3069 /* 3070 * Generic invoke handler wrapper. 3071 */ 3072 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 3073 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 3074 .extern MterpInvokeInterface 3075 EXPORT_PC 3076 movl rSELF, %ecx 3077 movl %ecx, OUT_ARG0(%esp) 3078 leal OFF_FP_SHADOWFRAME(rFP), %eax 3079 movl %eax, OUT_ARG1(%esp) 3080 movl rPC, OUT_ARG2(%esp) 3081 REFRESH_INST 114 3082 movl rINST, OUT_ARG3(%esp) 3083 call SYMBOL(MterpInvokeInterface) 3084 testb %al, %al 3085 jz MterpException 3086 ADVANCE_PC 3 3087 call SYMBOL(MterpShouldSwitchInterpreters) 3088 testb %al, %al 3089 jnz MterpFallback 3090 RESTORE_IBASE 3091 FETCH_INST 3092 GOTO_NEXT 3093 3094 /* 3095 * Handle an interface method call. 3096 * 3097 * for: invoke-interface, invoke-interface/range 3098 */ 3099 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 3100 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 3101 3102 /* ------------------------------ */ 3103 .balign 128 3104 .L_op_return_void_no_barrier: /* 0x73 */ 3105 /* File: x86/op_return_void_no_barrier.S */ 3106 movl rSELF, %eax 3107 testl $(THREAD_SUSPEND_OR_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(%eax) 3108 jz 1f 3109 movl %eax, OUT_ARG0(%esp) 3110 call SYMBOL(MterpSuspendCheck) 3111 1: 3112 xorl %eax, %eax 3113 xorl %ecx, %ecx 3114 jmp MterpReturn 3115 3116 /* ------------------------------ */ 3117 .balign 128 3118 .L_op_invoke_virtual_range: /* 0x74 */ 3119 /* File: x86/op_invoke_virtual_range.S */ 3120 /* File: x86/invoke.S */ 3121 /* 3122 * Generic invoke handler wrapper. 3123 */ 3124 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 3125 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 3126 .extern MterpInvokeVirtualRange 3127 EXPORT_PC 3128 movl rSELF, %ecx 3129 movl %ecx, OUT_ARG0(%esp) 3130 leal OFF_FP_SHADOWFRAME(rFP), %eax 3131 movl %eax, OUT_ARG1(%esp) 3132 movl rPC, OUT_ARG2(%esp) 3133 REFRESH_INST 116 3134 movl rINST, OUT_ARG3(%esp) 3135 call SYMBOL(MterpInvokeVirtualRange) 3136 testb %al, %al 3137 jz MterpException 3138 ADVANCE_PC 3 3139 call SYMBOL(MterpShouldSwitchInterpreters) 3140 testb %al, %al 3141 jnz MterpFallback 3142 RESTORE_IBASE 3143 FETCH_INST 3144 GOTO_NEXT 3145 3146 3147 /* ------------------------------ */ 3148 .balign 128 3149 .L_op_invoke_super_range: /* 0x75 */ 3150 /* File: x86/op_invoke_super_range.S */ 3151 /* File: x86/invoke.S */ 3152 /* 3153 * Generic invoke handler wrapper. 3154 */ 3155 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 3156 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 3157 .extern MterpInvokeSuperRange 3158 EXPORT_PC 3159 movl rSELF, %ecx 3160 movl %ecx, OUT_ARG0(%esp) 3161 leal OFF_FP_SHADOWFRAME(rFP), %eax 3162 movl %eax, OUT_ARG1(%esp) 3163 movl rPC, OUT_ARG2(%esp) 3164 REFRESH_INST 117 3165 movl rINST, OUT_ARG3(%esp) 3166 call SYMBOL(MterpInvokeSuperRange) 3167 testb %al, %al 3168 jz MterpException 3169 ADVANCE_PC 3 3170 call SYMBOL(MterpShouldSwitchInterpreters) 3171 testb %al, %al 3172 jnz MterpFallback 3173 RESTORE_IBASE 3174 FETCH_INST 3175 GOTO_NEXT 3176 3177 3178 /* ------------------------------ */ 3179 .balign 128 3180 .L_op_invoke_direct_range: /* 0x76 */ 3181 /* File: x86/op_invoke_direct_range.S */ 3182 /* File: x86/invoke.S */ 3183 /* 3184 * Generic invoke handler wrapper. 3185 */ 3186 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 3187 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 3188 .extern MterpInvokeDirectRange 3189 EXPORT_PC 3190 movl rSELF, %ecx 3191 movl %ecx, OUT_ARG0(%esp) 3192 leal OFF_FP_SHADOWFRAME(rFP), %eax 3193 movl %eax, OUT_ARG1(%esp) 3194 movl rPC, OUT_ARG2(%esp) 3195 REFRESH_INST 118 3196 movl rINST, OUT_ARG3(%esp) 3197 call SYMBOL(MterpInvokeDirectRange) 3198 testb %al, %al 3199 jz MterpException 3200 ADVANCE_PC 3 3201 call SYMBOL(MterpShouldSwitchInterpreters) 3202 testb %al, %al 3203 jnz MterpFallback 3204 RESTORE_IBASE 3205 FETCH_INST 3206 GOTO_NEXT 3207 3208 3209 /* ------------------------------ */ 3210 .balign 128 3211 .L_op_invoke_static_range: /* 0x77 */ 3212 /* File: x86/op_invoke_static_range.S */ 3213 /* File: x86/invoke.S */ 3214 /* 3215 * Generic invoke handler wrapper. 3216 */ 3217 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 3218 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 3219 .extern MterpInvokeStaticRange 3220 EXPORT_PC 3221 movl rSELF, %ecx 3222 movl %ecx, OUT_ARG0(%esp) 3223 leal OFF_FP_SHADOWFRAME(rFP), %eax 3224 movl %eax, OUT_ARG1(%esp) 3225 movl rPC, OUT_ARG2(%esp) 3226 REFRESH_INST 119 3227 movl rINST, OUT_ARG3(%esp) 3228 call SYMBOL(MterpInvokeStaticRange) 3229 testb %al, %al 3230 jz MterpException 3231 ADVANCE_PC 3 3232 call SYMBOL(MterpShouldSwitchInterpreters) 3233 testb %al, %al 3234 jnz MterpFallback 3235 RESTORE_IBASE 3236 FETCH_INST 3237 GOTO_NEXT 3238 3239 3240 /* ------------------------------ */ 3241 .balign 128 3242 .L_op_invoke_interface_range: /* 0x78 */ 3243 /* File: x86/op_invoke_interface_range.S */ 3244 /* File: x86/invoke.S */ 3245 /* 3246 * Generic invoke handler wrapper. 3247 */ 3248 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 3249 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 3250 .extern MterpInvokeInterfaceRange 3251 EXPORT_PC 3252 movl rSELF, %ecx 3253 movl %ecx, OUT_ARG0(%esp) 3254 leal OFF_FP_SHADOWFRAME(rFP), %eax 3255 movl %eax, OUT_ARG1(%esp) 3256 movl rPC, OUT_ARG2(%esp) 3257 REFRESH_INST 120 3258 movl rINST, OUT_ARG3(%esp) 3259 call SYMBOL(MterpInvokeInterfaceRange) 3260 testb %al, %al 3261 jz MterpException 3262 ADVANCE_PC 3 3263 call SYMBOL(MterpShouldSwitchInterpreters) 3264 testb %al, %al 3265 jnz MterpFallback 3266 RESTORE_IBASE 3267 FETCH_INST 3268 GOTO_NEXT 3269 3270 3271 /* ------------------------------ */ 3272 .balign 128 3273 .L_op_unused_79: /* 0x79 */ 3274 /* File: x86/op_unused_79.S */ 3275 /* File: x86/unused.S */ 3276 /* 3277 * Bail to reference interpreter to throw. 3278 */ 3279 jmp MterpFallback 3280 3281 3282 /* ------------------------------ */ 3283 .balign 128 3284 .L_op_unused_7a: /* 0x7a */ 3285 /* File: x86/op_unused_7a.S */ 3286 /* File: x86/unused.S */ 3287 /* 3288 * Bail to reference interpreter to throw. 3289 */ 3290 jmp MterpFallback 3291 3292 3293 /* ------------------------------ */ 3294 .balign 128 3295 .L_op_neg_int: /* 0x7b */ 3296 /* File: x86/op_neg_int.S */ 3297 /* File: x86/unop.S */ 3298 /* 3299 * Generic 32-bit unary operation. Provide an "instr" line that 3300 * specifies an instruction that performs "result = op eax". 3301 */ 3302 /* unop vA, vB */ 3303 movzbl rINSTbl,%ecx # ecx <- A+ 3304 sarl $4,rINST # rINST <- B 3305 GET_VREG %eax, rINST # eax <- vB 3306 andb $0xf,%cl # ecx <- A 3307 negl %eax 3308 SET_VREG %eax, %ecx 3309 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3310 3311 3312 /* ------------------------------ */ 3313 .balign 128 3314 .L_op_not_int: /* 0x7c */ 3315 /* File: x86/op_not_int.S */ 3316 /* File: x86/unop.S */ 3317 /* 3318 * Generic 32-bit unary operation. Provide an "instr" line that 3319 * specifies an instruction that performs "result = op eax". 3320 */ 3321 /* unop vA, vB */ 3322 movzbl rINSTbl,%ecx # ecx <- A+ 3323 sarl $4,rINST # rINST <- B 3324 GET_VREG %eax, rINST # eax <- vB 3325 andb $0xf,%cl # ecx <- A 3326 notl %eax 3327 SET_VREG %eax, %ecx 3328 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3329 3330 3331 /* ------------------------------ */ 3332 .balign 128 3333 .L_op_neg_long: /* 0x7d */ 3334 /* File: x86/op_neg_long.S */ 3335 /* unop vA, vB */ 3336 movzbl rINSTbl, %ecx # ecx <- BA 3337 sarl $4, %ecx # ecx <- B 3338 andb $0xf, rINSTbl # rINST <- A 3339 GET_VREG %eax, %ecx # eax <- v[B+0] 3340 GET_VREG_HIGH %ecx, %ecx # ecx <- v[B+1] 3341 negl %eax 3342 adcl $0, %ecx 3343 negl %ecx 3344 SET_VREG %eax, rINST # v[A+0] <- eax 3345 SET_VREG_HIGH %ecx, rINST # v[A+1] <- ecx 3346 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3347 3348 3349 /* ------------------------------ */ 3350 .balign 128 3351 .L_op_not_long: /* 0x7e */ 3352 /* File: x86/op_not_long.S */ 3353 /* unop vA, vB */ 3354 movzbl rINSTbl, %ecx # ecx <- BA 3355 sarl $4, %ecx # ecx <- B 3356 andb $0xf, rINSTbl # rINST <- A 3357 GET_VREG %eax, %ecx # eax <- v[B+0] 3358 GET_VREG_HIGH %ecx, %ecx # ecx <- v[B+1] 3359 notl %eax 3360 notl %ecx 3361 SET_VREG %eax, rINST # v[A+0] <- eax 3362 SET_VREG_HIGH %ecx, rINST # v[A+1] <- ecx 3363 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3364 3365 /* ------------------------------ */ 3366 .balign 128 3367 .L_op_neg_float: /* 0x7f */ 3368 /* File: x86/op_neg_float.S */ 3369 /* File: x86/fpcvt.S */ 3370 /* 3371 * Generic 32-bit FP conversion operation. 3372 */ 3373 /* unop vA, vB */ 3374 movzbl rINSTbl, %ecx # ecx <- A+ 3375 sarl $4, rINST # rINST <- B 3376 flds VREG_ADDRESS(rINST) # %st0 <- vB 3377 andb $0xf, %cl # ecx <- A 3378 fchs 3379 fstps VREG_ADDRESS(%ecx) # vA <- %st0 3380 .if 0 3381 CLEAR_WIDE_REF %ecx 3382 .else 3383 CLEAR_REF %ecx 3384 .endif 3385 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3386 3387 3388 /* ------------------------------ */ 3389 .balign 128 3390 .L_op_neg_double: /* 0x80 */ 3391 /* File: x86/op_neg_double.S */ 3392 /* File: x86/fpcvt.S */ 3393 /* 3394 * Generic 32-bit FP conversion operation. 3395 */ 3396 /* unop vA, vB */ 3397 movzbl rINSTbl, %ecx # ecx <- A+ 3398 sarl $4, rINST # rINST <- B 3399 fldl VREG_ADDRESS(rINST) # %st0 <- vB 3400 andb $0xf, %cl # ecx <- A 3401 fchs 3402 fstpl VREG_ADDRESS(%ecx) # vA <- %st0 3403 .if 1 3404 CLEAR_WIDE_REF %ecx 3405 .else 3406 CLEAR_REF %ecx 3407 .endif 3408 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3409 3410 3411 /* ------------------------------ */ 3412 .balign 128 3413 .L_op_int_to_long: /* 0x81 */ 3414 /* File: x86/op_int_to_long.S */ 3415 /* int to long vA, vB */ 3416 movzbl rINSTbl, %eax # eax <- +A 3417 sarl $4, %eax # eax <- B 3418 GET_VREG %eax, %eax # eax <- vB 3419 andb $0xf, rINSTbl # rINST <- A 3420 movl rIBASE, %ecx # cltd trashes rIBASE/edx 3421 cltd # rINST:eax<- sssssssBBBBBBBB 3422 SET_VREG_HIGH rIBASE, rINST # v[A+1] <- rIBASE 3423 SET_VREG %eax, rINST # v[A+0] <- %eax 3424 movl %ecx, rIBASE 3425 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3426 3427 3428 /* ------------------------------ */ 3429 .balign 128 3430 .L_op_int_to_float: /* 0x82 */ 3431 /* File: x86/op_int_to_float.S */ 3432 /* File: x86/fpcvt.S */ 3433 /* 3434 * Generic 32-bit FP conversion operation. 3435 */ 3436 /* unop vA, vB */ 3437 movzbl rINSTbl, %ecx # ecx <- A+ 3438 sarl $4, rINST # rINST <- B 3439 fildl VREG_ADDRESS(rINST) # %st0 <- vB 3440 andb $0xf, %cl # ecx <- A 3441 3442 fstps VREG_ADDRESS(%ecx) # vA <- %st0 3443 .if 0 3444 CLEAR_WIDE_REF %ecx 3445 .else 3446 CLEAR_REF %ecx 3447 .endif 3448 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3449 3450 3451 /* ------------------------------ */ 3452 .balign 128 3453 .L_op_int_to_double: /* 0x83 */ 3454 /* File: x86/op_int_to_double.S */ 3455 /* File: x86/fpcvt.S */ 3456 /* 3457 * Generic 32-bit FP conversion operation. 3458 */ 3459 /* unop vA, vB */ 3460 movzbl rINSTbl, %ecx # ecx <- A+ 3461 sarl $4, rINST # rINST <- B 3462 fildl VREG_ADDRESS(rINST) # %st0 <- vB 3463 andb $0xf, %cl # ecx <- A 3464 3465 fstpl VREG_ADDRESS(%ecx) # vA <- %st0 3466 .if 1 3467 CLEAR_WIDE_REF %ecx 3468 .else 3469 CLEAR_REF %ecx 3470 .endif 3471 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3472 3473 3474 /* ------------------------------ */ 3475 .balign 128 3476 .L_op_long_to_int: /* 0x84 */ 3477 /* File: x86/op_long_to_int.S */ 3478 /* we ignore the high word, making this equivalent to a 32-bit reg move */ 3479 /* File: x86/op_move.S */ 3480 /* for move, move-object, long-to-int */ 3481 /* op vA, vB */ 3482 movzbl rINSTbl, %eax # eax <- BA 3483 andb $0xf, %al # eax <- A 3484 shrl $4, rINST # rINST <- B 3485 GET_VREG rINST, rINST 3486 .if 0 3487 SET_VREG_OBJECT rINST, %eax # fp[A] <- fp[B] 3488 .else 3489 SET_VREG rINST, %eax # fp[A] <- fp[B] 3490 .endif 3491 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3492 3493 3494 /* ------------------------------ */ 3495 .balign 128 3496 .L_op_long_to_float: /* 0x85 */ 3497 /* File: x86/op_long_to_float.S */ 3498 /* File: x86/fpcvt.S */ 3499 /* 3500 * Generic 32-bit FP conversion operation. 3501 */ 3502 /* unop vA, vB */ 3503 movzbl rINSTbl, %ecx # ecx <- A+ 3504 sarl $4, rINST # rINST <- B 3505 fildll VREG_ADDRESS(rINST) # %st0 <- vB 3506 andb $0xf, %cl # ecx <- A 3507 3508 fstps VREG_ADDRESS(%ecx) # vA <- %st0 3509 .if 0 3510 CLEAR_WIDE_REF %ecx 3511 .else 3512 CLEAR_REF %ecx 3513 .endif 3514 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3515 3516 3517 /* ------------------------------ */ 3518 .balign 128 3519 .L_op_long_to_double: /* 0x86 */ 3520 /* File: x86/op_long_to_double.S */ 3521 /* File: x86/fpcvt.S */ 3522 /* 3523 * Generic 32-bit FP conversion operation. 3524 */ 3525 /* unop vA, vB */ 3526 movzbl rINSTbl, %ecx # ecx <- A+ 3527 sarl $4, rINST # rINST <- B 3528 fildll VREG_ADDRESS(rINST) # %st0 <- vB 3529 andb $0xf, %cl # ecx <- A 3530 3531 fstpl VREG_ADDRESS(%ecx) # vA <- %st0 3532 .if 1 3533 CLEAR_WIDE_REF %ecx 3534 .else 3535 CLEAR_REF %ecx 3536 .endif 3537 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3538 3539 3540 /* ------------------------------ */ 3541 .balign 128 3542 .L_op_float_to_int: /* 0x87 */ 3543 /* File: x86/op_float_to_int.S */ 3544 /* File: x86/cvtfp_int.S */ 3545 /* On fp to int conversions, Java requires that 3546 * if the result > maxint, it should be clamped to maxint. If it is less 3547 * than minint, it should be clamped to minint. If it is a nan, the result 3548 * should be zero. Further, the rounding mode is to truncate. This model 3549 * differs from what is delivered normally via the x86 fpu, so we have 3550 * to play some games. 3551 */ 3552 /* float/double to int/long vA, vB */ 3553 movzbl rINSTbl, %ecx # ecx <- A+ 3554 sarl $4, rINST # rINST <- B 3555 .if 0 3556 fldl VREG_ADDRESS(rINST) # %st0 <- vB 3557 .else 3558 flds VREG_ADDRESS(rINST) # %st0 <- vB 3559 .endif 3560 ftst 3561 fnstcw LOCAL0(%esp) # remember original rounding mode 3562 movzwl LOCAL0(%esp), %eax 3563 movb $0xc, %ah 3564 movw %ax, LOCAL0+2(%esp) 3565 fldcw LOCAL0+2(%esp) # set "to zero" rounding mode 3566 andb $0xf, %cl # ecx <- A 3567 .if 0 3568 fistpll VREG_ADDRESS(%ecx) # convert and store 3569 .else 3570 fistpl VREG_ADDRESS(%ecx) # convert and store 3571 .endif 3572 fldcw LOCAL0(%esp) # restore previous rounding mode 3573 .if 0 3574 movl $0x80000000, %eax 3575 xorl VREG_HIGH_ADDRESS(%ecx), %eax 3576 orl VREG_ADDRESS(%ecx), %eax 3577 .else 3578 cmpl $0x80000000, VREG_ADDRESS(%ecx) 3579 .endif 3580 je .Lop_float_to_int_special_case # fix up result 3581 3582 .Lop_float_to_int_finish: 3583 xor %eax, %eax 3584 mov %eax, VREG_REF_ADDRESS(%ecx) 3585 .if 0 3586 mov %eax, VREG_REF_HIGH_ADDRESS(%ecx) 3587 .endif 3588 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3589 3590 .Lop_float_to_int_special_case: 3591 fnstsw %ax 3592 sahf 3593 jp .Lop_float_to_int_isNaN 3594 adcl $-1, VREG_ADDRESS(%ecx) 3595 .if 0 3596 adcl $-1, VREG_HIGH_ADDRESS(%ecx) 3597 .endif 3598 jmp .Lop_float_to_int_finish 3599 .Lop_float_to_int_isNaN: 3600 movl $0, VREG_ADDRESS(%ecx) 3601 .if 0 3602 movl $0, VREG_HIGH_ADDRESS(%ecx) 3603 .endif 3604 jmp .Lop_float_to_int_finish 3605 3606 3607 /* ------------------------------ */ 3608 .balign 128 3609 .L_op_float_to_long: /* 0x88 */ 3610 /* File: x86/op_float_to_long.S */ 3611 /* File: x86/cvtfp_int.S */ 3612 /* On fp to int conversions, Java requires that 3613 * if the result > maxint, it should be clamped to maxint. If it is less 3614 * than minint, it should be clamped to minint. If it is a nan, the result 3615 * should be zero. Further, the rounding mode is to truncate. This model 3616 * differs from what is delivered normally via the x86 fpu, so we have 3617 * to play some games. 3618 */ 3619 /* float/double to int/long vA, vB */ 3620 movzbl rINSTbl, %ecx # ecx <- A+ 3621 sarl $4, rINST # rINST <- B 3622 .if 0 3623 fldl VREG_ADDRESS(rINST) # %st0 <- vB 3624 .else 3625 flds VREG_ADDRESS(rINST) # %st0 <- vB 3626 .endif 3627 ftst 3628 fnstcw LOCAL0(%esp) # remember original rounding mode 3629 movzwl LOCAL0(%esp), %eax 3630 movb $0xc, %ah 3631 movw %ax, LOCAL0+2(%esp) 3632 fldcw LOCAL0+2(%esp) # set "to zero" rounding mode 3633 andb $0xf, %cl # ecx <- A 3634 .if 1 3635 fistpll VREG_ADDRESS(%ecx) # convert and store 3636 .else 3637 fistpl VREG_ADDRESS(%ecx) # convert and store 3638 .endif 3639 fldcw LOCAL0(%esp) # restore previous rounding mode 3640 .if 1 3641 movl $0x80000000, %eax 3642 xorl VREG_HIGH_ADDRESS(%ecx), %eax 3643 orl VREG_ADDRESS(%ecx), %eax 3644 .else 3645 cmpl $0x80000000, VREG_ADDRESS(%ecx) 3646 .endif 3647 je .Lop_float_to_long_special_case # fix up result 3648 3649 .Lop_float_to_long_finish: 3650 xor %eax, %eax 3651 mov %eax, VREG_REF_ADDRESS(%ecx) 3652 .if 1 3653 mov %eax, VREG_REF_HIGH_ADDRESS(%ecx) 3654 .endif 3655 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3656 3657 .Lop_float_to_long_special_case: 3658 fnstsw %ax 3659 sahf 3660 jp .Lop_float_to_long_isNaN 3661 adcl $-1, VREG_ADDRESS(%ecx) 3662 .if 1 3663 adcl $-1, VREG_HIGH_ADDRESS(%ecx) 3664 .endif 3665 jmp .Lop_float_to_long_finish 3666 .Lop_float_to_long_isNaN: 3667 movl $0, VREG_ADDRESS(%ecx) 3668 .if 1 3669 movl $0, VREG_HIGH_ADDRESS(%ecx) 3670 .endif 3671 jmp .Lop_float_to_long_finish 3672 3673 3674 /* ------------------------------ */ 3675 .balign 128 3676 .L_op_float_to_double: /* 0x89 */ 3677 /* File: x86/op_float_to_double.S */ 3678 /* File: x86/fpcvt.S */ 3679 /* 3680 * Generic 32-bit FP conversion operation. 3681 */ 3682 /* unop vA, vB */ 3683 movzbl rINSTbl, %ecx # ecx <- A+ 3684 sarl $4, rINST # rINST <- B 3685 flds VREG_ADDRESS(rINST) # %st0 <- vB 3686 andb $0xf, %cl # ecx <- A 3687 3688 fstpl VREG_ADDRESS(%ecx) # vA <- %st0 3689 .if 1 3690 CLEAR_WIDE_REF %ecx 3691 .else 3692 CLEAR_REF %ecx 3693 .endif 3694 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3695 3696 3697 /* ------------------------------ */ 3698 .balign 128 3699 .L_op_double_to_int: /* 0x8a */ 3700 /* File: x86/op_double_to_int.S */ 3701 /* File: x86/cvtfp_int.S */ 3702 /* On fp to int conversions, Java requires that 3703 * if the result > maxint, it should be clamped to maxint. If it is less 3704 * than minint, it should be clamped to minint. If it is a nan, the result 3705 * should be zero. Further, the rounding mode is to truncate. This model 3706 * differs from what is delivered normally via the x86 fpu, so we have 3707 * to play some games. 3708 */ 3709 /* float/double to int/long vA, vB */ 3710 movzbl rINSTbl, %ecx # ecx <- A+ 3711 sarl $4, rINST # rINST <- B 3712 .if 1 3713 fldl VREG_ADDRESS(rINST) # %st0 <- vB 3714 .else 3715 flds VREG_ADDRESS(rINST) # %st0 <- vB 3716 .endif 3717 ftst 3718 fnstcw LOCAL0(%esp) # remember original rounding mode 3719 movzwl LOCAL0(%esp), %eax 3720 movb $0xc, %ah 3721 movw %ax, LOCAL0+2(%esp) 3722 fldcw LOCAL0+2(%esp) # set "to zero" rounding mode 3723 andb $0xf, %cl # ecx <- A 3724 .if 0 3725 fistpll VREG_ADDRESS(%ecx) # convert and store 3726 .else 3727 fistpl VREG_ADDRESS(%ecx) # convert and store 3728 .endif 3729 fldcw LOCAL0(%esp) # restore previous rounding mode 3730 .if 0 3731 movl $0x80000000, %eax 3732 xorl VREG_HIGH_ADDRESS(%ecx), %eax 3733 orl VREG_ADDRESS(%ecx), %eax 3734 .else 3735 cmpl $0x80000000, VREG_ADDRESS(%ecx) 3736 .endif 3737 je .Lop_double_to_int_special_case # fix up result 3738 3739 .Lop_double_to_int_finish: 3740 xor %eax, %eax 3741 mov %eax, VREG_REF_ADDRESS(%ecx) 3742 .if 0 3743 mov %eax, VREG_REF_HIGH_ADDRESS(%ecx) 3744 .endif 3745 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3746 3747 .Lop_double_to_int_special_case: 3748 fnstsw %ax 3749 sahf 3750 jp .Lop_double_to_int_isNaN 3751 adcl $-1, VREG_ADDRESS(%ecx) 3752 .if 0 3753 adcl $-1, VREG_HIGH_ADDRESS(%ecx) 3754 .endif 3755 jmp .Lop_double_to_int_finish 3756 .Lop_double_to_int_isNaN: 3757 movl $0, VREG_ADDRESS(%ecx) 3758 .if 0 3759 movl $0, VREG_HIGH_ADDRESS(%ecx) 3760 .endif 3761 jmp .Lop_double_to_int_finish 3762 3763 3764 /* ------------------------------ */ 3765 .balign 128 3766 .L_op_double_to_long: /* 0x8b */ 3767 /* File: x86/op_double_to_long.S */ 3768 /* File: x86/cvtfp_int.S */ 3769 /* On fp to int conversions, Java requires that 3770 * if the result > maxint, it should be clamped to maxint. If it is less 3771 * than minint, it should be clamped to minint. If it is a nan, the result 3772 * should be zero. Further, the rounding mode is to truncate. This model 3773 * differs from what is delivered normally via the x86 fpu, so we have 3774 * to play some games. 3775 */ 3776 /* float/double to int/long vA, vB */ 3777 movzbl rINSTbl, %ecx # ecx <- A+ 3778 sarl $4, rINST # rINST <- B 3779 .if 1 3780 fldl VREG_ADDRESS(rINST) # %st0 <- vB 3781 .else 3782 flds VREG_ADDRESS(rINST) # %st0 <- vB 3783 .endif 3784 ftst 3785 fnstcw LOCAL0(%esp) # remember original rounding mode 3786 movzwl LOCAL0(%esp), %eax 3787 movb $0xc, %ah 3788 movw %ax, LOCAL0+2(%esp) 3789 fldcw LOCAL0+2(%esp) # set "to zero" rounding mode 3790 andb $0xf, %cl # ecx <- A 3791 .if 1 3792 fistpll VREG_ADDRESS(%ecx) # convert and store 3793 .else 3794 fistpl VREG_ADDRESS(%ecx) # convert and store 3795 .endif 3796 fldcw LOCAL0(%esp) # restore previous rounding mode 3797 .if 1 3798 movl $0x80000000, %eax 3799 xorl VREG_HIGH_ADDRESS(%ecx), %eax 3800 orl VREG_ADDRESS(%ecx), %eax 3801 .else 3802 cmpl $0x80000000, VREG_ADDRESS(%ecx) 3803 .endif 3804 je .Lop_double_to_long_special_case # fix up result 3805 3806 .Lop_double_to_long_finish: 3807 xor %eax, %eax 3808 mov %eax, VREG_REF_ADDRESS(%ecx) 3809 .if 1 3810 mov %eax, VREG_REF_HIGH_ADDRESS(%ecx) 3811 .endif 3812 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3813 3814 .Lop_double_to_long_special_case: 3815 fnstsw %ax 3816 sahf 3817 jp .Lop_double_to_long_isNaN 3818 adcl $-1, VREG_ADDRESS(%ecx) 3819 .if 1 3820 adcl $-1, VREG_HIGH_ADDRESS(%ecx) 3821 .endif 3822 jmp .Lop_double_to_long_finish 3823 .Lop_double_to_long_isNaN: 3824 movl $0, VREG_ADDRESS(%ecx) 3825 .if 1 3826 movl $0, VREG_HIGH_ADDRESS(%ecx) 3827 .endif 3828 jmp .Lop_double_to_long_finish 3829 3830 3831 /* ------------------------------ */ 3832 .balign 128 3833 .L_op_double_to_float: /* 0x8c */ 3834 /* File: x86/op_double_to_float.S */ 3835 /* File: x86/fpcvt.S */ 3836 /* 3837 * Generic 32-bit FP conversion operation. 3838 */ 3839 /* unop vA, vB */ 3840 movzbl rINSTbl, %ecx # ecx <- A+ 3841 sarl $4, rINST # rINST <- B 3842 fldl VREG_ADDRESS(rINST) # %st0 <- vB 3843 andb $0xf, %cl # ecx <- A 3844 3845 fstps VREG_ADDRESS(%ecx) # vA <- %st0 3846 .if 0 3847 CLEAR_WIDE_REF %ecx 3848 .else 3849 CLEAR_REF %ecx 3850 .endif 3851 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3852 3853 3854 /* ------------------------------ */ 3855 .balign 128 3856 .L_op_int_to_byte: /* 0x8d */ 3857 /* File: x86/op_int_to_byte.S */ 3858 /* File: x86/unop.S */ 3859 /* 3860 * Generic 32-bit unary operation. Provide an "instr" line that 3861 * specifies an instruction that performs "result = op eax". 3862 */ 3863 /* unop vA, vB */ 3864 movzbl rINSTbl,%ecx # ecx <- A+ 3865 sarl $4,rINST # rINST <- B 3866 GET_VREG %eax, rINST # eax <- vB 3867 andb $0xf,%cl # ecx <- A 3868 movsbl %al, %eax 3869 SET_VREG %eax, %ecx 3870 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3871 3872 3873 /* ------------------------------ */ 3874 .balign 128 3875 .L_op_int_to_char: /* 0x8e */ 3876 /* File: x86/op_int_to_char.S */ 3877 /* File: x86/unop.S */ 3878 /* 3879 * Generic 32-bit unary operation. Provide an "instr" line that 3880 * specifies an instruction that performs "result = op eax". 3881 */ 3882 /* unop vA, vB */ 3883 movzbl rINSTbl,%ecx # ecx <- A+ 3884 sarl $4,rINST # rINST <- B 3885 GET_VREG %eax, rINST # eax <- vB 3886 andb $0xf,%cl # ecx <- A 3887 movzwl %ax,%eax 3888 SET_VREG %eax, %ecx 3889 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3890 3891 3892 /* ------------------------------ */ 3893 .balign 128 3894 .L_op_int_to_short: /* 0x8f */ 3895 /* File: x86/op_int_to_short.S */ 3896 /* File: x86/unop.S */ 3897 /* 3898 * Generic 32-bit unary operation. Provide an "instr" line that 3899 * specifies an instruction that performs "result = op eax". 3900 */ 3901 /* unop vA, vB */ 3902 movzbl rINSTbl,%ecx # ecx <- A+ 3903 sarl $4,rINST # rINST <- B 3904 GET_VREG %eax, rINST # eax <- vB 3905 andb $0xf,%cl # ecx <- A 3906 movswl %ax, %eax 3907 SET_VREG %eax, %ecx 3908 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3909 3910 3911 /* ------------------------------ */ 3912 .balign 128 3913 .L_op_add_int: /* 0x90 */ 3914 /* File: x86/op_add_int.S */ 3915 /* File: x86/binop.S */ 3916 /* 3917 * Generic 32-bit binary operation. Provide an "instr" line that 3918 * specifies an instruction that performs "result = eax op (rFP,%ecx,4)". 3919 * This could be an x86 instruction or a function call. (If the result 3920 * comes back in a register other than eax, you can override "result".) 3921 * 3922 * For: add-int, sub-int, and-int, or-int, 3923 * xor-int, shl-int, shr-int, ushr-int 3924 */ 3925 /* binop vAA, vBB, vCC */ 3926 movzbl 2(rPC), %eax # eax <- BB 3927 movzbl 3(rPC), %ecx # ecx <- CC 3928 GET_VREG %eax, %eax # eax <- vBB 3929 addl (rFP,%ecx,4), %eax # ex: addl (rFP,%ecx,4),%eax 3930 SET_VREG %eax, rINST 3931 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 3932 3933 3934 /* ------------------------------ */ 3935 .balign 128 3936 .L_op_sub_int: /* 0x91 */ 3937 /* File: x86/op_sub_int.S */ 3938 /* File: x86/binop.S */ 3939 /* 3940 * Generic 32-bit binary operation. Provide an "instr" line that 3941 * specifies an instruction that performs "result = eax op (rFP,%ecx,4)". 3942 * This could be an x86 instruction or a function call. (If the result 3943 * comes back in a register other than eax, you can override "result".) 3944 * 3945 * For: add-int, sub-int, and-int, or-int, 3946 * xor-int, shl-int, shr-int, ushr-int 3947 */ 3948 /* binop vAA, vBB, vCC */ 3949 movzbl 2(rPC), %eax # eax <- BB 3950 movzbl 3(rPC), %ecx # ecx <- CC 3951 GET_VREG %eax, %eax # eax <- vBB 3952 subl (rFP,%ecx,4), %eax # ex: addl (rFP,%ecx,4),%eax 3953 SET_VREG %eax, rINST 3954 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 3955 3956 3957 /* ------------------------------ */ 3958 .balign 128 3959 .L_op_mul_int: /* 0x92 */ 3960 /* File: x86/op_mul_int.S */ 3961 /* 3962 * 32-bit binary multiplication. 3963 */ 3964 /* mul vAA, vBB, vCC */ 3965 movzbl 2(rPC), %eax # eax <- BB 3966 movzbl 3(rPC), %ecx # ecx <- CC 3967 GET_VREG %eax, %eax # eax <- vBB 3968 mov rIBASE, LOCAL0(%esp) 3969 imull (rFP,%ecx,4), %eax # trashes rIBASE/edx 3970 mov LOCAL0(%esp), rIBASE 3971 SET_VREG %eax, rINST 3972 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 3973 3974 /* ------------------------------ */ 3975 .balign 128 3976 .L_op_div_int: /* 0x93 */ 3977 /* File: x86/op_div_int.S */ 3978 /* File: x86/bindiv.S */ 3979 /* 3980 * 32-bit binary div/rem operation. Handles special case of op0=minint and 3981 * op1=-1. 3982 */ 3983 /* div/rem vAA, vBB, vCC */ 3984 movzbl 2(rPC), %eax # eax <- BB 3985 movzbl 3(rPC), %ecx # ecx <- CC 3986 GET_VREG %eax, %eax # eax <- vBB 3987 GET_VREG %ecx, %ecx # ecx <- vCC 3988 mov rIBASE, LOCAL0(%esp) 3989 testl %ecx, %ecx 3990 je common_errDivideByZero 3991 movl %eax, %edx 3992 orl %ecx, %edx 3993 testl $0xFFFFFF00, %edx # If both arguments are less 3994 # than 8-bit and +ve 3995 jz .Lop_div_int_8 # Do 8-bit divide 3996 testl $0xFFFF0000, %edx # If both arguments are less 3997 # than 16-bit and +ve 3998 jz .Lop_div_int_16 # Do 16-bit divide 3999 cmpl $-1, %ecx 4000 jne .Lop_div_int_32 4001 cmpl $0x80000000, %eax 4002 jne .Lop_div_int_32 4003 movl $0x80000000, %eax 4004 jmp .Lop_div_int_finish 4005 .Lop_div_int_32: 4006 cltd 4007 idivl %ecx 4008 jmp .Lop_div_int_finish 4009 .Lop_div_int_8: 4010 div %cl # 8-bit divide otherwise. 4011 # Remainder in %ah, quotient in %al 4012 .if 0 4013 movl %eax, %edx 4014 shr $8, %edx 4015 .else 4016 andl $0x000000FF, %eax 4017 .endif 4018 jmp .Lop_div_int_finish 4019 .Lop_div_int_16: 4020 xorl %edx, %edx # Clear %edx before divide 4021 div %cx 4022 .Lop_div_int_finish: 4023 SET_VREG %eax, rINST 4024 mov LOCAL0(%esp), rIBASE 4025 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4026 4027 4028 /* ------------------------------ */ 4029 .balign 128 4030 .L_op_rem_int: /* 0x94 */ 4031 /* File: x86/op_rem_int.S */ 4032 /* File: x86/bindiv.S */ 4033 /* 4034 * 32-bit binary div/rem operation. Handles special case of op0=minint and 4035 * op1=-1. 4036 */ 4037 /* div/rem vAA, vBB, vCC */ 4038 movzbl 2(rPC), %eax # eax <- BB 4039 movzbl 3(rPC), %ecx # ecx <- CC 4040 GET_VREG %eax, %eax # eax <- vBB 4041 GET_VREG %ecx, %ecx # ecx <- vCC 4042 mov rIBASE, LOCAL0(%esp) 4043 testl %ecx, %ecx 4044 je common_errDivideByZero 4045 movl %eax, %edx 4046 orl %ecx, %edx 4047 testl $0xFFFFFF00, %edx # If both arguments are less 4048 # than 8-bit and +ve 4049 jz .Lop_rem_int_8 # Do 8-bit divide 4050 testl $0xFFFF0000, %edx # If both arguments are less 4051 # than 16-bit and +ve 4052 jz .Lop_rem_int_16 # Do 16-bit divide 4053 cmpl $-1, %ecx 4054 jne .Lop_rem_int_32 4055 cmpl $0x80000000, %eax 4056 jne .Lop_rem_int_32 4057 movl $0, rIBASE 4058 jmp .Lop_rem_int_finish 4059 .Lop_rem_int_32: 4060 cltd 4061 idivl %ecx 4062 jmp .Lop_rem_int_finish 4063 .Lop_rem_int_8: 4064 div %cl # 8-bit divide otherwise. 4065 # Remainder in %ah, quotient in %al 4066 .if 1 4067 movl %eax, %edx 4068 shr $8, %edx 4069 .else 4070 andl $0x000000FF, %eax 4071 .endif 4072 jmp .Lop_rem_int_finish 4073 .Lop_rem_int_16: 4074 xorl %edx, %edx # Clear %edx before divide 4075 div %cx 4076 .Lop_rem_int_finish: 4077 SET_VREG rIBASE, rINST 4078 mov LOCAL0(%esp), rIBASE 4079 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4080 4081 4082 /* ------------------------------ */ 4083 .balign 128 4084 .L_op_and_int: /* 0x95 */ 4085 /* File: x86/op_and_int.S */ 4086 /* File: x86/binop.S */ 4087 /* 4088 * Generic 32-bit binary operation. Provide an "instr" line that 4089 * specifies an instruction that performs "result = eax op (rFP,%ecx,4)". 4090 * This could be an x86 instruction or a function call. (If the result 4091 * comes back in a register other than eax, you can override "result".) 4092 * 4093 * For: add-int, sub-int, and-int, or-int, 4094 * xor-int, shl-int, shr-int, ushr-int 4095 */ 4096 /* binop vAA, vBB, vCC */ 4097 movzbl 2(rPC), %eax # eax <- BB 4098 movzbl 3(rPC), %ecx # ecx <- CC 4099 GET_VREG %eax, %eax # eax <- vBB 4100 andl (rFP,%ecx,4), %eax # ex: addl (rFP,%ecx,4),%eax 4101 SET_VREG %eax, rINST 4102 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4103 4104 4105 /* ------------------------------ */ 4106 .balign 128 4107 .L_op_or_int: /* 0x96 */ 4108 /* File: x86/op_or_int.S */ 4109 /* File: x86/binop.S */ 4110 /* 4111 * Generic 32-bit binary operation. Provide an "instr" line that 4112 * specifies an instruction that performs "result = eax op (rFP,%ecx,4)". 4113 * This could be an x86 instruction or a function call. (If the result 4114 * comes back in a register other than eax, you can override "result".) 4115 * 4116 * For: add-int, sub-int, and-int, or-int, 4117 * xor-int, shl-int, shr-int, ushr-int 4118 */ 4119 /* binop vAA, vBB, vCC */ 4120 movzbl 2(rPC), %eax # eax <- BB 4121 movzbl 3(rPC), %ecx # ecx <- CC 4122 GET_VREG %eax, %eax # eax <- vBB 4123 orl (rFP,%ecx,4), %eax # ex: addl (rFP,%ecx,4),%eax 4124 SET_VREG %eax, rINST 4125 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4126 4127 4128 /* ------------------------------ */ 4129 .balign 128 4130 .L_op_xor_int: /* 0x97 */ 4131 /* File: x86/op_xor_int.S */ 4132 /* File: x86/binop.S */ 4133 /* 4134 * Generic 32-bit binary operation. Provide an "instr" line that 4135 * specifies an instruction that performs "result = eax op (rFP,%ecx,4)". 4136 * This could be an x86 instruction or a function call. (If the result 4137 * comes back in a register other than eax, you can override "result".) 4138 * 4139 * For: add-int, sub-int, and-int, or-int, 4140 * xor-int, shl-int, shr-int, ushr-int 4141 */ 4142 /* binop vAA, vBB, vCC */ 4143 movzbl 2(rPC), %eax # eax <- BB 4144 movzbl 3(rPC), %ecx # ecx <- CC 4145 GET_VREG %eax, %eax # eax <- vBB 4146 xorl (rFP,%ecx,4), %eax # ex: addl (rFP,%ecx,4),%eax 4147 SET_VREG %eax, rINST 4148 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4149 4150 4151 /* ------------------------------ */ 4152 .balign 128 4153 .L_op_shl_int: /* 0x98 */ 4154 /* File: x86/op_shl_int.S */ 4155 /* File: x86/binop1.S */ 4156 /* 4157 * Generic 32-bit binary operation in which both operands loaded to 4158 * registers (op0 in eax, op1 in ecx). 4159 */ 4160 /* binop vAA, vBB, vCC */ 4161 movzbl 2(rPC),%eax # eax <- BB 4162 movzbl 3(rPC),%ecx # ecx <- CC 4163 GET_VREG %eax, %eax # eax <- vBB 4164 GET_VREG %ecx, %ecx # eax <- vBB 4165 sall %cl, %eax # ex: addl %ecx,%eax 4166 SET_VREG %eax, rINST 4167 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4168 4169 4170 /* ------------------------------ */ 4171 .balign 128 4172 .L_op_shr_int: /* 0x99 */ 4173 /* File: x86/op_shr_int.S */ 4174 /* File: x86/binop1.S */ 4175 /* 4176 * Generic 32-bit binary operation in which both operands loaded to 4177 * registers (op0 in eax, op1 in ecx). 4178 */ 4179 /* binop vAA, vBB, vCC */ 4180 movzbl 2(rPC),%eax # eax <- BB 4181 movzbl 3(rPC),%ecx # ecx <- CC 4182 GET_VREG %eax, %eax # eax <- vBB 4183 GET_VREG %ecx, %ecx # eax <- vBB 4184 sarl %cl, %eax # ex: addl %ecx,%eax 4185 SET_VREG %eax, rINST 4186 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4187 4188 4189 /* ------------------------------ */ 4190 .balign 128 4191 .L_op_ushr_int: /* 0x9a */ 4192 /* File: x86/op_ushr_int.S */ 4193 /* File: x86/binop1.S */ 4194 /* 4195 * Generic 32-bit binary operation in which both operands loaded to 4196 * registers (op0 in eax, op1 in ecx). 4197 */ 4198 /* binop vAA, vBB, vCC */ 4199 movzbl 2(rPC),%eax # eax <- BB 4200 movzbl 3(rPC),%ecx # ecx <- CC 4201 GET_VREG %eax, %eax # eax <- vBB 4202 GET_VREG %ecx, %ecx # eax <- vBB 4203 shrl %cl, %eax # ex: addl %ecx,%eax 4204 SET_VREG %eax, rINST 4205 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4206 4207 4208 /* ------------------------------ */ 4209 .balign 128 4210 .L_op_add_long: /* 0x9b */ 4211 /* File: x86/op_add_long.S */ 4212 /* File: x86/binopWide.S */ 4213 /* 4214 * Generic 64-bit binary operation. 4215 */ 4216 /* binop vAA, vBB, vCC */ 4217 movzbl 2(rPC), %eax # eax <- BB 4218 movzbl 3(rPC), %ecx # ecx <- CC 4219 movl rIBASE, LOCAL0(%esp) # save rIBASE 4220 GET_VREG rIBASE, %eax # rIBASE <- v[BB+0] 4221 GET_VREG_HIGH %eax, %eax # eax <- v[BB+1] 4222 addl (rFP,%ecx,4), rIBASE # ex: addl (rFP,%ecx,4),rIBASE 4223 adcl 4(rFP,%ecx,4), %eax # ex: adcl 4(rFP,%ecx,4),%eax 4224 SET_VREG rIBASE, rINST # v[AA+0] <- rIBASE 4225 movl LOCAL0(%esp), rIBASE # restore rIBASE 4226 SET_VREG_HIGH %eax, rINST # v[AA+1] <- eax 4227 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4228 4229 4230 /* ------------------------------ */ 4231 .balign 128 4232 .L_op_sub_long: /* 0x9c */ 4233 /* File: x86/op_sub_long.S */ 4234 /* File: x86/binopWide.S */ 4235 /* 4236 * Generic 64-bit binary operation. 4237 */ 4238 /* binop vAA, vBB, vCC */ 4239 movzbl 2(rPC), %eax # eax <- BB 4240 movzbl 3(rPC), %ecx # ecx <- CC 4241 movl rIBASE, LOCAL0(%esp) # save rIBASE 4242 GET_VREG rIBASE, %eax # rIBASE <- v[BB+0] 4243 GET_VREG_HIGH %eax, %eax # eax <- v[BB+1] 4244 subl (rFP,%ecx,4), rIBASE # ex: addl (rFP,%ecx,4),rIBASE 4245 sbbl 4(rFP,%ecx,4), %eax # ex: adcl 4(rFP,%ecx,4),%eax 4246 SET_VREG rIBASE, rINST # v[AA+0] <- rIBASE 4247 movl LOCAL0(%esp), rIBASE # restore rIBASE 4248 SET_VREG_HIGH %eax, rINST # v[AA+1] <- eax 4249 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4250 4251 4252 /* ------------------------------ */ 4253 .balign 128 4254 .L_op_mul_long: /* 0x9d */ 4255 /* File: x86/op_mul_long.S */ 4256 /* 4257 * Signed 64-bit integer multiply. 4258 * 4259 * We could definately use more free registers for 4260 * this code. We spill rINSTw (ebx), 4261 * giving us eax, ebc, ecx and edx as computational 4262 * temps. On top of that, we'll spill edi (rFP) 4263 * for use as the vB pointer and esi (rPC) for use 4264 * as the vC pointer. Yuck. 4265 * 4266 */ 4267 /* mul-long vAA, vBB, vCC */ 4268 movzbl 2(rPC), %eax # eax <- B 4269 movzbl 3(rPC), %ecx # ecx <- C 4270 mov rPC, LOCAL0(%esp) # save Interpreter PC 4271 mov rFP, LOCAL1(%esp) # save FP 4272 mov rIBASE, LOCAL2(%esp) # save rIBASE 4273 leal (rFP,%eax,4), %esi # esi <- &v[B] 4274 leal (rFP,%ecx,4), rFP # rFP <- &v[C] 4275 movl 4(%esi), %ecx # ecx <- Bmsw 4276 imull (rFP), %ecx # ecx <- (Bmsw*Clsw) 4277 movl 4(rFP), %eax # eax <- Cmsw 4278 imull (%esi), %eax # eax <- (Cmsw*Blsw) 4279 addl %eax, %ecx # ecx <- (Bmsw*Clsw)+(Cmsw*Blsw) 4280 movl (rFP), %eax # eax <- Clsw 4281 mull (%esi) # eax <- (Clsw*Alsw) 4282 mov LOCAL0(%esp), rPC # restore Interpreter PC 4283 mov LOCAL1(%esp), rFP # restore FP 4284 leal (%ecx,rIBASE), rIBASE # full result now in rIBASE:%eax 4285 SET_VREG_HIGH rIBASE, rINST # v[B+1] <- rIBASE 4286 mov LOCAL2(%esp), rIBASE # restore IBASE 4287 SET_VREG %eax, rINST # v[B] <- eax 4288 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4289 4290 /* ------------------------------ */ 4291 .balign 128 4292 .L_op_div_long: /* 0x9e */ 4293 /* File: x86/op_div_long.S */ 4294 /* art_quick_* methods has quick abi, 4295 * so use eax, ecx, edx, ebx for args 4296 */ 4297 /* div vAA, vBB, vCC */ 4298 .extern art_quick_ldiv 4299 mov rIBASE, LOCAL0(%esp) # save rIBASE/%edx 4300 mov rINST, LOCAL1(%esp) # save rINST/%ebx 4301 movzbl 3(rPC), %eax # eax <- CC 4302 GET_VREG %ecx, %eax 4303 GET_VREG_HIGH %ebx, %eax 4304 movl %ecx, %edx 4305 orl %ebx, %ecx 4306 jz common_errDivideByZero 4307 movzbl 2(rPC), %eax # eax <- BB 4308 GET_VREG_HIGH %ecx, %eax 4309 GET_VREG %eax, %eax 4310 call SYMBOL(art_quick_ldiv) 4311 mov LOCAL1(%esp), rINST # restore rINST/%ebx 4312 SET_VREG_HIGH rIBASE, rINST 4313 SET_VREG %eax, rINST 4314 mov LOCAL0(%esp), rIBASE # restore rIBASE/%edx 4315 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4316 4317 /* ------------------------------ */ 4318 .balign 128 4319 .L_op_rem_long: /* 0x9f */ 4320 /* File: x86/op_rem_long.S */ 4321 /* File: x86/op_div_long.S */ 4322 /* art_quick_* methods has quick abi, 4323 * so use eax, ecx, edx, ebx for args 4324 */ 4325 /* div vAA, vBB, vCC */ 4326 .extern art_quick_lmod 4327 mov rIBASE, LOCAL0(%esp) # save rIBASE/%edx 4328 mov rINST, LOCAL1(%esp) # save rINST/%ebx 4329 movzbl 3(rPC), %eax # eax <- CC 4330 GET_VREG %ecx, %eax 4331 GET_VREG_HIGH %ebx, %eax 4332 movl %ecx, %edx 4333 orl %ebx, %ecx 4334 jz common_errDivideByZero 4335 movzbl 2(rPC), %eax # eax <- BB 4336 GET_VREG_HIGH %ecx, %eax 4337 GET_VREG %eax, %eax 4338 call SYMBOL(art_quick_lmod) 4339 mov LOCAL1(%esp), rINST # restore rINST/%ebx 4340 SET_VREG_HIGH rIBASE, rINST 4341 SET_VREG %eax, rINST 4342 mov LOCAL0(%esp), rIBASE # restore rIBASE/%edx 4343 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4344 4345 4346 /* ------------------------------ */ 4347 .balign 128 4348 .L_op_and_long: /* 0xa0 */ 4349 /* File: x86/op_and_long.S */ 4350 /* File: x86/binopWide.S */ 4351 /* 4352 * Generic 64-bit binary operation. 4353 */ 4354 /* binop vAA, vBB, vCC */ 4355 movzbl 2(rPC), %eax # eax <- BB 4356 movzbl 3(rPC), %ecx # ecx <- CC 4357 movl rIBASE, LOCAL0(%esp) # save rIBASE 4358 GET_VREG rIBASE, %eax # rIBASE <- v[BB+0] 4359 GET_VREG_HIGH %eax, %eax # eax <- v[BB+1] 4360 andl (rFP,%ecx,4), rIBASE # ex: addl (rFP,%ecx,4),rIBASE 4361 andl 4(rFP,%ecx,4), %eax # ex: adcl 4(rFP,%ecx,4),%eax 4362 SET_VREG rIBASE, rINST # v[AA+0] <- rIBASE 4363 movl LOCAL0(%esp), rIBASE # restore rIBASE 4364 SET_VREG_HIGH %eax, rINST # v[AA+1] <- eax 4365 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4366 4367 4368 /* ------------------------------ */ 4369 .balign 128 4370 .L_op_or_long: /* 0xa1 */ 4371 /* File: x86/op_or_long.S */ 4372 /* File: x86/binopWide.S */ 4373 /* 4374 * Generic 64-bit binary operation. 4375 */ 4376 /* binop vAA, vBB, vCC */ 4377 movzbl 2(rPC), %eax # eax <- BB 4378 movzbl 3(rPC), %ecx # ecx <- CC 4379 movl rIBASE, LOCAL0(%esp) # save rIBASE 4380 GET_VREG rIBASE, %eax # rIBASE <- v[BB+0] 4381 GET_VREG_HIGH %eax, %eax # eax <- v[BB+1] 4382 orl (rFP,%ecx,4), rIBASE # ex: addl (rFP,%ecx,4),rIBASE 4383 orl 4(rFP,%ecx,4), %eax # ex: adcl 4(rFP,%ecx,4),%eax 4384 SET_VREG rIBASE, rINST # v[AA+0] <- rIBASE 4385 movl LOCAL0(%esp), rIBASE # restore rIBASE 4386 SET_VREG_HIGH %eax, rINST # v[AA+1] <- eax 4387 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4388 4389 4390 /* ------------------------------ */ 4391 .balign 128 4392 .L_op_xor_long: /* 0xa2 */ 4393 /* File: x86/op_xor_long.S */ 4394 /* File: x86/binopWide.S */ 4395 /* 4396 * Generic 64-bit binary operation. 4397 */ 4398 /* binop vAA, vBB, vCC */ 4399 movzbl 2(rPC), %eax # eax <- BB 4400 movzbl 3(rPC), %ecx # ecx <- CC 4401 movl rIBASE, LOCAL0(%esp) # save rIBASE 4402 GET_VREG rIBASE, %eax # rIBASE <- v[BB+0] 4403 GET_VREG_HIGH %eax, %eax # eax <- v[BB+1] 4404 xorl (rFP,%ecx,4), rIBASE # ex: addl (rFP,%ecx,4),rIBASE 4405 xorl 4(rFP,%ecx,4), %eax # ex: adcl 4(rFP,%ecx,4),%eax 4406 SET_VREG rIBASE, rINST # v[AA+0] <- rIBASE 4407 movl LOCAL0(%esp), rIBASE # restore rIBASE 4408 SET_VREG_HIGH %eax, rINST # v[AA+1] <- eax 4409 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4410 4411 4412 /* ------------------------------ */ 4413 .balign 128 4414 .L_op_shl_long: /* 0xa3 */ 4415 /* File: x86/op_shl_long.S */ 4416 /* 4417 * Long integer shift. This is different from the generic 32/64-bit 4418 * binary operations because vAA/vBB are 64-bit but vCC (the shift 4419 * distance) is 32-bit. Also, Dalvik requires us to mask off the low 4420 * 6 bits of the shift distance. x86 shifts automatically mask off 4421 * the low 5 bits of %cl, so have to handle the 64 > shiftcount > 31 4422 * case specially. 4423 */ 4424 /* shl-long vAA, vBB, vCC */ 4425 /* ecx gets shift count */ 4426 /* Need to spill rINST */ 4427 /* rINSTw gets AA */ 4428 movzbl 2(rPC), %eax # eax <- BB 4429 movzbl 3(rPC), %ecx # ecx <- CC 4430 movl rIBASE, LOCAL0(%esp) 4431 GET_VREG_HIGH rIBASE, %eax # ecx <- v[BB+1] 4432 GET_VREG %ecx, %ecx # ecx <- vCC 4433 GET_VREG %eax, %eax # eax <- v[BB+0] 4434 shldl %eax,rIBASE 4435 sall %cl, %eax 4436 testb $32, %cl 4437 je 2f 4438 movl %eax, rIBASE 4439 xorl %eax, %eax 4440 2: 4441 SET_VREG_HIGH rIBASE, rINST # v[AA+1] <- rIBASE 4442 movl LOCAL0(%esp), rIBASE 4443 SET_VREG %eax, rINST # v[AA+0] <- %eax 4444 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4445 4446 /* ------------------------------ */ 4447 .balign 128 4448 .L_op_shr_long: /* 0xa4 */ 4449 /* File: x86/op_shr_long.S */ 4450 /* 4451 * Long integer shift. This is different from the generic 32/64-bit 4452 * binary operations because vAA/vBB are 64-bit but vCC (the shift 4453 * distance) is 32-bit. Also, Dalvik requires us to mask off the low 4454 * 6 bits of the shift distance. x86 shifts automatically mask off 4455 * the low 5 bits of %cl, so have to handle the 64 > shiftcount > 31 4456 * case specially. 4457 */ 4458 /* shr-long vAA, vBB, vCC */ 4459 /* ecx gets shift count */ 4460 /* Need to spill rIBASE */ 4461 /* rINSTw gets AA */ 4462 movzbl 2(rPC), %eax # eax <- BB 4463 movzbl 3(rPC), %ecx # ecx <- CC 4464 movl rIBASE, LOCAL0(%esp) 4465 GET_VREG_HIGH rIBASE, %eax # rIBASE<- v[BB+1] 4466 GET_VREG %ecx, %ecx # ecx <- vCC 4467 GET_VREG %eax, %eax # eax <- v[BB+0] 4468 shrdl rIBASE, %eax 4469 sarl %cl, rIBASE 4470 testb $32, %cl 4471 je 2f 4472 movl rIBASE, %eax 4473 sarl $31, rIBASE 4474 2: 4475 SET_VREG_HIGH rIBASE, rINST # v[AA+1] <- rIBASE 4476 movl LOCAL0(%esp), rIBASE 4477 SET_VREG %eax, rINST # v[AA+0] <- eax 4478 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4479 4480 /* ------------------------------ */ 4481 .balign 128 4482 .L_op_ushr_long: /* 0xa5 */ 4483 /* File: x86/op_ushr_long.S */ 4484 /* 4485 * Long integer shift. This is different from the generic 32/64-bit 4486 * binary operations because vAA/vBB are 64-bit but vCC (the shift 4487 * distance) is 32-bit. Also, Dalvik requires us to mask off the low 4488 * 6 bits of the shift distance. x86 shifts automatically mask off 4489 * the low 5 bits of %cl, so have to handle the 64 > shiftcount > 31 4490 * case specially. 4491 */ 4492 /* shr-long vAA, vBB, vCC */ 4493 /* ecx gets shift count */ 4494 /* Need to spill rIBASE */ 4495 /* rINSTw gets AA */ 4496 movzbl 2(rPC), %eax # eax <- BB 4497 movzbl 3(rPC), %ecx # ecx <- CC 4498 movl rIBASE, LOCAL0(%esp) 4499 GET_VREG_HIGH rIBASE, %eax # rIBASE <- v[BB+1] 4500 GET_VREG %ecx, %ecx # ecx <- vCC 4501 GET_VREG %eax, %eax # eax <- v[BB+0] 4502 shrdl rIBASE, %eax 4503 shrl %cl, rIBASE 4504 testb $32, %cl 4505 je 2f 4506 movl rIBASE, %eax 4507 xorl rIBASE, rIBASE 4508 2: 4509 SET_VREG_HIGH rIBASE, rINST # v[AA+1] <- rIBASE 4510 movl LOCAL0(%esp), rIBASE 4511 SET_VREG %eax, rINST # v[BB+0] <- eax 4512 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4513 4514 /* ------------------------------ */ 4515 .balign 128 4516 .L_op_add_float: /* 0xa6 */ 4517 /* File: x86/op_add_float.S */ 4518 /* File: x86/sseBinop.S */ 4519 movzbl 2(rPC), %ecx # ecx <- BB 4520 movzbl 3(rPC), %eax # eax <- CC 4521 movss VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 4522 addss VREG_ADDRESS(%eax), %xmm0 4523 movss %xmm0, VREG_ADDRESS(rINST) # vAA <- %xmm0 4524 pxor %xmm0, %xmm0 4525 movss %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 4526 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4527 4528 4529 /* ------------------------------ */ 4530 .balign 128 4531 .L_op_sub_float: /* 0xa7 */ 4532 /* File: x86/op_sub_float.S */ 4533 /* File: x86/sseBinop.S */ 4534 movzbl 2(rPC), %ecx # ecx <- BB 4535 movzbl 3(rPC), %eax # eax <- CC 4536 movss VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 4537 subss VREG_ADDRESS(%eax), %xmm0 4538 movss %xmm0, VREG_ADDRESS(rINST) # vAA <- %xmm0 4539 pxor %xmm0, %xmm0 4540 movss %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 4541 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4542 4543 4544 /* ------------------------------ */ 4545 .balign 128 4546 .L_op_mul_float: /* 0xa8 */ 4547 /* File: x86/op_mul_float.S */ 4548 /* File: x86/sseBinop.S */ 4549 movzbl 2(rPC), %ecx # ecx <- BB 4550 movzbl 3(rPC), %eax # eax <- CC 4551 movss VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 4552 mulss VREG_ADDRESS(%eax), %xmm0 4553 movss %xmm0, VREG_ADDRESS(rINST) # vAA <- %xmm0 4554 pxor %xmm0, %xmm0 4555 movss %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 4556 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4557 4558 4559 /* ------------------------------ */ 4560 .balign 128 4561 .L_op_div_float: /* 0xa9 */ 4562 /* File: x86/op_div_float.S */ 4563 /* File: x86/sseBinop.S */ 4564 movzbl 2(rPC), %ecx # ecx <- BB 4565 movzbl 3(rPC), %eax # eax <- CC 4566 movss VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 4567 divss VREG_ADDRESS(%eax), %xmm0 4568 movss %xmm0, VREG_ADDRESS(rINST) # vAA <- %xmm0 4569 pxor %xmm0, %xmm0 4570 movss %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 4571 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4572 4573 4574 /* ------------------------------ */ 4575 .balign 128 4576 .L_op_rem_float: /* 0xaa */ 4577 /* File: x86/op_rem_float.S */ 4578 /* rem_float vAA, vBB, vCC */ 4579 movzbl 3(rPC), %ecx # ecx <- BB 4580 movzbl 2(rPC), %eax # eax <- CC 4581 flds VREG_ADDRESS(%ecx) # vBB to fp stack 4582 flds VREG_ADDRESS(%eax) # vCC to fp stack 4583 1: 4584 fprem 4585 fstsw %ax 4586 sahf 4587 jp 1b 4588 fstp %st(1) 4589 fstps VREG_ADDRESS(rINST) # %st to vAA 4590 CLEAR_REF rINST 4591 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4592 4593 /* ------------------------------ */ 4594 .balign 128 4595 .L_op_add_double: /* 0xab */ 4596 /* File: x86/op_add_double.S */ 4597 /* File: x86/sseBinop.S */ 4598 movzbl 2(rPC), %ecx # ecx <- BB 4599 movzbl 3(rPC), %eax # eax <- CC 4600 movsd VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 4601 addsd VREG_ADDRESS(%eax), %xmm0 4602 movsd %xmm0, VREG_ADDRESS(rINST) # vAA <- %xmm0 4603 pxor %xmm0, %xmm0 4604 movsd %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 4605 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4606 4607 4608 /* ------------------------------ */ 4609 .balign 128 4610 .L_op_sub_double: /* 0xac */ 4611 /* File: x86/op_sub_double.S */ 4612 /* File: x86/sseBinop.S */ 4613 movzbl 2(rPC), %ecx # ecx <- BB 4614 movzbl 3(rPC), %eax # eax <- CC 4615 movsd VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 4616 subsd VREG_ADDRESS(%eax), %xmm0 4617 movsd %xmm0, VREG_ADDRESS(rINST) # vAA <- %xmm0 4618 pxor %xmm0, %xmm0 4619 movsd %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 4620 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4621 4622 4623 /* ------------------------------ */ 4624 .balign 128 4625 .L_op_mul_double: /* 0xad */ 4626 /* File: x86/op_mul_double.S */ 4627 /* File: x86/sseBinop.S */ 4628 movzbl 2(rPC), %ecx # ecx <- BB 4629 movzbl 3(rPC), %eax # eax <- CC 4630 movsd VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 4631 mulsd VREG_ADDRESS(%eax), %xmm0 4632 movsd %xmm0, VREG_ADDRESS(rINST) # vAA <- %xmm0 4633 pxor %xmm0, %xmm0 4634 movsd %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 4635 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4636 4637 4638 /* ------------------------------ */ 4639 .balign 128 4640 .L_op_div_double: /* 0xae */ 4641 /* File: x86/op_div_double.S */ 4642 /* File: x86/sseBinop.S */ 4643 movzbl 2(rPC), %ecx # ecx <- BB 4644 movzbl 3(rPC), %eax # eax <- CC 4645 movsd VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 4646 divsd VREG_ADDRESS(%eax), %xmm0 4647 movsd %xmm0, VREG_ADDRESS(rINST) # vAA <- %xmm0 4648 pxor %xmm0, %xmm0 4649 movsd %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 4650 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4651 4652 4653 /* ------------------------------ */ 4654 .balign 128 4655 .L_op_rem_double: /* 0xaf */ 4656 /* File: x86/op_rem_double.S */ 4657 /* rem_double vAA, vBB, vCC */ 4658 movzbl 3(rPC), %ecx # ecx <- BB 4659 movzbl 2(rPC), %eax # eax <- CC 4660 fldl VREG_ADDRESS(%ecx) # %st1 <- fp[vBB] 4661 fldl VREG_ADDRESS(%eax) # %st0 <- fp[vCC] 4662 1: 4663 fprem 4664 fstsw %ax 4665 sahf 4666 jp 1b 4667 fstp %st(1) 4668 fstpl VREG_ADDRESS(rINST) # fp[vAA] <- %st 4669 CLEAR_WIDE_REF rINST 4670 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4671 4672 /* ------------------------------ */ 4673 .balign 128 4674 .L_op_add_int_2addr: /* 0xb0 */ 4675 /* File: x86/op_add_int_2addr.S */ 4676 /* File: x86/binop2addr.S */ 4677 /* 4678 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 4679 * that specifies an instruction that performs "result = r0 op r1". 4680 * This could be an instruction or a function call. 4681 * 4682 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 4683 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 4684 * shl-int/2addr, shr-int/2addr, ushr-int/2addr, add-float/2addr, 4685 * sub-float/2addr, mul-float/2addr, div-float/2addr, rem-float/2addr 4686 */ 4687 /* binop/2addr vA, vB */ 4688 movzx rINSTbl, %ecx # ecx <- A+ 4689 sarl $4, rINST # rINST <- B 4690 GET_VREG %eax, rINST # eax <- vB 4691 andb $0xf, %cl # ecx <- A 4692 addl %eax, (rFP,%ecx,4) # for ex: addl %eax,(rFP,%ecx,4) 4693 CLEAR_REF %ecx 4694 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4695 4696 4697 /* ------------------------------ */ 4698 .balign 128 4699 .L_op_sub_int_2addr: /* 0xb1 */ 4700 /* File: x86/op_sub_int_2addr.S */ 4701 /* File: x86/binop2addr.S */ 4702 /* 4703 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 4704 * that specifies an instruction that performs "result = r0 op r1". 4705 * This could be an instruction or a function call. 4706 * 4707 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 4708 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 4709 * shl-int/2addr, shr-int/2addr, ushr-int/2addr, add-float/2addr, 4710 * sub-float/2addr, mul-float/2addr, div-float/2addr, rem-float/2addr 4711 */ 4712 /* binop/2addr vA, vB */ 4713 movzx rINSTbl, %ecx # ecx <- A+ 4714 sarl $4, rINST # rINST <- B 4715 GET_VREG %eax, rINST # eax <- vB 4716 andb $0xf, %cl # ecx <- A 4717 subl %eax, (rFP,%ecx,4) # for ex: addl %eax,(rFP,%ecx,4) 4718 CLEAR_REF %ecx 4719 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4720 4721 4722 /* ------------------------------ */ 4723 .balign 128 4724 .L_op_mul_int_2addr: /* 0xb2 */ 4725 /* File: x86/op_mul_int_2addr.S */ 4726 /* mul vA, vB */ 4727 movzx rINSTbl, %ecx # ecx <- A+ 4728 sarl $4, rINST # rINST <- B 4729 GET_VREG %eax, rINST # eax <- vB 4730 andb $0xf, %cl # ecx <- A 4731 movl rIBASE, rINST 4732 imull (rFP,%ecx,4), %eax # trashes rIBASE/edx 4733 movl rINST, rIBASE 4734 SET_VREG %eax, %ecx 4735 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4736 4737 /* ------------------------------ */ 4738 .balign 128 4739 .L_op_div_int_2addr: /* 0xb3 */ 4740 /* File: x86/op_div_int_2addr.S */ 4741 /* File: x86/bindiv2addr.S */ 4742 /* 4743 * 32-bit binary div/rem operation. Handles special case of op0=minint and 4744 * op1=-1. 4745 */ 4746 /* div/rem/2addr vA, vB */ 4747 movzx rINSTbl, %ecx # eax <- BA 4748 mov rIBASE, LOCAL0(%esp) 4749 sarl $4, %ecx # ecx <- B 4750 GET_VREG %ecx, %ecx # eax <- vBB 4751 andb $0xf, rINSTbl # rINST <- A 4752 GET_VREG %eax, rINST # eax <- vBB 4753 testl %ecx, %ecx 4754 je common_errDivideByZero 4755 cmpl $-1, %ecx 4756 jne .Lop_div_int_2addr_continue_div2addr 4757 cmpl $0x80000000, %eax 4758 jne .Lop_div_int_2addr_continue_div2addr 4759 movl $0x80000000, %eax 4760 SET_VREG %eax, rINST 4761 mov LOCAL0(%esp), rIBASE 4762 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4763 4764 .Lop_div_int_2addr_continue_div2addr: 4765 cltd 4766 idivl %ecx 4767 SET_VREG %eax, rINST 4768 mov LOCAL0(%esp), rIBASE 4769 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4770 4771 4772 /* ------------------------------ */ 4773 .balign 128 4774 .L_op_rem_int_2addr: /* 0xb4 */ 4775 /* File: x86/op_rem_int_2addr.S */ 4776 /* File: x86/bindiv2addr.S */ 4777 /* 4778 * 32-bit binary div/rem operation. Handles special case of op0=minint and 4779 * op1=-1. 4780 */ 4781 /* div/rem/2addr vA, vB */ 4782 movzx rINSTbl, %ecx # eax <- BA 4783 mov rIBASE, LOCAL0(%esp) 4784 sarl $4, %ecx # ecx <- B 4785 GET_VREG %ecx, %ecx # eax <- vBB 4786 andb $0xf, rINSTbl # rINST <- A 4787 GET_VREG %eax, rINST # eax <- vBB 4788 testl %ecx, %ecx 4789 je common_errDivideByZero 4790 cmpl $-1, %ecx 4791 jne .Lop_rem_int_2addr_continue_div2addr 4792 cmpl $0x80000000, %eax 4793 jne .Lop_rem_int_2addr_continue_div2addr 4794 movl $0, rIBASE 4795 SET_VREG rIBASE, rINST 4796 mov LOCAL0(%esp), rIBASE 4797 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4798 4799 .Lop_rem_int_2addr_continue_div2addr: 4800 cltd 4801 idivl %ecx 4802 SET_VREG rIBASE, rINST 4803 mov LOCAL0(%esp), rIBASE 4804 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4805 4806 4807 /* ------------------------------ */ 4808 .balign 128 4809 .L_op_and_int_2addr: /* 0xb5 */ 4810 /* File: x86/op_and_int_2addr.S */ 4811 /* File: x86/binop2addr.S */ 4812 /* 4813 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 4814 * that specifies an instruction that performs "result = r0 op r1". 4815 * This could be an instruction or a function call. 4816 * 4817 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 4818 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 4819 * shl-int/2addr, shr-int/2addr, ushr-int/2addr, add-float/2addr, 4820 * sub-float/2addr, mul-float/2addr, div-float/2addr, rem-float/2addr 4821 */ 4822 /* binop/2addr vA, vB */ 4823 movzx rINSTbl, %ecx # ecx <- A+ 4824 sarl $4, rINST # rINST <- B 4825 GET_VREG %eax, rINST # eax <- vB 4826 andb $0xf, %cl # ecx <- A 4827 andl %eax, (rFP,%ecx,4) # for ex: addl %eax,(rFP,%ecx,4) 4828 CLEAR_REF %ecx 4829 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4830 4831 4832 /* ------------------------------ */ 4833 .balign 128 4834 .L_op_or_int_2addr: /* 0xb6 */ 4835 /* File: x86/op_or_int_2addr.S */ 4836 /* File: x86/binop2addr.S */ 4837 /* 4838 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 4839 * that specifies an instruction that performs "result = r0 op r1". 4840 * This could be an instruction or a function call. 4841 * 4842 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 4843 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 4844 * shl-int/2addr, shr-int/2addr, ushr-int/2addr, add-float/2addr, 4845 * sub-float/2addr, mul-float/2addr, div-float/2addr, rem-float/2addr 4846 */ 4847 /* binop/2addr vA, vB */ 4848 movzx rINSTbl, %ecx # ecx <- A+ 4849 sarl $4, rINST # rINST <- B 4850 GET_VREG %eax, rINST # eax <- vB 4851 andb $0xf, %cl # ecx <- A 4852 orl %eax, (rFP,%ecx,4) # for ex: addl %eax,(rFP,%ecx,4) 4853 CLEAR_REF %ecx 4854 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4855 4856 4857 /* ------------------------------ */ 4858 .balign 128 4859 .L_op_xor_int_2addr: /* 0xb7 */ 4860 /* File: x86/op_xor_int_2addr.S */ 4861 /* File: x86/binop2addr.S */ 4862 /* 4863 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 4864 * that specifies an instruction that performs "result = r0 op r1". 4865 * This could be an instruction or a function call. 4866 * 4867 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 4868 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 4869 * shl-int/2addr, shr-int/2addr, ushr-int/2addr, add-float/2addr, 4870 * sub-float/2addr, mul-float/2addr, div-float/2addr, rem-float/2addr 4871 */ 4872 /* binop/2addr vA, vB */ 4873 movzx rINSTbl, %ecx # ecx <- A+ 4874 sarl $4, rINST # rINST <- B 4875 GET_VREG %eax, rINST # eax <- vB 4876 andb $0xf, %cl # ecx <- A 4877 xorl %eax, (rFP,%ecx,4) # for ex: addl %eax,(rFP,%ecx,4) 4878 CLEAR_REF %ecx 4879 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4880 4881 4882 /* ------------------------------ */ 4883 .balign 128 4884 .L_op_shl_int_2addr: /* 0xb8 */ 4885 /* File: x86/op_shl_int_2addr.S */ 4886 /* File: x86/shop2addr.S */ 4887 /* 4888 * Generic 32-bit "shift/2addr" operation. 4889 */ 4890 /* shift/2addr vA, vB */ 4891 movzx rINSTbl, %ecx # eax <- BA 4892 sarl $4, %ecx # ecx <- B 4893 GET_VREG %ecx, %ecx # eax <- vBB 4894 andb $0xf, rINSTbl # rINST <- A 4895 GET_VREG %eax, rINST # eax <- vAA 4896 sall %cl, %eax # ex: sarl %cl, %eax 4897 SET_VREG %eax, rINST 4898 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4899 4900 4901 /* ------------------------------ */ 4902 .balign 128 4903 .L_op_shr_int_2addr: /* 0xb9 */ 4904 /* File: x86/op_shr_int_2addr.S */ 4905 /* File: x86/shop2addr.S */ 4906 /* 4907 * Generic 32-bit "shift/2addr" operation. 4908 */ 4909 /* shift/2addr vA, vB */ 4910 movzx rINSTbl, %ecx # eax <- BA 4911 sarl $4, %ecx # ecx <- B 4912 GET_VREG %ecx, %ecx # eax <- vBB 4913 andb $0xf, rINSTbl # rINST <- A 4914 GET_VREG %eax, rINST # eax <- vAA 4915 sarl %cl, %eax # ex: sarl %cl, %eax 4916 SET_VREG %eax, rINST 4917 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4918 4919 4920 /* ------------------------------ */ 4921 .balign 128 4922 .L_op_ushr_int_2addr: /* 0xba */ 4923 /* File: x86/op_ushr_int_2addr.S */ 4924 /* File: x86/shop2addr.S */ 4925 /* 4926 * Generic 32-bit "shift/2addr" operation. 4927 */ 4928 /* shift/2addr vA, vB */ 4929 movzx rINSTbl, %ecx # eax <- BA 4930 sarl $4, %ecx # ecx <- B 4931 GET_VREG %ecx, %ecx # eax <- vBB 4932 andb $0xf, rINSTbl # rINST <- A 4933 GET_VREG %eax, rINST # eax <- vAA 4934 shrl %cl, %eax # ex: sarl %cl, %eax 4935 SET_VREG %eax, rINST 4936 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4937 4938 4939 /* ------------------------------ */ 4940 .balign 128 4941 .L_op_add_long_2addr: /* 0xbb */ 4942 /* File: x86/op_add_long_2addr.S */ 4943 /* File: x86/binopWide2addr.S */ 4944 /* 4945 * Generic 64-bit binary operation. 4946 */ 4947 /* binop/2addr vA, vB */ 4948 movzbl rINSTbl, %ecx # ecx<- BA 4949 sarl $4, %ecx # ecx<- B 4950 GET_VREG %eax, %ecx # eax<- v[B+0] 4951 GET_VREG_HIGH %ecx, %ecx # eax<- v[B+1] 4952 andb $0xF, rINSTbl # rINST<- A 4953 addl %eax, (rFP,rINST,4) # ex: addl %eax,(rFP,rINST,4) 4954 adcl %ecx, 4(rFP,rINST,4) # ex: adcl %ecx,4(rFP,rINST,4) 4955 CLEAR_WIDE_REF rINST 4956 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4957 4958 4959 /* ------------------------------ */ 4960 .balign 128 4961 .L_op_sub_long_2addr: /* 0xbc */ 4962 /* File: x86/op_sub_long_2addr.S */ 4963 /* File: x86/binopWide2addr.S */ 4964 /* 4965 * Generic 64-bit binary operation. 4966 */ 4967 /* binop/2addr vA, vB */ 4968 movzbl rINSTbl, %ecx # ecx<- BA 4969 sarl $4, %ecx # ecx<- B 4970 GET_VREG %eax, %ecx # eax<- v[B+0] 4971 GET_VREG_HIGH %ecx, %ecx # eax<- v[B+1] 4972 andb $0xF, rINSTbl # rINST<- A 4973 subl %eax, (rFP,rINST,4) # ex: addl %eax,(rFP,rINST,4) 4974 sbbl %ecx, 4(rFP,rINST,4) # ex: adcl %ecx,4(rFP,rINST,4) 4975 CLEAR_WIDE_REF rINST 4976 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4977 4978 4979 /* ------------------------------ */ 4980 .balign 128 4981 .L_op_mul_long_2addr: /* 0xbd */ 4982 /* File: x86/op_mul_long_2addr.S */ 4983 /* 4984 * Signed 64-bit integer multiply, 2-addr version 4985 * 4986 * We could definately use more free registers for 4987 * this code. We must spill %edx (rIBASE) because it 4988 * is used by imul. We'll also spill rINST (ebx), 4989 * giving us eax, ebc, ecx and rIBASE as computational 4990 * temps. On top of that, we'll spill %esi (edi) 4991 * for use as the vA pointer and rFP (esi) for use 4992 * as the vB pointer. Yuck. 4993 */ 4994 /* mul-long/2addr vA, vB */ 4995 movzbl rINSTbl, %eax # eax <- BA 4996 andb $0xf, %al # eax <- A 4997 CLEAR_WIDE_REF %eax # clear refs in advance 4998 sarl $4, rINST # rINST <- B 4999 mov rPC, LOCAL0(%esp) # save Interpreter PC 5000 mov rFP, LOCAL1(%esp) # save FP 5001 mov rIBASE, LOCAL2(%esp) # save rIBASE 5002 leal (rFP,%eax,4), %esi # esi <- &v[A] 5003 leal (rFP,rINST,4), rFP # rFP <- &v[B] 5004 movl 4(%esi), %ecx # ecx <- Amsw 5005 imull (rFP), %ecx # ecx <- (Amsw*Blsw) 5006 movl 4(rFP), %eax # eax <- Bmsw 5007 imull (%esi), %eax # eax <- (Bmsw*Alsw) 5008 addl %eax, %ecx # ecx <- (Amsw*Blsw)+(Bmsw*Alsw) 5009 movl (rFP), %eax # eax <- Blsw 5010 mull (%esi) # eax <- (Blsw*Alsw) 5011 leal (%ecx,rIBASE), rIBASE # full result now in %edx:%eax 5012 movl rIBASE, 4(%esi) # v[A+1] <- rIBASE 5013 movl %eax, (%esi) # v[A] <- %eax 5014 mov LOCAL0(%esp), rPC # restore Interpreter PC 5015 mov LOCAL2(%esp), rIBASE # restore IBASE 5016 mov LOCAL1(%esp), rFP # restore FP 5017 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5018 5019 /* ------------------------------ */ 5020 .balign 128 5021 .L_op_div_long_2addr: /* 0xbe */ 5022 /* File: x86/op_div_long_2addr.S */ 5023 /* art_quick_* methods has quick abi, 5024 * so use eax, ecx, edx, ebx for args 5025 */ 5026 /* div/2addr vA, vB */ 5027 .extern art_quick_ldiv 5028 mov rIBASE, LOCAL0(%esp) # save rIBASE/%edx 5029 movzbl rINSTbl, %eax 5030 shrl $4, %eax # eax <- B 5031 andb $0xf, rINSTbl # rINST <- A 5032 mov rINST, LOCAL1(%esp) # save rINST/%ebx 5033 movl %ebx, %ecx 5034 GET_VREG %edx, %eax 5035 GET_VREG_HIGH %ebx, %eax 5036 movl %edx, %eax 5037 orl %ebx, %eax 5038 jz common_errDivideByZero 5039 GET_VREG %eax, %ecx 5040 GET_VREG_HIGH %ecx, %ecx 5041 call SYMBOL(art_quick_ldiv) 5042 mov LOCAL1(%esp), rINST # restore rINST/%ebx 5043 SET_VREG_HIGH rIBASE, rINST 5044 SET_VREG %eax, rINST 5045 mov LOCAL0(%esp), rIBASE # restore rIBASE/%edx 5046 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5047 5048 /* ------------------------------ */ 5049 .balign 128 5050 .L_op_rem_long_2addr: /* 0xbf */ 5051 /* File: x86/op_rem_long_2addr.S */ 5052 /* File: x86/op_div_long_2addr.S */ 5053 /* art_quick_* methods has quick abi, 5054 * so use eax, ecx, edx, ebx for args 5055 */ 5056 /* div/2addr vA, vB */ 5057 .extern art_quick_lmod 5058 mov rIBASE, LOCAL0(%esp) # save rIBASE/%edx 5059 movzbl rINSTbl, %eax 5060 shrl $4, %eax # eax <- B 5061 andb $0xf, rINSTbl # rINST <- A 5062 mov rINST, LOCAL1(%esp) # save rINST/%ebx 5063 movl %ebx, %ecx 5064 GET_VREG %edx, %eax 5065 GET_VREG_HIGH %ebx, %eax 5066 movl %edx, %eax 5067 orl %ebx, %eax 5068 jz common_errDivideByZero 5069 GET_VREG %eax, %ecx 5070 GET_VREG_HIGH %ecx, %ecx 5071 call SYMBOL(art_quick_lmod) 5072 mov LOCAL1(%esp), rINST # restore rINST/%ebx 5073 SET_VREG_HIGH rIBASE, rINST 5074 SET_VREG %eax, rINST 5075 mov LOCAL0(%esp), rIBASE # restore rIBASE/%edx 5076 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5077 5078 5079 /* ------------------------------ */ 5080 .balign 128 5081 .L_op_and_long_2addr: /* 0xc0 */ 5082 /* File: x86/op_and_long_2addr.S */ 5083 /* File: x86/binopWide2addr.S */ 5084 /* 5085 * Generic 64-bit binary operation. 5086 */ 5087 /* binop/2addr vA, vB */ 5088 movzbl rINSTbl, %ecx # ecx<- BA 5089 sarl $4, %ecx # ecx<- B 5090 GET_VREG %eax, %ecx # eax<- v[B+0] 5091 GET_VREG_HIGH %ecx, %ecx # eax<- v[B+1] 5092 andb $0xF, rINSTbl # rINST<- A 5093 andl %eax, (rFP,rINST,4) # ex: addl %eax,(rFP,rINST,4) 5094 andl %ecx, 4(rFP,rINST,4) # ex: adcl %ecx,4(rFP,rINST,4) 5095 CLEAR_WIDE_REF rINST 5096 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5097 5098 5099 /* ------------------------------ */ 5100 .balign 128 5101 .L_op_or_long_2addr: /* 0xc1 */ 5102 /* File: x86/op_or_long_2addr.S */ 5103 /* File: x86/binopWide2addr.S */ 5104 /* 5105 * Generic 64-bit binary operation. 5106 */ 5107 /* binop/2addr vA, vB */ 5108 movzbl rINSTbl, %ecx # ecx<- BA 5109 sarl $4, %ecx # ecx<- B 5110 GET_VREG %eax, %ecx # eax<- v[B+0] 5111 GET_VREG_HIGH %ecx, %ecx # eax<- v[B+1] 5112 andb $0xF, rINSTbl # rINST<- A 5113 orl %eax, (rFP,rINST,4) # ex: addl %eax,(rFP,rINST,4) 5114 orl %ecx, 4(rFP,rINST,4) # ex: adcl %ecx,4(rFP,rINST,4) 5115 CLEAR_WIDE_REF rINST 5116 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5117 5118 5119 /* ------------------------------ */ 5120 .balign 128 5121 .L_op_xor_long_2addr: /* 0xc2 */ 5122 /* File: x86/op_xor_long_2addr.S */ 5123 /* File: x86/binopWide2addr.S */ 5124 /* 5125 * Generic 64-bit binary operation. 5126 */ 5127 /* binop/2addr vA, vB */ 5128 movzbl rINSTbl, %ecx # ecx<- BA 5129 sarl $4, %ecx # ecx<- B 5130 GET_VREG %eax, %ecx # eax<- v[B+0] 5131 GET_VREG_HIGH %ecx, %ecx # eax<- v[B+1] 5132 andb $0xF, rINSTbl # rINST<- A 5133 xorl %eax, (rFP,rINST,4) # ex: addl %eax,(rFP,rINST,4) 5134 xorl %ecx, 4(rFP,rINST,4) # ex: adcl %ecx,4(rFP,rINST,4) 5135 CLEAR_WIDE_REF rINST 5136 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5137 5138 5139 /* ------------------------------ */ 5140 .balign 128 5141 .L_op_shl_long_2addr: /* 0xc3 */ 5142 /* File: x86/op_shl_long_2addr.S */ 5143 /* 5144 * Long integer shift, 2addr version. vA is 64-bit value/result, vB is 5145 * 32-bit shift distance. 5146 */ 5147 /* shl-long/2addr vA, vB */ 5148 /* ecx gets shift count */ 5149 /* Need to spill rIBASE */ 5150 /* rINSTw gets AA */ 5151 movzbl rINSTbl, %ecx # ecx <- BA 5152 andb $0xf, rINSTbl # rINST <- A 5153 GET_VREG %eax, rINST # eax <- v[AA+0] 5154 sarl $4, %ecx # ecx <- B 5155 movl rIBASE, LOCAL0(%esp) 5156 GET_VREG_HIGH rIBASE, rINST # rIBASE <- v[AA+1] 5157 GET_VREG %ecx, %ecx # ecx <- vBB 5158 shldl %eax, rIBASE 5159 sall %cl, %eax 5160 testb $32, %cl 5161 je 2f 5162 movl %eax, rIBASE 5163 xorl %eax, %eax 5164 2: 5165 SET_VREG_HIGH rIBASE, rINST # v[AA+1] <- rIBASE 5166 movl LOCAL0(%esp), rIBASE 5167 SET_VREG %eax, rINST # v[AA+0] <- eax 5168 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5169 5170 /* ------------------------------ */ 5171 .balign 128 5172 .L_op_shr_long_2addr: /* 0xc4 */ 5173 /* File: x86/op_shr_long_2addr.S */ 5174 /* 5175 * Long integer shift, 2addr version. vA is 64-bit value/result, vB is 5176 * 32-bit shift distance. 5177 */ 5178 /* shl-long/2addr vA, vB */ 5179 /* ecx gets shift count */ 5180 /* Need to spill rIBASE */ 5181 /* rINSTw gets AA */ 5182 movzbl rINSTbl, %ecx # ecx <- BA 5183 andb $0xf, rINSTbl # rINST <- A 5184 GET_VREG %eax, rINST # eax <- v[AA+0] 5185 sarl $4, %ecx # ecx <- B 5186 movl rIBASE, LOCAL0(%esp) 5187 GET_VREG_HIGH rIBASE, rINST # rIBASE <- v[AA+1] 5188 GET_VREG %ecx, %ecx # ecx <- vBB 5189 shrdl rIBASE, %eax 5190 sarl %cl, rIBASE 5191 testb $32, %cl 5192 je 2f 5193 movl rIBASE, %eax 5194 sarl $31, rIBASE 5195 2: 5196 SET_VREG_HIGH rIBASE, rINST # v[AA+1] <- rIBASE 5197 movl LOCAL0(%esp), rIBASE 5198 SET_VREG %eax, rINST # v[AA+0] <- eax 5199 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5200 5201 /* ------------------------------ */ 5202 .balign 128 5203 .L_op_ushr_long_2addr: /* 0xc5 */ 5204 /* File: x86/op_ushr_long_2addr.S */ 5205 /* 5206 * Long integer shift, 2addr version. vA is 64-bit value/result, vB is 5207 * 32-bit shift distance. 5208 */ 5209 /* shl-long/2addr vA, vB */ 5210 /* ecx gets shift count */ 5211 /* Need to spill rIBASE */ 5212 /* rINSTw gets AA */ 5213 movzbl rINSTbl, %ecx # ecx <- BA 5214 andb $0xf, rINSTbl # rINST <- A 5215 GET_VREG %eax, rINST # eax <- v[AA+0] 5216 sarl $4, %ecx # ecx <- B 5217 movl rIBASE, LOCAL0(%esp) 5218 GET_VREG_HIGH rIBASE, rINST # rIBASE <- v[AA+1] 5219 GET_VREG %ecx, %ecx # ecx <- vBB 5220 shrdl rIBASE, %eax 5221 shrl %cl, rIBASE 5222 testb $32, %cl 5223 je 2f 5224 movl rIBASE, %eax 5225 xorl rIBASE, rIBASE 5226 2: 5227 SET_VREG_HIGH rIBASE, rINST # v[AA+1] <- rIBASE 5228 movl LOCAL0(%esp), rIBASE 5229 SET_VREG %eax, rINST # v[AA+0] <- eax 5230 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5231 5232 /* ------------------------------ */ 5233 .balign 128 5234 .L_op_add_float_2addr: /* 0xc6 */ 5235 /* File: x86/op_add_float_2addr.S */ 5236 /* File: x86/sseBinop2Addr.S */ 5237 movzx rINSTbl, %ecx # ecx <- A+ 5238 andl $0xf, %ecx # ecx <- A 5239 movss VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 5240 sarl $4, rINST # rINST<- B 5241 addss VREG_ADDRESS(rINST), %xmm0 5242 movss %xmm0, VREG_ADDRESS(%ecx) # vAA<- %xmm0 5243 pxor %xmm0, %xmm0 5244 movss %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 5245 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5246 5247 5248 /* ------------------------------ */ 5249 .balign 128 5250 .L_op_sub_float_2addr: /* 0xc7 */ 5251 /* File: x86/op_sub_float_2addr.S */ 5252 /* File: x86/sseBinop2Addr.S */ 5253 movzx rINSTbl, %ecx # ecx <- A+ 5254 andl $0xf, %ecx # ecx <- A 5255 movss VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 5256 sarl $4, rINST # rINST<- B 5257 subss VREG_ADDRESS(rINST), %xmm0 5258 movss %xmm0, VREG_ADDRESS(%ecx) # vAA<- %xmm0 5259 pxor %xmm0, %xmm0 5260 movss %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 5261 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5262 5263 5264 /* ------------------------------ */ 5265 .balign 128 5266 .L_op_mul_float_2addr: /* 0xc8 */ 5267 /* File: x86/op_mul_float_2addr.S */ 5268 /* File: x86/sseBinop2Addr.S */ 5269 movzx rINSTbl, %ecx # ecx <- A+ 5270 andl $0xf, %ecx # ecx <- A 5271 movss VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 5272 sarl $4, rINST # rINST<- B 5273 mulss VREG_ADDRESS(rINST), %xmm0 5274 movss %xmm0, VREG_ADDRESS(%ecx) # vAA<- %xmm0 5275 pxor %xmm0, %xmm0 5276 movss %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 5277 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5278 5279 5280 /* ------------------------------ */ 5281 .balign 128 5282 .L_op_div_float_2addr: /* 0xc9 */ 5283 /* File: x86/op_div_float_2addr.S */ 5284 /* File: x86/sseBinop2Addr.S */ 5285 movzx rINSTbl, %ecx # ecx <- A+ 5286 andl $0xf, %ecx # ecx <- A 5287 movss VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 5288 sarl $4, rINST # rINST<- B 5289 divss VREG_ADDRESS(rINST), %xmm0 5290 movss %xmm0, VREG_ADDRESS(%ecx) # vAA<- %xmm0 5291 pxor %xmm0, %xmm0 5292 movss %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 5293 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5294 5295 5296 /* ------------------------------ */ 5297 .balign 128 5298 .L_op_rem_float_2addr: /* 0xca */ 5299 /* File: x86/op_rem_float_2addr.S */ 5300 /* rem_float/2addr vA, vB */ 5301 movzx rINSTbl, %ecx # ecx <- A+ 5302 sarl $4, rINST # rINST <- B 5303 flds VREG_ADDRESS(rINST) # vB to fp stack 5304 andb $0xf, %cl # ecx <- A 5305 flds VREG_ADDRESS(%ecx) # vA to fp stack 5306 1: 5307 fprem 5308 fstsw %ax 5309 sahf 5310 jp 1b 5311 fstp %st(1) 5312 fstps VREG_ADDRESS(%ecx) # %st to vA 5313 CLEAR_REF %ecx 5314 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5315 5316 /* ------------------------------ */ 5317 .balign 128 5318 .L_op_add_double_2addr: /* 0xcb */ 5319 /* File: x86/op_add_double_2addr.S */ 5320 /* File: x86/sseBinop2Addr.S */ 5321 movzx rINSTbl, %ecx # ecx <- A+ 5322 andl $0xf, %ecx # ecx <- A 5323 movsd VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 5324 sarl $4, rINST # rINST<- B 5325 addsd VREG_ADDRESS(rINST), %xmm0 5326 movsd %xmm0, VREG_ADDRESS(%ecx) # vAA<- %xmm0 5327 pxor %xmm0, %xmm0 5328 movsd %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 5329 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5330 5331 5332 /* ------------------------------ */ 5333 .balign 128 5334 .L_op_sub_double_2addr: /* 0xcc */ 5335 /* File: x86/op_sub_double_2addr.S */ 5336 /* File: x86/sseBinop2Addr.S */ 5337 movzx rINSTbl, %ecx # ecx <- A+ 5338 andl $0xf, %ecx # ecx <- A 5339 movsd VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 5340 sarl $4, rINST # rINST<- B 5341 subsd VREG_ADDRESS(rINST), %xmm0 5342 movsd %xmm0, VREG_ADDRESS(%ecx) # vAA<- %xmm0 5343 pxor %xmm0, %xmm0 5344 movsd %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 5345 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5346 5347 5348 /* ------------------------------ */ 5349 .balign 128 5350 .L_op_mul_double_2addr: /* 0xcd */ 5351 /* File: x86/op_mul_double_2addr.S */ 5352 /* File: x86/sseBinop2Addr.S */ 5353 movzx rINSTbl, %ecx # ecx <- A+ 5354 andl $0xf, %ecx # ecx <- A 5355 movsd VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 5356 sarl $4, rINST # rINST<- B 5357 mulsd VREG_ADDRESS(rINST), %xmm0 5358 movsd %xmm0, VREG_ADDRESS(%ecx) # vAA<- %xmm0 5359 pxor %xmm0, %xmm0 5360 movsd %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 5361 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5362 5363 5364 /* ------------------------------ */ 5365 .balign 128 5366 .L_op_div_double_2addr: /* 0xce */ 5367 /* File: x86/op_div_double_2addr.S */ 5368 /* File: x86/sseBinop2Addr.S */ 5369 movzx rINSTbl, %ecx # ecx <- A+ 5370 andl $0xf, %ecx # ecx <- A 5371 movsd VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 5372 sarl $4, rINST # rINST<- B 5373 divsd VREG_ADDRESS(rINST), %xmm0 5374 movsd %xmm0, VREG_ADDRESS(%ecx) # vAA<- %xmm0 5375 pxor %xmm0, %xmm0 5376 movsd %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 5377 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5378 5379 5380 /* ------------------------------ */ 5381 .balign 128 5382 .L_op_rem_double_2addr: /* 0xcf */ 5383 /* File: x86/op_rem_double_2addr.S */ 5384 /* rem_double/2addr vA, vB */ 5385 movzx rINSTbl, %ecx # ecx <- A+ 5386 sarl $4, rINST # rINST <- B 5387 fldl VREG_ADDRESS(rINST) # vB to fp stack 5388 andb $0xf, %cl # ecx <- A 5389 fldl VREG_ADDRESS(%ecx) # vA to fp stack 5390 1: 5391 fprem 5392 fstsw %ax 5393 sahf 5394 jp 1b 5395 fstp %st(1) 5396 fstpl VREG_ADDRESS(%ecx) # %st to vA 5397 CLEAR_WIDE_REF %ecx 5398 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5399 5400 /* ------------------------------ */ 5401 .balign 128 5402 .L_op_add_int_lit16: /* 0xd0 */ 5403 /* File: x86/op_add_int_lit16.S */ 5404 /* File: x86/binopLit16.S */ 5405 /* 5406 * Generic 32-bit "lit16" binary operation. Provide an "instr" line 5407 * that specifies an instruction that performs "result = eax op ecx". 5408 * This could be an x86 instruction or a function call. (If the result 5409 * comes back in a register other than eax, you can override "result".) 5410 * 5411 * For: add-int/lit16, rsub-int, 5412 * and-int/lit16, or-int/lit16, xor-int/lit16 5413 */ 5414 /* binop/lit16 vA, vB, #+CCCC */ 5415 movzbl rINSTbl, %eax # eax <- 000000BA 5416 sarl $4, %eax # eax <- B 5417 GET_VREG %eax, %eax # eax <- vB 5418 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5419 andb $0xf, rINSTbl # rINST <- A 5420 addl %ecx, %eax # for example: addl %ecx, %eax 5421 SET_VREG %eax, rINST 5422 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5423 5424 5425 /* ------------------------------ */ 5426 .balign 128 5427 .L_op_rsub_int: /* 0xd1 */ 5428 /* File: x86/op_rsub_int.S */ 5429 /* this op is "rsub-int", but can be thought of as "rsub-int/lit16" */ 5430 /* File: x86/binopLit16.S */ 5431 /* 5432 * Generic 32-bit "lit16" binary operation. Provide an "instr" line 5433 * that specifies an instruction that performs "result = eax op ecx". 5434 * This could be an x86 instruction or a function call. (If the result 5435 * comes back in a register other than eax, you can override "result".) 5436 * 5437 * For: add-int/lit16, rsub-int, 5438 * and-int/lit16, or-int/lit16, xor-int/lit16 5439 */ 5440 /* binop/lit16 vA, vB, #+CCCC */ 5441 movzbl rINSTbl, %eax # eax <- 000000BA 5442 sarl $4, %eax # eax <- B 5443 GET_VREG %eax, %eax # eax <- vB 5444 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5445 andb $0xf, rINSTbl # rINST <- A 5446 subl %eax, %ecx # for example: addl %ecx, %eax 5447 SET_VREG %ecx, rINST 5448 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5449 5450 5451 /* ------------------------------ */ 5452 .balign 128 5453 .L_op_mul_int_lit16: /* 0xd2 */ 5454 /* File: x86/op_mul_int_lit16.S */ 5455 /* mul/lit16 vA, vB, #+CCCC */ 5456 /* Need A in rINST, ssssCCCC in ecx, vB in eax */ 5457 movzbl rINSTbl, %eax # eax <- 000000BA 5458 sarl $4, %eax # eax <- B 5459 GET_VREG %eax, %eax # eax <- vB 5460 movl rIBASE, %ecx 5461 movswl 2(rPC), rIBASE # rIBASE <- ssssCCCC 5462 andb $0xf, rINSTbl # rINST <- A 5463 imull rIBASE, %eax # trashes rIBASE/edx 5464 movl %ecx, rIBASE 5465 SET_VREG %eax, rINST 5466 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5467 5468 /* ------------------------------ */ 5469 .balign 128 5470 .L_op_div_int_lit16: /* 0xd3 */ 5471 /* File: x86/op_div_int_lit16.S */ 5472 /* File: x86/bindivLit16.S */ 5473 /* 5474 * 32-bit binary div/rem operation. Handles special case of op0=minint and 5475 * op1=-1. 5476 */ 5477 /* div/rem/lit16 vA, vB, #+CCCC */ 5478 /* Need A in rINST, ssssCCCC in ecx, vB in eax */ 5479 movzbl rINSTbl, %eax # eax <- 000000BA 5480 sarl $4, %eax # eax <- B 5481 GET_VREG %eax, %eax # eax <- vB 5482 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5483 andb $0xf, rINSTbl # rINST <- A 5484 testl %ecx, %ecx 5485 je common_errDivideByZero 5486 cmpl $-1, %ecx 5487 jne .Lop_div_int_lit16_continue_div 5488 cmpl $0x80000000, %eax 5489 jne .Lop_div_int_lit16_continue_div 5490 movl $0x80000000, %eax 5491 SET_VREG %eax, rINST 5492 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5493 5494 .Lop_div_int_lit16_continue_div: 5495 mov rIBASE, LOCAL0(%esp) 5496 cltd 5497 idivl %ecx 5498 SET_VREG %eax, rINST 5499 mov LOCAL0(%esp), rIBASE 5500 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5501 5502 5503 /* ------------------------------ */ 5504 .balign 128 5505 .L_op_rem_int_lit16: /* 0xd4 */ 5506 /* File: x86/op_rem_int_lit16.S */ 5507 /* File: x86/bindivLit16.S */ 5508 /* 5509 * 32-bit binary div/rem operation. Handles special case of op0=minint and 5510 * op1=-1. 5511 */ 5512 /* div/rem/lit16 vA, vB, #+CCCC */ 5513 /* Need A in rINST, ssssCCCC in ecx, vB in eax */ 5514 movzbl rINSTbl, %eax # eax <- 000000BA 5515 sarl $4, %eax # eax <- B 5516 GET_VREG %eax, %eax # eax <- vB 5517 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5518 andb $0xf, rINSTbl # rINST <- A 5519 testl %ecx, %ecx 5520 je common_errDivideByZero 5521 cmpl $-1, %ecx 5522 jne .Lop_rem_int_lit16_continue_div 5523 cmpl $0x80000000, %eax 5524 jne .Lop_rem_int_lit16_continue_div 5525 movl $0, %eax 5526 SET_VREG %eax, rINST 5527 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5528 5529 .Lop_rem_int_lit16_continue_div: 5530 mov rIBASE, LOCAL0(%esp) 5531 cltd 5532 idivl %ecx 5533 SET_VREG rIBASE, rINST 5534 mov LOCAL0(%esp), rIBASE 5535 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5536 5537 5538 /* ------------------------------ */ 5539 .balign 128 5540 .L_op_and_int_lit16: /* 0xd5 */ 5541 /* File: x86/op_and_int_lit16.S */ 5542 /* File: x86/binopLit16.S */ 5543 /* 5544 * Generic 32-bit "lit16" binary operation. Provide an "instr" line 5545 * that specifies an instruction that performs "result = eax op ecx". 5546 * This could be an x86 instruction or a function call. (If the result 5547 * comes back in a register other than eax, you can override "result".) 5548 * 5549 * For: add-int/lit16, rsub-int, 5550 * and-int/lit16, or-int/lit16, xor-int/lit16 5551 */ 5552 /* binop/lit16 vA, vB, #+CCCC */ 5553 movzbl rINSTbl, %eax # eax <- 000000BA 5554 sarl $4, %eax # eax <- B 5555 GET_VREG %eax, %eax # eax <- vB 5556 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5557 andb $0xf, rINSTbl # rINST <- A 5558 andl %ecx, %eax # for example: addl %ecx, %eax 5559 SET_VREG %eax, rINST 5560 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5561 5562 5563 /* ------------------------------ */ 5564 .balign 128 5565 .L_op_or_int_lit16: /* 0xd6 */ 5566 /* File: x86/op_or_int_lit16.S */ 5567 /* File: x86/binopLit16.S */ 5568 /* 5569 * Generic 32-bit "lit16" binary operation. Provide an "instr" line 5570 * that specifies an instruction that performs "result = eax op ecx". 5571 * This could be an x86 instruction or a function call. (If the result 5572 * comes back in a register other than eax, you can override "result".) 5573 * 5574 * For: add-int/lit16, rsub-int, 5575 * and-int/lit16, or-int/lit16, xor-int/lit16 5576 */ 5577 /* binop/lit16 vA, vB, #+CCCC */ 5578 movzbl rINSTbl, %eax # eax <- 000000BA 5579 sarl $4, %eax # eax <- B 5580 GET_VREG %eax, %eax # eax <- vB 5581 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5582 andb $0xf, rINSTbl # rINST <- A 5583 orl %ecx, %eax # for example: addl %ecx, %eax 5584 SET_VREG %eax, rINST 5585 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5586 5587 5588 /* ------------------------------ */ 5589 .balign 128 5590 .L_op_xor_int_lit16: /* 0xd7 */ 5591 /* File: x86/op_xor_int_lit16.S */ 5592 /* File: x86/binopLit16.S */ 5593 /* 5594 * Generic 32-bit "lit16" binary operation. Provide an "instr" line 5595 * that specifies an instruction that performs "result = eax op ecx". 5596 * This could be an x86 instruction or a function call. (If the result 5597 * comes back in a register other than eax, you can override "result".) 5598 * 5599 * For: add-int/lit16, rsub-int, 5600 * and-int/lit16, or-int/lit16, xor-int/lit16 5601 */ 5602 /* binop/lit16 vA, vB, #+CCCC */ 5603 movzbl rINSTbl, %eax # eax <- 000000BA 5604 sarl $4, %eax # eax <- B 5605 GET_VREG %eax, %eax # eax <- vB 5606 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5607 andb $0xf, rINSTbl # rINST <- A 5608 xorl %ecx, %eax # for example: addl %ecx, %eax 5609 SET_VREG %eax, rINST 5610 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5611 5612 5613 /* ------------------------------ */ 5614 .balign 128 5615 .L_op_add_int_lit8: /* 0xd8 */ 5616 /* File: x86/op_add_int_lit8.S */ 5617 /* File: x86/binopLit8.S */ 5618 /* 5619 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5620 * that specifies an instruction that performs "result = eax op ecx". 5621 * This could be an x86 instruction or a function call. (If the result 5622 * comes back in a register other than r0, you can override "result".) 5623 * 5624 * For: add-int/lit8, rsub-int/lit8 5625 * and-int/lit8, or-int/lit8, xor-int/lit8, 5626 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5627 */ 5628 /* binop/lit8 vAA, vBB, #+CC */ 5629 movzbl 2(rPC), %eax # eax <- BB 5630 movsbl 3(rPC), %ecx # ecx <- ssssssCC 5631 GET_VREG %eax, %eax # eax <- rBB 5632 addl %ecx, %eax # ex: addl %ecx,%eax 5633 SET_VREG %eax, rINST 5634 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5635 5636 5637 /* ------------------------------ */ 5638 .balign 128 5639 .L_op_rsub_int_lit8: /* 0xd9 */ 5640 /* File: x86/op_rsub_int_lit8.S */ 5641 /* File: x86/binopLit8.S */ 5642 /* 5643 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5644 * that specifies an instruction that performs "result = eax op ecx". 5645 * This could be an x86 instruction or a function call. (If the result 5646 * comes back in a register other than r0, you can override "result".) 5647 * 5648 * For: add-int/lit8, rsub-int/lit8 5649 * and-int/lit8, or-int/lit8, xor-int/lit8, 5650 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5651 */ 5652 /* binop/lit8 vAA, vBB, #+CC */ 5653 movzbl 2(rPC), %eax # eax <- BB 5654 movsbl 3(rPC), %ecx # ecx <- ssssssCC 5655 GET_VREG %eax, %eax # eax <- rBB 5656 subl %eax, %ecx # ex: addl %ecx,%eax 5657 SET_VREG %ecx, rINST 5658 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5659 5660 5661 /* ------------------------------ */ 5662 .balign 128 5663 .L_op_mul_int_lit8: /* 0xda */ 5664 /* File: x86/op_mul_int_lit8.S */ 5665 /* mul/lit8 vAA, vBB, #+CC */ 5666 movzbl 2(rPC), %eax # eax <- BB 5667 movl rIBASE, %ecx 5668 GET_VREG %eax, %eax # eax <- rBB 5669 movsbl 3(rPC), rIBASE # rIBASE <- ssssssCC 5670 imull rIBASE, %eax # trashes rIBASE/edx 5671 movl %ecx, rIBASE 5672 SET_VREG %eax, rINST 5673 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5674 5675 /* ------------------------------ */ 5676 .balign 128 5677 .L_op_div_int_lit8: /* 0xdb */ 5678 /* File: x86/op_div_int_lit8.S */ 5679 /* File: x86/bindivLit8.S */ 5680 /* 5681 * 32-bit div/rem "lit8" binary operation. Handles special case of 5682 * op0=minint & op1=-1 5683 */ 5684 /* div/rem/lit8 vAA, vBB, #+CC */ 5685 movzbl 2(rPC), %eax # eax <- BB 5686 movsbl 3(rPC), %ecx # ecx <- ssssssCC 5687 GET_VREG %eax, %eax # eax <- rBB 5688 testl %ecx, %ecx 5689 je common_errDivideByZero 5690 cmpl $0x80000000, %eax 5691 jne .Lop_div_int_lit8_continue_div 5692 cmpl $-1, %ecx 5693 jne .Lop_div_int_lit8_continue_div 5694 movl $0x80000000, %eax 5695 SET_VREG %eax, rINST 5696 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5697 5698 .Lop_div_int_lit8_continue_div: 5699 mov rIBASE, LOCAL0(%esp) 5700 cltd 5701 idivl %ecx 5702 SET_VREG %eax, rINST 5703 mov LOCAL0(%esp), rIBASE 5704 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5705 5706 5707 /* ------------------------------ */ 5708 .balign 128 5709 .L_op_rem_int_lit8: /* 0xdc */ 5710 /* File: x86/op_rem_int_lit8.S */ 5711 /* File: x86/bindivLit8.S */ 5712 /* 5713 * 32-bit div/rem "lit8" binary operation. Handles special case of 5714 * op0=minint & op1=-1 5715 */ 5716 /* div/rem/lit8 vAA, vBB, #+CC */ 5717 movzbl 2(rPC), %eax # eax <- BB 5718 movsbl 3(rPC), %ecx # ecx <- ssssssCC 5719 GET_VREG %eax, %eax # eax <- rBB 5720 testl %ecx, %ecx 5721 je common_errDivideByZero 5722 cmpl $0x80000000, %eax 5723 jne .Lop_rem_int_lit8_continue_div 5724 cmpl $-1, %ecx 5725 jne .Lop_rem_int_lit8_continue_div 5726 movl $0, %eax 5727 SET_VREG %eax, rINST 5728 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5729 5730 .Lop_rem_int_lit8_continue_div: 5731 mov rIBASE, LOCAL0(%esp) 5732 cltd 5733 idivl %ecx 5734 SET_VREG rIBASE, rINST 5735 mov LOCAL0(%esp), rIBASE 5736 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5737 5738 5739 /* ------------------------------ */ 5740 .balign 128 5741 .L_op_and_int_lit8: /* 0xdd */ 5742 /* File: x86/op_and_int_lit8.S */ 5743 /* File: x86/binopLit8.S */ 5744 /* 5745 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5746 * that specifies an instruction that performs "result = eax op ecx". 5747 * This could be an x86 instruction or a function call. (If the result 5748 * comes back in a register other than r0, you can override "result".) 5749 * 5750 * For: add-int/lit8, rsub-int/lit8 5751 * and-int/lit8, or-int/lit8, xor-int/lit8, 5752 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5753 */ 5754 /* binop/lit8 vAA, vBB, #+CC */ 5755 movzbl 2(rPC), %eax # eax <- BB 5756 movsbl 3(rPC), %ecx # ecx <- ssssssCC 5757 GET_VREG %eax, %eax # eax <- rBB 5758 andl %ecx, %eax # ex: addl %ecx,%eax 5759 SET_VREG %eax, rINST 5760 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5761 5762 5763 /* ------------------------------ */ 5764 .balign 128 5765 .L_op_or_int_lit8: /* 0xde */ 5766 /* File: x86/op_or_int_lit8.S */ 5767 /* File: x86/binopLit8.S */ 5768 /* 5769 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5770 * that specifies an instruction that performs "result = eax op ecx". 5771 * This could be an x86 instruction or a function call. (If the result 5772 * comes back in a register other than r0, you can override "result".) 5773 * 5774 * For: add-int/lit8, rsub-int/lit8 5775 * and-int/lit8, or-int/lit8, xor-int/lit8, 5776 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5777 */ 5778 /* binop/lit8 vAA, vBB, #+CC */ 5779 movzbl 2(rPC), %eax # eax <- BB 5780 movsbl 3(rPC), %ecx # ecx <- ssssssCC 5781 GET_VREG %eax, %eax # eax <- rBB 5782 orl %ecx, %eax # ex: addl %ecx,%eax 5783 SET_VREG %eax, rINST 5784 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5785 5786 5787 /* ------------------------------ */ 5788 .balign 128 5789 .L_op_xor_int_lit8: /* 0xdf */ 5790 /* File: x86/op_xor_int_lit8.S */ 5791 /* File: x86/binopLit8.S */ 5792 /* 5793 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5794 * that specifies an instruction that performs "result = eax op ecx". 5795 * This could be an x86 instruction or a function call. (If the result 5796 * comes back in a register other than r0, you can override "result".) 5797 * 5798 * For: add-int/lit8, rsub-int/lit8 5799 * and-int/lit8, or-int/lit8, xor-int/lit8, 5800 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5801 */ 5802 /* binop/lit8 vAA, vBB, #+CC */ 5803 movzbl 2(rPC), %eax # eax <- BB 5804 movsbl 3(rPC), %ecx # ecx <- ssssssCC 5805 GET_VREG %eax, %eax # eax <- rBB 5806 xorl %ecx, %eax # ex: addl %ecx,%eax 5807 SET_VREG %eax, rINST 5808 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5809 5810 5811 /* ------------------------------ */ 5812 .balign 128 5813 .L_op_shl_int_lit8: /* 0xe0 */ 5814 /* File: x86/op_shl_int_lit8.S */ 5815 /* File: x86/binopLit8.S */ 5816 /* 5817 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5818 * that specifies an instruction that performs "result = eax op ecx". 5819 * This could be an x86 instruction or a function call. (If the result 5820 * comes back in a register other than r0, you can override "result".) 5821 * 5822 * For: add-int/lit8, rsub-int/lit8 5823 * and-int/lit8, or-int/lit8, xor-int/lit8, 5824 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5825 */ 5826 /* binop/lit8 vAA, vBB, #+CC */ 5827 movzbl 2(rPC), %eax # eax <- BB 5828 movsbl 3(rPC), %ecx # ecx <- ssssssCC 5829 GET_VREG %eax, %eax # eax <- rBB 5830 sall %cl, %eax # ex: addl %ecx,%eax 5831 SET_VREG %eax, rINST 5832 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5833 5834 5835 /* ------------------------------ */ 5836 .balign 128 5837 .L_op_shr_int_lit8: /* 0xe1 */ 5838 /* File: x86/op_shr_int_lit8.S */ 5839 /* File: x86/binopLit8.S */ 5840 /* 5841 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5842 * that specifies an instruction that performs "result = eax op ecx". 5843 * This could be an x86 instruction or a function call. (If the result 5844 * comes back in a register other than r0, you can override "result".) 5845 * 5846 * For: add-int/lit8, rsub-int/lit8 5847 * and-int/lit8, or-int/lit8, xor-int/lit8, 5848 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5849 */ 5850 /* binop/lit8 vAA, vBB, #+CC */ 5851 movzbl 2(rPC), %eax # eax <- BB 5852 movsbl 3(rPC), %ecx # ecx <- ssssssCC 5853 GET_VREG %eax, %eax # eax <- rBB 5854 sarl %cl, %eax # ex: addl %ecx,%eax 5855 SET_VREG %eax, rINST 5856 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5857 5858 5859 /* ------------------------------ */ 5860 .balign 128 5861 .L_op_ushr_int_lit8: /* 0xe2 */ 5862 /* File: x86/op_ushr_int_lit8.S */ 5863 /* File: x86/binopLit8.S */ 5864 /* 5865 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5866 * that specifies an instruction that performs "result = eax op ecx". 5867 * This could be an x86 instruction or a function call. (If the result 5868 * comes back in a register other than r0, you can override "result".) 5869 * 5870 * For: add-int/lit8, rsub-int/lit8 5871 * and-int/lit8, or-int/lit8, xor-int/lit8, 5872 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5873 */ 5874 /* binop/lit8 vAA, vBB, #+CC */ 5875 movzbl 2(rPC), %eax # eax <- BB 5876 movsbl 3(rPC), %ecx # ecx <- ssssssCC 5877 GET_VREG %eax, %eax # eax <- rBB 5878 shrl %cl, %eax # ex: addl %ecx,%eax 5879 SET_VREG %eax, rINST 5880 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5881 5882 5883 /* ------------------------------ */ 5884 .balign 128 5885 .L_op_iget_quick: /* 0xe3 */ 5886 /* File: x86/op_iget_quick.S */ 5887 /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */ 5888 /* op vA, vB, offset@CCCC */ 5889 movzbl rINSTbl, %ecx # ecx <- BA 5890 sarl $4, %ecx # ecx <- B 5891 GET_VREG %ecx, %ecx # vB (object we're operating on) 5892 movzwl 2(rPC), %eax # eax <- field byte offset 5893 testl %ecx, %ecx # is object null? 5894 je common_errNullObject 5895 movl (%ecx,%eax,1), %eax 5896 andb $0xf,rINSTbl # rINST <- A 5897 SET_VREG %eax, rINST # fp[A] <- value 5898 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5899 5900 /* ------------------------------ */ 5901 .balign 128 5902 .L_op_iget_wide_quick: /* 0xe4 */ 5903 /* File: x86/op_iget_wide_quick.S */ 5904 /* iget-wide-quick vA, vB, offset@CCCC */ 5905 movzbl rINSTbl, %ecx # ecx <- BA 5906 sarl $4, %ecx # ecx <- B 5907 GET_VREG %ecx, %ecx # vB (object we're operating on) 5908 movzwl 2(rPC), %eax # eax <- field byte offset 5909 testl %ecx, %ecx # is object null? 5910 je common_errNullObject 5911 movq (%ecx,%eax,1), %xmm0 5912 andb $0xf, rINSTbl # rINST <- A 5913 SET_WIDE_FP_VREG %xmm0, rINST 5914 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5915 5916 /* ------------------------------ */ 5917 .balign 128 5918 .L_op_iget_object_quick: /* 0xe5 */ 5919 /* File: x86/op_iget_object_quick.S */ 5920 /* For: iget-object-quick */ 5921 /* op vA, vB, offset@CCCC */ 5922 movzbl rINSTbl, %ecx # ecx <- BA 5923 sarl $4, %ecx # ecx <- B 5924 GET_VREG %ecx, %ecx # vB (object we're operating on) 5925 movzwl 2(rPC), %eax # eax <- field byte offset 5926 movl %ecx, OUT_ARG0(%esp) 5927 movl %eax, OUT_ARG1(%esp) 5928 EXPORT_PC 5929 call SYMBOL(artIGetObjectFromMterp) # (obj, offset) 5930 movl rSELF, %ecx 5931 RESTORE_IBASE_FROM_SELF %ecx 5932 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 5933 jnz MterpException # bail out 5934 andb $0xf,rINSTbl # rINST <- A 5935 SET_VREG_OBJECT %eax, rINST # fp[A] <- value 5936 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5937 5938 /* ------------------------------ */ 5939 .balign 128 5940 .L_op_iput_quick: /* 0xe6 */ 5941 /* File: x86/op_iput_quick.S */ 5942 /* For: iput-quick, iput-object-quick */ 5943 /* op vA, vB, offset@CCCC */ 5944 movzbl rINSTbl, %ecx # ecx <- BA 5945 sarl $4, %ecx # ecx <- B 5946 GET_VREG %ecx, %ecx # vB (object we're operating on) 5947 testl %ecx, %ecx # is object null? 5948 je common_errNullObject 5949 andb $0xf, rINSTbl # rINST <- A 5950 GET_VREG rINST, rINST # rINST <- v[A] 5951 movzwl 2(rPC), %eax # eax <- field byte offset 5952 movl rINST, (%ecx,%eax,1) 5953 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5954 5955 /* ------------------------------ */ 5956 .balign 128 5957 .L_op_iput_wide_quick: /* 0xe7 */ 5958 /* File: x86/op_iput_wide_quick.S */ 5959 /* iput-wide-quick vA, vB, offset@CCCC */ 5960 movzbl rINSTbl, %ecx # ecx<- BA 5961 sarl $4, %ecx # ecx<- B 5962 GET_VREG %ecx, %ecx # vB (object we're operating on) 5963 testl %ecx, %ecx # is object null? 5964 je common_errNullObject 5965 movzwl 2(rPC), %eax # eax<- field byte offset 5966 leal (%ecx,%eax,1), %ecx # ecx<- Address of 64-bit target 5967 andb $0xf, rINSTbl # rINST<- A 5968 GET_WIDE_FP_VREG %xmm0, rINST # xmm0<- fp[A]/fp[A+1] 5969 movq %xmm0, (%ecx) # obj.field<- r0/r1 5970 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5971 5972 /* ------------------------------ */ 5973 .balign 128 5974 .L_op_iput_object_quick: /* 0xe8 */ 5975 /* File: x86/op_iput_object_quick.S */ 5976 EXPORT_PC 5977 leal OFF_FP_SHADOWFRAME(rFP), %eax 5978 movl %eax, OUT_ARG0(%esp) 5979 movl rPC, OUT_ARG1(%esp) 5980 REFRESH_INST 232 5981 movl rINST, OUT_ARG2(%esp) 5982 call SYMBOL(MterpIputObjectQuick) 5983 testb %al, %al 5984 jz MterpException 5985 RESTORE_IBASE 5986 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5987 5988 /* ------------------------------ */ 5989 .balign 128 5990 .L_op_invoke_virtual_quick: /* 0xe9 */ 5991 /* File: x86/op_invoke_virtual_quick.S */ 5992 /* File: x86/invoke.S */ 5993 /* 5994 * Generic invoke handler wrapper. 5995 */ 5996 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 5997 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 5998 .extern MterpInvokeVirtualQuick 5999 EXPORT_PC 6000 movl rSELF, %ecx 6001 movl %ecx, OUT_ARG0(%esp) 6002 leal OFF_FP_SHADOWFRAME(rFP), %eax 6003 movl %eax, OUT_ARG1(%esp) 6004 movl rPC, OUT_ARG2(%esp) 6005 REFRESH_INST 233 6006 movl rINST, OUT_ARG3(%esp) 6007 call SYMBOL(MterpInvokeVirtualQuick) 6008 testb %al, %al 6009 jz MterpException 6010 ADVANCE_PC 3 6011 call SYMBOL(MterpShouldSwitchInterpreters) 6012 testb %al, %al 6013 jnz MterpFallback 6014 RESTORE_IBASE 6015 FETCH_INST 6016 GOTO_NEXT 6017 6018 6019 /* ------------------------------ */ 6020 .balign 128 6021 .L_op_invoke_virtual_range_quick: /* 0xea */ 6022 /* File: x86/op_invoke_virtual_range_quick.S */ 6023 /* File: x86/invoke.S */ 6024 /* 6025 * Generic invoke handler wrapper. 6026 */ 6027 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 6028 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 6029 .extern MterpInvokeVirtualQuickRange 6030 EXPORT_PC 6031 movl rSELF, %ecx 6032 movl %ecx, OUT_ARG0(%esp) 6033 leal OFF_FP_SHADOWFRAME(rFP), %eax 6034 movl %eax, OUT_ARG1(%esp) 6035 movl rPC, OUT_ARG2(%esp) 6036 REFRESH_INST 234 6037 movl rINST, OUT_ARG3(%esp) 6038 call SYMBOL(MterpInvokeVirtualQuickRange) 6039 testb %al, %al 6040 jz MterpException 6041 ADVANCE_PC 3 6042 call SYMBOL(MterpShouldSwitchInterpreters) 6043 testb %al, %al 6044 jnz MterpFallback 6045 RESTORE_IBASE 6046 FETCH_INST 6047 GOTO_NEXT 6048 6049 6050 /* ------------------------------ */ 6051 .balign 128 6052 .L_op_iput_boolean_quick: /* 0xeb */ 6053 /* File: x86/op_iput_boolean_quick.S */ 6054 /* File: x86/op_iput_quick.S */ 6055 /* For: iput-quick, iput-object-quick */ 6056 /* op vA, vB, offset@CCCC */ 6057 movzbl rINSTbl, %ecx # ecx <- BA 6058 sarl $4, %ecx # ecx <- B 6059 GET_VREG %ecx, %ecx # vB (object we're operating on) 6060 testl %ecx, %ecx # is object null? 6061 je common_errNullObject 6062 andb $0xf, rINSTbl # rINST <- A 6063 GET_VREG rINST, rINST # rINST <- v[A] 6064 movzwl 2(rPC), %eax # eax <- field byte offset 6065 movb rINSTbl, (%ecx,%eax,1) 6066 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 6067 6068 6069 /* ------------------------------ */ 6070 .balign 128 6071 .L_op_iput_byte_quick: /* 0xec */ 6072 /* File: x86/op_iput_byte_quick.S */ 6073 /* File: x86/op_iput_quick.S */ 6074 /* For: iput-quick, iput-object-quick */ 6075 /* op vA, vB, offset@CCCC */ 6076 movzbl rINSTbl, %ecx # ecx <- BA 6077 sarl $4, %ecx # ecx <- B 6078 GET_VREG %ecx, %ecx # vB (object we're operating on) 6079 testl %ecx, %ecx # is object null? 6080 je common_errNullObject 6081 andb $0xf, rINSTbl # rINST <- A 6082 GET_VREG rINST, rINST # rINST <- v[A] 6083 movzwl 2(rPC), %eax # eax <- field byte offset 6084 movb rINSTbl, (%ecx,%eax,1) 6085 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 6086 6087 6088 /* ------------------------------ */ 6089 .balign 128 6090 .L_op_iput_char_quick: /* 0xed */ 6091 /* File: x86/op_iput_char_quick.S */ 6092 /* File: x86/op_iput_quick.S */ 6093 /* For: iput-quick, iput-object-quick */ 6094 /* op vA, vB, offset@CCCC */ 6095 movzbl rINSTbl, %ecx # ecx <- BA 6096 sarl $4, %ecx # ecx <- B 6097 GET_VREG %ecx, %ecx # vB (object we're operating on) 6098 testl %ecx, %ecx # is object null? 6099 je common_errNullObject 6100 andb $0xf, rINSTbl # rINST <- A 6101 GET_VREG rINST, rINST # rINST <- v[A] 6102 movzwl 2(rPC), %eax # eax <- field byte offset 6103 movw rINSTw, (%ecx,%eax,1) 6104 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 6105 6106 6107 /* ------------------------------ */ 6108 .balign 128 6109 .L_op_iput_short_quick: /* 0xee */ 6110 /* File: x86/op_iput_short_quick.S */ 6111 /* File: x86/op_iput_quick.S */ 6112 /* For: iput-quick, iput-object-quick */ 6113 /* op vA, vB, offset@CCCC */ 6114 movzbl rINSTbl, %ecx # ecx <- BA 6115 sarl $4, %ecx # ecx <- B 6116 GET_VREG %ecx, %ecx # vB (object we're operating on) 6117 testl %ecx, %ecx # is object null? 6118 je common_errNullObject 6119 andb $0xf, rINSTbl # rINST <- A 6120 GET_VREG rINST, rINST # rINST <- v[A] 6121 movzwl 2(rPC), %eax # eax <- field byte offset 6122 movw rINSTw, (%ecx,%eax,1) 6123 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 6124 6125 6126 /* ------------------------------ */ 6127 .balign 128 6128 .L_op_iget_boolean_quick: /* 0xef */ 6129 /* File: x86/op_iget_boolean_quick.S */ 6130 /* File: x86/op_iget_quick.S */ 6131 /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */ 6132 /* op vA, vB, offset@CCCC */ 6133 movzbl rINSTbl, %ecx # ecx <- BA 6134 sarl $4, %ecx # ecx <- B 6135 GET_VREG %ecx, %ecx # vB (object we're operating on) 6136 movzwl 2(rPC), %eax # eax <- field byte offset 6137 testl %ecx, %ecx # is object null? 6138 je common_errNullObject 6139 movsbl (%ecx,%eax,1), %eax 6140 andb $0xf,rINSTbl # rINST <- A 6141 SET_VREG %eax, rINST # fp[A] <- value 6142 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 6143 6144 6145 /* ------------------------------ */ 6146 .balign 128 6147 .L_op_iget_byte_quick: /* 0xf0 */ 6148 /* File: x86/op_iget_byte_quick.S */ 6149 /* File: x86/op_iget_quick.S */ 6150 /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */ 6151 /* op vA, vB, offset@CCCC */ 6152 movzbl rINSTbl, %ecx # ecx <- BA 6153 sarl $4, %ecx # ecx <- B 6154 GET_VREG %ecx, %ecx # vB (object we're operating on) 6155 movzwl 2(rPC), %eax # eax <- field byte offset 6156 testl %ecx, %ecx # is object null? 6157 je common_errNullObject 6158 movsbl (%ecx,%eax,1), %eax 6159 andb $0xf,rINSTbl # rINST <- A 6160 SET_VREG %eax, rINST # fp[A] <- value 6161 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 6162 6163 6164 /* ------------------------------ */ 6165 .balign 128 6166 .L_op_iget_char_quick: /* 0xf1 */ 6167 /* File: x86/op_iget_char_quick.S */ 6168 /* File: x86/op_iget_quick.S */ 6169 /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */ 6170 /* op vA, vB, offset@CCCC */ 6171 movzbl rINSTbl, %ecx # ecx <- BA 6172 sarl $4, %ecx # ecx <- B 6173 GET_VREG %ecx, %ecx # vB (object we're operating on) 6174 movzwl 2(rPC), %eax # eax <- field byte offset 6175 testl %ecx, %ecx # is object null? 6176 je common_errNullObject 6177 movzwl (%ecx,%eax,1), %eax 6178 andb $0xf,rINSTbl # rINST <- A 6179 SET_VREG %eax, rINST # fp[A] <- value 6180 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 6181 6182 6183 /* ------------------------------ */ 6184 .balign 128 6185 .L_op_iget_short_quick: /* 0xf2 */ 6186 /* File: x86/op_iget_short_quick.S */ 6187 /* File: x86/op_iget_quick.S */ 6188 /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */ 6189 /* op vA, vB, offset@CCCC */ 6190 movzbl rINSTbl, %ecx # ecx <- BA 6191 sarl $4, %ecx # ecx <- B 6192 GET_VREG %ecx, %ecx # vB (object we're operating on) 6193 movzwl 2(rPC), %eax # eax <- field byte offset 6194 testl %ecx, %ecx # is object null? 6195 je common_errNullObject 6196 movswl (%ecx,%eax,1), %eax 6197 andb $0xf,rINSTbl # rINST <- A 6198 SET_VREG %eax, rINST # fp[A] <- value 6199 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 6200 6201 6202 /* ------------------------------ */ 6203 .balign 128 6204 .L_op_unused_f3: /* 0xf3 */ 6205 /* File: x86/op_unused_f3.S */ 6206 /* File: x86/unused.S */ 6207 /* 6208 * Bail to reference interpreter to throw. 6209 */ 6210 jmp MterpFallback 6211 6212 6213 /* ------------------------------ */ 6214 .balign 128 6215 .L_op_unused_f4: /* 0xf4 */ 6216 /* File: x86/op_unused_f4.S */ 6217 /* File: x86/unused.S */ 6218 /* 6219 * Bail to reference interpreter to throw. 6220 */ 6221 jmp MterpFallback 6222 6223 6224 /* ------------------------------ */ 6225 .balign 128 6226 .L_op_unused_f5: /* 0xf5 */ 6227 /* File: x86/op_unused_f5.S */ 6228 /* File: x86/unused.S */ 6229 /* 6230 * Bail to reference interpreter to throw. 6231 */ 6232 jmp MterpFallback 6233 6234 6235 /* ------------------------------ */ 6236 .balign 128 6237 .L_op_unused_f6: /* 0xf6 */ 6238 /* File: x86/op_unused_f6.S */ 6239 /* File: x86/unused.S */ 6240 /* 6241 * Bail to reference interpreter to throw. 6242 */ 6243 jmp MterpFallback 6244 6245 6246 /* ------------------------------ */ 6247 .balign 128 6248 .L_op_unused_f7: /* 0xf7 */ 6249 /* File: x86/op_unused_f7.S */ 6250 /* File: x86/unused.S */ 6251 /* 6252 * Bail to reference interpreter to throw. 6253 */ 6254 jmp MterpFallback 6255 6256 6257 /* ------------------------------ */ 6258 .balign 128 6259 .L_op_unused_f8: /* 0xf8 */ 6260 /* File: x86/op_unused_f8.S */ 6261 /* File: x86/unused.S */ 6262 /* 6263 * Bail to reference interpreter to throw. 6264 */ 6265 jmp MterpFallback 6266 6267 6268 /* ------------------------------ */ 6269 .balign 128 6270 .L_op_unused_f9: /* 0xf9 */ 6271 /* File: x86/op_unused_f9.S */ 6272 /* File: x86/unused.S */ 6273 /* 6274 * Bail to reference interpreter to throw. 6275 */ 6276 jmp MterpFallback 6277 6278 6279 /* ------------------------------ */ 6280 .balign 128 6281 .L_op_invoke_polymorphic: /* 0xfa */ 6282 /* Transfer stub to alternate interpreter */ 6283 jmp MterpFallback 6284 6285 6286 /* ------------------------------ */ 6287 .balign 128 6288 .L_op_invoke_polymorphic_range: /* 0xfb */ 6289 /* Transfer stub to alternate interpreter */ 6290 jmp MterpFallback 6291 6292 6293 /* ------------------------------ */ 6294 .balign 128 6295 .L_op_invoke_custom: /* 0xfc */ 6296 /* Transfer stub to alternate interpreter */ 6297 jmp MterpFallback 6298 6299 6300 /* ------------------------------ */ 6301 .balign 128 6302 .L_op_invoke_custom_range: /* 0xfd */ 6303 /* Transfer stub to alternate interpreter */ 6304 jmp MterpFallback 6305 6306 6307 /* ------------------------------ */ 6308 .balign 128 6309 .L_op_unused_fe: /* 0xfe */ 6310 /* File: x86/op_unused_fe.S */ 6311 /* File: x86/unused.S */ 6312 /* 6313 * Bail to reference interpreter to throw. 6314 */ 6315 jmp MterpFallback 6316 6317 6318 /* ------------------------------ */ 6319 .balign 128 6320 .L_op_unused_ff: /* 0xff */ 6321 /* File: x86/op_unused_ff.S */ 6322 /* File: x86/unused.S */ 6323 /* 6324 * Bail to reference interpreter to throw. 6325 */ 6326 jmp MterpFallback 6327 6328 6329 .balign 128 6330 SIZE(SYMBOL(artMterpAsmInstructionStart),SYMBOL(artMterpAsmInstructionStart)) 6331 .global SYMBOL(artMterpAsmInstructionEnd) 6332 SYMBOL(artMterpAsmInstructionEnd): 6333 6334 /* 6335 * =========================================================================== 6336 * Sister implementations 6337 * =========================================================================== 6338 */ 6339 .global SYMBOL(artMterpAsmSisterStart) 6340 FUNCTION_TYPE(SYMBOL(artMterpAsmSisterStart)) 6341 .text 6342 .balign 4 6343 SYMBOL(artMterpAsmSisterStart): 6344 6345 SIZE(SYMBOL(artMterpAsmSisterStart),SYMBOL(artMterpAsmSisterStart)) 6346 .global SYMBOL(artMterpAsmSisterEnd) 6347 SYMBOL(artMterpAsmSisterEnd): 6348 6349 6350 .global SYMBOL(artMterpAsmAltInstructionStart) 6351 FUNCTION_TYPE(SYMBOL(artMterpAsmAltInstructionStart)) 6352 .text 6353 6354 SYMBOL(artMterpAsmAltInstructionStart) = .L_ALT_op_nop 6355 /* ------------------------------ */ 6356 .balign 128 6357 .L_ALT_op_nop: /* 0x00 */ 6358 /* File: x86/alt_stub.S */ 6359 /* 6360 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6361 * any interesting requests and then jump to the real instruction 6362 * handler. Unlike the Arm handler, we can't do this as a tail call 6363 * because rIBASE is caller save and we need to reload it. 6364 * 6365 * Note that unlike in the Arm implementation, we should never arrive 6366 * here with a zero breakFlag because we always refresh rIBASE on 6367 * return. 6368 */ 6369 .extern MterpCheckBefore 6370 movl rSELF, %ecx 6371 movl %ecx, OUT_ARG0(%esp) 6372 leal OFF_FP_SHADOWFRAME(rFP), %eax 6373 movl %eax, OUT_ARG1(%esp) 6374 movl rPC, OUT_ARG2(%esp) 6375 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6376 REFRESH_IBASE 6377 jmp .L_op_nop+(0*128) 6378 6379 /* ------------------------------ */ 6380 .balign 128 6381 .L_ALT_op_move: /* 0x01 */ 6382 /* File: x86/alt_stub.S */ 6383 /* 6384 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6385 * any interesting requests and then jump to the real instruction 6386 * handler. Unlike the Arm handler, we can't do this as a tail call 6387 * because rIBASE is caller save and we need to reload it. 6388 * 6389 * Note that unlike in the Arm implementation, we should never arrive 6390 * here with a zero breakFlag because we always refresh rIBASE on 6391 * return. 6392 */ 6393 .extern MterpCheckBefore 6394 movl rSELF, %ecx 6395 movl %ecx, OUT_ARG0(%esp) 6396 leal OFF_FP_SHADOWFRAME(rFP), %eax 6397 movl %eax, OUT_ARG1(%esp) 6398 movl rPC, OUT_ARG2(%esp) 6399 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6400 REFRESH_IBASE 6401 jmp .L_op_nop+(1*128) 6402 6403 /* ------------------------------ */ 6404 .balign 128 6405 .L_ALT_op_move_from16: /* 0x02 */ 6406 /* File: x86/alt_stub.S */ 6407 /* 6408 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6409 * any interesting requests and then jump to the real instruction 6410 * handler. Unlike the Arm handler, we can't do this as a tail call 6411 * because rIBASE is caller save and we need to reload it. 6412 * 6413 * Note that unlike in the Arm implementation, we should never arrive 6414 * here with a zero breakFlag because we always refresh rIBASE on 6415 * return. 6416 */ 6417 .extern MterpCheckBefore 6418 movl rSELF, %ecx 6419 movl %ecx, OUT_ARG0(%esp) 6420 leal OFF_FP_SHADOWFRAME(rFP), %eax 6421 movl %eax, OUT_ARG1(%esp) 6422 movl rPC, OUT_ARG2(%esp) 6423 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6424 REFRESH_IBASE 6425 jmp .L_op_nop+(2*128) 6426 6427 /* ------------------------------ */ 6428 .balign 128 6429 .L_ALT_op_move_16: /* 0x03 */ 6430 /* File: x86/alt_stub.S */ 6431 /* 6432 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6433 * any interesting requests and then jump to the real instruction 6434 * handler. Unlike the Arm handler, we can't do this as a tail call 6435 * because rIBASE is caller save and we need to reload it. 6436 * 6437 * Note that unlike in the Arm implementation, we should never arrive 6438 * here with a zero breakFlag because we always refresh rIBASE on 6439 * return. 6440 */ 6441 .extern MterpCheckBefore 6442 movl rSELF, %ecx 6443 movl %ecx, OUT_ARG0(%esp) 6444 leal OFF_FP_SHADOWFRAME(rFP), %eax 6445 movl %eax, OUT_ARG1(%esp) 6446 movl rPC, OUT_ARG2(%esp) 6447 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6448 REFRESH_IBASE 6449 jmp .L_op_nop+(3*128) 6450 6451 /* ------------------------------ */ 6452 .balign 128 6453 .L_ALT_op_move_wide: /* 0x04 */ 6454 /* File: x86/alt_stub.S */ 6455 /* 6456 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6457 * any interesting requests and then jump to the real instruction 6458 * handler. Unlike the Arm handler, we can't do this as a tail call 6459 * because rIBASE is caller save and we need to reload it. 6460 * 6461 * Note that unlike in the Arm implementation, we should never arrive 6462 * here with a zero breakFlag because we always refresh rIBASE on 6463 * return. 6464 */ 6465 .extern MterpCheckBefore 6466 movl rSELF, %ecx 6467 movl %ecx, OUT_ARG0(%esp) 6468 leal OFF_FP_SHADOWFRAME(rFP), %eax 6469 movl %eax, OUT_ARG1(%esp) 6470 movl rPC, OUT_ARG2(%esp) 6471 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6472 REFRESH_IBASE 6473 jmp .L_op_nop+(4*128) 6474 6475 /* ------------------------------ */ 6476 .balign 128 6477 .L_ALT_op_move_wide_from16: /* 0x05 */ 6478 /* File: x86/alt_stub.S */ 6479 /* 6480 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6481 * any interesting requests and then jump to the real instruction 6482 * handler. Unlike the Arm handler, we can't do this as a tail call 6483 * because rIBASE is caller save and we need to reload it. 6484 * 6485 * Note that unlike in the Arm implementation, we should never arrive 6486 * here with a zero breakFlag because we always refresh rIBASE on 6487 * return. 6488 */ 6489 .extern MterpCheckBefore 6490 movl rSELF, %ecx 6491 movl %ecx, OUT_ARG0(%esp) 6492 leal OFF_FP_SHADOWFRAME(rFP), %eax 6493 movl %eax, OUT_ARG1(%esp) 6494 movl rPC, OUT_ARG2(%esp) 6495 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6496 REFRESH_IBASE 6497 jmp .L_op_nop+(5*128) 6498 6499 /* ------------------------------ */ 6500 .balign 128 6501 .L_ALT_op_move_wide_16: /* 0x06 */ 6502 /* File: x86/alt_stub.S */ 6503 /* 6504 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6505 * any interesting requests and then jump to the real instruction 6506 * handler. Unlike the Arm handler, we can't do this as a tail call 6507 * because rIBASE is caller save and we need to reload it. 6508 * 6509 * Note that unlike in the Arm implementation, we should never arrive 6510 * here with a zero breakFlag because we always refresh rIBASE on 6511 * return. 6512 */ 6513 .extern MterpCheckBefore 6514 movl rSELF, %ecx 6515 movl %ecx, OUT_ARG0(%esp) 6516 leal OFF_FP_SHADOWFRAME(rFP), %eax 6517 movl %eax, OUT_ARG1(%esp) 6518 movl rPC, OUT_ARG2(%esp) 6519 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6520 REFRESH_IBASE 6521 jmp .L_op_nop+(6*128) 6522 6523 /* ------------------------------ */ 6524 .balign 128 6525 .L_ALT_op_move_object: /* 0x07 */ 6526 /* File: x86/alt_stub.S */ 6527 /* 6528 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6529 * any interesting requests and then jump to the real instruction 6530 * handler. Unlike the Arm handler, we can't do this as a tail call 6531 * because rIBASE is caller save and we need to reload it. 6532 * 6533 * Note that unlike in the Arm implementation, we should never arrive 6534 * here with a zero breakFlag because we always refresh rIBASE on 6535 * return. 6536 */ 6537 .extern MterpCheckBefore 6538 movl rSELF, %ecx 6539 movl %ecx, OUT_ARG0(%esp) 6540 leal OFF_FP_SHADOWFRAME(rFP), %eax 6541 movl %eax, OUT_ARG1(%esp) 6542 movl rPC, OUT_ARG2(%esp) 6543 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6544 REFRESH_IBASE 6545 jmp .L_op_nop+(7*128) 6546 6547 /* ------------------------------ */ 6548 .balign 128 6549 .L_ALT_op_move_object_from16: /* 0x08 */ 6550 /* File: x86/alt_stub.S */ 6551 /* 6552 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6553 * any interesting requests and then jump to the real instruction 6554 * handler. Unlike the Arm handler, we can't do this as a tail call 6555 * because rIBASE is caller save and we need to reload it. 6556 * 6557 * Note that unlike in the Arm implementation, we should never arrive 6558 * here with a zero breakFlag because we always refresh rIBASE on 6559 * return. 6560 */ 6561 .extern MterpCheckBefore 6562 movl rSELF, %ecx 6563 movl %ecx, OUT_ARG0(%esp) 6564 leal OFF_FP_SHADOWFRAME(rFP), %eax 6565 movl %eax, OUT_ARG1(%esp) 6566 movl rPC, OUT_ARG2(%esp) 6567 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6568 REFRESH_IBASE 6569 jmp .L_op_nop+(8*128) 6570 6571 /* ------------------------------ */ 6572 .balign 128 6573 .L_ALT_op_move_object_16: /* 0x09 */ 6574 /* File: x86/alt_stub.S */ 6575 /* 6576 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6577 * any interesting requests and then jump to the real instruction 6578 * handler. Unlike the Arm handler, we can't do this as a tail call 6579 * because rIBASE is caller save and we need to reload it. 6580 * 6581 * Note that unlike in the Arm implementation, we should never arrive 6582 * here with a zero breakFlag because we always refresh rIBASE on 6583 * return. 6584 */ 6585 .extern MterpCheckBefore 6586 movl rSELF, %ecx 6587 movl %ecx, OUT_ARG0(%esp) 6588 leal OFF_FP_SHADOWFRAME(rFP), %eax 6589 movl %eax, OUT_ARG1(%esp) 6590 movl rPC, OUT_ARG2(%esp) 6591 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6592 REFRESH_IBASE 6593 jmp .L_op_nop+(9*128) 6594 6595 /* ------------------------------ */ 6596 .balign 128 6597 .L_ALT_op_move_result: /* 0x0a */ 6598 /* File: x86/alt_stub.S */ 6599 /* 6600 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6601 * any interesting requests and then jump to the real instruction 6602 * handler. Unlike the Arm handler, we can't do this as a tail call 6603 * because rIBASE is caller save and we need to reload it. 6604 * 6605 * Note that unlike in the Arm implementation, we should never arrive 6606 * here with a zero breakFlag because we always refresh rIBASE on 6607 * return. 6608 */ 6609 .extern MterpCheckBefore 6610 movl rSELF, %ecx 6611 movl %ecx, OUT_ARG0(%esp) 6612 leal OFF_FP_SHADOWFRAME(rFP), %eax 6613 movl %eax, OUT_ARG1(%esp) 6614 movl rPC, OUT_ARG2(%esp) 6615 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6616 REFRESH_IBASE 6617 jmp .L_op_nop+(10*128) 6618 6619 /* ------------------------------ */ 6620 .balign 128 6621 .L_ALT_op_move_result_wide: /* 0x0b */ 6622 /* File: x86/alt_stub.S */ 6623 /* 6624 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6625 * any interesting requests and then jump to the real instruction 6626 * handler. Unlike the Arm handler, we can't do this as a tail call 6627 * because rIBASE is caller save and we need to reload it. 6628 * 6629 * Note that unlike in the Arm implementation, we should never arrive 6630 * here with a zero breakFlag because we always refresh rIBASE on 6631 * return. 6632 */ 6633 .extern MterpCheckBefore 6634 movl rSELF, %ecx 6635 movl %ecx, OUT_ARG0(%esp) 6636 leal OFF_FP_SHADOWFRAME(rFP), %eax 6637 movl %eax, OUT_ARG1(%esp) 6638 movl rPC, OUT_ARG2(%esp) 6639 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6640 REFRESH_IBASE 6641 jmp .L_op_nop+(11*128) 6642 6643 /* ------------------------------ */ 6644 .balign 128 6645 .L_ALT_op_move_result_object: /* 0x0c */ 6646 /* File: x86/alt_stub.S */ 6647 /* 6648 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6649 * any interesting requests and then jump to the real instruction 6650 * handler. Unlike the Arm handler, we can't do this as a tail call 6651 * because rIBASE is caller save and we need to reload it. 6652 * 6653 * Note that unlike in the Arm implementation, we should never arrive 6654 * here with a zero breakFlag because we always refresh rIBASE on 6655 * return. 6656 */ 6657 .extern MterpCheckBefore 6658 movl rSELF, %ecx 6659 movl %ecx, OUT_ARG0(%esp) 6660 leal OFF_FP_SHADOWFRAME(rFP), %eax 6661 movl %eax, OUT_ARG1(%esp) 6662 movl rPC, OUT_ARG2(%esp) 6663 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6664 REFRESH_IBASE 6665 jmp .L_op_nop+(12*128) 6666 6667 /* ------------------------------ */ 6668 .balign 128 6669 .L_ALT_op_move_exception: /* 0x0d */ 6670 /* File: x86/alt_stub.S */ 6671 /* 6672 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6673 * any interesting requests and then jump to the real instruction 6674 * handler. Unlike the Arm handler, we can't do this as a tail call 6675 * because rIBASE is caller save and we need to reload it. 6676 * 6677 * Note that unlike in the Arm implementation, we should never arrive 6678 * here with a zero breakFlag because we always refresh rIBASE on 6679 * return. 6680 */ 6681 .extern MterpCheckBefore 6682 movl rSELF, %ecx 6683 movl %ecx, OUT_ARG0(%esp) 6684 leal OFF_FP_SHADOWFRAME(rFP), %eax 6685 movl %eax, OUT_ARG1(%esp) 6686 movl rPC, OUT_ARG2(%esp) 6687 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6688 REFRESH_IBASE 6689 jmp .L_op_nop+(13*128) 6690 6691 /* ------------------------------ */ 6692 .balign 128 6693 .L_ALT_op_return_void: /* 0x0e */ 6694 /* File: x86/alt_stub.S */ 6695 /* 6696 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6697 * any interesting requests and then jump to the real instruction 6698 * handler. Unlike the Arm handler, we can't do this as a tail call 6699 * because rIBASE is caller save and we need to reload it. 6700 * 6701 * Note that unlike in the Arm implementation, we should never arrive 6702 * here with a zero breakFlag because we always refresh rIBASE on 6703 * return. 6704 */ 6705 .extern MterpCheckBefore 6706 movl rSELF, %ecx 6707 movl %ecx, OUT_ARG0(%esp) 6708 leal OFF_FP_SHADOWFRAME(rFP), %eax 6709 movl %eax, OUT_ARG1(%esp) 6710 movl rPC, OUT_ARG2(%esp) 6711 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6712 REFRESH_IBASE 6713 jmp .L_op_nop+(14*128) 6714 6715 /* ------------------------------ */ 6716 .balign 128 6717 .L_ALT_op_return: /* 0x0f */ 6718 /* File: x86/alt_stub.S */ 6719 /* 6720 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6721 * any interesting requests and then jump to the real instruction 6722 * handler. Unlike the Arm handler, we can't do this as a tail call 6723 * because rIBASE is caller save and we need to reload it. 6724 * 6725 * Note that unlike in the Arm implementation, we should never arrive 6726 * here with a zero breakFlag because we always refresh rIBASE on 6727 * return. 6728 */ 6729 .extern MterpCheckBefore 6730 movl rSELF, %ecx 6731 movl %ecx, OUT_ARG0(%esp) 6732 leal OFF_FP_SHADOWFRAME(rFP), %eax 6733 movl %eax, OUT_ARG1(%esp) 6734 movl rPC, OUT_ARG2(%esp) 6735 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6736 REFRESH_IBASE 6737 jmp .L_op_nop+(15*128) 6738 6739 /* ------------------------------ */ 6740 .balign 128 6741 .L_ALT_op_return_wide: /* 0x10 */ 6742 /* File: x86/alt_stub.S */ 6743 /* 6744 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6745 * any interesting requests and then jump to the real instruction 6746 * handler. Unlike the Arm handler, we can't do this as a tail call 6747 * because rIBASE is caller save and we need to reload it. 6748 * 6749 * Note that unlike in the Arm implementation, we should never arrive 6750 * here with a zero breakFlag because we always refresh rIBASE on 6751 * return. 6752 */ 6753 .extern MterpCheckBefore 6754 movl rSELF, %ecx 6755 movl %ecx, OUT_ARG0(%esp) 6756 leal OFF_FP_SHADOWFRAME(rFP), %eax 6757 movl %eax, OUT_ARG1(%esp) 6758 movl rPC, OUT_ARG2(%esp) 6759 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6760 REFRESH_IBASE 6761 jmp .L_op_nop+(16*128) 6762 6763 /* ------------------------------ */ 6764 .balign 128 6765 .L_ALT_op_return_object: /* 0x11 */ 6766 /* File: x86/alt_stub.S */ 6767 /* 6768 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6769 * any interesting requests and then jump to the real instruction 6770 * handler. Unlike the Arm handler, we can't do this as a tail call 6771 * because rIBASE is caller save and we need to reload it. 6772 * 6773 * Note that unlike in the Arm implementation, we should never arrive 6774 * here with a zero breakFlag because we always refresh rIBASE on 6775 * return. 6776 */ 6777 .extern MterpCheckBefore 6778 movl rSELF, %ecx 6779 movl %ecx, OUT_ARG0(%esp) 6780 leal OFF_FP_SHADOWFRAME(rFP), %eax 6781 movl %eax, OUT_ARG1(%esp) 6782 movl rPC, OUT_ARG2(%esp) 6783 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6784 REFRESH_IBASE 6785 jmp .L_op_nop+(17*128) 6786 6787 /* ------------------------------ */ 6788 .balign 128 6789 .L_ALT_op_const_4: /* 0x12 */ 6790 /* File: x86/alt_stub.S */ 6791 /* 6792 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6793 * any interesting requests and then jump to the real instruction 6794 * handler. Unlike the Arm handler, we can't do this as a tail call 6795 * because rIBASE is caller save and we need to reload it. 6796 * 6797 * Note that unlike in the Arm implementation, we should never arrive 6798 * here with a zero breakFlag because we always refresh rIBASE on 6799 * return. 6800 */ 6801 .extern MterpCheckBefore 6802 movl rSELF, %ecx 6803 movl %ecx, OUT_ARG0(%esp) 6804 leal OFF_FP_SHADOWFRAME(rFP), %eax 6805 movl %eax, OUT_ARG1(%esp) 6806 movl rPC, OUT_ARG2(%esp) 6807 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6808 REFRESH_IBASE 6809 jmp .L_op_nop+(18*128) 6810 6811 /* ------------------------------ */ 6812 .balign 128 6813 .L_ALT_op_const_16: /* 0x13 */ 6814 /* File: x86/alt_stub.S */ 6815 /* 6816 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6817 * any interesting requests and then jump to the real instruction 6818 * handler. Unlike the Arm handler, we can't do this as a tail call 6819 * because rIBASE is caller save and we need to reload it. 6820 * 6821 * Note that unlike in the Arm implementation, we should never arrive 6822 * here with a zero breakFlag because we always refresh rIBASE on 6823 * return. 6824 */ 6825 .extern MterpCheckBefore 6826 movl rSELF, %ecx 6827 movl %ecx, OUT_ARG0(%esp) 6828 leal OFF_FP_SHADOWFRAME(rFP), %eax 6829 movl %eax, OUT_ARG1(%esp) 6830 movl rPC, OUT_ARG2(%esp) 6831 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6832 REFRESH_IBASE 6833 jmp .L_op_nop+(19*128) 6834 6835 /* ------------------------------ */ 6836 .balign 128 6837 .L_ALT_op_const: /* 0x14 */ 6838 /* File: x86/alt_stub.S */ 6839 /* 6840 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6841 * any interesting requests and then jump to the real instruction 6842 * handler. Unlike the Arm handler, we can't do this as a tail call 6843 * because rIBASE is caller save and we need to reload it. 6844 * 6845 * Note that unlike in the Arm implementation, we should never arrive 6846 * here with a zero breakFlag because we always refresh rIBASE on 6847 * return. 6848 */ 6849 .extern MterpCheckBefore 6850 movl rSELF, %ecx 6851 movl %ecx, OUT_ARG0(%esp) 6852 leal OFF_FP_SHADOWFRAME(rFP), %eax 6853 movl %eax, OUT_ARG1(%esp) 6854 movl rPC, OUT_ARG2(%esp) 6855 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6856 REFRESH_IBASE 6857 jmp .L_op_nop+(20*128) 6858 6859 /* ------------------------------ */ 6860 .balign 128 6861 .L_ALT_op_const_high16: /* 0x15 */ 6862 /* File: x86/alt_stub.S */ 6863 /* 6864 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6865 * any interesting requests and then jump to the real instruction 6866 * handler. Unlike the Arm handler, we can't do this as a tail call 6867 * because rIBASE is caller save and we need to reload it. 6868 * 6869 * Note that unlike in the Arm implementation, we should never arrive 6870 * here with a zero breakFlag because we always refresh rIBASE on 6871 * return. 6872 */ 6873 .extern MterpCheckBefore 6874 movl rSELF, %ecx 6875 movl %ecx, OUT_ARG0(%esp) 6876 leal OFF_FP_SHADOWFRAME(rFP), %eax 6877 movl %eax, OUT_ARG1(%esp) 6878 movl rPC, OUT_ARG2(%esp) 6879 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6880 REFRESH_IBASE 6881 jmp .L_op_nop+(21*128) 6882 6883 /* ------------------------------ */ 6884 .balign 128 6885 .L_ALT_op_const_wide_16: /* 0x16 */ 6886 /* File: x86/alt_stub.S */ 6887 /* 6888 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6889 * any interesting requests and then jump to the real instruction 6890 * handler. Unlike the Arm handler, we can't do this as a tail call 6891 * because rIBASE is caller save and we need to reload it. 6892 * 6893 * Note that unlike in the Arm implementation, we should never arrive 6894 * here with a zero breakFlag because we always refresh rIBASE on 6895 * return. 6896 */ 6897 .extern MterpCheckBefore 6898 movl rSELF, %ecx 6899 movl %ecx, OUT_ARG0(%esp) 6900 leal OFF_FP_SHADOWFRAME(rFP), %eax 6901 movl %eax, OUT_ARG1(%esp) 6902 movl rPC, OUT_ARG2(%esp) 6903 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6904 REFRESH_IBASE 6905 jmp .L_op_nop+(22*128) 6906 6907 /* ------------------------------ */ 6908 .balign 128 6909 .L_ALT_op_const_wide_32: /* 0x17 */ 6910 /* File: x86/alt_stub.S */ 6911 /* 6912 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6913 * any interesting requests and then jump to the real instruction 6914 * handler. Unlike the Arm handler, we can't do this as a tail call 6915 * because rIBASE is caller save and we need to reload it. 6916 * 6917 * Note that unlike in the Arm implementation, we should never arrive 6918 * here with a zero breakFlag because we always refresh rIBASE on 6919 * return. 6920 */ 6921 .extern MterpCheckBefore 6922 movl rSELF, %ecx 6923 movl %ecx, OUT_ARG0(%esp) 6924 leal OFF_FP_SHADOWFRAME(rFP), %eax 6925 movl %eax, OUT_ARG1(%esp) 6926 movl rPC, OUT_ARG2(%esp) 6927 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6928 REFRESH_IBASE 6929 jmp .L_op_nop+(23*128) 6930 6931 /* ------------------------------ */ 6932 .balign 128 6933 .L_ALT_op_const_wide: /* 0x18 */ 6934 /* File: x86/alt_stub.S */ 6935 /* 6936 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6937 * any interesting requests and then jump to the real instruction 6938 * handler. Unlike the Arm handler, we can't do this as a tail call 6939 * because rIBASE is caller save and we need to reload it. 6940 * 6941 * Note that unlike in the Arm implementation, we should never arrive 6942 * here with a zero breakFlag because we always refresh rIBASE on 6943 * return. 6944 */ 6945 .extern MterpCheckBefore 6946 movl rSELF, %ecx 6947 movl %ecx, OUT_ARG0(%esp) 6948 leal OFF_FP_SHADOWFRAME(rFP), %eax 6949 movl %eax, OUT_ARG1(%esp) 6950 movl rPC, OUT_ARG2(%esp) 6951 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6952 REFRESH_IBASE 6953 jmp .L_op_nop+(24*128) 6954 6955 /* ------------------------------ */ 6956 .balign 128 6957 .L_ALT_op_const_wide_high16: /* 0x19 */ 6958 /* File: x86/alt_stub.S */ 6959 /* 6960 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6961 * any interesting requests and then jump to the real instruction 6962 * handler. Unlike the Arm handler, we can't do this as a tail call 6963 * because rIBASE is caller save and we need to reload it. 6964 * 6965 * Note that unlike in the Arm implementation, we should never arrive 6966 * here with a zero breakFlag because we always refresh rIBASE on 6967 * return. 6968 */ 6969 .extern MterpCheckBefore 6970 movl rSELF, %ecx 6971 movl %ecx, OUT_ARG0(%esp) 6972 leal OFF_FP_SHADOWFRAME(rFP), %eax 6973 movl %eax, OUT_ARG1(%esp) 6974 movl rPC, OUT_ARG2(%esp) 6975 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6976 REFRESH_IBASE 6977 jmp .L_op_nop+(25*128) 6978 6979 /* ------------------------------ */ 6980 .balign 128 6981 .L_ALT_op_const_string: /* 0x1a */ 6982 /* File: x86/alt_stub.S */ 6983 /* 6984 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6985 * any interesting requests and then jump to the real instruction 6986 * handler. Unlike the Arm handler, we can't do this as a tail call 6987 * because rIBASE is caller save and we need to reload it. 6988 * 6989 * Note that unlike in the Arm implementation, we should never arrive 6990 * here with a zero breakFlag because we always refresh rIBASE on 6991 * return. 6992 */ 6993 .extern MterpCheckBefore 6994 movl rSELF, %ecx 6995 movl %ecx, OUT_ARG0(%esp) 6996 leal OFF_FP_SHADOWFRAME(rFP), %eax 6997 movl %eax, OUT_ARG1(%esp) 6998 movl rPC, OUT_ARG2(%esp) 6999 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7000 REFRESH_IBASE 7001 jmp .L_op_nop+(26*128) 7002 7003 /* ------------------------------ */ 7004 .balign 128 7005 .L_ALT_op_const_string_jumbo: /* 0x1b */ 7006 /* File: x86/alt_stub.S */ 7007 /* 7008 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7009 * any interesting requests and then jump to the real instruction 7010 * handler. Unlike the Arm handler, we can't do this as a tail call 7011 * because rIBASE is caller save and we need to reload it. 7012 * 7013 * Note that unlike in the Arm implementation, we should never arrive 7014 * here with a zero breakFlag because we always refresh rIBASE on 7015 * return. 7016 */ 7017 .extern MterpCheckBefore 7018 movl rSELF, %ecx 7019 movl %ecx, OUT_ARG0(%esp) 7020 leal OFF_FP_SHADOWFRAME(rFP), %eax 7021 movl %eax, OUT_ARG1(%esp) 7022 movl rPC, OUT_ARG2(%esp) 7023 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7024 REFRESH_IBASE 7025 jmp .L_op_nop+(27*128) 7026 7027 /* ------------------------------ */ 7028 .balign 128 7029 .L_ALT_op_const_class: /* 0x1c */ 7030 /* File: x86/alt_stub.S */ 7031 /* 7032 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7033 * any interesting requests and then jump to the real instruction 7034 * handler. Unlike the Arm handler, we can't do this as a tail call 7035 * because rIBASE is caller save and we need to reload it. 7036 * 7037 * Note that unlike in the Arm implementation, we should never arrive 7038 * here with a zero breakFlag because we always refresh rIBASE on 7039 * return. 7040 */ 7041 .extern MterpCheckBefore 7042 movl rSELF, %ecx 7043 movl %ecx, OUT_ARG0(%esp) 7044 leal OFF_FP_SHADOWFRAME(rFP), %eax 7045 movl %eax, OUT_ARG1(%esp) 7046 movl rPC, OUT_ARG2(%esp) 7047 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7048 REFRESH_IBASE 7049 jmp .L_op_nop+(28*128) 7050 7051 /* ------------------------------ */ 7052 .balign 128 7053 .L_ALT_op_monitor_enter: /* 0x1d */ 7054 /* File: x86/alt_stub.S */ 7055 /* 7056 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7057 * any interesting requests and then jump to the real instruction 7058 * handler. Unlike the Arm handler, we can't do this as a tail call 7059 * because rIBASE is caller save and we need to reload it. 7060 * 7061 * Note that unlike in the Arm implementation, we should never arrive 7062 * here with a zero breakFlag because we always refresh rIBASE on 7063 * return. 7064 */ 7065 .extern MterpCheckBefore 7066 movl rSELF, %ecx 7067 movl %ecx, OUT_ARG0(%esp) 7068 leal OFF_FP_SHADOWFRAME(rFP), %eax 7069 movl %eax, OUT_ARG1(%esp) 7070 movl rPC, OUT_ARG2(%esp) 7071 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7072 REFRESH_IBASE 7073 jmp .L_op_nop+(29*128) 7074 7075 /* ------------------------------ */ 7076 .balign 128 7077 .L_ALT_op_monitor_exit: /* 0x1e */ 7078 /* File: x86/alt_stub.S */ 7079 /* 7080 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7081 * any interesting requests and then jump to the real instruction 7082 * handler. Unlike the Arm handler, we can't do this as a tail call 7083 * because rIBASE is caller save and we need to reload it. 7084 * 7085 * Note that unlike in the Arm implementation, we should never arrive 7086 * here with a zero breakFlag because we always refresh rIBASE on 7087 * return. 7088 */ 7089 .extern MterpCheckBefore 7090 movl rSELF, %ecx 7091 movl %ecx, OUT_ARG0(%esp) 7092 leal OFF_FP_SHADOWFRAME(rFP), %eax 7093 movl %eax, OUT_ARG1(%esp) 7094 movl rPC, OUT_ARG2(%esp) 7095 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7096 REFRESH_IBASE 7097 jmp .L_op_nop+(30*128) 7098 7099 /* ------------------------------ */ 7100 .balign 128 7101 .L_ALT_op_check_cast: /* 0x1f */ 7102 /* File: x86/alt_stub.S */ 7103 /* 7104 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7105 * any interesting requests and then jump to the real instruction 7106 * handler. Unlike the Arm handler, we can't do this as a tail call 7107 * because rIBASE is caller save and we need to reload it. 7108 * 7109 * Note that unlike in the Arm implementation, we should never arrive 7110 * here with a zero breakFlag because we always refresh rIBASE on 7111 * return. 7112 */ 7113 .extern MterpCheckBefore 7114 movl rSELF, %ecx 7115 movl %ecx, OUT_ARG0(%esp) 7116 leal OFF_FP_SHADOWFRAME(rFP), %eax 7117 movl %eax, OUT_ARG1(%esp) 7118 movl rPC, OUT_ARG2(%esp) 7119 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7120 REFRESH_IBASE 7121 jmp .L_op_nop+(31*128) 7122 7123 /* ------------------------------ */ 7124 .balign 128 7125 .L_ALT_op_instance_of: /* 0x20 */ 7126 /* File: x86/alt_stub.S */ 7127 /* 7128 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7129 * any interesting requests and then jump to the real instruction 7130 * handler. Unlike the Arm handler, we can't do this as a tail call 7131 * because rIBASE is caller save and we need to reload it. 7132 * 7133 * Note that unlike in the Arm implementation, we should never arrive 7134 * here with a zero breakFlag because we always refresh rIBASE on 7135 * return. 7136 */ 7137 .extern MterpCheckBefore 7138 movl rSELF, %ecx 7139 movl %ecx, OUT_ARG0(%esp) 7140 leal OFF_FP_SHADOWFRAME(rFP), %eax 7141 movl %eax, OUT_ARG1(%esp) 7142 movl rPC, OUT_ARG2(%esp) 7143 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7144 REFRESH_IBASE 7145 jmp .L_op_nop+(32*128) 7146 7147 /* ------------------------------ */ 7148 .balign 128 7149 .L_ALT_op_array_length: /* 0x21 */ 7150 /* File: x86/alt_stub.S */ 7151 /* 7152 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7153 * any interesting requests and then jump to the real instruction 7154 * handler. Unlike the Arm handler, we can't do this as a tail call 7155 * because rIBASE is caller save and we need to reload it. 7156 * 7157 * Note that unlike in the Arm implementation, we should never arrive 7158 * here with a zero breakFlag because we always refresh rIBASE on 7159 * return. 7160 */ 7161 .extern MterpCheckBefore 7162 movl rSELF, %ecx 7163 movl %ecx, OUT_ARG0(%esp) 7164 leal OFF_FP_SHADOWFRAME(rFP), %eax 7165 movl %eax, OUT_ARG1(%esp) 7166 movl rPC, OUT_ARG2(%esp) 7167 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7168 REFRESH_IBASE 7169 jmp .L_op_nop+(33*128) 7170 7171 /* ------------------------------ */ 7172 .balign 128 7173 .L_ALT_op_new_instance: /* 0x22 */ 7174 /* File: x86/alt_stub.S */ 7175 /* 7176 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7177 * any interesting requests and then jump to the real instruction 7178 * handler. Unlike the Arm handler, we can't do this as a tail call 7179 * because rIBASE is caller save and we need to reload it. 7180 * 7181 * Note that unlike in the Arm implementation, we should never arrive 7182 * here with a zero breakFlag because we always refresh rIBASE on 7183 * return. 7184 */ 7185 .extern MterpCheckBefore 7186 movl rSELF, %ecx 7187 movl %ecx, OUT_ARG0(%esp) 7188 leal OFF_FP_SHADOWFRAME(rFP), %eax 7189 movl %eax, OUT_ARG1(%esp) 7190 movl rPC, OUT_ARG2(%esp) 7191 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7192 REFRESH_IBASE 7193 jmp .L_op_nop+(34*128) 7194 7195 /* ------------------------------ */ 7196 .balign 128 7197 .L_ALT_op_new_array: /* 0x23 */ 7198 /* File: x86/alt_stub.S */ 7199 /* 7200 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7201 * any interesting requests and then jump to the real instruction 7202 * handler. Unlike the Arm handler, we can't do this as a tail call 7203 * because rIBASE is caller save and we need to reload it. 7204 * 7205 * Note that unlike in the Arm implementation, we should never arrive 7206 * here with a zero breakFlag because we always refresh rIBASE on 7207 * return. 7208 */ 7209 .extern MterpCheckBefore 7210 movl rSELF, %ecx 7211 movl %ecx, OUT_ARG0(%esp) 7212 leal OFF_FP_SHADOWFRAME(rFP), %eax 7213 movl %eax, OUT_ARG1(%esp) 7214 movl rPC, OUT_ARG2(%esp) 7215 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7216 REFRESH_IBASE 7217 jmp .L_op_nop+(35*128) 7218 7219 /* ------------------------------ */ 7220 .balign 128 7221 .L_ALT_op_filled_new_array: /* 0x24 */ 7222 /* File: x86/alt_stub.S */ 7223 /* 7224 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7225 * any interesting requests and then jump to the real instruction 7226 * handler. Unlike the Arm handler, we can't do this as a tail call 7227 * because rIBASE is caller save and we need to reload it. 7228 * 7229 * Note that unlike in the Arm implementation, we should never arrive 7230 * here with a zero breakFlag because we always refresh rIBASE on 7231 * return. 7232 */ 7233 .extern MterpCheckBefore 7234 movl rSELF, %ecx 7235 movl %ecx, OUT_ARG0(%esp) 7236 leal OFF_FP_SHADOWFRAME(rFP), %eax 7237 movl %eax, OUT_ARG1(%esp) 7238 movl rPC, OUT_ARG2(%esp) 7239 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7240 REFRESH_IBASE 7241 jmp .L_op_nop+(36*128) 7242 7243 /* ------------------------------ */ 7244 .balign 128 7245 .L_ALT_op_filled_new_array_range: /* 0x25 */ 7246 /* File: x86/alt_stub.S */ 7247 /* 7248 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7249 * any interesting requests and then jump to the real instruction 7250 * handler. Unlike the Arm handler, we can't do this as a tail call 7251 * because rIBASE is caller save and we need to reload it. 7252 * 7253 * Note that unlike in the Arm implementation, we should never arrive 7254 * here with a zero breakFlag because we always refresh rIBASE on 7255 * return. 7256 */ 7257 .extern MterpCheckBefore 7258 movl rSELF, %ecx 7259 movl %ecx, OUT_ARG0(%esp) 7260 leal OFF_FP_SHADOWFRAME(rFP), %eax 7261 movl %eax, OUT_ARG1(%esp) 7262 movl rPC, OUT_ARG2(%esp) 7263 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7264 REFRESH_IBASE 7265 jmp .L_op_nop+(37*128) 7266 7267 /* ------------------------------ */ 7268 .balign 128 7269 .L_ALT_op_fill_array_data: /* 0x26 */ 7270 /* File: x86/alt_stub.S */ 7271 /* 7272 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7273 * any interesting requests and then jump to the real instruction 7274 * handler. Unlike the Arm handler, we can't do this as a tail call 7275 * because rIBASE is caller save and we need to reload it. 7276 * 7277 * Note that unlike in the Arm implementation, we should never arrive 7278 * here with a zero breakFlag because we always refresh rIBASE on 7279 * return. 7280 */ 7281 .extern MterpCheckBefore 7282 movl rSELF, %ecx 7283 movl %ecx, OUT_ARG0(%esp) 7284 leal OFF_FP_SHADOWFRAME(rFP), %eax 7285 movl %eax, OUT_ARG1(%esp) 7286 movl rPC, OUT_ARG2(%esp) 7287 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7288 REFRESH_IBASE 7289 jmp .L_op_nop+(38*128) 7290 7291 /* ------------------------------ */ 7292 .balign 128 7293 .L_ALT_op_throw: /* 0x27 */ 7294 /* File: x86/alt_stub.S */ 7295 /* 7296 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7297 * any interesting requests and then jump to the real instruction 7298 * handler. Unlike the Arm handler, we can't do this as a tail call 7299 * because rIBASE is caller save and we need to reload it. 7300 * 7301 * Note that unlike in the Arm implementation, we should never arrive 7302 * here with a zero breakFlag because we always refresh rIBASE on 7303 * return. 7304 */ 7305 .extern MterpCheckBefore 7306 movl rSELF, %ecx 7307 movl %ecx, OUT_ARG0(%esp) 7308 leal OFF_FP_SHADOWFRAME(rFP), %eax 7309 movl %eax, OUT_ARG1(%esp) 7310 movl rPC, OUT_ARG2(%esp) 7311 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7312 REFRESH_IBASE 7313 jmp .L_op_nop+(39*128) 7314 7315 /* ------------------------------ */ 7316 .balign 128 7317 .L_ALT_op_goto: /* 0x28 */ 7318 /* File: x86/alt_stub.S */ 7319 /* 7320 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7321 * any interesting requests and then jump to the real instruction 7322 * handler. Unlike the Arm handler, we can't do this as a tail call 7323 * because rIBASE is caller save and we need to reload it. 7324 * 7325 * Note that unlike in the Arm implementation, we should never arrive 7326 * here with a zero breakFlag because we always refresh rIBASE on 7327 * return. 7328 */ 7329 .extern MterpCheckBefore 7330 movl rSELF, %ecx 7331 movl %ecx, OUT_ARG0(%esp) 7332 leal OFF_FP_SHADOWFRAME(rFP), %eax 7333 movl %eax, OUT_ARG1(%esp) 7334 movl rPC, OUT_ARG2(%esp) 7335 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7336 REFRESH_IBASE 7337 jmp .L_op_nop+(40*128) 7338 7339 /* ------------------------------ */ 7340 .balign 128 7341 .L_ALT_op_goto_16: /* 0x29 */ 7342 /* File: x86/alt_stub.S */ 7343 /* 7344 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7345 * any interesting requests and then jump to the real instruction 7346 * handler. Unlike the Arm handler, we can't do this as a tail call 7347 * because rIBASE is caller save and we need to reload it. 7348 * 7349 * Note that unlike in the Arm implementation, we should never arrive 7350 * here with a zero breakFlag because we always refresh rIBASE on 7351 * return. 7352 */ 7353 .extern MterpCheckBefore 7354 movl rSELF, %ecx 7355 movl %ecx, OUT_ARG0(%esp) 7356 leal OFF_FP_SHADOWFRAME(rFP), %eax 7357 movl %eax, OUT_ARG1(%esp) 7358 movl rPC, OUT_ARG2(%esp) 7359 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7360 REFRESH_IBASE 7361 jmp .L_op_nop+(41*128) 7362 7363 /* ------------------------------ */ 7364 .balign 128 7365 .L_ALT_op_goto_32: /* 0x2a */ 7366 /* File: x86/alt_stub.S */ 7367 /* 7368 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7369 * any interesting requests and then jump to the real instruction 7370 * handler. Unlike the Arm handler, we can't do this as a tail call 7371 * because rIBASE is caller save and we need to reload it. 7372 * 7373 * Note that unlike in the Arm implementation, we should never arrive 7374 * here with a zero breakFlag because we always refresh rIBASE on 7375 * return. 7376 */ 7377 .extern MterpCheckBefore 7378 movl rSELF, %ecx 7379 movl %ecx, OUT_ARG0(%esp) 7380 leal OFF_FP_SHADOWFRAME(rFP), %eax 7381 movl %eax, OUT_ARG1(%esp) 7382 movl rPC, OUT_ARG2(%esp) 7383 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7384 REFRESH_IBASE 7385 jmp .L_op_nop+(42*128) 7386 7387 /* ------------------------------ */ 7388 .balign 128 7389 .L_ALT_op_packed_switch: /* 0x2b */ 7390 /* File: x86/alt_stub.S */ 7391 /* 7392 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7393 * any interesting requests and then jump to the real instruction 7394 * handler. Unlike the Arm handler, we can't do this as a tail call 7395 * because rIBASE is caller save and we need to reload it. 7396 * 7397 * Note that unlike in the Arm implementation, we should never arrive 7398 * here with a zero breakFlag because we always refresh rIBASE on 7399 * return. 7400 */ 7401 .extern MterpCheckBefore 7402 movl rSELF, %ecx 7403 movl %ecx, OUT_ARG0(%esp) 7404 leal OFF_FP_SHADOWFRAME(rFP), %eax 7405 movl %eax, OUT_ARG1(%esp) 7406 movl rPC, OUT_ARG2(%esp) 7407 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7408 REFRESH_IBASE 7409 jmp .L_op_nop+(43*128) 7410 7411 /* ------------------------------ */ 7412 .balign 128 7413 .L_ALT_op_sparse_switch: /* 0x2c */ 7414 /* File: x86/alt_stub.S */ 7415 /* 7416 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7417 * any interesting requests and then jump to the real instruction 7418 * handler. Unlike the Arm handler, we can't do this as a tail call 7419 * because rIBASE is caller save and we need to reload it. 7420 * 7421 * Note that unlike in the Arm implementation, we should never arrive 7422 * here with a zero breakFlag because we always refresh rIBASE on 7423 * return. 7424 */ 7425 .extern MterpCheckBefore 7426 movl rSELF, %ecx 7427 movl %ecx, OUT_ARG0(%esp) 7428 leal OFF_FP_SHADOWFRAME(rFP), %eax 7429 movl %eax, OUT_ARG1(%esp) 7430 movl rPC, OUT_ARG2(%esp) 7431 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7432 REFRESH_IBASE 7433 jmp .L_op_nop+(44*128) 7434 7435 /* ------------------------------ */ 7436 .balign 128 7437 .L_ALT_op_cmpl_float: /* 0x2d */ 7438 /* File: x86/alt_stub.S */ 7439 /* 7440 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7441 * any interesting requests and then jump to the real instruction 7442 * handler. Unlike the Arm handler, we can't do this as a tail call 7443 * because rIBASE is caller save and we need to reload it. 7444 * 7445 * Note that unlike in the Arm implementation, we should never arrive 7446 * here with a zero breakFlag because we always refresh rIBASE on 7447 * return. 7448 */ 7449 .extern MterpCheckBefore 7450 movl rSELF, %ecx 7451 movl %ecx, OUT_ARG0(%esp) 7452 leal OFF_FP_SHADOWFRAME(rFP), %eax 7453 movl %eax, OUT_ARG1(%esp) 7454 movl rPC, OUT_ARG2(%esp) 7455 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7456 REFRESH_IBASE 7457 jmp .L_op_nop+(45*128) 7458 7459 /* ------------------------------ */ 7460 .balign 128 7461 .L_ALT_op_cmpg_float: /* 0x2e */ 7462 /* File: x86/alt_stub.S */ 7463 /* 7464 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7465 * any interesting requests and then jump to the real instruction 7466 * handler. Unlike the Arm handler, we can't do this as a tail call 7467 * because rIBASE is caller save and we need to reload it. 7468 * 7469 * Note that unlike in the Arm implementation, we should never arrive 7470 * here with a zero breakFlag because we always refresh rIBASE on 7471 * return. 7472 */ 7473 .extern MterpCheckBefore 7474 movl rSELF, %ecx 7475 movl %ecx, OUT_ARG0(%esp) 7476 leal OFF_FP_SHADOWFRAME(rFP), %eax 7477 movl %eax, OUT_ARG1(%esp) 7478 movl rPC, OUT_ARG2(%esp) 7479 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7480 REFRESH_IBASE 7481 jmp .L_op_nop+(46*128) 7482 7483 /* ------------------------------ */ 7484 .balign 128 7485 .L_ALT_op_cmpl_double: /* 0x2f */ 7486 /* File: x86/alt_stub.S */ 7487 /* 7488 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7489 * any interesting requests and then jump to the real instruction 7490 * handler. Unlike the Arm handler, we can't do this as a tail call 7491 * because rIBASE is caller save and we need to reload it. 7492 * 7493 * Note that unlike in the Arm implementation, we should never arrive 7494 * here with a zero breakFlag because we always refresh rIBASE on 7495 * return. 7496 */ 7497 .extern MterpCheckBefore 7498 movl rSELF, %ecx 7499 movl %ecx, OUT_ARG0(%esp) 7500 leal OFF_FP_SHADOWFRAME(rFP), %eax 7501 movl %eax, OUT_ARG1(%esp) 7502 movl rPC, OUT_ARG2(%esp) 7503 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7504 REFRESH_IBASE 7505 jmp .L_op_nop+(47*128) 7506 7507 /* ------------------------------ */ 7508 .balign 128 7509 .L_ALT_op_cmpg_double: /* 0x30 */ 7510 /* File: x86/alt_stub.S */ 7511 /* 7512 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7513 * any interesting requests and then jump to the real instruction 7514 * handler. Unlike the Arm handler, we can't do this as a tail call 7515 * because rIBASE is caller save and we need to reload it. 7516 * 7517 * Note that unlike in the Arm implementation, we should never arrive 7518 * here with a zero breakFlag because we always refresh rIBASE on 7519 * return. 7520 */ 7521 .extern MterpCheckBefore 7522 movl rSELF, %ecx 7523 movl %ecx, OUT_ARG0(%esp) 7524 leal OFF_FP_SHADOWFRAME(rFP), %eax 7525 movl %eax, OUT_ARG1(%esp) 7526 movl rPC, OUT_ARG2(%esp) 7527 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7528 REFRESH_IBASE 7529 jmp .L_op_nop+(48*128) 7530 7531 /* ------------------------------ */ 7532 .balign 128 7533 .L_ALT_op_cmp_long: /* 0x31 */ 7534 /* File: x86/alt_stub.S */ 7535 /* 7536 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7537 * any interesting requests and then jump to the real instruction 7538 * handler. Unlike the Arm handler, we can't do this as a tail call 7539 * because rIBASE is caller save and we need to reload it. 7540 * 7541 * Note that unlike in the Arm implementation, we should never arrive 7542 * here with a zero breakFlag because we always refresh rIBASE on 7543 * return. 7544 */ 7545 .extern MterpCheckBefore 7546 movl rSELF, %ecx 7547 movl %ecx, OUT_ARG0(%esp) 7548 leal OFF_FP_SHADOWFRAME(rFP), %eax 7549 movl %eax, OUT_ARG1(%esp) 7550 movl rPC, OUT_ARG2(%esp) 7551 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7552 REFRESH_IBASE 7553 jmp .L_op_nop+(49*128) 7554 7555 /* ------------------------------ */ 7556 .balign 128 7557 .L_ALT_op_if_eq: /* 0x32 */ 7558 /* File: x86/alt_stub.S */ 7559 /* 7560 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7561 * any interesting requests and then jump to the real instruction 7562 * handler. Unlike the Arm handler, we can't do this as a tail call 7563 * because rIBASE is caller save and we need to reload it. 7564 * 7565 * Note that unlike in the Arm implementation, we should never arrive 7566 * here with a zero breakFlag because we always refresh rIBASE on 7567 * return. 7568 */ 7569 .extern MterpCheckBefore 7570 movl rSELF, %ecx 7571 movl %ecx, OUT_ARG0(%esp) 7572 leal OFF_FP_SHADOWFRAME(rFP), %eax 7573 movl %eax, OUT_ARG1(%esp) 7574 movl rPC, OUT_ARG2(%esp) 7575 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7576 REFRESH_IBASE 7577 jmp .L_op_nop+(50*128) 7578 7579 /* ------------------------------ */ 7580 .balign 128 7581 .L_ALT_op_if_ne: /* 0x33 */ 7582 /* File: x86/alt_stub.S */ 7583 /* 7584 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7585 * any interesting requests and then jump to the real instruction 7586 * handler. Unlike the Arm handler, we can't do this as a tail call 7587 * because rIBASE is caller save and we need to reload it. 7588 * 7589 * Note that unlike in the Arm implementation, we should never arrive 7590 * here with a zero breakFlag because we always refresh rIBASE on 7591 * return. 7592 */ 7593 .extern MterpCheckBefore 7594 movl rSELF, %ecx 7595 movl %ecx, OUT_ARG0(%esp) 7596 leal OFF_FP_SHADOWFRAME(rFP), %eax 7597 movl %eax, OUT_ARG1(%esp) 7598 movl rPC, OUT_ARG2(%esp) 7599 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7600 REFRESH_IBASE 7601 jmp .L_op_nop+(51*128) 7602 7603 /* ------------------------------ */ 7604 .balign 128 7605 .L_ALT_op_if_lt: /* 0x34 */ 7606 /* File: x86/alt_stub.S */ 7607 /* 7608 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7609 * any interesting requests and then jump to the real instruction 7610 * handler. Unlike the Arm handler, we can't do this as a tail call 7611 * because rIBASE is caller save and we need to reload it. 7612 * 7613 * Note that unlike in the Arm implementation, we should never arrive 7614 * here with a zero breakFlag because we always refresh rIBASE on 7615 * return. 7616 */ 7617 .extern MterpCheckBefore 7618 movl rSELF, %ecx 7619 movl %ecx, OUT_ARG0(%esp) 7620 leal OFF_FP_SHADOWFRAME(rFP), %eax 7621 movl %eax, OUT_ARG1(%esp) 7622 movl rPC, OUT_ARG2(%esp) 7623 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7624 REFRESH_IBASE 7625 jmp .L_op_nop+(52*128) 7626 7627 /* ------------------------------ */ 7628 .balign 128 7629 .L_ALT_op_if_ge: /* 0x35 */ 7630 /* File: x86/alt_stub.S */ 7631 /* 7632 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7633 * any interesting requests and then jump to the real instruction 7634 * handler. Unlike the Arm handler, we can't do this as a tail call 7635 * because rIBASE is caller save and we need to reload it. 7636 * 7637 * Note that unlike in the Arm implementation, we should never arrive 7638 * here with a zero breakFlag because we always refresh rIBASE on 7639 * return. 7640 */ 7641 .extern MterpCheckBefore 7642 movl rSELF, %ecx 7643 movl %ecx, OUT_ARG0(%esp) 7644 leal OFF_FP_SHADOWFRAME(rFP), %eax 7645 movl %eax, OUT_ARG1(%esp) 7646 movl rPC, OUT_ARG2(%esp) 7647 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7648 REFRESH_IBASE 7649 jmp .L_op_nop+(53*128) 7650 7651 /* ------------------------------ */ 7652 .balign 128 7653 .L_ALT_op_if_gt: /* 0x36 */ 7654 /* File: x86/alt_stub.S */ 7655 /* 7656 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7657 * any interesting requests and then jump to the real instruction 7658 * handler. Unlike the Arm handler, we can't do this as a tail call 7659 * because rIBASE is caller save and we need to reload it. 7660 * 7661 * Note that unlike in the Arm implementation, we should never arrive 7662 * here with a zero breakFlag because we always refresh rIBASE on 7663 * return. 7664 */ 7665 .extern MterpCheckBefore 7666 movl rSELF, %ecx 7667 movl %ecx, OUT_ARG0(%esp) 7668 leal OFF_FP_SHADOWFRAME(rFP), %eax 7669 movl %eax, OUT_ARG1(%esp) 7670 movl rPC, OUT_ARG2(%esp) 7671 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7672 REFRESH_IBASE 7673 jmp .L_op_nop+(54*128) 7674 7675 /* ------------------------------ */ 7676 .balign 128 7677 .L_ALT_op_if_le: /* 0x37 */ 7678 /* File: x86/alt_stub.S */ 7679 /* 7680 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7681 * any interesting requests and then jump to the real instruction 7682 * handler. Unlike the Arm handler, we can't do this as a tail call 7683 * because rIBASE is caller save and we need to reload it. 7684 * 7685 * Note that unlike in the Arm implementation, we should never arrive 7686 * here with a zero breakFlag because we always refresh rIBASE on 7687 * return. 7688 */ 7689 .extern MterpCheckBefore 7690 movl rSELF, %ecx 7691 movl %ecx, OUT_ARG0(%esp) 7692 leal OFF_FP_SHADOWFRAME(rFP), %eax 7693 movl %eax, OUT_ARG1(%esp) 7694 movl rPC, OUT_ARG2(%esp) 7695 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7696 REFRESH_IBASE 7697 jmp .L_op_nop+(55*128) 7698 7699 /* ------------------------------ */ 7700 .balign 128 7701 .L_ALT_op_if_eqz: /* 0x38 */ 7702 /* File: x86/alt_stub.S */ 7703 /* 7704 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7705 * any interesting requests and then jump to the real instruction 7706 * handler. Unlike the Arm handler, we can't do this as a tail call 7707 * because rIBASE is caller save and we need to reload it. 7708 * 7709 * Note that unlike in the Arm implementation, we should never arrive 7710 * here with a zero breakFlag because we always refresh rIBASE on 7711 * return. 7712 */ 7713 .extern MterpCheckBefore 7714 movl rSELF, %ecx 7715 movl %ecx, OUT_ARG0(%esp) 7716 leal OFF_FP_SHADOWFRAME(rFP), %eax 7717 movl %eax, OUT_ARG1(%esp) 7718 movl rPC, OUT_ARG2(%esp) 7719 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7720 REFRESH_IBASE 7721 jmp .L_op_nop+(56*128) 7722 7723 /* ------------------------------ */ 7724 .balign 128 7725 .L_ALT_op_if_nez: /* 0x39 */ 7726 /* File: x86/alt_stub.S */ 7727 /* 7728 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7729 * any interesting requests and then jump to the real instruction 7730 * handler. Unlike the Arm handler, we can't do this as a tail call 7731 * because rIBASE is caller save and we need to reload it. 7732 * 7733 * Note that unlike in the Arm implementation, we should never arrive 7734 * here with a zero breakFlag because we always refresh rIBASE on 7735 * return. 7736 */ 7737 .extern MterpCheckBefore 7738 movl rSELF, %ecx 7739 movl %ecx, OUT_ARG0(%esp) 7740 leal OFF_FP_SHADOWFRAME(rFP), %eax 7741 movl %eax, OUT_ARG1(%esp) 7742 movl rPC, OUT_ARG2(%esp) 7743 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7744 REFRESH_IBASE 7745 jmp .L_op_nop+(57*128) 7746 7747 /* ------------------------------ */ 7748 .balign 128 7749 .L_ALT_op_if_ltz: /* 0x3a */ 7750 /* File: x86/alt_stub.S */ 7751 /* 7752 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7753 * any interesting requests and then jump to the real instruction 7754 * handler. Unlike the Arm handler, we can't do this as a tail call 7755 * because rIBASE is caller save and we need to reload it. 7756 * 7757 * Note that unlike in the Arm implementation, we should never arrive 7758 * here with a zero breakFlag because we always refresh rIBASE on 7759 * return. 7760 */ 7761 .extern MterpCheckBefore 7762 movl rSELF, %ecx 7763 movl %ecx, OUT_ARG0(%esp) 7764 leal OFF_FP_SHADOWFRAME(rFP), %eax 7765 movl %eax, OUT_ARG1(%esp) 7766 movl rPC, OUT_ARG2(%esp) 7767 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7768 REFRESH_IBASE 7769 jmp .L_op_nop+(58*128) 7770 7771 /* ------------------------------ */ 7772 .balign 128 7773 .L_ALT_op_if_gez: /* 0x3b */ 7774 /* File: x86/alt_stub.S */ 7775 /* 7776 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7777 * any interesting requests and then jump to the real instruction 7778 * handler. Unlike the Arm handler, we can't do this as a tail call 7779 * because rIBASE is caller save and we need to reload it. 7780 * 7781 * Note that unlike in the Arm implementation, we should never arrive 7782 * here with a zero breakFlag because we always refresh rIBASE on 7783 * return. 7784 */ 7785 .extern MterpCheckBefore 7786 movl rSELF, %ecx 7787 movl %ecx, OUT_ARG0(%esp) 7788 leal OFF_FP_SHADOWFRAME(rFP), %eax 7789 movl %eax, OUT_ARG1(%esp) 7790 movl rPC, OUT_ARG2(%esp) 7791 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7792 REFRESH_IBASE 7793 jmp .L_op_nop+(59*128) 7794 7795 /* ------------------------------ */ 7796 .balign 128 7797 .L_ALT_op_if_gtz: /* 0x3c */ 7798 /* File: x86/alt_stub.S */ 7799 /* 7800 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7801 * any interesting requests and then jump to the real instruction 7802 * handler. Unlike the Arm handler, we can't do this as a tail call 7803 * because rIBASE is caller save and we need to reload it. 7804 * 7805 * Note that unlike in the Arm implementation, we should never arrive 7806 * here with a zero breakFlag because we always refresh rIBASE on 7807 * return. 7808 */ 7809 .extern MterpCheckBefore 7810 movl rSELF, %ecx 7811 movl %ecx, OUT_ARG0(%esp) 7812 leal OFF_FP_SHADOWFRAME(rFP), %eax 7813 movl %eax, OUT_ARG1(%esp) 7814 movl rPC, OUT_ARG2(%esp) 7815 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7816 REFRESH_IBASE 7817 jmp .L_op_nop+(60*128) 7818 7819 /* ------------------------------ */ 7820 .balign 128 7821 .L_ALT_op_if_lez: /* 0x3d */ 7822 /* File: x86/alt_stub.S */ 7823 /* 7824 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7825 * any interesting requests and then jump to the real instruction 7826 * handler. Unlike the Arm handler, we can't do this as a tail call 7827 * because rIBASE is caller save and we need to reload it. 7828 * 7829 * Note that unlike in the Arm implementation, we should never arrive 7830 * here with a zero breakFlag because we always refresh rIBASE on 7831 * return. 7832 */ 7833 .extern MterpCheckBefore 7834 movl rSELF, %ecx 7835 movl %ecx, OUT_ARG0(%esp) 7836 leal OFF_FP_SHADOWFRAME(rFP), %eax 7837 movl %eax, OUT_ARG1(%esp) 7838 movl rPC, OUT_ARG2(%esp) 7839 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7840 REFRESH_IBASE 7841 jmp .L_op_nop+(61*128) 7842 7843 /* ------------------------------ */ 7844 .balign 128 7845 .L_ALT_op_unused_3e: /* 0x3e */ 7846 /* File: x86/alt_stub.S */ 7847 /* 7848 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7849 * any interesting requests and then jump to the real instruction 7850 * handler. Unlike the Arm handler, we can't do this as a tail call 7851 * because rIBASE is caller save and we need to reload it. 7852 * 7853 * Note that unlike in the Arm implementation, we should never arrive 7854 * here with a zero breakFlag because we always refresh rIBASE on 7855 * return. 7856 */ 7857 .extern MterpCheckBefore 7858 movl rSELF, %ecx 7859 movl %ecx, OUT_ARG0(%esp) 7860 leal OFF_FP_SHADOWFRAME(rFP), %eax 7861 movl %eax, OUT_ARG1(%esp) 7862 movl rPC, OUT_ARG2(%esp) 7863 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7864 REFRESH_IBASE 7865 jmp .L_op_nop+(62*128) 7866 7867 /* ------------------------------ */ 7868 .balign 128 7869 .L_ALT_op_unused_3f: /* 0x3f */ 7870 /* File: x86/alt_stub.S */ 7871 /* 7872 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7873 * any interesting requests and then jump to the real instruction 7874 * handler. Unlike the Arm handler, we can't do this as a tail call 7875 * because rIBASE is caller save and we need to reload it. 7876 * 7877 * Note that unlike in the Arm implementation, we should never arrive 7878 * here with a zero breakFlag because we always refresh rIBASE on 7879 * return. 7880 */ 7881 .extern MterpCheckBefore 7882 movl rSELF, %ecx 7883 movl %ecx, OUT_ARG0(%esp) 7884 leal OFF_FP_SHADOWFRAME(rFP), %eax 7885 movl %eax, OUT_ARG1(%esp) 7886 movl rPC, OUT_ARG2(%esp) 7887 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7888 REFRESH_IBASE 7889 jmp .L_op_nop+(63*128) 7890 7891 /* ------------------------------ */ 7892 .balign 128 7893 .L_ALT_op_unused_40: /* 0x40 */ 7894 /* File: x86/alt_stub.S */ 7895 /* 7896 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7897 * any interesting requests and then jump to the real instruction 7898 * handler. Unlike the Arm handler, we can't do this as a tail call 7899 * because rIBASE is caller save and we need to reload it. 7900 * 7901 * Note that unlike in the Arm implementation, we should never arrive 7902 * here with a zero breakFlag because we always refresh rIBASE on 7903 * return. 7904 */ 7905 .extern MterpCheckBefore 7906 movl rSELF, %ecx 7907 movl %ecx, OUT_ARG0(%esp) 7908 leal OFF_FP_SHADOWFRAME(rFP), %eax 7909 movl %eax, OUT_ARG1(%esp) 7910 movl rPC, OUT_ARG2(%esp) 7911 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7912 REFRESH_IBASE 7913 jmp .L_op_nop+(64*128) 7914 7915 /* ------------------------------ */ 7916 .balign 128 7917 .L_ALT_op_unused_41: /* 0x41 */ 7918 /* File: x86/alt_stub.S */ 7919 /* 7920 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7921 * any interesting requests and then jump to the real instruction 7922 * handler. Unlike the Arm handler, we can't do this as a tail call 7923 * because rIBASE is caller save and we need to reload it. 7924 * 7925 * Note that unlike in the Arm implementation, we should never arrive 7926 * here with a zero breakFlag because we always refresh rIBASE on 7927 * return. 7928 */ 7929 .extern MterpCheckBefore 7930 movl rSELF, %ecx 7931 movl %ecx, OUT_ARG0(%esp) 7932 leal OFF_FP_SHADOWFRAME(rFP), %eax 7933 movl %eax, OUT_ARG1(%esp) 7934 movl rPC, OUT_ARG2(%esp) 7935 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7936 REFRESH_IBASE 7937 jmp .L_op_nop+(65*128) 7938 7939 /* ------------------------------ */ 7940 .balign 128 7941 .L_ALT_op_unused_42: /* 0x42 */ 7942 /* File: x86/alt_stub.S */ 7943 /* 7944 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7945 * any interesting requests and then jump to the real instruction 7946 * handler. Unlike the Arm handler, we can't do this as a tail call 7947 * because rIBASE is caller save and we need to reload it. 7948 * 7949 * Note that unlike in the Arm implementation, we should never arrive 7950 * here with a zero breakFlag because we always refresh rIBASE on 7951 * return. 7952 */ 7953 .extern MterpCheckBefore 7954 movl rSELF, %ecx 7955 movl %ecx, OUT_ARG0(%esp) 7956 leal OFF_FP_SHADOWFRAME(rFP), %eax 7957 movl %eax, OUT_ARG1(%esp) 7958 movl rPC, OUT_ARG2(%esp) 7959 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7960 REFRESH_IBASE 7961 jmp .L_op_nop+(66*128) 7962 7963 /* ------------------------------ */ 7964 .balign 128 7965 .L_ALT_op_unused_43: /* 0x43 */ 7966 /* File: x86/alt_stub.S */ 7967 /* 7968 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7969 * any interesting requests and then jump to the real instruction 7970 * handler. Unlike the Arm handler, we can't do this as a tail call 7971 * because rIBASE is caller save and we need to reload it. 7972 * 7973 * Note that unlike in the Arm implementation, we should never arrive 7974 * here with a zero breakFlag because we always refresh rIBASE on 7975 * return. 7976 */ 7977 .extern MterpCheckBefore 7978 movl rSELF, %ecx 7979 movl %ecx, OUT_ARG0(%esp) 7980 leal OFF_FP_SHADOWFRAME(rFP), %eax 7981 movl %eax, OUT_ARG1(%esp) 7982 movl rPC, OUT_ARG2(%esp) 7983 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7984 REFRESH_IBASE 7985 jmp .L_op_nop+(67*128) 7986 7987 /* ------------------------------ */ 7988 .balign 128 7989 .L_ALT_op_aget: /* 0x44 */ 7990 /* File: x86/alt_stub.S */ 7991 /* 7992 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7993 * any interesting requests and then jump to the real instruction 7994 * handler. Unlike the Arm handler, we can't do this as a tail call 7995 * because rIBASE is caller save and we need to reload it. 7996 * 7997 * Note that unlike in the Arm implementation, we should never arrive 7998 * here with a zero breakFlag because we always refresh rIBASE on 7999 * return. 8000 */ 8001 .extern MterpCheckBefore 8002 movl rSELF, %ecx 8003 movl %ecx, OUT_ARG0(%esp) 8004 leal OFF_FP_SHADOWFRAME(rFP), %eax 8005 movl %eax, OUT_ARG1(%esp) 8006 movl rPC, OUT_ARG2(%esp) 8007 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8008 REFRESH_IBASE 8009 jmp .L_op_nop+(68*128) 8010 8011 /* ------------------------------ */ 8012 .balign 128 8013 .L_ALT_op_aget_wide: /* 0x45 */ 8014 /* File: x86/alt_stub.S */ 8015 /* 8016 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8017 * any interesting requests and then jump to the real instruction 8018 * handler. Unlike the Arm handler, we can't do this as a tail call 8019 * because rIBASE is caller save and we need to reload it. 8020 * 8021 * Note that unlike in the Arm implementation, we should never arrive 8022 * here with a zero breakFlag because we always refresh rIBASE on 8023 * return. 8024 */ 8025 .extern MterpCheckBefore 8026 movl rSELF, %ecx 8027 movl %ecx, OUT_ARG0(%esp) 8028 leal OFF_FP_SHADOWFRAME(rFP), %eax 8029 movl %eax, OUT_ARG1(%esp) 8030 movl rPC, OUT_ARG2(%esp) 8031 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8032 REFRESH_IBASE 8033 jmp .L_op_nop+(69*128) 8034 8035 /* ------------------------------ */ 8036 .balign 128 8037 .L_ALT_op_aget_object: /* 0x46 */ 8038 /* File: x86/alt_stub.S */ 8039 /* 8040 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8041 * any interesting requests and then jump to the real instruction 8042 * handler. Unlike the Arm handler, we can't do this as a tail call 8043 * because rIBASE is caller save and we need to reload it. 8044 * 8045 * Note that unlike in the Arm implementation, we should never arrive 8046 * here with a zero breakFlag because we always refresh rIBASE on 8047 * return. 8048 */ 8049 .extern MterpCheckBefore 8050 movl rSELF, %ecx 8051 movl %ecx, OUT_ARG0(%esp) 8052 leal OFF_FP_SHADOWFRAME(rFP), %eax 8053 movl %eax, OUT_ARG1(%esp) 8054 movl rPC, OUT_ARG2(%esp) 8055 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8056 REFRESH_IBASE 8057 jmp .L_op_nop+(70*128) 8058 8059 /* ------------------------------ */ 8060 .balign 128 8061 .L_ALT_op_aget_boolean: /* 0x47 */ 8062 /* File: x86/alt_stub.S */ 8063 /* 8064 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8065 * any interesting requests and then jump to the real instruction 8066 * handler. Unlike the Arm handler, we can't do this as a tail call 8067 * because rIBASE is caller save and we need to reload it. 8068 * 8069 * Note that unlike in the Arm implementation, we should never arrive 8070 * here with a zero breakFlag because we always refresh rIBASE on 8071 * return. 8072 */ 8073 .extern MterpCheckBefore 8074 movl rSELF, %ecx 8075 movl %ecx, OUT_ARG0(%esp) 8076 leal OFF_FP_SHADOWFRAME(rFP), %eax 8077 movl %eax, OUT_ARG1(%esp) 8078 movl rPC, OUT_ARG2(%esp) 8079 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8080 REFRESH_IBASE 8081 jmp .L_op_nop+(71*128) 8082 8083 /* ------------------------------ */ 8084 .balign 128 8085 .L_ALT_op_aget_byte: /* 0x48 */ 8086 /* File: x86/alt_stub.S */ 8087 /* 8088 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8089 * any interesting requests and then jump to the real instruction 8090 * handler. Unlike the Arm handler, we can't do this as a tail call 8091 * because rIBASE is caller save and we need to reload it. 8092 * 8093 * Note that unlike in the Arm implementation, we should never arrive 8094 * here with a zero breakFlag because we always refresh rIBASE on 8095 * return. 8096 */ 8097 .extern MterpCheckBefore 8098 movl rSELF, %ecx 8099 movl %ecx, OUT_ARG0(%esp) 8100 leal OFF_FP_SHADOWFRAME(rFP), %eax 8101 movl %eax, OUT_ARG1(%esp) 8102 movl rPC, OUT_ARG2(%esp) 8103 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8104 REFRESH_IBASE 8105 jmp .L_op_nop+(72*128) 8106 8107 /* ------------------------------ */ 8108 .balign 128 8109 .L_ALT_op_aget_char: /* 0x49 */ 8110 /* File: x86/alt_stub.S */ 8111 /* 8112 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8113 * any interesting requests and then jump to the real instruction 8114 * handler. Unlike the Arm handler, we can't do this as a tail call 8115 * because rIBASE is caller save and we need to reload it. 8116 * 8117 * Note that unlike in the Arm implementation, we should never arrive 8118 * here with a zero breakFlag because we always refresh rIBASE on 8119 * return. 8120 */ 8121 .extern MterpCheckBefore 8122 movl rSELF, %ecx 8123 movl %ecx, OUT_ARG0(%esp) 8124 leal OFF_FP_SHADOWFRAME(rFP), %eax 8125 movl %eax, OUT_ARG1(%esp) 8126 movl rPC, OUT_ARG2(%esp) 8127 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8128 REFRESH_IBASE 8129 jmp .L_op_nop+(73*128) 8130 8131 /* ------------------------------ */ 8132 .balign 128 8133 .L_ALT_op_aget_short: /* 0x4a */ 8134 /* File: x86/alt_stub.S */ 8135 /* 8136 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8137 * any interesting requests and then jump to the real instruction 8138 * handler. Unlike the Arm handler, we can't do this as a tail call 8139 * because rIBASE is caller save and we need to reload it. 8140 * 8141 * Note that unlike in the Arm implementation, we should never arrive 8142 * here with a zero breakFlag because we always refresh rIBASE on 8143 * return. 8144 */ 8145 .extern MterpCheckBefore 8146 movl rSELF, %ecx 8147 movl %ecx, OUT_ARG0(%esp) 8148 leal OFF_FP_SHADOWFRAME(rFP), %eax 8149 movl %eax, OUT_ARG1(%esp) 8150 movl rPC, OUT_ARG2(%esp) 8151 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8152 REFRESH_IBASE 8153 jmp .L_op_nop+(74*128) 8154 8155 /* ------------------------------ */ 8156 .balign 128 8157 .L_ALT_op_aput: /* 0x4b */ 8158 /* File: x86/alt_stub.S */ 8159 /* 8160 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8161 * any interesting requests and then jump to the real instruction 8162 * handler. Unlike the Arm handler, we can't do this as a tail call 8163 * because rIBASE is caller save and we need to reload it. 8164 * 8165 * Note that unlike in the Arm implementation, we should never arrive 8166 * here with a zero breakFlag because we always refresh rIBASE on 8167 * return. 8168 */ 8169 .extern MterpCheckBefore 8170 movl rSELF, %ecx 8171 movl %ecx, OUT_ARG0(%esp) 8172 leal OFF_FP_SHADOWFRAME(rFP), %eax 8173 movl %eax, OUT_ARG1(%esp) 8174 movl rPC, OUT_ARG2(%esp) 8175 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8176 REFRESH_IBASE 8177 jmp .L_op_nop+(75*128) 8178 8179 /* ------------------------------ */ 8180 .balign 128 8181 .L_ALT_op_aput_wide: /* 0x4c */ 8182 /* File: x86/alt_stub.S */ 8183 /* 8184 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8185 * any interesting requests and then jump to the real instruction 8186 * handler. Unlike the Arm handler, we can't do this as a tail call 8187 * because rIBASE is caller save and we need to reload it. 8188 * 8189 * Note that unlike in the Arm implementation, we should never arrive 8190 * here with a zero breakFlag because we always refresh rIBASE on 8191 * return. 8192 */ 8193 .extern MterpCheckBefore 8194 movl rSELF, %ecx 8195 movl %ecx, OUT_ARG0(%esp) 8196 leal OFF_FP_SHADOWFRAME(rFP), %eax 8197 movl %eax, OUT_ARG1(%esp) 8198 movl rPC, OUT_ARG2(%esp) 8199 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8200 REFRESH_IBASE 8201 jmp .L_op_nop+(76*128) 8202 8203 /* ------------------------------ */ 8204 .balign 128 8205 .L_ALT_op_aput_object: /* 0x4d */ 8206 /* File: x86/alt_stub.S */ 8207 /* 8208 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8209 * any interesting requests and then jump to the real instruction 8210 * handler. Unlike the Arm handler, we can't do this as a tail call 8211 * because rIBASE is caller save and we need to reload it. 8212 * 8213 * Note that unlike in the Arm implementation, we should never arrive 8214 * here with a zero breakFlag because we always refresh rIBASE on 8215 * return. 8216 */ 8217 .extern MterpCheckBefore 8218 movl rSELF, %ecx 8219 movl %ecx, OUT_ARG0(%esp) 8220 leal OFF_FP_SHADOWFRAME(rFP), %eax 8221 movl %eax, OUT_ARG1(%esp) 8222 movl rPC, OUT_ARG2(%esp) 8223 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8224 REFRESH_IBASE 8225 jmp .L_op_nop+(77*128) 8226 8227 /* ------------------------------ */ 8228 .balign 128 8229 .L_ALT_op_aput_boolean: /* 0x4e */ 8230 /* File: x86/alt_stub.S */ 8231 /* 8232 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8233 * any interesting requests and then jump to the real instruction 8234 * handler. Unlike the Arm handler, we can't do this as a tail call 8235 * because rIBASE is caller save and we need to reload it. 8236 * 8237 * Note that unlike in the Arm implementation, we should never arrive 8238 * here with a zero breakFlag because we always refresh rIBASE on 8239 * return. 8240 */ 8241 .extern MterpCheckBefore 8242 movl rSELF, %ecx 8243 movl %ecx, OUT_ARG0(%esp) 8244 leal OFF_FP_SHADOWFRAME(rFP), %eax 8245 movl %eax, OUT_ARG1(%esp) 8246 movl rPC, OUT_ARG2(%esp) 8247 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8248 REFRESH_IBASE 8249 jmp .L_op_nop+(78*128) 8250 8251 /* ------------------------------ */ 8252 .balign 128 8253 .L_ALT_op_aput_byte: /* 0x4f */ 8254 /* File: x86/alt_stub.S */ 8255 /* 8256 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8257 * any interesting requests and then jump to the real instruction 8258 * handler. Unlike the Arm handler, we can't do this as a tail call 8259 * because rIBASE is caller save and we need to reload it. 8260 * 8261 * Note that unlike in the Arm implementation, we should never arrive 8262 * here with a zero breakFlag because we always refresh rIBASE on 8263 * return. 8264 */ 8265 .extern MterpCheckBefore 8266 movl rSELF, %ecx 8267 movl %ecx, OUT_ARG0(%esp) 8268 leal OFF_FP_SHADOWFRAME(rFP), %eax 8269 movl %eax, OUT_ARG1(%esp) 8270 movl rPC, OUT_ARG2(%esp) 8271 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8272 REFRESH_IBASE 8273 jmp .L_op_nop+(79*128) 8274 8275 /* ------------------------------ */ 8276 .balign 128 8277 .L_ALT_op_aput_char: /* 0x50 */ 8278 /* File: x86/alt_stub.S */ 8279 /* 8280 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8281 * any interesting requests and then jump to the real instruction 8282 * handler. Unlike the Arm handler, we can't do this as a tail call 8283 * because rIBASE is caller save and we need to reload it. 8284 * 8285 * Note that unlike in the Arm implementation, we should never arrive 8286 * here with a zero breakFlag because we always refresh rIBASE on 8287 * return. 8288 */ 8289 .extern MterpCheckBefore 8290 movl rSELF, %ecx 8291 movl %ecx, OUT_ARG0(%esp) 8292 leal OFF_FP_SHADOWFRAME(rFP), %eax 8293 movl %eax, OUT_ARG1(%esp) 8294 movl rPC, OUT_ARG2(%esp) 8295 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8296 REFRESH_IBASE 8297 jmp .L_op_nop+(80*128) 8298 8299 /* ------------------------------ */ 8300 .balign 128 8301 .L_ALT_op_aput_short: /* 0x51 */ 8302 /* File: x86/alt_stub.S */ 8303 /* 8304 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8305 * any interesting requests and then jump to the real instruction 8306 * handler. Unlike the Arm handler, we can't do this as a tail call 8307 * because rIBASE is caller save and we need to reload it. 8308 * 8309 * Note that unlike in the Arm implementation, we should never arrive 8310 * here with a zero breakFlag because we always refresh rIBASE on 8311 * return. 8312 */ 8313 .extern MterpCheckBefore 8314 movl rSELF, %ecx 8315 movl %ecx, OUT_ARG0(%esp) 8316 leal OFF_FP_SHADOWFRAME(rFP), %eax 8317 movl %eax, OUT_ARG1(%esp) 8318 movl rPC, OUT_ARG2(%esp) 8319 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8320 REFRESH_IBASE 8321 jmp .L_op_nop+(81*128) 8322 8323 /* ------------------------------ */ 8324 .balign 128 8325 .L_ALT_op_iget: /* 0x52 */ 8326 /* File: x86/alt_stub.S */ 8327 /* 8328 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8329 * any interesting requests and then jump to the real instruction 8330 * handler. Unlike the Arm handler, we can't do this as a tail call 8331 * because rIBASE is caller save and we need to reload it. 8332 * 8333 * Note that unlike in the Arm implementation, we should never arrive 8334 * here with a zero breakFlag because we always refresh rIBASE on 8335 * return. 8336 */ 8337 .extern MterpCheckBefore 8338 movl rSELF, %ecx 8339 movl %ecx, OUT_ARG0(%esp) 8340 leal OFF_FP_SHADOWFRAME(rFP), %eax 8341 movl %eax, OUT_ARG1(%esp) 8342 movl rPC, OUT_ARG2(%esp) 8343 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8344 REFRESH_IBASE 8345 jmp .L_op_nop+(82*128) 8346 8347 /* ------------------------------ */ 8348 .balign 128 8349 .L_ALT_op_iget_wide: /* 0x53 */ 8350 /* File: x86/alt_stub.S */ 8351 /* 8352 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8353 * any interesting requests and then jump to the real instruction 8354 * handler. Unlike the Arm handler, we can't do this as a tail call 8355 * because rIBASE is caller save and we need to reload it. 8356 * 8357 * Note that unlike in the Arm implementation, we should never arrive 8358 * here with a zero breakFlag because we always refresh rIBASE on 8359 * return. 8360 */ 8361 .extern MterpCheckBefore 8362 movl rSELF, %ecx 8363 movl %ecx, OUT_ARG0(%esp) 8364 leal OFF_FP_SHADOWFRAME(rFP), %eax 8365 movl %eax, OUT_ARG1(%esp) 8366 movl rPC, OUT_ARG2(%esp) 8367 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8368 REFRESH_IBASE 8369 jmp .L_op_nop+(83*128) 8370 8371 /* ------------------------------ */ 8372 .balign 128 8373 .L_ALT_op_iget_object: /* 0x54 */ 8374 /* File: x86/alt_stub.S */ 8375 /* 8376 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8377 * any interesting requests and then jump to the real instruction 8378 * handler. Unlike the Arm handler, we can't do this as a tail call 8379 * because rIBASE is caller save and we need to reload it. 8380 * 8381 * Note that unlike in the Arm implementation, we should never arrive 8382 * here with a zero breakFlag because we always refresh rIBASE on 8383 * return. 8384 */ 8385 .extern MterpCheckBefore 8386 movl rSELF, %ecx 8387 movl %ecx, OUT_ARG0(%esp) 8388 leal OFF_FP_SHADOWFRAME(rFP), %eax 8389 movl %eax, OUT_ARG1(%esp) 8390 movl rPC, OUT_ARG2(%esp) 8391 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8392 REFRESH_IBASE 8393 jmp .L_op_nop+(84*128) 8394 8395 /* ------------------------------ */ 8396 .balign 128 8397 .L_ALT_op_iget_boolean: /* 0x55 */ 8398 /* File: x86/alt_stub.S */ 8399 /* 8400 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8401 * any interesting requests and then jump to the real instruction 8402 * handler. Unlike the Arm handler, we can't do this as a tail call 8403 * because rIBASE is caller save and we need to reload it. 8404 * 8405 * Note that unlike in the Arm implementation, we should never arrive 8406 * here with a zero breakFlag because we always refresh rIBASE on 8407 * return. 8408 */ 8409 .extern MterpCheckBefore 8410 movl rSELF, %ecx 8411 movl %ecx, OUT_ARG0(%esp) 8412 leal OFF_FP_SHADOWFRAME(rFP), %eax 8413 movl %eax, OUT_ARG1(%esp) 8414 movl rPC, OUT_ARG2(%esp) 8415 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8416 REFRESH_IBASE 8417 jmp .L_op_nop+(85*128) 8418 8419 /* ------------------------------ */ 8420 .balign 128 8421 .L_ALT_op_iget_byte: /* 0x56 */ 8422 /* File: x86/alt_stub.S */ 8423 /* 8424 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8425 * any interesting requests and then jump to the real instruction 8426 * handler. Unlike the Arm handler, we can't do this as a tail call 8427 * because rIBASE is caller save and we need to reload it. 8428 * 8429 * Note that unlike in the Arm implementation, we should never arrive 8430 * here with a zero breakFlag because we always refresh rIBASE on 8431 * return. 8432 */ 8433 .extern MterpCheckBefore 8434 movl rSELF, %ecx 8435 movl %ecx, OUT_ARG0(%esp) 8436 leal OFF_FP_SHADOWFRAME(rFP), %eax 8437 movl %eax, OUT_ARG1(%esp) 8438 movl rPC, OUT_ARG2(%esp) 8439 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8440 REFRESH_IBASE 8441 jmp .L_op_nop+(86*128) 8442 8443 /* ------------------------------ */ 8444 .balign 128 8445 .L_ALT_op_iget_char: /* 0x57 */ 8446 /* File: x86/alt_stub.S */ 8447 /* 8448 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8449 * any interesting requests and then jump to the real instruction 8450 * handler. Unlike the Arm handler, we can't do this as a tail call 8451 * because rIBASE is caller save and we need to reload it. 8452 * 8453 * Note that unlike in the Arm implementation, we should never arrive 8454 * here with a zero breakFlag because we always refresh rIBASE on 8455 * return. 8456 */ 8457 .extern MterpCheckBefore 8458 movl rSELF, %ecx 8459 movl %ecx, OUT_ARG0(%esp) 8460 leal OFF_FP_SHADOWFRAME(rFP), %eax 8461 movl %eax, OUT_ARG1(%esp) 8462 movl rPC, OUT_ARG2(%esp) 8463 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8464 REFRESH_IBASE 8465 jmp .L_op_nop+(87*128) 8466 8467 /* ------------------------------ */ 8468 .balign 128 8469 .L_ALT_op_iget_short: /* 0x58 */ 8470 /* File: x86/alt_stub.S */ 8471 /* 8472 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8473 * any interesting requests and then jump to the real instruction 8474 * handler. Unlike the Arm handler, we can't do this as a tail call 8475 * because rIBASE is caller save and we need to reload it. 8476 * 8477 * Note that unlike in the Arm implementation, we should never arrive 8478 * here with a zero breakFlag because we always refresh rIBASE on 8479 * return. 8480 */ 8481 .extern MterpCheckBefore 8482 movl rSELF, %ecx 8483 movl %ecx, OUT_ARG0(%esp) 8484 leal OFF_FP_SHADOWFRAME(rFP), %eax 8485 movl %eax, OUT_ARG1(%esp) 8486 movl rPC, OUT_ARG2(%esp) 8487 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8488 REFRESH_IBASE 8489 jmp .L_op_nop+(88*128) 8490 8491 /* ------------------------------ */ 8492 .balign 128 8493 .L_ALT_op_iput: /* 0x59 */ 8494 /* File: x86/alt_stub.S */ 8495 /* 8496 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8497 * any interesting requests and then jump to the real instruction 8498 * handler. Unlike the Arm handler, we can't do this as a tail call 8499 * because rIBASE is caller save and we need to reload it. 8500 * 8501 * Note that unlike in the Arm implementation, we should never arrive 8502 * here with a zero breakFlag because we always refresh rIBASE on 8503 * return. 8504 */ 8505 .extern MterpCheckBefore 8506 movl rSELF, %ecx 8507 movl %ecx, OUT_ARG0(%esp) 8508 leal OFF_FP_SHADOWFRAME(rFP), %eax 8509 movl %eax, OUT_ARG1(%esp) 8510 movl rPC, OUT_ARG2(%esp) 8511 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8512 REFRESH_IBASE 8513 jmp .L_op_nop+(89*128) 8514 8515 /* ------------------------------ */ 8516 .balign 128 8517 .L_ALT_op_iput_wide: /* 0x5a */ 8518 /* File: x86/alt_stub.S */ 8519 /* 8520 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8521 * any interesting requests and then jump to the real instruction 8522 * handler. Unlike the Arm handler, we can't do this as a tail call 8523 * because rIBASE is caller save and we need to reload it. 8524 * 8525 * Note that unlike in the Arm implementation, we should never arrive 8526 * here with a zero breakFlag because we always refresh rIBASE on 8527 * return. 8528 */ 8529 .extern MterpCheckBefore 8530 movl rSELF, %ecx 8531 movl %ecx, OUT_ARG0(%esp) 8532 leal OFF_FP_SHADOWFRAME(rFP), %eax 8533 movl %eax, OUT_ARG1(%esp) 8534 movl rPC, OUT_ARG2(%esp) 8535 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8536 REFRESH_IBASE 8537 jmp .L_op_nop+(90*128) 8538 8539 /* ------------------------------ */ 8540 .balign 128 8541 .L_ALT_op_iput_object: /* 0x5b */ 8542 /* File: x86/alt_stub.S */ 8543 /* 8544 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8545 * any interesting requests and then jump to the real instruction 8546 * handler. Unlike the Arm handler, we can't do this as a tail call 8547 * because rIBASE is caller save and we need to reload it. 8548 * 8549 * Note that unlike in the Arm implementation, we should never arrive 8550 * here with a zero breakFlag because we always refresh rIBASE on 8551 * return. 8552 */ 8553 .extern MterpCheckBefore 8554 movl rSELF, %ecx 8555 movl %ecx, OUT_ARG0(%esp) 8556 leal OFF_FP_SHADOWFRAME(rFP), %eax 8557 movl %eax, OUT_ARG1(%esp) 8558 movl rPC, OUT_ARG2(%esp) 8559 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8560 REFRESH_IBASE 8561 jmp .L_op_nop+(91*128) 8562 8563 /* ------------------------------ */ 8564 .balign 128 8565 .L_ALT_op_iput_boolean: /* 0x5c */ 8566 /* File: x86/alt_stub.S */ 8567 /* 8568 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8569 * any interesting requests and then jump to the real instruction 8570 * handler. Unlike the Arm handler, we can't do this as a tail call 8571 * because rIBASE is caller save and we need to reload it. 8572 * 8573 * Note that unlike in the Arm implementation, we should never arrive 8574 * here with a zero breakFlag because we always refresh rIBASE on 8575 * return. 8576 */ 8577 .extern MterpCheckBefore 8578 movl rSELF, %ecx 8579 movl %ecx, OUT_ARG0(%esp) 8580 leal OFF_FP_SHADOWFRAME(rFP), %eax 8581 movl %eax, OUT_ARG1(%esp) 8582 movl rPC, OUT_ARG2(%esp) 8583 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8584 REFRESH_IBASE 8585 jmp .L_op_nop+(92*128) 8586 8587 /* ------------------------------ */ 8588 .balign 128 8589 .L_ALT_op_iput_byte: /* 0x5d */ 8590 /* File: x86/alt_stub.S */ 8591 /* 8592 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8593 * any interesting requests and then jump to the real instruction 8594 * handler. Unlike the Arm handler, we can't do this as a tail call 8595 * because rIBASE is caller save and we need to reload it. 8596 * 8597 * Note that unlike in the Arm implementation, we should never arrive 8598 * here with a zero breakFlag because we always refresh rIBASE on 8599 * return. 8600 */ 8601 .extern MterpCheckBefore 8602 movl rSELF, %ecx 8603 movl %ecx, OUT_ARG0(%esp) 8604 leal OFF_FP_SHADOWFRAME(rFP), %eax 8605 movl %eax, OUT_ARG1(%esp) 8606 movl rPC, OUT_ARG2(%esp) 8607 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8608 REFRESH_IBASE 8609 jmp .L_op_nop+(93*128) 8610 8611 /* ------------------------------ */ 8612 .balign 128 8613 .L_ALT_op_iput_char: /* 0x5e */ 8614 /* File: x86/alt_stub.S */ 8615 /* 8616 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8617 * any interesting requests and then jump to the real instruction 8618 * handler. Unlike the Arm handler, we can't do this as a tail call 8619 * because rIBASE is caller save and we need to reload it. 8620 * 8621 * Note that unlike in the Arm implementation, we should never arrive 8622 * here with a zero breakFlag because we always refresh rIBASE on 8623 * return. 8624 */ 8625 .extern MterpCheckBefore 8626 movl rSELF, %ecx 8627 movl %ecx, OUT_ARG0(%esp) 8628 leal OFF_FP_SHADOWFRAME(rFP), %eax 8629 movl %eax, OUT_ARG1(%esp) 8630 movl rPC, OUT_ARG2(%esp) 8631 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8632 REFRESH_IBASE 8633 jmp .L_op_nop+(94*128) 8634 8635 /* ------------------------------ */ 8636 .balign 128 8637 .L_ALT_op_iput_short: /* 0x5f */ 8638 /* File: x86/alt_stub.S */ 8639 /* 8640 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8641 * any interesting requests and then jump to the real instruction 8642 * handler. Unlike the Arm handler, we can't do this as a tail call 8643 * because rIBASE is caller save and we need to reload it. 8644 * 8645 * Note that unlike in the Arm implementation, we should never arrive 8646 * here with a zero breakFlag because we always refresh rIBASE on 8647 * return. 8648 */ 8649 .extern MterpCheckBefore 8650 movl rSELF, %ecx 8651 movl %ecx, OUT_ARG0(%esp) 8652 leal OFF_FP_SHADOWFRAME(rFP), %eax 8653 movl %eax, OUT_ARG1(%esp) 8654 movl rPC, OUT_ARG2(%esp) 8655 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8656 REFRESH_IBASE 8657 jmp .L_op_nop+(95*128) 8658 8659 /* ------------------------------ */ 8660 .balign 128 8661 .L_ALT_op_sget: /* 0x60 */ 8662 /* File: x86/alt_stub.S */ 8663 /* 8664 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8665 * any interesting requests and then jump to the real instruction 8666 * handler. Unlike the Arm handler, we can't do this as a tail call 8667 * because rIBASE is caller save and we need to reload it. 8668 * 8669 * Note that unlike in the Arm implementation, we should never arrive 8670 * here with a zero breakFlag because we always refresh rIBASE on 8671 * return. 8672 */ 8673 .extern MterpCheckBefore 8674 movl rSELF, %ecx 8675 movl %ecx, OUT_ARG0(%esp) 8676 leal OFF_FP_SHADOWFRAME(rFP), %eax 8677 movl %eax, OUT_ARG1(%esp) 8678 movl rPC, OUT_ARG2(%esp) 8679 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8680 REFRESH_IBASE 8681 jmp .L_op_nop+(96*128) 8682 8683 /* ------------------------------ */ 8684 .balign 128 8685 .L_ALT_op_sget_wide: /* 0x61 */ 8686 /* File: x86/alt_stub.S */ 8687 /* 8688 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8689 * any interesting requests and then jump to the real instruction 8690 * handler. Unlike the Arm handler, we can't do this as a tail call 8691 * because rIBASE is caller save and we need to reload it. 8692 * 8693 * Note that unlike in the Arm implementation, we should never arrive 8694 * here with a zero breakFlag because we always refresh rIBASE on 8695 * return. 8696 */ 8697 .extern MterpCheckBefore 8698 movl rSELF, %ecx 8699 movl %ecx, OUT_ARG0(%esp) 8700 leal OFF_FP_SHADOWFRAME(rFP), %eax 8701 movl %eax, OUT_ARG1(%esp) 8702 movl rPC, OUT_ARG2(%esp) 8703 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8704 REFRESH_IBASE 8705 jmp .L_op_nop+(97*128) 8706 8707 /* ------------------------------ */ 8708 .balign 128 8709 .L_ALT_op_sget_object: /* 0x62 */ 8710 /* File: x86/alt_stub.S */ 8711 /* 8712 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8713 * any interesting requests and then jump to the real instruction 8714 * handler. Unlike the Arm handler, we can't do this as a tail call 8715 * because rIBASE is caller save and we need to reload it. 8716 * 8717 * Note that unlike in the Arm implementation, we should never arrive 8718 * here with a zero breakFlag because we always refresh rIBASE on 8719 * return. 8720 */ 8721 .extern MterpCheckBefore 8722 movl rSELF, %ecx 8723 movl %ecx, OUT_ARG0(%esp) 8724 leal OFF_FP_SHADOWFRAME(rFP), %eax 8725 movl %eax, OUT_ARG1(%esp) 8726 movl rPC, OUT_ARG2(%esp) 8727 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8728 REFRESH_IBASE 8729 jmp .L_op_nop+(98*128) 8730 8731 /* ------------------------------ */ 8732 .balign 128 8733 .L_ALT_op_sget_boolean: /* 0x63 */ 8734 /* File: x86/alt_stub.S */ 8735 /* 8736 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8737 * any interesting requests and then jump to the real instruction 8738 * handler. Unlike the Arm handler, we can't do this as a tail call 8739 * because rIBASE is caller save and we need to reload it. 8740 * 8741 * Note that unlike in the Arm implementation, we should never arrive 8742 * here with a zero breakFlag because we always refresh rIBASE on 8743 * return. 8744 */ 8745 .extern MterpCheckBefore 8746 movl rSELF, %ecx 8747 movl %ecx, OUT_ARG0(%esp) 8748 leal OFF_FP_SHADOWFRAME(rFP), %eax 8749 movl %eax, OUT_ARG1(%esp) 8750 movl rPC, OUT_ARG2(%esp) 8751 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8752 REFRESH_IBASE 8753 jmp .L_op_nop+(99*128) 8754 8755 /* ------------------------------ */ 8756 .balign 128 8757 .L_ALT_op_sget_byte: /* 0x64 */ 8758 /* File: x86/alt_stub.S */ 8759 /* 8760 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8761 * any interesting requests and then jump to the real instruction 8762 * handler. Unlike the Arm handler, we can't do this as a tail call 8763 * because rIBASE is caller save and we need to reload it. 8764 * 8765 * Note that unlike in the Arm implementation, we should never arrive 8766 * here with a zero breakFlag because we always refresh rIBASE on 8767 * return. 8768 */ 8769 .extern MterpCheckBefore 8770 movl rSELF, %ecx 8771 movl %ecx, OUT_ARG0(%esp) 8772 leal OFF_FP_SHADOWFRAME(rFP), %eax 8773 movl %eax, OUT_ARG1(%esp) 8774 movl rPC, OUT_ARG2(%esp) 8775 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8776 REFRESH_IBASE 8777 jmp .L_op_nop+(100*128) 8778 8779 /* ------------------------------ */ 8780 .balign 128 8781 .L_ALT_op_sget_char: /* 0x65 */ 8782 /* File: x86/alt_stub.S */ 8783 /* 8784 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8785 * any interesting requests and then jump to the real instruction 8786 * handler. Unlike the Arm handler, we can't do this as a tail call 8787 * because rIBASE is caller save and we need to reload it. 8788 * 8789 * Note that unlike in the Arm implementation, we should never arrive 8790 * here with a zero breakFlag because we always refresh rIBASE on 8791 * return. 8792 */ 8793 .extern MterpCheckBefore 8794 movl rSELF, %ecx 8795 movl %ecx, OUT_ARG0(%esp) 8796 leal OFF_FP_SHADOWFRAME(rFP), %eax 8797 movl %eax, OUT_ARG1(%esp) 8798 movl rPC, OUT_ARG2(%esp) 8799 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8800 REFRESH_IBASE 8801 jmp .L_op_nop+(101*128) 8802 8803 /* ------------------------------ */ 8804 .balign 128 8805 .L_ALT_op_sget_short: /* 0x66 */ 8806 /* File: x86/alt_stub.S */ 8807 /* 8808 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8809 * any interesting requests and then jump to the real instruction 8810 * handler. Unlike the Arm handler, we can't do this as a tail call 8811 * because rIBASE is caller save and we need to reload it. 8812 * 8813 * Note that unlike in the Arm implementation, we should never arrive 8814 * here with a zero breakFlag because we always refresh rIBASE on 8815 * return. 8816 */ 8817 .extern MterpCheckBefore 8818 movl rSELF, %ecx 8819 movl %ecx, OUT_ARG0(%esp) 8820 leal OFF_FP_SHADOWFRAME(rFP), %eax 8821 movl %eax, OUT_ARG1(%esp) 8822 movl rPC, OUT_ARG2(%esp) 8823 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8824 REFRESH_IBASE 8825 jmp .L_op_nop+(102*128) 8826 8827 /* ------------------------------ */ 8828 .balign 128 8829 .L_ALT_op_sput: /* 0x67 */ 8830 /* File: x86/alt_stub.S */ 8831 /* 8832 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8833 * any interesting requests and then jump to the real instruction 8834 * handler. Unlike the Arm handler, we can't do this as a tail call 8835 * because rIBASE is caller save and we need to reload it. 8836 * 8837 * Note that unlike in the Arm implementation, we should never arrive 8838 * here with a zero breakFlag because we always refresh rIBASE on 8839 * return. 8840 */ 8841 .extern MterpCheckBefore 8842 movl rSELF, %ecx 8843 movl %ecx, OUT_ARG0(%esp) 8844 leal OFF_FP_SHADOWFRAME(rFP), %eax 8845 movl %eax, OUT_ARG1(%esp) 8846 movl rPC, OUT_ARG2(%esp) 8847 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8848 REFRESH_IBASE 8849 jmp .L_op_nop+(103*128) 8850 8851 /* ------------------------------ */ 8852 .balign 128 8853 .L_ALT_op_sput_wide: /* 0x68 */ 8854 /* File: x86/alt_stub.S */ 8855 /* 8856 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8857 * any interesting requests and then jump to the real instruction 8858 * handler. Unlike the Arm handler, we can't do this as a tail call 8859 * because rIBASE is caller save and we need to reload it. 8860 * 8861 * Note that unlike in the Arm implementation, we should never arrive 8862 * here with a zero breakFlag because we always refresh rIBASE on 8863 * return. 8864 */ 8865 .extern MterpCheckBefore 8866 movl rSELF, %ecx 8867 movl %ecx, OUT_ARG0(%esp) 8868 leal OFF_FP_SHADOWFRAME(rFP), %eax 8869 movl %eax, OUT_ARG1(%esp) 8870 movl rPC, OUT_ARG2(%esp) 8871 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8872 REFRESH_IBASE 8873 jmp .L_op_nop+(104*128) 8874 8875 /* ------------------------------ */ 8876 .balign 128 8877 .L_ALT_op_sput_object: /* 0x69 */ 8878 /* File: x86/alt_stub.S */ 8879 /* 8880 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8881 * any interesting requests and then jump to the real instruction 8882 * handler. Unlike the Arm handler, we can't do this as a tail call 8883 * because rIBASE is caller save and we need to reload it. 8884 * 8885 * Note that unlike in the Arm implementation, we should never arrive 8886 * here with a zero breakFlag because we always refresh rIBASE on 8887 * return. 8888 */ 8889 .extern MterpCheckBefore 8890 movl rSELF, %ecx 8891 movl %ecx, OUT_ARG0(%esp) 8892 leal OFF_FP_SHADOWFRAME(rFP), %eax 8893 movl %eax, OUT_ARG1(%esp) 8894 movl rPC, OUT_ARG2(%esp) 8895 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8896 REFRESH_IBASE 8897 jmp .L_op_nop+(105*128) 8898 8899 /* ------------------------------ */ 8900 .balign 128 8901 .L_ALT_op_sput_boolean: /* 0x6a */ 8902 /* File: x86/alt_stub.S */ 8903 /* 8904 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8905 * any interesting requests and then jump to the real instruction 8906 * handler. Unlike the Arm handler, we can't do this as a tail call 8907 * because rIBASE is caller save and we need to reload it. 8908 * 8909 * Note that unlike in the Arm implementation, we should never arrive 8910 * here with a zero breakFlag because we always refresh rIBASE on 8911 * return. 8912 */ 8913 .extern MterpCheckBefore 8914 movl rSELF, %ecx 8915 movl %ecx, OUT_ARG0(%esp) 8916 leal OFF_FP_SHADOWFRAME(rFP), %eax 8917 movl %eax, OUT_ARG1(%esp) 8918 movl rPC, OUT_ARG2(%esp) 8919 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8920 REFRESH_IBASE 8921 jmp .L_op_nop+(106*128) 8922 8923 /* ------------------------------ */ 8924 .balign 128 8925 .L_ALT_op_sput_byte: /* 0x6b */ 8926 /* File: x86/alt_stub.S */ 8927 /* 8928 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8929 * any interesting requests and then jump to the real instruction 8930 * handler. Unlike the Arm handler, we can't do this as a tail call 8931 * because rIBASE is caller save and we need to reload it. 8932 * 8933 * Note that unlike in the Arm implementation, we should never arrive 8934 * here with a zero breakFlag because we always refresh rIBASE on 8935 * return. 8936 */ 8937 .extern MterpCheckBefore 8938 movl rSELF, %ecx 8939 movl %ecx, OUT_ARG0(%esp) 8940 leal OFF_FP_SHADOWFRAME(rFP), %eax 8941 movl %eax, OUT_ARG1(%esp) 8942 movl rPC, OUT_ARG2(%esp) 8943 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8944 REFRESH_IBASE 8945 jmp .L_op_nop+(107*128) 8946 8947 /* ------------------------------ */ 8948 .balign 128 8949 .L_ALT_op_sput_char: /* 0x6c */ 8950 /* File: x86/alt_stub.S */ 8951 /* 8952 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8953 * any interesting requests and then jump to the real instruction 8954 * handler. Unlike the Arm handler, we can't do this as a tail call 8955 * because rIBASE is caller save and we need to reload it. 8956 * 8957 * Note that unlike in the Arm implementation, we should never arrive 8958 * here with a zero breakFlag because we always refresh rIBASE on 8959 * return. 8960 */ 8961 .extern MterpCheckBefore 8962 movl rSELF, %ecx 8963 movl %ecx, OUT_ARG0(%esp) 8964 leal OFF_FP_SHADOWFRAME(rFP), %eax 8965 movl %eax, OUT_ARG1(%esp) 8966 movl rPC, OUT_ARG2(%esp) 8967 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8968 REFRESH_IBASE 8969 jmp .L_op_nop+(108*128) 8970 8971 /* ------------------------------ */ 8972 .balign 128 8973 .L_ALT_op_sput_short: /* 0x6d */ 8974 /* File: x86/alt_stub.S */ 8975 /* 8976 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8977 * any interesting requests and then jump to the real instruction 8978 * handler. Unlike the Arm handler, we can't do this as a tail call 8979 * because rIBASE is caller save and we need to reload it. 8980 * 8981 * Note that unlike in the Arm implementation, we should never arrive 8982 * here with a zero breakFlag because we always refresh rIBASE on 8983 * return. 8984 */ 8985 .extern MterpCheckBefore 8986 movl rSELF, %ecx 8987 movl %ecx, OUT_ARG0(%esp) 8988 leal OFF_FP_SHADOWFRAME(rFP), %eax 8989 movl %eax, OUT_ARG1(%esp) 8990 movl rPC, OUT_ARG2(%esp) 8991 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8992 REFRESH_IBASE 8993 jmp .L_op_nop+(109*128) 8994 8995 /* ------------------------------ */ 8996 .balign 128 8997 .L_ALT_op_invoke_virtual: /* 0x6e */ 8998 /* File: x86/alt_stub.S */ 8999 /* 9000 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9001 * any interesting requests and then jump to the real instruction 9002 * handler. Unlike the Arm handler, we can't do this as a tail call 9003 * because rIBASE is caller save and we need to reload it. 9004 * 9005 * Note that unlike in the Arm implementation, we should never arrive 9006 * here with a zero breakFlag because we always refresh rIBASE on 9007 * return. 9008 */ 9009 .extern MterpCheckBefore 9010 movl rSELF, %ecx 9011 movl %ecx, OUT_ARG0(%esp) 9012 leal OFF_FP_SHADOWFRAME(rFP), %eax 9013 movl %eax, OUT_ARG1(%esp) 9014 movl rPC, OUT_ARG2(%esp) 9015 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9016 REFRESH_IBASE 9017 jmp .L_op_nop+(110*128) 9018 9019 /* ------------------------------ */ 9020 .balign 128 9021 .L_ALT_op_invoke_super: /* 0x6f */ 9022 /* File: x86/alt_stub.S */ 9023 /* 9024 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9025 * any interesting requests and then jump to the real instruction 9026 * handler. Unlike the Arm handler, we can't do this as a tail call 9027 * because rIBASE is caller save and we need to reload it. 9028 * 9029 * Note that unlike in the Arm implementation, we should never arrive 9030 * here with a zero breakFlag because we always refresh rIBASE on 9031 * return. 9032 */ 9033 .extern MterpCheckBefore 9034 movl rSELF, %ecx 9035 movl %ecx, OUT_ARG0(%esp) 9036 leal OFF_FP_SHADOWFRAME(rFP), %eax 9037 movl %eax, OUT_ARG1(%esp) 9038 movl rPC, OUT_ARG2(%esp) 9039 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9040 REFRESH_IBASE 9041 jmp .L_op_nop+(111*128) 9042 9043 /* ------------------------------ */ 9044 .balign 128 9045 .L_ALT_op_invoke_direct: /* 0x70 */ 9046 /* File: x86/alt_stub.S */ 9047 /* 9048 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9049 * any interesting requests and then jump to the real instruction 9050 * handler. Unlike the Arm handler, we can't do this as a tail call 9051 * because rIBASE is caller save and we need to reload it. 9052 * 9053 * Note that unlike in the Arm implementation, we should never arrive 9054 * here with a zero breakFlag because we always refresh rIBASE on 9055 * return. 9056 */ 9057 .extern MterpCheckBefore 9058 movl rSELF, %ecx 9059 movl %ecx, OUT_ARG0(%esp) 9060 leal OFF_FP_SHADOWFRAME(rFP), %eax 9061 movl %eax, OUT_ARG1(%esp) 9062 movl rPC, OUT_ARG2(%esp) 9063 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9064 REFRESH_IBASE 9065 jmp .L_op_nop+(112*128) 9066 9067 /* ------------------------------ */ 9068 .balign 128 9069 .L_ALT_op_invoke_static: /* 0x71 */ 9070 /* File: x86/alt_stub.S */ 9071 /* 9072 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9073 * any interesting requests and then jump to the real instruction 9074 * handler. Unlike the Arm handler, we can't do this as a tail call 9075 * because rIBASE is caller save and we need to reload it. 9076 * 9077 * Note that unlike in the Arm implementation, we should never arrive 9078 * here with a zero breakFlag because we always refresh rIBASE on 9079 * return. 9080 */ 9081 .extern MterpCheckBefore 9082 movl rSELF, %ecx 9083 movl %ecx, OUT_ARG0(%esp) 9084 leal OFF_FP_SHADOWFRAME(rFP), %eax 9085 movl %eax, OUT_ARG1(%esp) 9086 movl rPC, OUT_ARG2(%esp) 9087 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9088 REFRESH_IBASE 9089 jmp .L_op_nop+(113*128) 9090 9091 /* ------------------------------ */ 9092 .balign 128 9093 .L_ALT_op_invoke_interface: /* 0x72 */ 9094 /* File: x86/alt_stub.S */ 9095 /* 9096 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9097 * any interesting requests and then jump to the real instruction 9098 * handler. Unlike the Arm handler, we can't do this as a tail call 9099 * because rIBASE is caller save and we need to reload it. 9100 * 9101 * Note that unlike in the Arm implementation, we should never arrive 9102 * here with a zero breakFlag because we always refresh rIBASE on 9103 * return. 9104 */ 9105 .extern MterpCheckBefore 9106 movl rSELF, %ecx 9107 movl %ecx, OUT_ARG0(%esp) 9108 leal OFF_FP_SHADOWFRAME(rFP), %eax 9109 movl %eax, OUT_ARG1(%esp) 9110 movl rPC, OUT_ARG2(%esp) 9111 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9112 REFRESH_IBASE 9113 jmp .L_op_nop+(114*128) 9114 9115 /* ------------------------------ */ 9116 .balign 128 9117 .L_ALT_op_return_void_no_barrier: /* 0x73 */ 9118 /* File: x86/alt_stub.S */ 9119 /* 9120 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9121 * any interesting requests and then jump to the real instruction 9122 * handler. Unlike the Arm handler, we can't do this as a tail call 9123 * because rIBASE is caller save and we need to reload it. 9124 * 9125 * Note that unlike in the Arm implementation, we should never arrive 9126 * here with a zero breakFlag because we always refresh rIBASE on 9127 * return. 9128 */ 9129 .extern MterpCheckBefore 9130 movl rSELF, %ecx 9131 movl %ecx, OUT_ARG0(%esp) 9132 leal OFF_FP_SHADOWFRAME(rFP), %eax 9133 movl %eax, OUT_ARG1(%esp) 9134 movl rPC, OUT_ARG2(%esp) 9135 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9136 REFRESH_IBASE 9137 jmp .L_op_nop+(115*128) 9138 9139 /* ------------------------------ */ 9140 .balign 128 9141 .L_ALT_op_invoke_virtual_range: /* 0x74 */ 9142 /* File: x86/alt_stub.S */ 9143 /* 9144 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9145 * any interesting requests and then jump to the real instruction 9146 * handler. Unlike the Arm handler, we can't do this as a tail call 9147 * because rIBASE is caller save and we need to reload it. 9148 * 9149 * Note that unlike in the Arm implementation, we should never arrive 9150 * here with a zero breakFlag because we always refresh rIBASE on 9151 * return. 9152 */ 9153 .extern MterpCheckBefore 9154 movl rSELF, %ecx 9155 movl %ecx, OUT_ARG0(%esp) 9156 leal OFF_FP_SHADOWFRAME(rFP), %eax 9157 movl %eax, OUT_ARG1(%esp) 9158 movl rPC, OUT_ARG2(%esp) 9159 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9160 REFRESH_IBASE 9161 jmp .L_op_nop+(116*128) 9162 9163 /* ------------------------------ */ 9164 .balign 128 9165 .L_ALT_op_invoke_super_range: /* 0x75 */ 9166 /* File: x86/alt_stub.S */ 9167 /* 9168 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9169 * any interesting requests and then jump to the real instruction 9170 * handler. Unlike the Arm handler, we can't do this as a tail call 9171 * because rIBASE is caller save and we need to reload it. 9172 * 9173 * Note that unlike in the Arm implementation, we should never arrive 9174 * here with a zero breakFlag because we always refresh rIBASE on 9175 * return. 9176 */ 9177 .extern MterpCheckBefore 9178 movl rSELF, %ecx 9179 movl %ecx, OUT_ARG0(%esp) 9180 leal OFF_FP_SHADOWFRAME(rFP), %eax 9181 movl %eax, OUT_ARG1(%esp) 9182 movl rPC, OUT_ARG2(%esp) 9183 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9184 REFRESH_IBASE 9185 jmp .L_op_nop+(117*128) 9186 9187 /* ------------------------------ */ 9188 .balign 128 9189 .L_ALT_op_invoke_direct_range: /* 0x76 */ 9190 /* File: x86/alt_stub.S */ 9191 /* 9192 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9193 * any interesting requests and then jump to the real instruction 9194 * handler. Unlike the Arm handler, we can't do this as a tail call 9195 * because rIBASE is caller save and we need to reload it. 9196 * 9197 * Note that unlike in the Arm implementation, we should never arrive 9198 * here with a zero breakFlag because we always refresh rIBASE on 9199 * return. 9200 */ 9201 .extern MterpCheckBefore 9202 movl rSELF, %ecx 9203 movl %ecx, OUT_ARG0(%esp) 9204 leal OFF_FP_SHADOWFRAME(rFP), %eax 9205 movl %eax, OUT_ARG1(%esp) 9206 movl rPC, OUT_ARG2(%esp) 9207 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9208 REFRESH_IBASE 9209 jmp .L_op_nop+(118*128) 9210 9211 /* ------------------------------ */ 9212 .balign 128 9213 .L_ALT_op_invoke_static_range: /* 0x77 */ 9214 /* File: x86/alt_stub.S */ 9215 /* 9216 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9217 * any interesting requests and then jump to the real instruction 9218 * handler. Unlike the Arm handler, we can't do this as a tail call 9219 * because rIBASE is caller save and we need to reload it. 9220 * 9221 * Note that unlike in the Arm implementation, we should never arrive 9222 * here with a zero breakFlag because we always refresh rIBASE on 9223 * return. 9224 */ 9225 .extern MterpCheckBefore 9226 movl rSELF, %ecx 9227 movl %ecx, OUT_ARG0(%esp) 9228 leal OFF_FP_SHADOWFRAME(rFP), %eax 9229 movl %eax, OUT_ARG1(%esp) 9230 movl rPC, OUT_ARG2(%esp) 9231 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9232 REFRESH_IBASE 9233 jmp .L_op_nop+(119*128) 9234 9235 /* ------------------------------ */ 9236 .balign 128 9237 .L_ALT_op_invoke_interface_range: /* 0x78 */ 9238 /* File: x86/alt_stub.S */ 9239 /* 9240 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9241 * any interesting requests and then jump to the real instruction 9242 * handler. Unlike the Arm handler, we can't do this as a tail call 9243 * because rIBASE is caller save and we need to reload it. 9244 * 9245 * Note that unlike in the Arm implementation, we should never arrive 9246 * here with a zero breakFlag because we always refresh rIBASE on 9247 * return. 9248 */ 9249 .extern MterpCheckBefore 9250 movl rSELF, %ecx 9251 movl %ecx, OUT_ARG0(%esp) 9252 leal OFF_FP_SHADOWFRAME(rFP), %eax 9253 movl %eax, OUT_ARG1(%esp) 9254 movl rPC, OUT_ARG2(%esp) 9255 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9256 REFRESH_IBASE 9257 jmp .L_op_nop+(120*128) 9258 9259 /* ------------------------------ */ 9260 .balign 128 9261 .L_ALT_op_unused_79: /* 0x79 */ 9262 /* File: x86/alt_stub.S */ 9263 /* 9264 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9265 * any interesting requests and then jump to the real instruction 9266 * handler. Unlike the Arm handler, we can't do this as a tail call 9267 * because rIBASE is caller save and we need to reload it. 9268 * 9269 * Note that unlike in the Arm implementation, we should never arrive 9270 * here with a zero breakFlag because we always refresh rIBASE on 9271 * return. 9272 */ 9273 .extern MterpCheckBefore 9274 movl rSELF, %ecx 9275 movl %ecx, OUT_ARG0(%esp) 9276 leal OFF_FP_SHADOWFRAME(rFP), %eax 9277 movl %eax, OUT_ARG1(%esp) 9278 movl rPC, OUT_ARG2(%esp) 9279 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9280 REFRESH_IBASE 9281 jmp .L_op_nop+(121*128) 9282 9283 /* ------------------------------ */ 9284 .balign 128 9285 .L_ALT_op_unused_7a: /* 0x7a */ 9286 /* File: x86/alt_stub.S */ 9287 /* 9288 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9289 * any interesting requests and then jump to the real instruction 9290 * handler. Unlike the Arm handler, we can't do this as a tail call 9291 * because rIBASE is caller save and we need to reload it. 9292 * 9293 * Note that unlike in the Arm implementation, we should never arrive 9294 * here with a zero breakFlag because we always refresh rIBASE on 9295 * return. 9296 */ 9297 .extern MterpCheckBefore 9298 movl rSELF, %ecx 9299 movl %ecx, OUT_ARG0(%esp) 9300 leal OFF_FP_SHADOWFRAME(rFP), %eax 9301 movl %eax, OUT_ARG1(%esp) 9302 movl rPC, OUT_ARG2(%esp) 9303 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9304 REFRESH_IBASE 9305 jmp .L_op_nop+(122*128) 9306 9307 /* ------------------------------ */ 9308 .balign 128 9309 .L_ALT_op_neg_int: /* 0x7b */ 9310 /* File: x86/alt_stub.S */ 9311 /* 9312 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9313 * any interesting requests and then jump to the real instruction 9314 * handler. Unlike the Arm handler, we can't do this as a tail call 9315 * because rIBASE is caller save and we need to reload it. 9316 * 9317 * Note that unlike in the Arm implementation, we should never arrive 9318 * here with a zero breakFlag because we always refresh rIBASE on 9319 * return. 9320 */ 9321 .extern MterpCheckBefore 9322 movl rSELF, %ecx 9323 movl %ecx, OUT_ARG0(%esp) 9324 leal OFF_FP_SHADOWFRAME(rFP), %eax 9325 movl %eax, OUT_ARG1(%esp) 9326 movl rPC, OUT_ARG2(%esp) 9327 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9328 REFRESH_IBASE 9329 jmp .L_op_nop+(123*128) 9330 9331 /* ------------------------------ */ 9332 .balign 128 9333 .L_ALT_op_not_int: /* 0x7c */ 9334 /* File: x86/alt_stub.S */ 9335 /* 9336 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9337 * any interesting requests and then jump to the real instruction 9338 * handler. Unlike the Arm handler, we can't do this as a tail call 9339 * because rIBASE is caller save and we need to reload it. 9340 * 9341 * Note that unlike in the Arm implementation, we should never arrive 9342 * here with a zero breakFlag because we always refresh rIBASE on 9343 * return. 9344 */ 9345 .extern MterpCheckBefore 9346 movl rSELF, %ecx 9347 movl %ecx, OUT_ARG0(%esp) 9348 leal OFF_FP_SHADOWFRAME(rFP), %eax 9349 movl %eax, OUT_ARG1(%esp) 9350 movl rPC, OUT_ARG2(%esp) 9351 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9352 REFRESH_IBASE 9353 jmp .L_op_nop+(124*128) 9354 9355 /* ------------------------------ */ 9356 .balign 128 9357 .L_ALT_op_neg_long: /* 0x7d */ 9358 /* File: x86/alt_stub.S */ 9359 /* 9360 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9361 * any interesting requests and then jump to the real instruction 9362 * handler. Unlike the Arm handler, we can't do this as a tail call 9363 * because rIBASE is caller save and we need to reload it. 9364 * 9365 * Note that unlike in the Arm implementation, we should never arrive 9366 * here with a zero breakFlag because we always refresh rIBASE on 9367 * return. 9368 */ 9369 .extern MterpCheckBefore 9370 movl rSELF, %ecx 9371 movl %ecx, OUT_ARG0(%esp) 9372 leal OFF_FP_SHADOWFRAME(rFP), %eax 9373 movl %eax, OUT_ARG1(%esp) 9374 movl rPC, OUT_ARG2(%esp) 9375 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9376 REFRESH_IBASE 9377 jmp .L_op_nop+(125*128) 9378 9379 /* ------------------------------ */ 9380 .balign 128 9381 .L_ALT_op_not_long: /* 0x7e */ 9382 /* File: x86/alt_stub.S */ 9383 /* 9384 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9385 * any interesting requests and then jump to the real instruction 9386 * handler. Unlike the Arm handler, we can't do this as a tail call 9387 * because rIBASE is caller save and we need to reload it. 9388 * 9389 * Note that unlike in the Arm implementation, we should never arrive 9390 * here with a zero breakFlag because we always refresh rIBASE on 9391 * return. 9392 */ 9393 .extern MterpCheckBefore 9394 movl rSELF, %ecx 9395 movl %ecx, OUT_ARG0(%esp) 9396 leal OFF_FP_SHADOWFRAME(rFP), %eax 9397 movl %eax, OUT_ARG1(%esp) 9398 movl rPC, OUT_ARG2(%esp) 9399 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9400 REFRESH_IBASE 9401 jmp .L_op_nop+(126*128) 9402 9403 /* ------------------------------ */ 9404 .balign 128 9405 .L_ALT_op_neg_float: /* 0x7f */ 9406 /* File: x86/alt_stub.S */ 9407 /* 9408 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9409 * any interesting requests and then jump to the real instruction 9410 * handler. Unlike the Arm handler, we can't do this as a tail call 9411 * because rIBASE is caller save and we need to reload it. 9412 * 9413 * Note that unlike in the Arm implementation, we should never arrive 9414 * here with a zero breakFlag because we always refresh rIBASE on 9415 * return. 9416 */ 9417 .extern MterpCheckBefore 9418 movl rSELF, %ecx 9419 movl %ecx, OUT_ARG0(%esp) 9420 leal OFF_FP_SHADOWFRAME(rFP), %eax 9421 movl %eax, OUT_ARG1(%esp) 9422 movl rPC, OUT_ARG2(%esp) 9423 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9424 REFRESH_IBASE 9425 jmp .L_op_nop+(127*128) 9426 9427 /* ------------------------------ */ 9428 .balign 128 9429 .L_ALT_op_neg_double: /* 0x80 */ 9430 /* File: x86/alt_stub.S */ 9431 /* 9432 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9433 * any interesting requests and then jump to the real instruction 9434 * handler. Unlike the Arm handler, we can't do this as a tail call 9435 * because rIBASE is caller save and we need to reload it. 9436 * 9437 * Note that unlike in the Arm implementation, we should never arrive 9438 * here with a zero breakFlag because we always refresh rIBASE on 9439 * return. 9440 */ 9441 .extern MterpCheckBefore 9442 movl rSELF, %ecx 9443 movl %ecx, OUT_ARG0(%esp) 9444 leal OFF_FP_SHADOWFRAME(rFP), %eax 9445 movl %eax, OUT_ARG1(%esp) 9446 movl rPC, OUT_ARG2(%esp) 9447 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9448 REFRESH_IBASE 9449 jmp .L_op_nop+(128*128) 9450 9451 /* ------------------------------ */ 9452 .balign 128 9453 .L_ALT_op_int_to_long: /* 0x81 */ 9454 /* File: x86/alt_stub.S */ 9455 /* 9456 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9457 * any interesting requests and then jump to the real instruction 9458 * handler. Unlike the Arm handler, we can't do this as a tail call 9459 * because rIBASE is caller save and we need to reload it. 9460 * 9461 * Note that unlike in the Arm implementation, we should never arrive 9462 * here with a zero breakFlag because we always refresh rIBASE on 9463 * return. 9464 */ 9465 .extern MterpCheckBefore 9466 movl rSELF, %ecx 9467 movl %ecx, OUT_ARG0(%esp) 9468 leal OFF_FP_SHADOWFRAME(rFP), %eax 9469 movl %eax, OUT_ARG1(%esp) 9470 movl rPC, OUT_ARG2(%esp) 9471 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9472 REFRESH_IBASE 9473 jmp .L_op_nop+(129*128) 9474 9475 /* ------------------------------ */ 9476 .balign 128 9477 .L_ALT_op_int_to_float: /* 0x82 */ 9478 /* File: x86/alt_stub.S */ 9479 /* 9480 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9481 * any interesting requests and then jump to the real instruction 9482 * handler. Unlike the Arm handler, we can't do this as a tail call 9483 * because rIBASE is caller save and we need to reload it. 9484 * 9485 * Note that unlike in the Arm implementation, we should never arrive 9486 * here with a zero breakFlag because we always refresh rIBASE on 9487 * return. 9488 */ 9489 .extern MterpCheckBefore 9490 movl rSELF, %ecx 9491 movl %ecx, OUT_ARG0(%esp) 9492 leal OFF_FP_SHADOWFRAME(rFP), %eax 9493 movl %eax, OUT_ARG1(%esp) 9494 movl rPC, OUT_ARG2(%esp) 9495 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9496 REFRESH_IBASE 9497 jmp .L_op_nop+(130*128) 9498 9499 /* ------------------------------ */ 9500 .balign 128 9501 .L_ALT_op_int_to_double: /* 0x83 */ 9502 /* File: x86/alt_stub.S */ 9503 /* 9504 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9505 * any interesting requests and then jump to the real instruction 9506 * handler. Unlike the Arm handler, we can't do this as a tail call 9507 * because rIBASE is caller save and we need to reload it. 9508 * 9509 * Note that unlike in the Arm implementation, we should never arrive 9510 * here with a zero breakFlag because we always refresh rIBASE on 9511 * return. 9512 */ 9513 .extern MterpCheckBefore 9514 movl rSELF, %ecx 9515 movl %ecx, OUT_ARG0(%esp) 9516 leal OFF_FP_SHADOWFRAME(rFP), %eax 9517 movl %eax, OUT_ARG1(%esp) 9518 movl rPC, OUT_ARG2(%esp) 9519 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9520 REFRESH_IBASE 9521 jmp .L_op_nop+(131*128) 9522 9523 /* ------------------------------ */ 9524 .balign 128 9525 .L_ALT_op_long_to_int: /* 0x84 */ 9526 /* File: x86/alt_stub.S */ 9527 /* 9528 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9529 * any interesting requests and then jump to the real instruction 9530 * handler. Unlike the Arm handler, we can't do this as a tail call 9531 * because rIBASE is caller save and we need to reload it. 9532 * 9533 * Note that unlike in the Arm implementation, we should never arrive 9534 * here with a zero breakFlag because we always refresh rIBASE on 9535 * return. 9536 */ 9537 .extern MterpCheckBefore 9538 movl rSELF, %ecx 9539 movl %ecx, OUT_ARG0(%esp) 9540 leal OFF_FP_SHADOWFRAME(rFP), %eax 9541 movl %eax, OUT_ARG1(%esp) 9542 movl rPC, OUT_ARG2(%esp) 9543 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9544 REFRESH_IBASE 9545 jmp .L_op_nop+(132*128) 9546 9547 /* ------------------------------ */ 9548 .balign 128 9549 .L_ALT_op_long_to_float: /* 0x85 */ 9550 /* File: x86/alt_stub.S */ 9551 /* 9552 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9553 * any interesting requests and then jump to the real instruction 9554 * handler. Unlike the Arm handler, we can't do this as a tail call 9555 * because rIBASE is caller save and we need to reload it. 9556 * 9557 * Note that unlike in the Arm implementation, we should never arrive 9558 * here with a zero breakFlag because we always refresh rIBASE on 9559 * return. 9560 */ 9561 .extern MterpCheckBefore 9562 movl rSELF, %ecx 9563 movl %ecx, OUT_ARG0(%esp) 9564 leal OFF_FP_SHADOWFRAME(rFP), %eax 9565 movl %eax, OUT_ARG1(%esp) 9566 movl rPC, OUT_ARG2(%esp) 9567 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9568 REFRESH_IBASE 9569 jmp .L_op_nop+(133*128) 9570 9571 /* ------------------------------ */ 9572 .balign 128 9573 .L_ALT_op_long_to_double: /* 0x86 */ 9574 /* File: x86/alt_stub.S */ 9575 /* 9576 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9577 * any interesting requests and then jump to the real instruction 9578 * handler. Unlike the Arm handler, we can't do this as a tail call 9579 * because rIBASE is caller save and we need to reload it. 9580 * 9581 * Note that unlike in the Arm implementation, we should never arrive 9582 * here with a zero breakFlag because we always refresh rIBASE on 9583 * return. 9584 */ 9585 .extern MterpCheckBefore 9586 movl rSELF, %ecx 9587 movl %ecx, OUT_ARG0(%esp) 9588 leal OFF_FP_SHADOWFRAME(rFP), %eax 9589 movl %eax, OUT_ARG1(%esp) 9590 movl rPC, OUT_ARG2(%esp) 9591 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9592 REFRESH_IBASE 9593 jmp .L_op_nop+(134*128) 9594 9595 /* ------------------------------ */ 9596 .balign 128 9597 .L_ALT_op_float_to_int: /* 0x87 */ 9598 /* File: x86/alt_stub.S */ 9599 /* 9600 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9601 * any interesting requests and then jump to the real instruction 9602 * handler. Unlike the Arm handler, we can't do this as a tail call 9603 * because rIBASE is caller save and we need to reload it. 9604 * 9605 * Note that unlike in the Arm implementation, we should never arrive 9606 * here with a zero breakFlag because we always refresh rIBASE on 9607 * return. 9608 */ 9609 .extern MterpCheckBefore 9610 movl rSELF, %ecx 9611 movl %ecx, OUT_ARG0(%esp) 9612 leal OFF_FP_SHADOWFRAME(rFP), %eax 9613 movl %eax, OUT_ARG1(%esp) 9614 movl rPC, OUT_ARG2(%esp) 9615 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9616 REFRESH_IBASE 9617 jmp .L_op_nop+(135*128) 9618 9619 /* ------------------------------ */ 9620 .balign 128 9621 .L_ALT_op_float_to_long: /* 0x88 */ 9622 /* File: x86/alt_stub.S */ 9623 /* 9624 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9625 * any interesting requests and then jump to the real instruction 9626 * handler. Unlike the Arm handler, we can't do this as a tail call 9627 * because rIBASE is caller save and we need to reload it. 9628 * 9629 * Note that unlike in the Arm implementation, we should never arrive 9630 * here with a zero breakFlag because we always refresh rIBASE on 9631 * return. 9632 */ 9633 .extern MterpCheckBefore 9634 movl rSELF, %ecx 9635 movl %ecx, OUT_ARG0(%esp) 9636 leal OFF_FP_SHADOWFRAME(rFP), %eax 9637 movl %eax, OUT_ARG1(%esp) 9638 movl rPC, OUT_ARG2(%esp) 9639 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9640 REFRESH_IBASE 9641 jmp .L_op_nop+(136*128) 9642 9643 /* ------------------------------ */ 9644 .balign 128 9645 .L_ALT_op_float_to_double: /* 0x89 */ 9646 /* File: x86/alt_stub.S */ 9647 /* 9648 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9649 * any interesting requests and then jump to the real instruction 9650 * handler. Unlike the Arm handler, we can't do this as a tail call 9651 * because rIBASE is caller save and we need to reload it. 9652 * 9653 * Note that unlike in the Arm implementation, we should never arrive 9654 * here with a zero breakFlag because we always refresh rIBASE on 9655 * return. 9656 */ 9657 .extern MterpCheckBefore 9658 movl rSELF, %ecx 9659 movl %ecx, OUT_ARG0(%esp) 9660 leal OFF_FP_SHADOWFRAME(rFP), %eax 9661 movl %eax, OUT_ARG1(%esp) 9662 movl rPC, OUT_ARG2(%esp) 9663 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9664 REFRESH_IBASE 9665 jmp .L_op_nop+(137*128) 9666 9667 /* ------------------------------ */ 9668 .balign 128 9669 .L_ALT_op_double_to_int: /* 0x8a */ 9670 /* File: x86/alt_stub.S */ 9671 /* 9672 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9673 * any interesting requests and then jump to the real instruction 9674 * handler. Unlike the Arm handler, we can't do this as a tail call 9675 * because rIBASE is caller save and we need to reload it. 9676 * 9677 * Note that unlike in the Arm implementation, we should never arrive 9678 * here with a zero breakFlag because we always refresh rIBASE on 9679 * return. 9680 */ 9681 .extern MterpCheckBefore 9682 movl rSELF, %ecx 9683 movl %ecx, OUT_ARG0(%esp) 9684 leal OFF_FP_SHADOWFRAME(rFP), %eax 9685 movl %eax, OUT_ARG1(%esp) 9686 movl rPC, OUT_ARG2(%esp) 9687 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9688 REFRESH_IBASE 9689 jmp .L_op_nop+(138*128) 9690 9691 /* ------------------------------ */ 9692 .balign 128 9693 .L_ALT_op_double_to_long: /* 0x8b */ 9694 /* File: x86/alt_stub.S */ 9695 /* 9696 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9697 * any interesting requests and then jump to the real instruction 9698 * handler. Unlike the Arm handler, we can't do this as a tail call 9699 * because rIBASE is caller save and we need to reload it. 9700 * 9701 * Note that unlike in the Arm implementation, we should never arrive 9702 * here with a zero breakFlag because we always refresh rIBASE on 9703 * return. 9704 */ 9705 .extern MterpCheckBefore 9706 movl rSELF, %ecx 9707 movl %ecx, OUT_ARG0(%esp) 9708 leal OFF_FP_SHADOWFRAME(rFP), %eax 9709 movl %eax, OUT_ARG1(%esp) 9710 movl rPC, OUT_ARG2(%esp) 9711 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9712 REFRESH_IBASE 9713 jmp .L_op_nop+(139*128) 9714 9715 /* ------------------------------ */ 9716 .balign 128 9717 .L_ALT_op_double_to_float: /* 0x8c */ 9718 /* File: x86/alt_stub.S */ 9719 /* 9720 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9721 * any interesting requests and then jump to the real instruction 9722 * handler. Unlike the Arm handler, we can't do this as a tail call 9723 * because rIBASE is caller save and we need to reload it. 9724 * 9725 * Note that unlike in the Arm implementation, we should never arrive 9726 * here with a zero breakFlag because we always refresh rIBASE on 9727 * return. 9728 */ 9729 .extern MterpCheckBefore 9730 movl rSELF, %ecx 9731 movl %ecx, OUT_ARG0(%esp) 9732 leal OFF_FP_SHADOWFRAME(rFP), %eax 9733 movl %eax, OUT_ARG1(%esp) 9734 movl rPC, OUT_ARG2(%esp) 9735 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9736 REFRESH_IBASE 9737 jmp .L_op_nop+(140*128) 9738 9739 /* ------------------------------ */ 9740 .balign 128 9741 .L_ALT_op_int_to_byte: /* 0x8d */ 9742 /* File: x86/alt_stub.S */ 9743 /* 9744 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9745 * any interesting requests and then jump to the real instruction 9746 * handler. Unlike the Arm handler, we can't do this as a tail call 9747 * because rIBASE is caller save and we need to reload it. 9748 * 9749 * Note that unlike in the Arm implementation, we should never arrive 9750 * here with a zero breakFlag because we always refresh rIBASE on 9751 * return. 9752 */ 9753 .extern MterpCheckBefore 9754 movl rSELF, %ecx 9755 movl %ecx, OUT_ARG0(%esp) 9756 leal OFF_FP_SHADOWFRAME(rFP), %eax 9757 movl %eax, OUT_ARG1(%esp) 9758 movl rPC, OUT_ARG2(%esp) 9759 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9760 REFRESH_IBASE 9761 jmp .L_op_nop+(141*128) 9762 9763 /* ------------------------------ */ 9764 .balign 128 9765 .L_ALT_op_int_to_char: /* 0x8e */ 9766 /* File: x86/alt_stub.S */ 9767 /* 9768 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9769 * any interesting requests and then jump to the real instruction 9770 * handler. Unlike the Arm handler, we can't do this as a tail call 9771 * because rIBASE is caller save and we need to reload it. 9772 * 9773 * Note that unlike in the Arm implementation, we should never arrive 9774 * here with a zero breakFlag because we always refresh rIBASE on 9775 * return. 9776 */ 9777 .extern MterpCheckBefore 9778 movl rSELF, %ecx 9779 movl %ecx, OUT_ARG0(%esp) 9780 leal OFF_FP_SHADOWFRAME(rFP), %eax 9781 movl %eax, OUT_ARG1(%esp) 9782 movl rPC, OUT_ARG2(%esp) 9783 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9784 REFRESH_IBASE 9785 jmp .L_op_nop+(142*128) 9786 9787 /* ------------------------------ */ 9788 .balign 128 9789 .L_ALT_op_int_to_short: /* 0x8f */ 9790 /* File: x86/alt_stub.S */ 9791 /* 9792 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9793 * any interesting requests and then jump to the real instruction 9794 * handler. Unlike the Arm handler, we can't do this as a tail call 9795 * because rIBASE is caller save and we need to reload it. 9796 * 9797 * Note that unlike in the Arm implementation, we should never arrive 9798 * here with a zero breakFlag because we always refresh rIBASE on 9799 * return. 9800 */ 9801 .extern MterpCheckBefore 9802 movl rSELF, %ecx 9803 movl %ecx, OUT_ARG0(%esp) 9804 leal OFF_FP_SHADOWFRAME(rFP), %eax 9805 movl %eax, OUT_ARG1(%esp) 9806 movl rPC, OUT_ARG2(%esp) 9807 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9808 REFRESH_IBASE 9809 jmp .L_op_nop+(143*128) 9810 9811 /* ------------------------------ */ 9812 .balign 128 9813 .L_ALT_op_add_int: /* 0x90 */ 9814 /* File: x86/alt_stub.S */ 9815 /* 9816 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9817 * any interesting requests and then jump to the real instruction 9818 * handler. Unlike the Arm handler, we can't do this as a tail call 9819 * because rIBASE is caller save and we need to reload it. 9820 * 9821 * Note that unlike in the Arm implementation, we should never arrive 9822 * here with a zero breakFlag because we always refresh rIBASE on 9823 * return. 9824 */ 9825 .extern MterpCheckBefore 9826 movl rSELF, %ecx 9827 movl %ecx, OUT_ARG0(%esp) 9828 leal OFF_FP_SHADOWFRAME(rFP), %eax 9829 movl %eax, OUT_ARG1(%esp) 9830 movl rPC, OUT_ARG2(%esp) 9831 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9832 REFRESH_IBASE 9833 jmp .L_op_nop+(144*128) 9834 9835 /* ------------------------------ */ 9836 .balign 128 9837 .L_ALT_op_sub_int: /* 0x91 */ 9838 /* File: x86/alt_stub.S */ 9839 /* 9840 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9841 * any interesting requests and then jump to the real instruction 9842 * handler. Unlike the Arm handler, we can't do this as a tail call 9843 * because rIBASE is caller save and we need to reload it. 9844 * 9845 * Note that unlike in the Arm implementation, we should never arrive 9846 * here with a zero breakFlag because we always refresh rIBASE on 9847 * return. 9848 */ 9849 .extern MterpCheckBefore 9850 movl rSELF, %ecx 9851 movl %ecx, OUT_ARG0(%esp) 9852 leal OFF_FP_SHADOWFRAME(rFP), %eax 9853 movl %eax, OUT_ARG1(%esp) 9854 movl rPC, OUT_ARG2(%esp) 9855 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9856 REFRESH_IBASE 9857 jmp .L_op_nop+(145*128) 9858 9859 /* ------------------------------ */ 9860 .balign 128 9861 .L_ALT_op_mul_int: /* 0x92 */ 9862 /* File: x86/alt_stub.S */ 9863 /* 9864 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9865 * any interesting requests and then jump to the real instruction 9866 * handler. Unlike the Arm handler, we can't do this as a tail call 9867 * because rIBASE is caller save and we need to reload it. 9868 * 9869 * Note that unlike in the Arm implementation, we should never arrive 9870 * here with a zero breakFlag because we always refresh rIBASE on 9871 * return. 9872 */ 9873 .extern MterpCheckBefore 9874 movl rSELF, %ecx 9875 movl %ecx, OUT_ARG0(%esp) 9876 leal OFF_FP_SHADOWFRAME(rFP), %eax 9877 movl %eax, OUT_ARG1(%esp) 9878 movl rPC, OUT_ARG2(%esp) 9879 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9880 REFRESH_IBASE 9881 jmp .L_op_nop+(146*128) 9882 9883 /* ------------------------------ */ 9884 .balign 128 9885 .L_ALT_op_div_int: /* 0x93 */ 9886 /* File: x86/alt_stub.S */ 9887 /* 9888 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9889 * any interesting requests and then jump to the real instruction 9890 * handler. Unlike the Arm handler, we can't do this as a tail call 9891 * because rIBASE is caller save and we need to reload it. 9892 * 9893 * Note that unlike in the Arm implementation, we should never arrive 9894 * here with a zero breakFlag because we always refresh rIBASE on 9895 * return. 9896 */ 9897 .extern MterpCheckBefore 9898 movl rSELF, %ecx 9899 movl %ecx, OUT_ARG0(%esp) 9900 leal OFF_FP_SHADOWFRAME(rFP), %eax 9901 movl %eax, OUT_ARG1(%esp) 9902 movl rPC, OUT_ARG2(%esp) 9903 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9904 REFRESH_IBASE 9905 jmp .L_op_nop+(147*128) 9906 9907 /* ------------------------------ */ 9908 .balign 128 9909 .L_ALT_op_rem_int: /* 0x94 */ 9910 /* File: x86/alt_stub.S */ 9911 /* 9912 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9913 * any interesting requests and then jump to the real instruction 9914 * handler. Unlike the Arm handler, we can't do this as a tail call 9915 * because rIBASE is caller save and we need to reload it. 9916 * 9917 * Note that unlike in the Arm implementation, we should never arrive 9918 * here with a zero breakFlag because we always refresh rIBASE on 9919 * return. 9920 */ 9921 .extern MterpCheckBefore 9922 movl rSELF, %ecx 9923 movl %ecx, OUT_ARG0(%esp) 9924 leal OFF_FP_SHADOWFRAME(rFP), %eax 9925 movl %eax, OUT_ARG1(%esp) 9926 movl rPC, OUT_ARG2(%esp) 9927 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9928 REFRESH_IBASE 9929 jmp .L_op_nop+(148*128) 9930 9931 /* ------------------------------ */ 9932 .balign 128 9933 .L_ALT_op_and_int: /* 0x95 */ 9934 /* File: x86/alt_stub.S */ 9935 /* 9936 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9937 * any interesting requests and then jump to the real instruction 9938 * handler. Unlike the Arm handler, we can't do this as a tail call 9939 * because rIBASE is caller save and we need to reload it. 9940 * 9941 * Note that unlike in the Arm implementation, we should never arrive 9942 * here with a zero breakFlag because we always refresh rIBASE on 9943 * return. 9944 */ 9945 .extern MterpCheckBefore 9946 movl rSELF, %ecx 9947 movl %ecx, OUT_ARG0(%esp) 9948 leal OFF_FP_SHADOWFRAME(rFP), %eax 9949 movl %eax, OUT_ARG1(%esp) 9950 movl rPC, OUT_ARG2(%esp) 9951 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9952 REFRESH_IBASE 9953 jmp .L_op_nop+(149*128) 9954 9955 /* ------------------------------ */ 9956 .balign 128 9957 .L_ALT_op_or_int: /* 0x96 */ 9958 /* File: x86/alt_stub.S */ 9959 /* 9960 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9961 * any interesting requests and then jump to the real instruction 9962 * handler. Unlike the Arm handler, we can't do this as a tail call 9963 * because rIBASE is caller save and we need to reload it. 9964 * 9965 * Note that unlike in the Arm implementation, we should never arrive 9966 * here with a zero breakFlag because we always refresh rIBASE on 9967 * return. 9968 */ 9969 .extern MterpCheckBefore 9970 movl rSELF, %ecx 9971 movl %ecx, OUT_ARG0(%esp) 9972 leal OFF_FP_SHADOWFRAME(rFP), %eax 9973 movl %eax, OUT_ARG1(%esp) 9974 movl rPC, OUT_ARG2(%esp) 9975 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9976 REFRESH_IBASE 9977 jmp .L_op_nop+(150*128) 9978 9979 /* ------------------------------ */ 9980 .balign 128 9981 .L_ALT_op_xor_int: /* 0x97 */ 9982 /* File: x86/alt_stub.S */ 9983 /* 9984 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9985 * any interesting requests and then jump to the real instruction 9986 * handler. Unlike the Arm handler, we can't do this as a tail call 9987 * because rIBASE is caller save and we need to reload it. 9988 * 9989 * Note that unlike in the Arm implementation, we should never arrive 9990 * here with a zero breakFlag because we always refresh rIBASE on 9991 * return. 9992 */ 9993 .extern MterpCheckBefore 9994 movl rSELF, %ecx 9995 movl %ecx, OUT_ARG0(%esp) 9996 leal OFF_FP_SHADOWFRAME(rFP), %eax 9997 movl %eax, OUT_ARG1(%esp) 9998 movl rPC, OUT_ARG2(%esp) 9999 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10000 REFRESH_IBASE 10001 jmp .L_op_nop+(151*128) 10002 10003 /* ------------------------------ */ 10004 .balign 128 10005 .L_ALT_op_shl_int: /* 0x98 */ 10006 /* File: x86/alt_stub.S */ 10007 /* 10008 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10009 * any interesting requests and then jump to the real instruction 10010 * handler. Unlike the Arm handler, we can't do this as a tail call 10011 * because rIBASE is caller save and we need to reload it. 10012 * 10013 * Note that unlike in the Arm implementation, we should never arrive 10014 * here with a zero breakFlag because we always refresh rIBASE on 10015 * return. 10016 */ 10017 .extern MterpCheckBefore 10018 movl rSELF, %ecx 10019 movl %ecx, OUT_ARG0(%esp) 10020 leal OFF_FP_SHADOWFRAME(rFP), %eax 10021 movl %eax, OUT_ARG1(%esp) 10022 movl rPC, OUT_ARG2(%esp) 10023 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10024 REFRESH_IBASE 10025 jmp .L_op_nop+(152*128) 10026 10027 /* ------------------------------ */ 10028 .balign 128 10029 .L_ALT_op_shr_int: /* 0x99 */ 10030 /* File: x86/alt_stub.S */ 10031 /* 10032 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10033 * any interesting requests and then jump to the real instruction 10034 * handler. Unlike the Arm handler, we can't do this as a tail call 10035 * because rIBASE is caller save and we need to reload it. 10036 * 10037 * Note that unlike in the Arm implementation, we should never arrive 10038 * here with a zero breakFlag because we always refresh rIBASE on 10039 * return. 10040 */ 10041 .extern MterpCheckBefore 10042 movl rSELF, %ecx 10043 movl %ecx, OUT_ARG0(%esp) 10044 leal OFF_FP_SHADOWFRAME(rFP), %eax 10045 movl %eax, OUT_ARG1(%esp) 10046 movl rPC, OUT_ARG2(%esp) 10047 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10048 REFRESH_IBASE 10049 jmp .L_op_nop+(153*128) 10050 10051 /* ------------------------------ */ 10052 .balign 128 10053 .L_ALT_op_ushr_int: /* 0x9a */ 10054 /* File: x86/alt_stub.S */ 10055 /* 10056 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10057 * any interesting requests and then jump to the real instruction 10058 * handler. Unlike the Arm handler, we can't do this as a tail call 10059 * because rIBASE is caller save and we need to reload it. 10060 * 10061 * Note that unlike in the Arm implementation, we should never arrive 10062 * here with a zero breakFlag because we always refresh rIBASE on 10063 * return. 10064 */ 10065 .extern MterpCheckBefore 10066 movl rSELF, %ecx 10067 movl %ecx, OUT_ARG0(%esp) 10068 leal OFF_FP_SHADOWFRAME(rFP), %eax 10069 movl %eax, OUT_ARG1(%esp) 10070 movl rPC, OUT_ARG2(%esp) 10071 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10072 REFRESH_IBASE 10073 jmp .L_op_nop+(154*128) 10074 10075 /* ------------------------------ */ 10076 .balign 128 10077 .L_ALT_op_add_long: /* 0x9b */ 10078 /* File: x86/alt_stub.S */ 10079 /* 10080 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10081 * any interesting requests and then jump to the real instruction 10082 * handler. Unlike the Arm handler, we can't do this as a tail call 10083 * because rIBASE is caller save and we need to reload it. 10084 * 10085 * Note that unlike in the Arm implementation, we should never arrive 10086 * here with a zero breakFlag because we always refresh rIBASE on 10087 * return. 10088 */ 10089 .extern MterpCheckBefore 10090 movl rSELF, %ecx 10091 movl %ecx, OUT_ARG0(%esp) 10092 leal OFF_FP_SHADOWFRAME(rFP), %eax 10093 movl %eax, OUT_ARG1(%esp) 10094 movl rPC, OUT_ARG2(%esp) 10095 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10096 REFRESH_IBASE 10097 jmp .L_op_nop+(155*128) 10098 10099 /* ------------------------------ */ 10100 .balign 128 10101 .L_ALT_op_sub_long: /* 0x9c */ 10102 /* File: x86/alt_stub.S */ 10103 /* 10104 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10105 * any interesting requests and then jump to the real instruction 10106 * handler. Unlike the Arm handler, we can't do this as a tail call 10107 * because rIBASE is caller save and we need to reload it. 10108 * 10109 * Note that unlike in the Arm implementation, we should never arrive 10110 * here with a zero breakFlag because we always refresh rIBASE on 10111 * return. 10112 */ 10113 .extern MterpCheckBefore 10114 movl rSELF, %ecx 10115 movl %ecx, OUT_ARG0(%esp) 10116 leal OFF_FP_SHADOWFRAME(rFP), %eax 10117 movl %eax, OUT_ARG1(%esp) 10118 movl rPC, OUT_ARG2(%esp) 10119 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10120 REFRESH_IBASE 10121 jmp .L_op_nop+(156*128) 10122 10123 /* ------------------------------ */ 10124 .balign 128 10125 .L_ALT_op_mul_long: /* 0x9d */ 10126 /* File: x86/alt_stub.S */ 10127 /* 10128 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10129 * any interesting requests and then jump to the real instruction 10130 * handler. Unlike the Arm handler, we can't do this as a tail call 10131 * because rIBASE is caller save and we need to reload it. 10132 * 10133 * Note that unlike in the Arm implementation, we should never arrive 10134 * here with a zero breakFlag because we always refresh rIBASE on 10135 * return. 10136 */ 10137 .extern MterpCheckBefore 10138 movl rSELF, %ecx 10139 movl %ecx, OUT_ARG0(%esp) 10140 leal OFF_FP_SHADOWFRAME(rFP), %eax 10141 movl %eax, OUT_ARG1(%esp) 10142 movl rPC, OUT_ARG2(%esp) 10143 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10144 REFRESH_IBASE 10145 jmp .L_op_nop+(157*128) 10146 10147 /* ------------------------------ */ 10148 .balign 128 10149 .L_ALT_op_div_long: /* 0x9e */ 10150 /* File: x86/alt_stub.S */ 10151 /* 10152 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10153 * any interesting requests and then jump to the real instruction 10154 * handler. Unlike the Arm handler, we can't do this as a tail call 10155 * because rIBASE is caller save and we need to reload it. 10156 * 10157 * Note that unlike in the Arm implementation, we should never arrive 10158 * here with a zero breakFlag because we always refresh rIBASE on 10159 * return. 10160 */ 10161 .extern MterpCheckBefore 10162 movl rSELF, %ecx 10163 movl %ecx, OUT_ARG0(%esp) 10164 leal OFF_FP_SHADOWFRAME(rFP), %eax 10165 movl %eax, OUT_ARG1(%esp) 10166 movl rPC, OUT_ARG2(%esp) 10167 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10168 REFRESH_IBASE 10169 jmp .L_op_nop+(158*128) 10170 10171 /* ------------------------------ */ 10172 .balign 128 10173 .L_ALT_op_rem_long: /* 0x9f */ 10174 /* File: x86/alt_stub.S */ 10175 /* 10176 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10177 * any interesting requests and then jump to the real instruction 10178 * handler. Unlike the Arm handler, we can't do this as a tail call 10179 * because rIBASE is caller save and we need to reload it. 10180 * 10181 * Note that unlike in the Arm implementation, we should never arrive 10182 * here with a zero breakFlag because we always refresh rIBASE on 10183 * return. 10184 */ 10185 .extern MterpCheckBefore 10186 movl rSELF, %ecx 10187 movl %ecx, OUT_ARG0(%esp) 10188 leal OFF_FP_SHADOWFRAME(rFP), %eax 10189 movl %eax, OUT_ARG1(%esp) 10190 movl rPC, OUT_ARG2(%esp) 10191 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10192 REFRESH_IBASE 10193 jmp .L_op_nop+(159*128) 10194 10195 /* ------------------------------ */ 10196 .balign 128 10197 .L_ALT_op_and_long: /* 0xa0 */ 10198 /* File: x86/alt_stub.S */ 10199 /* 10200 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10201 * any interesting requests and then jump to the real instruction 10202 * handler. Unlike the Arm handler, we can't do this as a tail call 10203 * because rIBASE is caller save and we need to reload it. 10204 * 10205 * Note that unlike in the Arm implementation, we should never arrive 10206 * here with a zero breakFlag because we always refresh rIBASE on 10207 * return. 10208 */ 10209 .extern MterpCheckBefore 10210 movl rSELF, %ecx 10211 movl %ecx, OUT_ARG0(%esp) 10212 leal OFF_FP_SHADOWFRAME(rFP), %eax 10213 movl %eax, OUT_ARG1(%esp) 10214 movl rPC, OUT_ARG2(%esp) 10215 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10216 REFRESH_IBASE 10217 jmp .L_op_nop+(160*128) 10218 10219 /* ------------------------------ */ 10220 .balign 128 10221 .L_ALT_op_or_long: /* 0xa1 */ 10222 /* File: x86/alt_stub.S */ 10223 /* 10224 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10225 * any interesting requests and then jump to the real instruction 10226 * handler. Unlike the Arm handler, we can't do this as a tail call 10227 * because rIBASE is caller save and we need to reload it. 10228 * 10229 * Note that unlike in the Arm implementation, we should never arrive 10230 * here with a zero breakFlag because we always refresh rIBASE on 10231 * return. 10232 */ 10233 .extern MterpCheckBefore 10234 movl rSELF, %ecx 10235 movl %ecx, OUT_ARG0(%esp) 10236 leal OFF_FP_SHADOWFRAME(rFP), %eax 10237 movl %eax, OUT_ARG1(%esp) 10238 movl rPC, OUT_ARG2(%esp) 10239 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10240 REFRESH_IBASE 10241 jmp .L_op_nop+(161*128) 10242 10243 /* ------------------------------ */ 10244 .balign 128 10245 .L_ALT_op_xor_long: /* 0xa2 */ 10246 /* File: x86/alt_stub.S */ 10247 /* 10248 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10249 * any interesting requests and then jump to the real instruction 10250 * handler. Unlike the Arm handler, we can't do this as a tail call 10251 * because rIBASE is caller save and we need to reload it. 10252 * 10253 * Note that unlike in the Arm implementation, we should never arrive 10254 * here with a zero breakFlag because we always refresh rIBASE on 10255 * return. 10256 */ 10257 .extern MterpCheckBefore 10258 movl rSELF, %ecx 10259 movl %ecx, OUT_ARG0(%esp) 10260 leal OFF_FP_SHADOWFRAME(rFP), %eax 10261 movl %eax, OUT_ARG1(%esp) 10262 movl rPC, OUT_ARG2(%esp) 10263 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10264 REFRESH_IBASE 10265 jmp .L_op_nop+(162*128) 10266 10267 /* ------------------------------ */ 10268 .balign 128 10269 .L_ALT_op_shl_long: /* 0xa3 */ 10270 /* File: x86/alt_stub.S */ 10271 /* 10272 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10273 * any interesting requests and then jump to the real instruction 10274 * handler. Unlike the Arm handler, we can't do this as a tail call 10275 * because rIBASE is caller save and we need to reload it. 10276 * 10277 * Note that unlike in the Arm implementation, we should never arrive 10278 * here with a zero breakFlag because we always refresh rIBASE on 10279 * return. 10280 */ 10281 .extern MterpCheckBefore 10282 movl rSELF, %ecx 10283 movl %ecx, OUT_ARG0(%esp) 10284 leal OFF_FP_SHADOWFRAME(rFP), %eax 10285 movl %eax, OUT_ARG1(%esp) 10286 movl rPC, OUT_ARG2(%esp) 10287 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10288 REFRESH_IBASE 10289 jmp .L_op_nop+(163*128) 10290 10291 /* ------------------------------ */ 10292 .balign 128 10293 .L_ALT_op_shr_long: /* 0xa4 */ 10294 /* File: x86/alt_stub.S */ 10295 /* 10296 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10297 * any interesting requests and then jump to the real instruction 10298 * handler. Unlike the Arm handler, we can't do this as a tail call 10299 * because rIBASE is caller save and we need to reload it. 10300 * 10301 * Note that unlike in the Arm implementation, we should never arrive 10302 * here with a zero breakFlag because we always refresh rIBASE on 10303 * return. 10304 */ 10305 .extern MterpCheckBefore 10306 movl rSELF, %ecx 10307 movl %ecx, OUT_ARG0(%esp) 10308 leal OFF_FP_SHADOWFRAME(rFP), %eax 10309 movl %eax, OUT_ARG1(%esp) 10310 movl rPC, OUT_ARG2(%esp) 10311 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10312 REFRESH_IBASE 10313 jmp .L_op_nop+(164*128) 10314 10315 /* ------------------------------ */ 10316 .balign 128 10317 .L_ALT_op_ushr_long: /* 0xa5 */ 10318 /* File: x86/alt_stub.S */ 10319 /* 10320 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10321 * any interesting requests and then jump to the real instruction 10322 * handler. Unlike the Arm handler, we can't do this as a tail call 10323 * because rIBASE is caller save and we need to reload it. 10324 * 10325 * Note that unlike in the Arm implementation, we should never arrive 10326 * here with a zero breakFlag because we always refresh rIBASE on 10327 * return. 10328 */ 10329 .extern MterpCheckBefore 10330 movl rSELF, %ecx 10331 movl %ecx, OUT_ARG0(%esp) 10332 leal OFF_FP_SHADOWFRAME(rFP), %eax 10333 movl %eax, OUT_ARG1(%esp) 10334 movl rPC, OUT_ARG2(%esp) 10335 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10336 REFRESH_IBASE 10337 jmp .L_op_nop+(165*128) 10338 10339 /* ------------------------------ */ 10340 .balign 128 10341 .L_ALT_op_add_float: /* 0xa6 */ 10342 /* File: x86/alt_stub.S */ 10343 /* 10344 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10345 * any interesting requests and then jump to the real instruction 10346 * handler. Unlike the Arm handler, we can't do this as a tail call 10347 * because rIBASE is caller save and we need to reload it. 10348 * 10349 * Note that unlike in the Arm implementation, we should never arrive 10350 * here with a zero breakFlag because we always refresh rIBASE on 10351 * return. 10352 */ 10353 .extern MterpCheckBefore 10354 movl rSELF, %ecx 10355 movl %ecx, OUT_ARG0(%esp) 10356 leal OFF_FP_SHADOWFRAME(rFP), %eax 10357 movl %eax, OUT_ARG1(%esp) 10358 movl rPC, OUT_ARG2(%esp) 10359 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10360 REFRESH_IBASE 10361 jmp .L_op_nop+(166*128) 10362 10363 /* ------------------------------ */ 10364 .balign 128 10365 .L_ALT_op_sub_float: /* 0xa7 */ 10366 /* File: x86/alt_stub.S */ 10367 /* 10368 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10369 * any interesting requests and then jump to the real instruction 10370 * handler. Unlike the Arm handler, we can't do this as a tail call 10371 * because rIBASE is caller save and we need to reload it. 10372 * 10373 * Note that unlike in the Arm implementation, we should never arrive 10374 * here with a zero breakFlag because we always refresh rIBASE on 10375 * return. 10376 */ 10377 .extern MterpCheckBefore 10378 movl rSELF, %ecx 10379 movl %ecx, OUT_ARG0(%esp) 10380 leal OFF_FP_SHADOWFRAME(rFP), %eax 10381 movl %eax, OUT_ARG1(%esp) 10382 movl rPC, OUT_ARG2(%esp) 10383 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10384 REFRESH_IBASE 10385 jmp .L_op_nop+(167*128) 10386 10387 /* ------------------------------ */ 10388 .balign 128 10389 .L_ALT_op_mul_float: /* 0xa8 */ 10390 /* File: x86/alt_stub.S */ 10391 /* 10392 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10393 * any interesting requests and then jump to the real instruction 10394 * handler. Unlike the Arm handler, we can't do this as a tail call 10395 * because rIBASE is caller save and we need to reload it. 10396 * 10397 * Note that unlike in the Arm implementation, we should never arrive 10398 * here with a zero breakFlag because we always refresh rIBASE on 10399 * return. 10400 */ 10401 .extern MterpCheckBefore 10402 movl rSELF, %ecx 10403 movl %ecx, OUT_ARG0(%esp) 10404 leal OFF_FP_SHADOWFRAME(rFP), %eax 10405 movl %eax, OUT_ARG1(%esp) 10406 movl rPC, OUT_ARG2(%esp) 10407 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10408 REFRESH_IBASE 10409 jmp .L_op_nop+(168*128) 10410 10411 /* ------------------------------ */ 10412 .balign 128 10413 .L_ALT_op_div_float: /* 0xa9 */ 10414 /* File: x86/alt_stub.S */ 10415 /* 10416 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10417 * any interesting requests and then jump to the real instruction 10418 * handler. Unlike the Arm handler, we can't do this as a tail call 10419 * because rIBASE is caller save and we need to reload it. 10420 * 10421 * Note that unlike in the Arm implementation, we should never arrive 10422 * here with a zero breakFlag because we always refresh rIBASE on 10423 * return. 10424 */ 10425 .extern MterpCheckBefore 10426 movl rSELF, %ecx 10427 movl %ecx, OUT_ARG0(%esp) 10428 leal OFF_FP_SHADOWFRAME(rFP), %eax 10429 movl %eax, OUT_ARG1(%esp) 10430 movl rPC, OUT_ARG2(%esp) 10431 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10432 REFRESH_IBASE 10433 jmp .L_op_nop+(169*128) 10434 10435 /* ------------------------------ */ 10436 .balign 128 10437 .L_ALT_op_rem_float: /* 0xaa */ 10438 /* File: x86/alt_stub.S */ 10439 /* 10440 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10441 * any interesting requests and then jump to the real instruction 10442 * handler. Unlike the Arm handler, we can't do this as a tail call 10443 * because rIBASE is caller save and we need to reload it. 10444 * 10445 * Note that unlike in the Arm implementation, we should never arrive 10446 * here with a zero breakFlag because we always refresh rIBASE on 10447 * return. 10448 */ 10449 .extern MterpCheckBefore 10450 movl rSELF, %ecx 10451 movl %ecx, OUT_ARG0(%esp) 10452 leal OFF_FP_SHADOWFRAME(rFP), %eax 10453 movl %eax, OUT_ARG1(%esp) 10454 movl rPC, OUT_ARG2(%esp) 10455 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10456 REFRESH_IBASE 10457 jmp .L_op_nop+(170*128) 10458 10459 /* ------------------------------ */ 10460 .balign 128 10461 .L_ALT_op_add_double: /* 0xab */ 10462 /* File: x86/alt_stub.S */ 10463 /* 10464 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10465 * any interesting requests and then jump to the real instruction 10466 * handler. Unlike the Arm handler, we can't do this as a tail call 10467 * because rIBASE is caller save and we need to reload it. 10468 * 10469 * Note that unlike in the Arm implementation, we should never arrive 10470 * here with a zero breakFlag because we always refresh rIBASE on 10471 * return. 10472 */ 10473 .extern MterpCheckBefore 10474 movl rSELF, %ecx 10475 movl %ecx, OUT_ARG0(%esp) 10476 leal OFF_FP_SHADOWFRAME(rFP), %eax 10477 movl %eax, OUT_ARG1(%esp) 10478 movl rPC, OUT_ARG2(%esp) 10479 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10480 REFRESH_IBASE 10481 jmp .L_op_nop+(171*128) 10482 10483 /* ------------------------------ */ 10484 .balign 128 10485 .L_ALT_op_sub_double: /* 0xac */ 10486 /* File: x86/alt_stub.S */ 10487 /* 10488 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10489 * any interesting requests and then jump to the real instruction 10490 * handler. Unlike the Arm handler, we can't do this as a tail call 10491 * because rIBASE is caller save and we need to reload it. 10492 * 10493 * Note that unlike in the Arm implementation, we should never arrive 10494 * here with a zero breakFlag because we always refresh rIBASE on 10495 * return. 10496 */ 10497 .extern MterpCheckBefore 10498 movl rSELF, %ecx 10499 movl %ecx, OUT_ARG0(%esp) 10500 leal OFF_FP_SHADOWFRAME(rFP), %eax 10501 movl %eax, OUT_ARG1(%esp) 10502 movl rPC, OUT_ARG2(%esp) 10503 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10504 REFRESH_IBASE 10505 jmp .L_op_nop+(172*128) 10506 10507 /* ------------------------------ */ 10508 .balign 128 10509 .L_ALT_op_mul_double: /* 0xad */ 10510 /* File: x86/alt_stub.S */ 10511 /* 10512 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10513 * any interesting requests and then jump to the real instruction 10514 * handler. Unlike the Arm handler, we can't do this as a tail call 10515 * because rIBASE is caller save and we need to reload it. 10516 * 10517 * Note that unlike in the Arm implementation, we should never arrive 10518 * here with a zero breakFlag because we always refresh rIBASE on 10519 * return. 10520 */ 10521 .extern MterpCheckBefore 10522 movl rSELF, %ecx 10523 movl %ecx, OUT_ARG0(%esp) 10524 leal OFF_FP_SHADOWFRAME(rFP), %eax 10525 movl %eax, OUT_ARG1(%esp) 10526 movl rPC, OUT_ARG2(%esp) 10527 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10528 REFRESH_IBASE 10529 jmp .L_op_nop+(173*128) 10530 10531 /* ------------------------------ */ 10532 .balign 128 10533 .L_ALT_op_div_double: /* 0xae */ 10534 /* File: x86/alt_stub.S */ 10535 /* 10536 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10537 * any interesting requests and then jump to the real instruction 10538 * handler. Unlike the Arm handler, we can't do this as a tail call 10539 * because rIBASE is caller save and we need to reload it. 10540 * 10541 * Note that unlike in the Arm implementation, we should never arrive 10542 * here with a zero breakFlag because we always refresh rIBASE on 10543 * return. 10544 */ 10545 .extern MterpCheckBefore 10546 movl rSELF, %ecx 10547 movl %ecx, OUT_ARG0(%esp) 10548 leal OFF_FP_SHADOWFRAME(rFP), %eax 10549 movl %eax, OUT_ARG1(%esp) 10550 movl rPC, OUT_ARG2(%esp) 10551 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10552 REFRESH_IBASE 10553 jmp .L_op_nop+(174*128) 10554 10555 /* ------------------------------ */ 10556 .balign 128 10557 .L_ALT_op_rem_double: /* 0xaf */ 10558 /* File: x86/alt_stub.S */ 10559 /* 10560 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10561 * any interesting requests and then jump to the real instruction 10562 * handler. Unlike the Arm handler, we can't do this as a tail call 10563 * because rIBASE is caller save and we need to reload it. 10564 * 10565 * Note that unlike in the Arm implementation, we should never arrive 10566 * here with a zero breakFlag because we always refresh rIBASE on 10567 * return. 10568 */ 10569 .extern MterpCheckBefore 10570 movl rSELF, %ecx 10571 movl %ecx, OUT_ARG0(%esp) 10572 leal OFF_FP_SHADOWFRAME(rFP), %eax 10573 movl %eax, OUT_ARG1(%esp) 10574 movl rPC, OUT_ARG2(%esp) 10575 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10576 REFRESH_IBASE 10577 jmp .L_op_nop+(175*128) 10578 10579 /* ------------------------------ */ 10580 .balign 128 10581 .L_ALT_op_add_int_2addr: /* 0xb0 */ 10582 /* File: x86/alt_stub.S */ 10583 /* 10584 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10585 * any interesting requests and then jump to the real instruction 10586 * handler. Unlike the Arm handler, we can't do this as a tail call 10587 * because rIBASE is caller save and we need to reload it. 10588 * 10589 * Note that unlike in the Arm implementation, we should never arrive 10590 * here with a zero breakFlag because we always refresh rIBASE on 10591 * return. 10592 */ 10593 .extern MterpCheckBefore 10594 movl rSELF, %ecx 10595 movl %ecx, OUT_ARG0(%esp) 10596 leal OFF_FP_SHADOWFRAME(rFP), %eax 10597 movl %eax, OUT_ARG1(%esp) 10598 movl rPC, OUT_ARG2(%esp) 10599 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10600 REFRESH_IBASE 10601 jmp .L_op_nop+(176*128) 10602 10603 /* ------------------------------ */ 10604 .balign 128 10605 .L_ALT_op_sub_int_2addr: /* 0xb1 */ 10606 /* File: x86/alt_stub.S */ 10607 /* 10608 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10609 * any interesting requests and then jump to the real instruction 10610 * handler. Unlike the Arm handler, we can't do this as a tail call 10611 * because rIBASE is caller save and we need to reload it. 10612 * 10613 * Note that unlike in the Arm implementation, we should never arrive 10614 * here with a zero breakFlag because we always refresh rIBASE on 10615 * return. 10616 */ 10617 .extern MterpCheckBefore 10618 movl rSELF, %ecx 10619 movl %ecx, OUT_ARG0(%esp) 10620 leal OFF_FP_SHADOWFRAME(rFP), %eax 10621 movl %eax, OUT_ARG1(%esp) 10622 movl rPC, OUT_ARG2(%esp) 10623 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10624 REFRESH_IBASE 10625 jmp .L_op_nop+(177*128) 10626 10627 /* ------------------------------ */ 10628 .balign 128 10629 .L_ALT_op_mul_int_2addr: /* 0xb2 */ 10630 /* File: x86/alt_stub.S */ 10631 /* 10632 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10633 * any interesting requests and then jump to the real instruction 10634 * handler. Unlike the Arm handler, we can't do this as a tail call 10635 * because rIBASE is caller save and we need to reload it. 10636 * 10637 * Note that unlike in the Arm implementation, we should never arrive 10638 * here with a zero breakFlag because we always refresh rIBASE on 10639 * return. 10640 */ 10641 .extern MterpCheckBefore 10642 movl rSELF, %ecx 10643 movl %ecx, OUT_ARG0(%esp) 10644 leal OFF_FP_SHADOWFRAME(rFP), %eax 10645 movl %eax, OUT_ARG1(%esp) 10646 movl rPC, OUT_ARG2(%esp) 10647 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10648 REFRESH_IBASE 10649 jmp .L_op_nop+(178*128) 10650 10651 /* ------------------------------ */ 10652 .balign 128 10653 .L_ALT_op_div_int_2addr: /* 0xb3 */ 10654 /* File: x86/alt_stub.S */ 10655 /* 10656 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10657 * any interesting requests and then jump to the real instruction 10658 * handler. Unlike the Arm handler, we can't do this as a tail call 10659 * because rIBASE is caller save and we need to reload it. 10660 * 10661 * Note that unlike in the Arm implementation, we should never arrive 10662 * here with a zero breakFlag because we always refresh rIBASE on 10663 * return. 10664 */ 10665 .extern MterpCheckBefore 10666 movl rSELF, %ecx 10667 movl %ecx, OUT_ARG0(%esp) 10668 leal OFF_FP_SHADOWFRAME(rFP), %eax 10669 movl %eax, OUT_ARG1(%esp) 10670 movl rPC, OUT_ARG2(%esp) 10671 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10672 REFRESH_IBASE 10673 jmp .L_op_nop+(179*128) 10674 10675 /* ------------------------------ */ 10676 .balign 128 10677 .L_ALT_op_rem_int_2addr: /* 0xb4 */ 10678 /* File: x86/alt_stub.S */ 10679 /* 10680 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10681 * any interesting requests and then jump to the real instruction 10682 * handler. Unlike the Arm handler, we can't do this as a tail call 10683 * because rIBASE is caller save and we need to reload it. 10684 * 10685 * Note that unlike in the Arm implementation, we should never arrive 10686 * here with a zero breakFlag because we always refresh rIBASE on 10687 * return. 10688 */ 10689 .extern MterpCheckBefore 10690 movl rSELF, %ecx 10691 movl %ecx, OUT_ARG0(%esp) 10692 leal OFF_FP_SHADOWFRAME(rFP), %eax 10693 movl %eax, OUT_ARG1(%esp) 10694 movl rPC, OUT_ARG2(%esp) 10695 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10696 REFRESH_IBASE 10697 jmp .L_op_nop+(180*128) 10698 10699 /* ------------------------------ */ 10700 .balign 128 10701 .L_ALT_op_and_int_2addr: /* 0xb5 */ 10702 /* File: x86/alt_stub.S */ 10703 /* 10704 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10705 * any interesting requests and then jump to the real instruction 10706 * handler. Unlike the Arm handler, we can't do this as a tail call 10707 * because rIBASE is caller save and we need to reload it. 10708 * 10709 * Note that unlike in the Arm implementation, we should never arrive 10710 * here with a zero breakFlag because we always refresh rIBASE on 10711 * return. 10712 */ 10713 .extern MterpCheckBefore 10714 movl rSELF, %ecx 10715 movl %ecx, OUT_ARG0(%esp) 10716 leal OFF_FP_SHADOWFRAME(rFP), %eax 10717 movl %eax, OUT_ARG1(%esp) 10718 movl rPC, OUT_ARG2(%esp) 10719 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10720 REFRESH_IBASE 10721 jmp .L_op_nop+(181*128) 10722 10723 /* ------------------------------ */ 10724 .balign 128 10725 .L_ALT_op_or_int_2addr: /* 0xb6 */ 10726 /* File: x86/alt_stub.S */ 10727 /* 10728 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10729 * any interesting requests and then jump to the real instruction 10730 * handler. Unlike the Arm handler, we can't do this as a tail call 10731 * because rIBASE is caller save and we need to reload it. 10732 * 10733 * Note that unlike in the Arm implementation, we should never arrive 10734 * here with a zero breakFlag because we always refresh rIBASE on 10735 * return. 10736 */ 10737 .extern MterpCheckBefore 10738 movl rSELF, %ecx 10739 movl %ecx, OUT_ARG0(%esp) 10740 leal OFF_FP_SHADOWFRAME(rFP), %eax 10741 movl %eax, OUT_ARG1(%esp) 10742 movl rPC, OUT_ARG2(%esp) 10743 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10744 REFRESH_IBASE 10745 jmp .L_op_nop+(182*128) 10746 10747 /* ------------------------------ */ 10748 .balign 128 10749 .L_ALT_op_xor_int_2addr: /* 0xb7 */ 10750 /* File: x86/alt_stub.S */ 10751 /* 10752 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10753 * any interesting requests and then jump to the real instruction 10754 * handler. Unlike the Arm handler, we can't do this as a tail call 10755 * because rIBASE is caller save and we need to reload it. 10756 * 10757 * Note that unlike in the Arm implementation, we should never arrive 10758 * here with a zero breakFlag because we always refresh rIBASE on 10759 * return. 10760 */ 10761 .extern MterpCheckBefore 10762 movl rSELF, %ecx 10763 movl %ecx, OUT_ARG0(%esp) 10764 leal OFF_FP_SHADOWFRAME(rFP), %eax 10765 movl %eax, OUT_ARG1(%esp) 10766 movl rPC, OUT_ARG2(%esp) 10767 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10768 REFRESH_IBASE 10769 jmp .L_op_nop+(183*128) 10770 10771 /* ------------------------------ */ 10772 .balign 128 10773 .L_ALT_op_shl_int_2addr: /* 0xb8 */ 10774 /* File: x86/alt_stub.S */ 10775 /* 10776 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10777 * any interesting requests and then jump to the real instruction 10778 * handler. Unlike the Arm handler, we can't do this as a tail call 10779 * because rIBASE is caller save and we need to reload it. 10780 * 10781 * Note that unlike in the Arm implementation, we should never arrive 10782 * here with a zero breakFlag because we always refresh rIBASE on 10783 * return. 10784 */ 10785 .extern MterpCheckBefore 10786 movl rSELF, %ecx 10787 movl %ecx, OUT_ARG0(%esp) 10788 leal OFF_FP_SHADOWFRAME(rFP), %eax 10789 movl %eax, OUT_ARG1(%esp) 10790 movl rPC, OUT_ARG2(%esp) 10791 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10792 REFRESH_IBASE 10793 jmp .L_op_nop+(184*128) 10794 10795 /* ------------------------------ */ 10796 .balign 128 10797 .L_ALT_op_shr_int_2addr: /* 0xb9 */ 10798 /* File: x86/alt_stub.S */ 10799 /* 10800 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10801 * any interesting requests and then jump to the real instruction 10802 * handler. Unlike the Arm handler, we can't do this as a tail call 10803 * because rIBASE is caller save and we need to reload it. 10804 * 10805 * Note that unlike in the Arm implementation, we should never arrive 10806 * here with a zero breakFlag because we always refresh rIBASE on 10807 * return. 10808 */ 10809 .extern MterpCheckBefore 10810 movl rSELF, %ecx 10811 movl %ecx, OUT_ARG0(%esp) 10812 leal OFF_FP_SHADOWFRAME(rFP), %eax 10813 movl %eax, OUT_ARG1(%esp) 10814 movl rPC, OUT_ARG2(%esp) 10815 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10816 REFRESH_IBASE 10817 jmp .L_op_nop+(185*128) 10818 10819 /* ------------------------------ */ 10820 .balign 128 10821 .L_ALT_op_ushr_int_2addr: /* 0xba */ 10822 /* File: x86/alt_stub.S */ 10823 /* 10824 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10825 * any interesting requests and then jump to the real instruction 10826 * handler. Unlike the Arm handler, we can't do this as a tail call 10827 * because rIBASE is caller save and we need to reload it. 10828 * 10829 * Note that unlike in the Arm implementation, we should never arrive 10830 * here with a zero breakFlag because we always refresh rIBASE on 10831 * return. 10832 */ 10833 .extern MterpCheckBefore 10834 movl rSELF, %ecx 10835 movl %ecx, OUT_ARG0(%esp) 10836 leal OFF_FP_SHADOWFRAME(rFP), %eax 10837 movl %eax, OUT_ARG1(%esp) 10838 movl rPC, OUT_ARG2(%esp) 10839 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10840 REFRESH_IBASE 10841 jmp .L_op_nop+(186*128) 10842 10843 /* ------------------------------ */ 10844 .balign 128 10845 .L_ALT_op_add_long_2addr: /* 0xbb */ 10846 /* File: x86/alt_stub.S */ 10847 /* 10848 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10849 * any interesting requests and then jump to the real instruction 10850 * handler. Unlike the Arm handler, we can't do this as a tail call 10851 * because rIBASE is caller save and we need to reload it. 10852 * 10853 * Note that unlike in the Arm implementation, we should never arrive 10854 * here with a zero breakFlag because we always refresh rIBASE on 10855 * return. 10856 */ 10857 .extern MterpCheckBefore 10858 movl rSELF, %ecx 10859 movl %ecx, OUT_ARG0(%esp) 10860 leal OFF_FP_SHADOWFRAME(rFP), %eax 10861 movl %eax, OUT_ARG1(%esp) 10862 movl rPC, OUT_ARG2(%esp) 10863 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10864 REFRESH_IBASE 10865 jmp .L_op_nop+(187*128) 10866 10867 /* ------------------------------ */ 10868 .balign 128 10869 .L_ALT_op_sub_long_2addr: /* 0xbc */ 10870 /* File: x86/alt_stub.S */ 10871 /* 10872 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10873 * any interesting requests and then jump to the real instruction 10874 * handler. Unlike the Arm handler, we can't do this as a tail call 10875 * because rIBASE is caller save and we need to reload it. 10876 * 10877 * Note that unlike in the Arm implementation, we should never arrive 10878 * here with a zero breakFlag because we always refresh rIBASE on 10879 * return. 10880 */ 10881 .extern MterpCheckBefore 10882 movl rSELF, %ecx 10883 movl %ecx, OUT_ARG0(%esp) 10884 leal OFF_FP_SHADOWFRAME(rFP), %eax 10885 movl %eax, OUT_ARG1(%esp) 10886 movl rPC, OUT_ARG2(%esp) 10887 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10888 REFRESH_IBASE 10889 jmp .L_op_nop+(188*128) 10890 10891 /* ------------------------------ */ 10892 .balign 128 10893 .L_ALT_op_mul_long_2addr: /* 0xbd */ 10894 /* File: x86/alt_stub.S */ 10895 /* 10896 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10897 * any interesting requests and then jump to the real instruction 10898 * handler. Unlike the Arm handler, we can't do this as a tail call 10899 * because rIBASE is caller save and we need to reload it. 10900 * 10901 * Note that unlike in the Arm implementation, we should never arrive 10902 * here with a zero breakFlag because we always refresh rIBASE on 10903 * return. 10904 */ 10905 .extern MterpCheckBefore 10906 movl rSELF, %ecx 10907 movl %ecx, OUT_ARG0(%esp) 10908 leal OFF_FP_SHADOWFRAME(rFP), %eax 10909 movl %eax, OUT_ARG1(%esp) 10910 movl rPC, OUT_ARG2(%esp) 10911 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10912 REFRESH_IBASE 10913 jmp .L_op_nop+(189*128) 10914 10915 /* ------------------------------ */ 10916 .balign 128 10917 .L_ALT_op_div_long_2addr: /* 0xbe */ 10918 /* File: x86/alt_stub.S */ 10919 /* 10920 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10921 * any interesting requests and then jump to the real instruction 10922 * handler. Unlike the Arm handler, we can't do this as a tail call 10923 * because rIBASE is caller save and we need to reload it. 10924 * 10925 * Note that unlike in the Arm implementation, we should never arrive 10926 * here with a zero breakFlag because we always refresh rIBASE on 10927 * return. 10928 */ 10929 .extern MterpCheckBefore 10930 movl rSELF, %ecx 10931 movl %ecx, OUT_ARG0(%esp) 10932 leal OFF_FP_SHADOWFRAME(rFP), %eax 10933 movl %eax, OUT_ARG1(%esp) 10934 movl rPC, OUT_ARG2(%esp) 10935 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10936 REFRESH_IBASE 10937 jmp .L_op_nop+(190*128) 10938 10939 /* ------------------------------ */ 10940 .balign 128 10941 .L_ALT_op_rem_long_2addr: /* 0xbf */ 10942 /* File: x86/alt_stub.S */ 10943 /* 10944 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10945 * any interesting requests and then jump to the real instruction 10946 * handler. Unlike the Arm handler, we can't do this as a tail call 10947 * because rIBASE is caller save and we need to reload it. 10948 * 10949 * Note that unlike in the Arm implementation, we should never arrive 10950 * here with a zero breakFlag because we always refresh rIBASE on 10951 * return. 10952 */ 10953 .extern MterpCheckBefore 10954 movl rSELF, %ecx 10955 movl %ecx, OUT_ARG0(%esp) 10956 leal OFF_FP_SHADOWFRAME(rFP), %eax 10957 movl %eax, OUT_ARG1(%esp) 10958 movl rPC, OUT_ARG2(%esp) 10959 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10960 REFRESH_IBASE 10961 jmp .L_op_nop+(191*128) 10962 10963 /* ------------------------------ */ 10964 .balign 128 10965 .L_ALT_op_and_long_2addr: /* 0xc0 */ 10966 /* File: x86/alt_stub.S */ 10967 /* 10968 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10969 * any interesting requests and then jump to the real instruction 10970 * handler. Unlike the Arm handler, we can't do this as a tail call 10971 * because rIBASE is caller save and we need to reload it. 10972 * 10973 * Note that unlike in the Arm implementation, we should never arrive 10974 * here with a zero breakFlag because we always refresh rIBASE on 10975 * return. 10976 */ 10977 .extern MterpCheckBefore 10978 movl rSELF, %ecx 10979 movl %ecx, OUT_ARG0(%esp) 10980 leal OFF_FP_SHADOWFRAME(rFP), %eax 10981 movl %eax, OUT_ARG1(%esp) 10982 movl rPC, OUT_ARG2(%esp) 10983 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10984 REFRESH_IBASE 10985 jmp .L_op_nop+(192*128) 10986 10987 /* ------------------------------ */ 10988 .balign 128 10989 .L_ALT_op_or_long_2addr: /* 0xc1 */ 10990 /* File: x86/alt_stub.S */ 10991 /* 10992 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10993 * any interesting requests and then jump to the real instruction 10994 * handler. Unlike the Arm handler, we can't do this as a tail call 10995 * because rIBASE is caller save and we need to reload it. 10996 * 10997 * Note that unlike in the Arm implementation, we should never arrive 10998 * here with a zero breakFlag because we always refresh rIBASE on 10999 * return. 11000 */ 11001 .extern MterpCheckBefore 11002 movl rSELF, %ecx 11003 movl %ecx, OUT_ARG0(%esp) 11004 leal OFF_FP_SHADOWFRAME(rFP), %eax 11005 movl %eax, OUT_ARG1(%esp) 11006 movl rPC, OUT_ARG2(%esp) 11007 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11008 REFRESH_IBASE 11009 jmp .L_op_nop+(193*128) 11010 11011 /* ------------------------------ */ 11012 .balign 128 11013 .L_ALT_op_xor_long_2addr: /* 0xc2 */ 11014 /* File: x86/alt_stub.S */ 11015 /* 11016 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11017 * any interesting requests and then jump to the real instruction 11018 * handler. Unlike the Arm handler, we can't do this as a tail call 11019 * because rIBASE is caller save and we need to reload it. 11020 * 11021 * Note that unlike in the Arm implementation, we should never arrive 11022 * here with a zero breakFlag because we always refresh rIBASE on 11023 * return. 11024 */ 11025 .extern MterpCheckBefore 11026 movl rSELF, %ecx 11027 movl %ecx, OUT_ARG0(%esp) 11028 leal OFF_FP_SHADOWFRAME(rFP), %eax 11029 movl %eax, OUT_ARG1(%esp) 11030 movl rPC, OUT_ARG2(%esp) 11031 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11032 REFRESH_IBASE 11033 jmp .L_op_nop+(194*128) 11034 11035 /* ------------------------------ */ 11036 .balign 128 11037 .L_ALT_op_shl_long_2addr: /* 0xc3 */ 11038 /* File: x86/alt_stub.S */ 11039 /* 11040 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11041 * any interesting requests and then jump to the real instruction 11042 * handler. Unlike the Arm handler, we can't do this as a tail call 11043 * because rIBASE is caller save and we need to reload it. 11044 * 11045 * Note that unlike in the Arm implementation, we should never arrive 11046 * here with a zero breakFlag because we always refresh rIBASE on 11047 * return. 11048 */ 11049 .extern MterpCheckBefore 11050 movl rSELF, %ecx 11051 movl %ecx, OUT_ARG0(%esp) 11052 leal OFF_FP_SHADOWFRAME(rFP), %eax 11053 movl %eax, OUT_ARG1(%esp) 11054 movl rPC, OUT_ARG2(%esp) 11055 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11056 REFRESH_IBASE 11057 jmp .L_op_nop+(195*128) 11058 11059 /* ------------------------------ */ 11060 .balign 128 11061 .L_ALT_op_shr_long_2addr: /* 0xc4 */ 11062 /* File: x86/alt_stub.S */ 11063 /* 11064 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11065 * any interesting requests and then jump to the real instruction 11066 * handler. Unlike the Arm handler, we can't do this as a tail call 11067 * because rIBASE is caller save and we need to reload it. 11068 * 11069 * Note that unlike in the Arm implementation, we should never arrive 11070 * here with a zero breakFlag because we always refresh rIBASE on 11071 * return. 11072 */ 11073 .extern MterpCheckBefore 11074 movl rSELF, %ecx 11075 movl %ecx, OUT_ARG0(%esp) 11076 leal OFF_FP_SHADOWFRAME(rFP), %eax 11077 movl %eax, OUT_ARG1(%esp) 11078 movl rPC, OUT_ARG2(%esp) 11079 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11080 REFRESH_IBASE 11081 jmp .L_op_nop+(196*128) 11082 11083 /* ------------------------------ */ 11084 .balign 128 11085 .L_ALT_op_ushr_long_2addr: /* 0xc5 */ 11086 /* File: x86/alt_stub.S */ 11087 /* 11088 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11089 * any interesting requests and then jump to the real instruction 11090 * handler. Unlike the Arm handler, we can't do this as a tail call 11091 * because rIBASE is caller save and we need to reload it. 11092 * 11093 * Note that unlike in the Arm implementation, we should never arrive 11094 * here with a zero breakFlag because we always refresh rIBASE on 11095 * return. 11096 */ 11097 .extern MterpCheckBefore 11098 movl rSELF, %ecx 11099 movl %ecx, OUT_ARG0(%esp) 11100 leal OFF_FP_SHADOWFRAME(rFP), %eax 11101 movl %eax, OUT_ARG1(%esp) 11102 movl rPC, OUT_ARG2(%esp) 11103 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11104 REFRESH_IBASE 11105 jmp .L_op_nop+(197*128) 11106 11107 /* ------------------------------ */ 11108 .balign 128 11109 .L_ALT_op_add_float_2addr: /* 0xc6 */ 11110 /* File: x86/alt_stub.S */ 11111 /* 11112 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11113 * any interesting requests and then jump to the real instruction 11114 * handler. Unlike the Arm handler, we can't do this as a tail call 11115 * because rIBASE is caller save and we need to reload it. 11116 * 11117 * Note that unlike in the Arm implementation, we should never arrive 11118 * here with a zero breakFlag because we always refresh rIBASE on 11119 * return. 11120 */ 11121 .extern MterpCheckBefore 11122 movl rSELF, %ecx 11123 movl %ecx, OUT_ARG0(%esp) 11124 leal OFF_FP_SHADOWFRAME(rFP), %eax 11125 movl %eax, OUT_ARG1(%esp) 11126 movl rPC, OUT_ARG2(%esp) 11127 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11128 REFRESH_IBASE 11129 jmp .L_op_nop+(198*128) 11130 11131 /* ------------------------------ */ 11132 .balign 128 11133 .L_ALT_op_sub_float_2addr: /* 0xc7 */ 11134 /* File: x86/alt_stub.S */ 11135 /* 11136 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11137 * any interesting requests and then jump to the real instruction 11138 * handler. Unlike the Arm handler, we can't do this as a tail call 11139 * because rIBASE is caller save and we need to reload it. 11140 * 11141 * Note that unlike in the Arm implementation, we should never arrive 11142 * here with a zero breakFlag because we always refresh rIBASE on 11143 * return. 11144 */ 11145 .extern MterpCheckBefore 11146 movl rSELF, %ecx 11147 movl %ecx, OUT_ARG0(%esp) 11148 leal OFF_FP_SHADOWFRAME(rFP), %eax 11149 movl %eax, OUT_ARG1(%esp) 11150 movl rPC, OUT_ARG2(%esp) 11151 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11152 REFRESH_IBASE 11153 jmp .L_op_nop+(199*128) 11154 11155 /* ------------------------------ */ 11156 .balign 128 11157 .L_ALT_op_mul_float_2addr: /* 0xc8 */ 11158 /* File: x86/alt_stub.S */ 11159 /* 11160 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11161 * any interesting requests and then jump to the real instruction 11162 * handler. Unlike the Arm handler, we can't do this as a tail call 11163 * because rIBASE is caller save and we need to reload it. 11164 * 11165 * Note that unlike in the Arm implementation, we should never arrive 11166 * here with a zero breakFlag because we always refresh rIBASE on 11167 * return. 11168 */ 11169 .extern MterpCheckBefore 11170 movl rSELF, %ecx 11171 movl %ecx, OUT_ARG0(%esp) 11172 leal OFF_FP_SHADOWFRAME(rFP), %eax 11173 movl %eax, OUT_ARG1(%esp) 11174 movl rPC, OUT_ARG2(%esp) 11175 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11176 REFRESH_IBASE 11177 jmp .L_op_nop+(200*128) 11178 11179 /* ------------------------------ */ 11180 .balign 128 11181 .L_ALT_op_div_float_2addr: /* 0xc9 */ 11182 /* File: x86/alt_stub.S */ 11183 /* 11184 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11185 * any interesting requests and then jump to the real instruction 11186 * handler. Unlike the Arm handler, we can't do this as a tail call 11187 * because rIBASE is caller save and we need to reload it. 11188 * 11189 * Note that unlike in the Arm implementation, we should never arrive 11190 * here with a zero breakFlag because we always refresh rIBASE on 11191 * return. 11192 */ 11193 .extern MterpCheckBefore 11194 movl rSELF, %ecx 11195 movl %ecx, OUT_ARG0(%esp) 11196 leal OFF_FP_SHADOWFRAME(rFP), %eax 11197 movl %eax, OUT_ARG1(%esp) 11198 movl rPC, OUT_ARG2(%esp) 11199 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11200 REFRESH_IBASE 11201 jmp .L_op_nop+(201*128) 11202 11203 /* ------------------------------ */ 11204 .balign 128 11205 .L_ALT_op_rem_float_2addr: /* 0xca */ 11206 /* File: x86/alt_stub.S */ 11207 /* 11208 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11209 * any interesting requests and then jump to the real instruction 11210 * handler. Unlike the Arm handler, we can't do this as a tail call 11211 * because rIBASE is caller save and we need to reload it. 11212 * 11213 * Note that unlike in the Arm implementation, we should never arrive 11214 * here with a zero breakFlag because we always refresh rIBASE on 11215 * return. 11216 */ 11217 .extern MterpCheckBefore 11218 movl rSELF, %ecx 11219 movl %ecx, OUT_ARG0(%esp) 11220 leal OFF_FP_SHADOWFRAME(rFP), %eax 11221 movl %eax, OUT_ARG1(%esp) 11222 movl rPC, OUT_ARG2(%esp) 11223 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11224 REFRESH_IBASE 11225 jmp .L_op_nop+(202*128) 11226 11227 /* ------------------------------ */ 11228 .balign 128 11229 .L_ALT_op_add_double_2addr: /* 0xcb */ 11230 /* File: x86/alt_stub.S */ 11231 /* 11232 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11233 * any interesting requests and then jump to the real instruction 11234 * handler. Unlike the Arm handler, we can't do this as a tail call 11235 * because rIBASE is caller save and we need to reload it. 11236 * 11237 * Note that unlike in the Arm implementation, we should never arrive 11238 * here with a zero breakFlag because we always refresh rIBASE on 11239 * return. 11240 */ 11241 .extern MterpCheckBefore 11242 movl rSELF, %ecx 11243 movl %ecx, OUT_ARG0(%esp) 11244 leal OFF_FP_SHADOWFRAME(rFP), %eax 11245 movl %eax, OUT_ARG1(%esp) 11246 movl rPC, OUT_ARG2(%esp) 11247 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11248 REFRESH_IBASE 11249 jmp .L_op_nop+(203*128) 11250 11251 /* ------------------------------ */ 11252 .balign 128 11253 .L_ALT_op_sub_double_2addr: /* 0xcc */ 11254 /* File: x86/alt_stub.S */ 11255 /* 11256 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11257 * any interesting requests and then jump to the real instruction 11258 * handler. Unlike the Arm handler, we can't do this as a tail call 11259 * because rIBASE is caller save and we need to reload it. 11260 * 11261 * Note that unlike in the Arm implementation, we should never arrive 11262 * here with a zero breakFlag because we always refresh rIBASE on 11263 * return. 11264 */ 11265 .extern MterpCheckBefore 11266 movl rSELF, %ecx 11267 movl %ecx, OUT_ARG0(%esp) 11268 leal OFF_FP_SHADOWFRAME(rFP), %eax 11269 movl %eax, OUT_ARG1(%esp) 11270 movl rPC, OUT_ARG2(%esp) 11271 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11272 REFRESH_IBASE 11273 jmp .L_op_nop+(204*128) 11274 11275 /* ------------------------------ */ 11276 .balign 128 11277 .L_ALT_op_mul_double_2addr: /* 0xcd */ 11278 /* File: x86/alt_stub.S */ 11279 /* 11280 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11281 * any interesting requests and then jump to the real instruction 11282 * handler. Unlike the Arm handler, we can't do this as a tail call 11283 * because rIBASE is caller save and we need to reload it. 11284 * 11285 * Note that unlike in the Arm implementation, we should never arrive 11286 * here with a zero breakFlag because we always refresh rIBASE on 11287 * return. 11288 */ 11289 .extern MterpCheckBefore 11290 movl rSELF, %ecx 11291 movl %ecx, OUT_ARG0(%esp) 11292 leal OFF_FP_SHADOWFRAME(rFP), %eax 11293 movl %eax, OUT_ARG1(%esp) 11294 movl rPC, OUT_ARG2(%esp) 11295 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11296 REFRESH_IBASE 11297 jmp .L_op_nop+(205*128) 11298 11299 /* ------------------------------ */ 11300 .balign 128 11301 .L_ALT_op_div_double_2addr: /* 0xce */ 11302 /* File: x86/alt_stub.S */ 11303 /* 11304 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11305 * any interesting requests and then jump to the real instruction 11306 * handler. Unlike the Arm handler, we can't do this as a tail call 11307 * because rIBASE is caller save and we need to reload it. 11308 * 11309 * Note that unlike in the Arm implementation, we should never arrive 11310 * here with a zero breakFlag because we always refresh rIBASE on 11311 * return. 11312 */ 11313 .extern MterpCheckBefore 11314 movl rSELF, %ecx 11315 movl %ecx, OUT_ARG0(%esp) 11316 leal OFF_FP_SHADOWFRAME(rFP), %eax 11317 movl %eax, OUT_ARG1(%esp) 11318 movl rPC, OUT_ARG2(%esp) 11319 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11320 REFRESH_IBASE 11321 jmp .L_op_nop+(206*128) 11322 11323 /* ------------------------------ */ 11324 .balign 128 11325 .L_ALT_op_rem_double_2addr: /* 0xcf */ 11326 /* File: x86/alt_stub.S */ 11327 /* 11328 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11329 * any interesting requests and then jump to the real instruction 11330 * handler. Unlike the Arm handler, we can't do this as a tail call 11331 * because rIBASE is caller save and we need to reload it. 11332 * 11333 * Note that unlike in the Arm implementation, we should never arrive 11334 * here with a zero breakFlag because we always refresh rIBASE on 11335 * return. 11336 */ 11337 .extern MterpCheckBefore 11338 movl rSELF, %ecx 11339 movl %ecx, OUT_ARG0(%esp) 11340 leal OFF_FP_SHADOWFRAME(rFP), %eax 11341 movl %eax, OUT_ARG1(%esp) 11342 movl rPC, OUT_ARG2(%esp) 11343 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11344 REFRESH_IBASE 11345 jmp .L_op_nop+(207*128) 11346 11347 /* ------------------------------ */ 11348 .balign 128 11349 .L_ALT_op_add_int_lit16: /* 0xd0 */ 11350 /* File: x86/alt_stub.S */ 11351 /* 11352 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11353 * any interesting requests and then jump to the real instruction 11354 * handler. Unlike the Arm handler, we can't do this as a tail call 11355 * because rIBASE is caller save and we need to reload it. 11356 * 11357 * Note that unlike in the Arm implementation, we should never arrive 11358 * here with a zero breakFlag because we always refresh rIBASE on 11359 * return. 11360 */ 11361 .extern MterpCheckBefore 11362 movl rSELF, %ecx 11363 movl %ecx, OUT_ARG0(%esp) 11364 leal OFF_FP_SHADOWFRAME(rFP), %eax 11365 movl %eax, OUT_ARG1(%esp) 11366 movl rPC, OUT_ARG2(%esp) 11367 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11368 REFRESH_IBASE 11369 jmp .L_op_nop+(208*128) 11370 11371 /* ------------------------------ */ 11372 .balign 128 11373 .L_ALT_op_rsub_int: /* 0xd1 */ 11374 /* File: x86/alt_stub.S */ 11375 /* 11376 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11377 * any interesting requests and then jump to the real instruction 11378 * handler. Unlike the Arm handler, we can't do this as a tail call 11379 * because rIBASE is caller save and we need to reload it. 11380 * 11381 * Note that unlike in the Arm implementation, we should never arrive 11382 * here with a zero breakFlag because we always refresh rIBASE on 11383 * return. 11384 */ 11385 .extern MterpCheckBefore 11386 movl rSELF, %ecx 11387 movl %ecx, OUT_ARG0(%esp) 11388 leal OFF_FP_SHADOWFRAME(rFP), %eax 11389 movl %eax, OUT_ARG1(%esp) 11390 movl rPC, OUT_ARG2(%esp) 11391 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11392 REFRESH_IBASE 11393 jmp .L_op_nop+(209*128) 11394 11395 /* ------------------------------ */ 11396 .balign 128 11397 .L_ALT_op_mul_int_lit16: /* 0xd2 */ 11398 /* File: x86/alt_stub.S */ 11399 /* 11400 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11401 * any interesting requests and then jump to the real instruction 11402 * handler. Unlike the Arm handler, we can't do this as a tail call 11403 * because rIBASE is caller save and we need to reload it. 11404 * 11405 * Note that unlike in the Arm implementation, we should never arrive 11406 * here with a zero breakFlag because we always refresh rIBASE on 11407 * return. 11408 */ 11409 .extern MterpCheckBefore 11410 movl rSELF, %ecx 11411 movl %ecx, OUT_ARG0(%esp) 11412 leal OFF_FP_SHADOWFRAME(rFP), %eax 11413 movl %eax, OUT_ARG1(%esp) 11414 movl rPC, OUT_ARG2(%esp) 11415 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11416 REFRESH_IBASE 11417 jmp .L_op_nop+(210*128) 11418 11419 /* ------------------------------ */ 11420 .balign 128 11421 .L_ALT_op_div_int_lit16: /* 0xd3 */ 11422 /* File: x86/alt_stub.S */ 11423 /* 11424 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11425 * any interesting requests and then jump to the real instruction 11426 * handler. Unlike the Arm handler, we can't do this as a tail call 11427 * because rIBASE is caller save and we need to reload it. 11428 * 11429 * Note that unlike in the Arm implementation, we should never arrive 11430 * here with a zero breakFlag because we always refresh rIBASE on 11431 * return. 11432 */ 11433 .extern MterpCheckBefore 11434 movl rSELF, %ecx 11435 movl %ecx, OUT_ARG0(%esp) 11436 leal OFF_FP_SHADOWFRAME(rFP), %eax 11437 movl %eax, OUT_ARG1(%esp) 11438 movl rPC, OUT_ARG2(%esp) 11439 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11440 REFRESH_IBASE 11441 jmp .L_op_nop+(211*128) 11442 11443 /* ------------------------------ */ 11444 .balign 128 11445 .L_ALT_op_rem_int_lit16: /* 0xd4 */ 11446 /* File: x86/alt_stub.S */ 11447 /* 11448 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11449 * any interesting requests and then jump to the real instruction 11450 * handler. Unlike the Arm handler, we can't do this as a tail call 11451 * because rIBASE is caller save and we need to reload it. 11452 * 11453 * Note that unlike in the Arm implementation, we should never arrive 11454 * here with a zero breakFlag because we always refresh rIBASE on 11455 * return. 11456 */ 11457 .extern MterpCheckBefore 11458 movl rSELF, %ecx 11459 movl %ecx, OUT_ARG0(%esp) 11460 leal OFF_FP_SHADOWFRAME(rFP), %eax 11461 movl %eax, OUT_ARG1(%esp) 11462 movl rPC, OUT_ARG2(%esp) 11463 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11464 REFRESH_IBASE 11465 jmp .L_op_nop+(212*128) 11466 11467 /* ------------------------------ */ 11468 .balign 128 11469 .L_ALT_op_and_int_lit16: /* 0xd5 */ 11470 /* File: x86/alt_stub.S */ 11471 /* 11472 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11473 * any interesting requests and then jump to the real instruction 11474 * handler. Unlike the Arm handler, we can't do this as a tail call 11475 * because rIBASE is caller save and we need to reload it. 11476 * 11477 * Note that unlike in the Arm implementation, we should never arrive 11478 * here with a zero breakFlag because we always refresh rIBASE on 11479 * return. 11480 */ 11481 .extern MterpCheckBefore 11482 movl rSELF, %ecx 11483 movl %ecx, OUT_ARG0(%esp) 11484 leal OFF_FP_SHADOWFRAME(rFP), %eax 11485 movl %eax, OUT_ARG1(%esp) 11486 movl rPC, OUT_ARG2(%esp) 11487 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11488 REFRESH_IBASE 11489 jmp .L_op_nop+(213*128) 11490 11491 /* ------------------------------ */ 11492 .balign 128 11493 .L_ALT_op_or_int_lit16: /* 0xd6 */ 11494 /* File: x86/alt_stub.S */ 11495 /* 11496 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11497 * any interesting requests and then jump to the real instruction 11498 * handler. Unlike the Arm handler, we can't do this as a tail call 11499 * because rIBASE is caller save and we need to reload it. 11500 * 11501 * Note that unlike in the Arm implementation, we should never arrive 11502 * here with a zero breakFlag because we always refresh rIBASE on 11503 * return. 11504 */ 11505 .extern MterpCheckBefore 11506 movl rSELF, %ecx 11507 movl %ecx, OUT_ARG0(%esp) 11508 leal OFF_FP_SHADOWFRAME(rFP), %eax 11509 movl %eax, OUT_ARG1(%esp) 11510 movl rPC, OUT_ARG2(%esp) 11511 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11512 REFRESH_IBASE 11513 jmp .L_op_nop+(214*128) 11514 11515 /* ------------------------------ */ 11516 .balign 128 11517 .L_ALT_op_xor_int_lit16: /* 0xd7 */ 11518 /* File: x86/alt_stub.S */ 11519 /* 11520 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11521 * any interesting requests and then jump to the real instruction 11522 * handler. Unlike the Arm handler, we can't do this as a tail call 11523 * because rIBASE is caller save and we need to reload it. 11524 * 11525 * Note that unlike in the Arm implementation, we should never arrive 11526 * here with a zero breakFlag because we always refresh rIBASE on 11527 * return. 11528 */ 11529 .extern MterpCheckBefore 11530 movl rSELF, %ecx 11531 movl %ecx, OUT_ARG0(%esp) 11532 leal OFF_FP_SHADOWFRAME(rFP), %eax 11533 movl %eax, OUT_ARG1(%esp) 11534 movl rPC, OUT_ARG2(%esp) 11535 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11536 REFRESH_IBASE 11537 jmp .L_op_nop+(215*128) 11538 11539 /* ------------------------------ */ 11540 .balign 128 11541 .L_ALT_op_add_int_lit8: /* 0xd8 */ 11542 /* File: x86/alt_stub.S */ 11543 /* 11544 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11545 * any interesting requests and then jump to the real instruction 11546 * handler. Unlike the Arm handler, we can't do this as a tail call 11547 * because rIBASE is caller save and we need to reload it. 11548 * 11549 * Note that unlike in the Arm implementation, we should never arrive 11550 * here with a zero breakFlag because we always refresh rIBASE on 11551 * return. 11552 */ 11553 .extern MterpCheckBefore 11554 movl rSELF, %ecx 11555 movl %ecx, OUT_ARG0(%esp) 11556 leal OFF_FP_SHADOWFRAME(rFP), %eax 11557 movl %eax, OUT_ARG1(%esp) 11558 movl rPC, OUT_ARG2(%esp) 11559 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11560 REFRESH_IBASE 11561 jmp .L_op_nop+(216*128) 11562 11563 /* ------------------------------ */ 11564 .balign 128 11565 .L_ALT_op_rsub_int_lit8: /* 0xd9 */ 11566 /* File: x86/alt_stub.S */ 11567 /* 11568 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11569 * any interesting requests and then jump to the real instruction 11570 * handler. Unlike the Arm handler, we can't do this as a tail call 11571 * because rIBASE is caller save and we need to reload it. 11572 * 11573 * Note that unlike in the Arm implementation, we should never arrive 11574 * here with a zero breakFlag because we always refresh rIBASE on 11575 * return. 11576 */ 11577 .extern MterpCheckBefore 11578 movl rSELF, %ecx 11579 movl %ecx, OUT_ARG0(%esp) 11580 leal OFF_FP_SHADOWFRAME(rFP), %eax 11581 movl %eax, OUT_ARG1(%esp) 11582 movl rPC, OUT_ARG2(%esp) 11583 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11584 REFRESH_IBASE 11585 jmp .L_op_nop+(217*128) 11586 11587 /* ------------------------------ */ 11588 .balign 128 11589 .L_ALT_op_mul_int_lit8: /* 0xda */ 11590 /* File: x86/alt_stub.S */ 11591 /* 11592 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11593 * any interesting requests and then jump to the real instruction 11594 * handler. Unlike the Arm handler, we can't do this as a tail call 11595 * because rIBASE is caller save and we need to reload it. 11596 * 11597 * Note that unlike in the Arm implementation, we should never arrive 11598 * here with a zero breakFlag because we always refresh rIBASE on 11599 * return. 11600 */ 11601 .extern MterpCheckBefore 11602 movl rSELF, %ecx 11603 movl %ecx, OUT_ARG0(%esp) 11604 leal OFF_FP_SHADOWFRAME(rFP), %eax 11605 movl %eax, OUT_ARG1(%esp) 11606 movl rPC, OUT_ARG2(%esp) 11607 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11608 REFRESH_IBASE 11609 jmp .L_op_nop+(218*128) 11610 11611 /* ------------------------------ */ 11612 .balign 128 11613 .L_ALT_op_div_int_lit8: /* 0xdb */ 11614 /* File: x86/alt_stub.S */ 11615 /* 11616 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11617 * any interesting requests and then jump to the real instruction 11618 * handler. Unlike the Arm handler, we can't do this as a tail call 11619 * because rIBASE is caller save and we need to reload it. 11620 * 11621 * Note that unlike in the Arm implementation, we should never arrive 11622 * here with a zero breakFlag because we always refresh rIBASE on 11623 * return. 11624 */ 11625 .extern MterpCheckBefore 11626 movl rSELF, %ecx 11627 movl %ecx, OUT_ARG0(%esp) 11628 leal OFF_FP_SHADOWFRAME(rFP), %eax 11629 movl %eax, OUT_ARG1(%esp) 11630 movl rPC, OUT_ARG2(%esp) 11631 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11632 REFRESH_IBASE 11633 jmp .L_op_nop+(219*128) 11634 11635 /* ------------------------------ */ 11636 .balign 128 11637 .L_ALT_op_rem_int_lit8: /* 0xdc */ 11638 /* File: x86/alt_stub.S */ 11639 /* 11640 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11641 * any interesting requests and then jump to the real instruction 11642 * handler. Unlike the Arm handler, we can't do this as a tail call 11643 * because rIBASE is caller save and we need to reload it. 11644 * 11645 * Note that unlike in the Arm implementation, we should never arrive 11646 * here with a zero breakFlag because we always refresh rIBASE on 11647 * return. 11648 */ 11649 .extern MterpCheckBefore 11650 movl rSELF, %ecx 11651 movl %ecx, OUT_ARG0(%esp) 11652 leal OFF_FP_SHADOWFRAME(rFP), %eax 11653 movl %eax, OUT_ARG1(%esp) 11654 movl rPC, OUT_ARG2(%esp) 11655 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11656 REFRESH_IBASE 11657 jmp .L_op_nop+(220*128) 11658 11659 /* ------------------------------ */ 11660 .balign 128 11661 .L_ALT_op_and_int_lit8: /* 0xdd */ 11662 /* File: x86/alt_stub.S */ 11663 /* 11664 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11665 * any interesting requests and then jump to the real instruction 11666 * handler. Unlike the Arm handler, we can't do this as a tail call 11667 * because rIBASE is caller save and we need to reload it. 11668 * 11669 * Note that unlike in the Arm implementation, we should never arrive 11670 * here with a zero breakFlag because we always refresh rIBASE on 11671 * return. 11672 */ 11673 .extern MterpCheckBefore 11674 movl rSELF, %ecx 11675 movl %ecx, OUT_ARG0(%esp) 11676 leal OFF_FP_SHADOWFRAME(rFP), %eax 11677 movl %eax, OUT_ARG1(%esp) 11678 movl rPC, OUT_ARG2(%esp) 11679 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11680 REFRESH_IBASE 11681 jmp .L_op_nop+(221*128) 11682 11683 /* ------------------------------ */ 11684 .balign 128 11685 .L_ALT_op_or_int_lit8: /* 0xde */ 11686 /* File: x86/alt_stub.S */ 11687 /* 11688 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11689 * any interesting requests and then jump to the real instruction 11690 * handler. Unlike the Arm handler, we can't do this as a tail call 11691 * because rIBASE is caller save and we need to reload it. 11692 * 11693 * Note that unlike in the Arm implementation, we should never arrive 11694 * here with a zero breakFlag because we always refresh rIBASE on 11695 * return. 11696 */ 11697 .extern MterpCheckBefore 11698 movl rSELF, %ecx 11699 movl %ecx, OUT_ARG0(%esp) 11700 leal OFF_FP_SHADOWFRAME(rFP), %eax 11701 movl %eax, OUT_ARG1(%esp) 11702 movl rPC, OUT_ARG2(%esp) 11703 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11704 REFRESH_IBASE 11705 jmp .L_op_nop+(222*128) 11706 11707 /* ------------------------------ */ 11708 .balign 128 11709 .L_ALT_op_xor_int_lit8: /* 0xdf */ 11710 /* File: x86/alt_stub.S */ 11711 /* 11712 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11713 * any interesting requests and then jump to the real instruction 11714 * handler. Unlike the Arm handler, we can't do this as a tail call 11715 * because rIBASE is caller save and we need to reload it. 11716 * 11717 * Note that unlike in the Arm implementation, we should never arrive 11718 * here with a zero breakFlag because we always refresh rIBASE on 11719 * return. 11720 */ 11721 .extern MterpCheckBefore 11722 movl rSELF, %ecx 11723 movl %ecx, OUT_ARG0(%esp) 11724 leal OFF_FP_SHADOWFRAME(rFP), %eax 11725 movl %eax, OUT_ARG1(%esp) 11726 movl rPC, OUT_ARG2(%esp) 11727 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11728 REFRESH_IBASE 11729 jmp .L_op_nop+(223*128) 11730 11731 /* ------------------------------ */ 11732 .balign 128 11733 .L_ALT_op_shl_int_lit8: /* 0xe0 */ 11734 /* File: x86/alt_stub.S */ 11735 /* 11736 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11737 * any interesting requests and then jump to the real instruction 11738 * handler. Unlike the Arm handler, we can't do this as a tail call 11739 * because rIBASE is caller save and we need to reload it. 11740 * 11741 * Note that unlike in the Arm implementation, we should never arrive 11742 * here with a zero breakFlag because we always refresh rIBASE on 11743 * return. 11744 */ 11745 .extern MterpCheckBefore 11746 movl rSELF, %ecx 11747 movl %ecx, OUT_ARG0(%esp) 11748 leal OFF_FP_SHADOWFRAME(rFP), %eax 11749 movl %eax, OUT_ARG1(%esp) 11750 movl rPC, OUT_ARG2(%esp) 11751 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11752 REFRESH_IBASE 11753 jmp .L_op_nop+(224*128) 11754 11755 /* ------------------------------ */ 11756 .balign 128 11757 .L_ALT_op_shr_int_lit8: /* 0xe1 */ 11758 /* File: x86/alt_stub.S */ 11759 /* 11760 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11761 * any interesting requests and then jump to the real instruction 11762 * handler. Unlike the Arm handler, we can't do this as a tail call 11763 * because rIBASE is caller save and we need to reload it. 11764 * 11765 * Note that unlike in the Arm implementation, we should never arrive 11766 * here with a zero breakFlag because we always refresh rIBASE on 11767 * return. 11768 */ 11769 .extern MterpCheckBefore 11770 movl rSELF, %ecx 11771 movl %ecx, OUT_ARG0(%esp) 11772 leal OFF_FP_SHADOWFRAME(rFP), %eax 11773 movl %eax, OUT_ARG1(%esp) 11774 movl rPC, OUT_ARG2(%esp) 11775 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11776 REFRESH_IBASE 11777 jmp .L_op_nop+(225*128) 11778 11779 /* ------------------------------ */ 11780 .balign 128 11781 .L_ALT_op_ushr_int_lit8: /* 0xe2 */ 11782 /* File: x86/alt_stub.S */ 11783 /* 11784 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11785 * any interesting requests and then jump to the real instruction 11786 * handler. Unlike the Arm handler, we can't do this as a tail call 11787 * because rIBASE is caller save and we need to reload it. 11788 * 11789 * Note that unlike in the Arm implementation, we should never arrive 11790 * here with a zero breakFlag because we always refresh rIBASE on 11791 * return. 11792 */ 11793 .extern MterpCheckBefore 11794 movl rSELF, %ecx 11795 movl %ecx, OUT_ARG0(%esp) 11796 leal OFF_FP_SHADOWFRAME(rFP), %eax 11797 movl %eax, OUT_ARG1(%esp) 11798 movl rPC, OUT_ARG2(%esp) 11799 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11800 REFRESH_IBASE 11801 jmp .L_op_nop+(226*128) 11802 11803 /* ------------------------------ */ 11804 .balign 128 11805 .L_ALT_op_iget_quick: /* 0xe3 */ 11806 /* File: x86/alt_stub.S */ 11807 /* 11808 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11809 * any interesting requests and then jump to the real instruction 11810 * handler. Unlike the Arm handler, we can't do this as a tail call 11811 * because rIBASE is caller save and we need to reload it. 11812 * 11813 * Note that unlike in the Arm implementation, we should never arrive 11814 * here with a zero breakFlag because we always refresh rIBASE on 11815 * return. 11816 */ 11817 .extern MterpCheckBefore 11818 movl rSELF, %ecx 11819 movl %ecx, OUT_ARG0(%esp) 11820 leal OFF_FP_SHADOWFRAME(rFP), %eax 11821 movl %eax, OUT_ARG1(%esp) 11822 movl rPC, OUT_ARG2(%esp) 11823 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11824 REFRESH_IBASE 11825 jmp .L_op_nop+(227*128) 11826 11827 /* ------------------------------ */ 11828 .balign 128 11829 .L_ALT_op_iget_wide_quick: /* 0xe4 */ 11830 /* File: x86/alt_stub.S */ 11831 /* 11832 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11833 * any interesting requests and then jump to the real instruction 11834 * handler. Unlike the Arm handler, we can't do this as a tail call 11835 * because rIBASE is caller save and we need to reload it. 11836 * 11837 * Note that unlike in the Arm implementation, we should never arrive 11838 * here with a zero breakFlag because we always refresh rIBASE on 11839 * return. 11840 */ 11841 .extern MterpCheckBefore 11842 movl rSELF, %ecx 11843 movl %ecx, OUT_ARG0(%esp) 11844 leal OFF_FP_SHADOWFRAME(rFP), %eax 11845 movl %eax, OUT_ARG1(%esp) 11846 movl rPC, OUT_ARG2(%esp) 11847 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11848 REFRESH_IBASE 11849 jmp .L_op_nop+(228*128) 11850 11851 /* ------------------------------ */ 11852 .balign 128 11853 .L_ALT_op_iget_object_quick: /* 0xe5 */ 11854 /* File: x86/alt_stub.S */ 11855 /* 11856 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11857 * any interesting requests and then jump to the real instruction 11858 * handler. Unlike the Arm handler, we can't do this as a tail call 11859 * because rIBASE is caller save and we need to reload it. 11860 * 11861 * Note that unlike in the Arm implementation, we should never arrive 11862 * here with a zero breakFlag because we always refresh rIBASE on 11863 * return. 11864 */ 11865 .extern MterpCheckBefore 11866 movl rSELF, %ecx 11867 movl %ecx, OUT_ARG0(%esp) 11868 leal OFF_FP_SHADOWFRAME(rFP), %eax 11869 movl %eax, OUT_ARG1(%esp) 11870 movl rPC, OUT_ARG2(%esp) 11871 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11872 REFRESH_IBASE 11873 jmp .L_op_nop+(229*128) 11874 11875 /* ------------------------------ */ 11876 .balign 128 11877 .L_ALT_op_iput_quick: /* 0xe6 */ 11878 /* File: x86/alt_stub.S */ 11879 /* 11880 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11881 * any interesting requests and then jump to the real instruction 11882 * handler. Unlike the Arm handler, we can't do this as a tail call 11883 * because rIBASE is caller save and we need to reload it. 11884 * 11885 * Note that unlike in the Arm implementation, we should never arrive 11886 * here with a zero breakFlag because we always refresh rIBASE on 11887 * return. 11888 */ 11889 .extern MterpCheckBefore 11890 movl rSELF, %ecx 11891 movl %ecx, OUT_ARG0(%esp) 11892 leal OFF_FP_SHADOWFRAME(rFP), %eax 11893 movl %eax, OUT_ARG1(%esp) 11894 movl rPC, OUT_ARG2(%esp) 11895 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11896 REFRESH_IBASE 11897 jmp .L_op_nop+(230*128) 11898 11899 /* ------------------------------ */ 11900 .balign 128 11901 .L_ALT_op_iput_wide_quick: /* 0xe7 */ 11902 /* File: x86/alt_stub.S */ 11903 /* 11904 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11905 * any interesting requests and then jump to the real instruction 11906 * handler. Unlike the Arm handler, we can't do this as a tail call 11907 * because rIBASE is caller save and we need to reload it. 11908 * 11909 * Note that unlike in the Arm implementation, we should never arrive 11910 * here with a zero breakFlag because we always refresh rIBASE on 11911 * return. 11912 */ 11913 .extern MterpCheckBefore 11914 movl rSELF, %ecx 11915 movl %ecx, OUT_ARG0(%esp) 11916 leal OFF_FP_SHADOWFRAME(rFP), %eax 11917 movl %eax, OUT_ARG1(%esp) 11918 movl rPC, OUT_ARG2(%esp) 11919 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11920 REFRESH_IBASE 11921 jmp .L_op_nop+(231*128) 11922 11923 /* ------------------------------ */ 11924 .balign 128 11925 .L_ALT_op_iput_object_quick: /* 0xe8 */ 11926 /* File: x86/alt_stub.S */ 11927 /* 11928 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11929 * any interesting requests and then jump to the real instruction 11930 * handler. Unlike the Arm handler, we can't do this as a tail call 11931 * because rIBASE is caller save and we need to reload it. 11932 * 11933 * Note that unlike in the Arm implementation, we should never arrive 11934 * here with a zero breakFlag because we always refresh rIBASE on 11935 * return. 11936 */ 11937 .extern MterpCheckBefore 11938 movl rSELF, %ecx 11939 movl %ecx, OUT_ARG0(%esp) 11940 leal OFF_FP_SHADOWFRAME(rFP), %eax 11941 movl %eax, OUT_ARG1(%esp) 11942 movl rPC, OUT_ARG2(%esp) 11943 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11944 REFRESH_IBASE 11945 jmp .L_op_nop+(232*128) 11946 11947 /* ------------------------------ */ 11948 .balign 128 11949 .L_ALT_op_invoke_virtual_quick: /* 0xe9 */ 11950 /* File: x86/alt_stub.S */ 11951 /* 11952 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11953 * any interesting requests and then jump to the real instruction 11954 * handler. Unlike the Arm handler, we can't do this as a tail call 11955 * because rIBASE is caller save and we need to reload it. 11956 * 11957 * Note that unlike in the Arm implementation, we should never arrive 11958 * here with a zero breakFlag because we always refresh rIBASE on 11959 * return. 11960 */ 11961 .extern MterpCheckBefore 11962 movl rSELF, %ecx 11963 movl %ecx, OUT_ARG0(%esp) 11964 leal OFF_FP_SHADOWFRAME(rFP), %eax 11965 movl %eax, OUT_ARG1(%esp) 11966 movl rPC, OUT_ARG2(%esp) 11967 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11968 REFRESH_IBASE 11969 jmp .L_op_nop+(233*128) 11970 11971 /* ------------------------------ */ 11972 .balign 128 11973 .L_ALT_op_invoke_virtual_range_quick: /* 0xea */ 11974 /* File: x86/alt_stub.S */ 11975 /* 11976 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11977 * any interesting requests and then jump to the real instruction 11978 * handler. Unlike the Arm handler, we can't do this as a tail call 11979 * because rIBASE is caller save and we need to reload it. 11980 * 11981 * Note that unlike in the Arm implementation, we should never arrive 11982 * here with a zero breakFlag because we always refresh rIBASE on 11983 * return. 11984 */ 11985 .extern MterpCheckBefore 11986 movl rSELF, %ecx 11987 movl %ecx, OUT_ARG0(%esp) 11988 leal OFF_FP_SHADOWFRAME(rFP), %eax 11989 movl %eax, OUT_ARG1(%esp) 11990 movl rPC, OUT_ARG2(%esp) 11991 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11992 REFRESH_IBASE 11993 jmp .L_op_nop+(234*128) 11994 11995 /* ------------------------------ */ 11996 .balign 128 11997 .L_ALT_op_iput_boolean_quick: /* 0xeb */ 11998 /* File: x86/alt_stub.S */ 11999 /* 12000 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12001 * any interesting requests and then jump to the real instruction 12002 * handler. Unlike the Arm handler, we can't do this as a tail call 12003 * because rIBASE is caller save and we need to reload it. 12004 * 12005 * Note that unlike in the Arm implementation, we should never arrive 12006 * here with a zero breakFlag because we always refresh rIBASE on 12007 * return. 12008 */ 12009 .extern MterpCheckBefore 12010 movl rSELF, %ecx 12011 movl %ecx, OUT_ARG0(%esp) 12012 leal OFF_FP_SHADOWFRAME(rFP), %eax 12013 movl %eax, OUT_ARG1(%esp) 12014 movl rPC, OUT_ARG2(%esp) 12015 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 12016 REFRESH_IBASE 12017 jmp .L_op_nop+(235*128) 12018 12019 /* ------------------------------ */ 12020 .balign 128 12021 .L_ALT_op_iput_byte_quick: /* 0xec */ 12022 /* File: x86/alt_stub.S */ 12023 /* 12024 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12025 * any interesting requests and then jump to the real instruction 12026 * handler. Unlike the Arm handler, we can't do this as a tail call 12027 * because rIBASE is caller save and we need to reload it. 12028 * 12029 * Note that unlike in the Arm implementation, we should never arrive 12030 * here with a zero breakFlag because we always refresh rIBASE on 12031 * return. 12032 */ 12033 .extern MterpCheckBefore 12034 movl rSELF, %ecx 12035 movl %ecx, OUT_ARG0(%esp) 12036 leal OFF_FP_SHADOWFRAME(rFP), %eax 12037 movl %eax, OUT_ARG1(%esp) 12038 movl rPC, OUT_ARG2(%esp) 12039 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 12040 REFRESH_IBASE 12041 jmp .L_op_nop+(236*128) 12042 12043 /* ------------------------------ */ 12044 .balign 128 12045 .L_ALT_op_iput_char_quick: /* 0xed */ 12046 /* File: x86/alt_stub.S */ 12047 /* 12048 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12049 * any interesting requests and then jump to the real instruction 12050 * handler. Unlike the Arm handler, we can't do this as a tail call 12051 * because rIBASE is caller save and we need to reload it. 12052 * 12053 * Note that unlike in the Arm implementation, we should never arrive 12054 * here with a zero breakFlag because we always refresh rIBASE on 12055 * return. 12056 */ 12057 .extern MterpCheckBefore 12058 movl rSELF, %ecx 12059 movl %ecx, OUT_ARG0(%esp) 12060 leal OFF_FP_SHADOWFRAME(rFP), %eax 12061 movl %eax, OUT_ARG1(%esp) 12062 movl rPC, OUT_ARG2(%esp) 12063 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 12064 REFRESH_IBASE 12065 jmp .L_op_nop+(237*128) 12066 12067 /* ------------------------------ */ 12068 .balign 128 12069 .L_ALT_op_iput_short_quick: /* 0xee */ 12070 /* File: x86/alt_stub.S */ 12071 /* 12072 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12073 * any interesting requests and then jump to the real instruction 12074 * handler. Unlike the Arm handler, we can't do this as a tail call 12075 * because rIBASE is caller save and we need to reload it. 12076 * 12077 * Note that unlike in the Arm implementation, we should never arrive 12078 * here with a zero breakFlag because we always refresh rIBASE on 12079 * return. 12080 */ 12081 .extern MterpCheckBefore 12082 movl rSELF, %ecx 12083 movl %ecx, OUT_ARG0(%esp) 12084 leal OFF_FP_SHADOWFRAME(rFP), %eax 12085 movl %eax, OUT_ARG1(%esp) 12086 movl rPC, OUT_ARG2(%esp) 12087 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 12088 REFRESH_IBASE 12089 jmp .L_op_nop+(238*128) 12090 12091 /* ------------------------------ */ 12092 .balign 128 12093 .L_ALT_op_iget_boolean_quick: /* 0xef */ 12094 /* File: x86/alt_stub.S */ 12095 /* 12096 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12097 * any interesting requests and then jump to the real instruction 12098 * handler. Unlike the Arm handler, we can't do this as a tail call 12099 * because rIBASE is caller save and we need to reload it. 12100 * 12101 * Note that unlike in the Arm implementation, we should never arrive 12102 * here with a zero breakFlag because we always refresh rIBASE on 12103 * return. 12104 */ 12105 .extern MterpCheckBefore 12106 movl rSELF, %ecx 12107 movl %ecx, OUT_ARG0(%esp) 12108 leal OFF_FP_SHADOWFRAME(rFP), %eax 12109 movl %eax, OUT_ARG1(%esp) 12110 movl rPC, OUT_ARG2(%esp) 12111 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 12112 REFRESH_IBASE 12113 jmp .L_op_nop+(239*128) 12114 12115 /* ------------------------------ */ 12116 .balign 128 12117 .L_ALT_op_iget_byte_quick: /* 0xf0 */ 12118 /* File: x86/alt_stub.S */ 12119 /* 12120 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12121 * any interesting requests and then jump to the real instruction 12122 * handler. Unlike the Arm handler, we can't do this as a tail call 12123 * because rIBASE is caller save and we need to reload it. 12124 * 12125 * Note that unlike in the Arm implementation, we should never arrive 12126 * here with a zero breakFlag because we always refresh rIBASE on 12127 * return. 12128 */ 12129 .extern MterpCheckBefore 12130 movl rSELF, %ecx 12131 movl %ecx, OUT_ARG0(%esp) 12132 leal OFF_FP_SHADOWFRAME(rFP), %eax 12133 movl %eax, OUT_ARG1(%esp) 12134 movl rPC, OUT_ARG2(%esp) 12135 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 12136 REFRESH_IBASE 12137 jmp .L_op_nop+(240*128) 12138 12139 /* ------------------------------ */ 12140 .balign 128 12141 .L_ALT_op_iget_char_quick: /* 0xf1 */ 12142 /* File: x86/alt_stub.S */ 12143 /* 12144 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12145 * any interesting requests and then jump to the real instruction 12146 * handler. Unlike the Arm handler, we can't do this as a tail call 12147 * because rIBASE is caller save and we need to reload it. 12148 * 12149 * Note that unlike in the Arm implementation, we should never arrive 12150 * here with a zero breakFlag because we always refresh rIBASE on 12151 * return. 12152 */ 12153 .extern MterpCheckBefore 12154 movl rSELF, %ecx 12155 movl %ecx, OUT_ARG0(%esp) 12156 leal OFF_FP_SHADOWFRAME(rFP), %eax 12157 movl %eax, OUT_ARG1(%esp) 12158 movl rPC, OUT_ARG2(%esp) 12159 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 12160 REFRESH_IBASE 12161 jmp .L_op_nop+(241*128) 12162 12163 /* ------------------------------ */ 12164 .balign 128 12165 .L_ALT_op_iget_short_quick: /* 0xf2 */ 12166 /* File: x86/alt_stub.S */ 12167 /* 12168 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12169 * any interesting requests and then jump to the real instruction 12170 * handler. Unlike the Arm handler, we can't do this as a tail call 12171 * because rIBASE is caller save and we need to reload it. 12172 * 12173 * Note that unlike in the Arm implementation, we should never arrive 12174 * here with a zero breakFlag because we always refresh rIBASE on 12175 * return. 12176 */ 12177 .extern MterpCheckBefore 12178 movl rSELF, %ecx 12179 movl %ecx, OUT_ARG0(%esp) 12180 leal OFF_FP_SHADOWFRAME(rFP), %eax 12181 movl %eax, OUT_ARG1(%esp) 12182 movl rPC, OUT_ARG2(%esp) 12183 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 12184 REFRESH_IBASE 12185 jmp .L_op_nop+(242*128) 12186 12187 /* ------------------------------ */ 12188 .balign 128 12189 .L_ALT_op_unused_f3: /* 0xf3 */ 12190 /* File: x86/alt_stub.S */ 12191 /* 12192 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12193 * any interesting requests and then jump to the real instruction 12194 * handler. Unlike the Arm handler, we can't do this as a tail call 12195 * because rIBASE is caller save and we need to reload it. 12196 * 12197 * Note that unlike in the Arm implementation, we should never arrive 12198 * here with a zero breakFlag because we always refresh rIBASE on 12199 * return. 12200 */ 12201 .extern MterpCheckBefore 12202 movl rSELF, %ecx 12203 movl %ecx, OUT_ARG0(%esp) 12204 leal OFF_FP_SHADOWFRAME(rFP), %eax 12205 movl %eax, OUT_ARG1(%esp) 12206 movl rPC, OUT_ARG2(%esp) 12207 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 12208 REFRESH_IBASE 12209 jmp .L_op_nop+(243*128) 12210 12211 /* ------------------------------ */ 12212 .balign 128 12213 .L_ALT_op_unused_f4: /* 0xf4 */ 12214 /* File: x86/alt_stub.S */ 12215 /* 12216 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12217 * any interesting requests and then jump to the real instruction 12218 * handler. Unlike the Arm handler, we can't do this as a tail call 12219 * because rIBASE is caller save and we need to reload it. 12220 * 12221 * Note that unlike in the Arm implementation, we should never arrive 12222 * here with a zero breakFlag because we always refresh rIBASE on 12223 * return. 12224 */ 12225 .extern MterpCheckBefore 12226 movl rSELF, %ecx 12227 movl %ecx, OUT_ARG0(%esp) 12228 leal OFF_FP_SHADOWFRAME(rFP), %eax 12229 movl %eax, OUT_ARG1(%esp) 12230 movl rPC, OUT_ARG2(%esp) 12231 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 12232 REFRESH_IBASE 12233 jmp .L_op_nop+(244*128) 12234 12235 /* ------------------------------ */ 12236 .balign 128 12237 .L_ALT_op_unused_f5: /* 0xf5 */ 12238 /* File: x86/alt_stub.S */ 12239 /* 12240 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12241 * any interesting requests and then jump to the real instruction 12242 * handler. Unlike the Arm handler, we can't do this as a tail call 12243 * because rIBASE is caller save and we need to reload it. 12244 * 12245 * Note that unlike in the Arm implementation, we should never arrive 12246 * here with a zero breakFlag because we always refresh rIBASE on 12247 * return. 12248 */ 12249 .extern MterpCheckBefore 12250 movl rSELF, %ecx 12251 movl %ecx, OUT_ARG0(%esp) 12252 leal OFF_FP_SHADOWFRAME(rFP), %eax 12253 movl %eax, OUT_ARG1(%esp) 12254 movl rPC, OUT_ARG2(%esp) 12255 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 12256 REFRESH_IBASE 12257 jmp .L_op_nop+(245*128) 12258 12259 /* ------------------------------ */ 12260 .balign 128 12261 .L_ALT_op_unused_f6: /* 0xf6 */ 12262 /* File: x86/alt_stub.S */ 12263 /* 12264 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12265 * any interesting requests and then jump to the real instruction 12266 * handler. Unlike the Arm handler, we can't do this as a tail call 12267 * because rIBASE is caller save and we need to reload it. 12268 * 12269 * Note that unlike in the Arm implementation, we should never arrive 12270 * here with a zero breakFlag because we always refresh rIBASE on 12271 * return. 12272 */ 12273 .extern MterpCheckBefore 12274 movl rSELF, %ecx 12275 movl %ecx, OUT_ARG0(%esp) 12276 leal OFF_FP_SHADOWFRAME(rFP), %eax 12277 movl %eax, OUT_ARG1(%esp) 12278 movl rPC, OUT_ARG2(%esp) 12279 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 12280 REFRESH_IBASE 12281 jmp .L_op_nop+(246*128) 12282 12283 /* ------------------------------ */ 12284 .balign 128 12285 .L_ALT_op_unused_f7: /* 0xf7 */ 12286 /* File: x86/alt_stub.S */ 12287 /* 12288 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12289 * any interesting requests and then jump to the real instruction 12290 * handler. Unlike the Arm handler, we can't do this as a tail call 12291 * because rIBASE is caller save and we need to reload it. 12292 * 12293 * Note that unlike in the Arm implementation, we should never arrive 12294 * here with a zero breakFlag because we always refresh rIBASE on 12295 * return. 12296 */ 12297 .extern MterpCheckBefore 12298 movl rSELF, %ecx 12299 movl %ecx, OUT_ARG0(%esp) 12300 leal OFF_FP_SHADOWFRAME(rFP), %eax 12301 movl %eax, OUT_ARG1(%esp) 12302 movl rPC, OUT_ARG2(%esp) 12303 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 12304 REFRESH_IBASE 12305 jmp .L_op_nop+(247*128) 12306 12307 /* ------------------------------ */ 12308 .balign 128 12309 .L_ALT_op_unused_f8: /* 0xf8 */ 12310 /* File: x86/alt_stub.S */ 12311 /* 12312 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12313 * any interesting requests and then jump to the real instruction 12314 * handler. Unlike the Arm handler, we can't do this as a tail call 12315 * because rIBASE is caller save and we need to reload it. 12316 * 12317 * Note that unlike in the Arm implementation, we should never arrive 12318 * here with a zero breakFlag because we always refresh rIBASE on 12319 * return. 12320 */ 12321 .extern MterpCheckBefore 12322 movl rSELF, %ecx 12323 movl %ecx, OUT_ARG0(%esp) 12324 leal OFF_FP_SHADOWFRAME(rFP), %eax 12325 movl %eax, OUT_ARG1(%esp) 12326 movl rPC, OUT_ARG2(%esp) 12327 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 12328 REFRESH_IBASE 12329 jmp .L_op_nop+(248*128) 12330 12331 /* ------------------------------ */ 12332 .balign 128 12333 .L_ALT_op_unused_f9: /* 0xf9 */ 12334 /* File: x86/alt_stub.S */ 12335 /* 12336 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12337 * any interesting requests and then jump to the real instruction 12338 * handler. Unlike the Arm handler, we can't do this as a tail call 12339 * because rIBASE is caller save and we need to reload it. 12340 * 12341 * Note that unlike in the Arm implementation, we should never arrive 12342 * here with a zero breakFlag because we always refresh rIBASE on 12343 * return. 12344 */ 12345 .extern MterpCheckBefore 12346 movl rSELF, %ecx 12347 movl %ecx, OUT_ARG0(%esp) 12348 leal OFF_FP_SHADOWFRAME(rFP), %eax 12349 movl %eax, OUT_ARG1(%esp) 12350 movl rPC, OUT_ARG2(%esp) 12351 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 12352 REFRESH_IBASE 12353 jmp .L_op_nop+(249*128) 12354 12355 /* ------------------------------ */ 12356 .balign 128 12357 .L_ALT_op_invoke_polymorphic: /* 0xfa */ 12358 /* File: x86/alt_stub.S */ 12359 /* 12360 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12361 * any interesting requests and then jump to the real instruction 12362 * handler. Unlike the Arm handler, we can't do this as a tail call 12363 * because rIBASE is caller save and we need to reload it. 12364 * 12365 * Note that unlike in the Arm implementation, we should never arrive 12366 * here with a zero breakFlag because we always refresh rIBASE on 12367 * return. 12368 */ 12369 .extern MterpCheckBefore 12370 movl rSELF, %ecx 12371 movl %ecx, OUT_ARG0(%esp) 12372 leal OFF_FP_SHADOWFRAME(rFP), %eax 12373 movl %eax, OUT_ARG1(%esp) 12374 movl rPC, OUT_ARG2(%esp) 12375 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 12376 REFRESH_IBASE 12377 jmp .L_op_nop+(250*128) 12378 12379 /* ------------------------------ */ 12380 .balign 128 12381 .L_ALT_op_invoke_polymorphic_range: /* 0xfb */ 12382 /* File: x86/alt_stub.S */ 12383 /* 12384 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12385 * any interesting requests and then jump to the real instruction 12386 * handler. Unlike the Arm handler, we can't do this as a tail call 12387 * because rIBASE is caller save and we need to reload it. 12388 * 12389 * Note that unlike in the Arm implementation, we should never arrive 12390 * here with a zero breakFlag because we always refresh rIBASE on 12391 * return. 12392 */ 12393 .extern MterpCheckBefore 12394 movl rSELF, %ecx 12395 movl %ecx, OUT_ARG0(%esp) 12396 leal OFF_FP_SHADOWFRAME(rFP), %eax 12397 movl %eax, OUT_ARG1(%esp) 12398 movl rPC, OUT_ARG2(%esp) 12399 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 12400 REFRESH_IBASE 12401 jmp .L_op_nop+(251*128) 12402 12403 /* ------------------------------ */ 12404 .balign 128 12405 .L_ALT_op_invoke_custom: /* 0xfc */ 12406 /* File: x86/alt_stub.S */ 12407 /* 12408 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12409 * any interesting requests and then jump to the real instruction 12410 * handler. Unlike the Arm handler, we can't do this as a tail call 12411 * because rIBASE is caller save and we need to reload it. 12412 * 12413 * Note that unlike in the Arm implementation, we should never arrive 12414 * here with a zero breakFlag because we always refresh rIBASE on 12415 * return. 12416 */ 12417 .extern MterpCheckBefore 12418 movl rSELF, %ecx 12419 movl %ecx, OUT_ARG0(%esp) 12420 leal OFF_FP_SHADOWFRAME(rFP), %eax 12421 movl %eax, OUT_ARG1(%esp) 12422 movl rPC, OUT_ARG2(%esp) 12423 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 12424 REFRESH_IBASE 12425 jmp .L_op_nop+(252*128) 12426 12427 /* ------------------------------ */ 12428 .balign 128 12429 .L_ALT_op_invoke_custom_range: /* 0xfd */ 12430 /* File: x86/alt_stub.S */ 12431 /* 12432 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12433 * any interesting requests and then jump to the real instruction 12434 * handler. Unlike the Arm handler, we can't do this as a tail call 12435 * because rIBASE is caller save and we need to reload it. 12436 * 12437 * Note that unlike in the Arm implementation, we should never arrive 12438 * here with a zero breakFlag because we always refresh rIBASE on 12439 * return. 12440 */ 12441 .extern MterpCheckBefore 12442 movl rSELF, %ecx 12443 movl %ecx, OUT_ARG0(%esp) 12444 leal OFF_FP_SHADOWFRAME(rFP), %eax 12445 movl %eax, OUT_ARG1(%esp) 12446 movl rPC, OUT_ARG2(%esp) 12447 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 12448 REFRESH_IBASE 12449 jmp .L_op_nop+(253*128) 12450 12451 /* ------------------------------ */ 12452 .balign 128 12453 .L_ALT_op_unused_fe: /* 0xfe */ 12454 /* File: x86/alt_stub.S */ 12455 /* 12456 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12457 * any interesting requests and then jump to the real instruction 12458 * handler. Unlike the Arm handler, we can't do this as a tail call 12459 * because rIBASE is caller save and we need to reload it. 12460 * 12461 * Note that unlike in the Arm implementation, we should never arrive 12462 * here with a zero breakFlag because we always refresh rIBASE on 12463 * return. 12464 */ 12465 .extern MterpCheckBefore 12466 movl rSELF, %ecx 12467 movl %ecx, OUT_ARG0(%esp) 12468 leal OFF_FP_SHADOWFRAME(rFP), %eax 12469 movl %eax, OUT_ARG1(%esp) 12470 movl rPC, OUT_ARG2(%esp) 12471 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 12472 REFRESH_IBASE 12473 jmp .L_op_nop+(254*128) 12474 12475 /* ------------------------------ */ 12476 .balign 128 12477 .L_ALT_op_unused_ff: /* 0xff */ 12478 /* File: x86/alt_stub.S */ 12479 /* 12480 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12481 * any interesting requests and then jump to the real instruction 12482 * handler. Unlike the Arm handler, we can't do this as a tail call 12483 * because rIBASE is caller save and we need to reload it. 12484 * 12485 * Note that unlike in the Arm implementation, we should never arrive 12486 * here with a zero breakFlag because we always refresh rIBASE on 12487 * return. 12488 */ 12489 .extern MterpCheckBefore 12490 movl rSELF, %ecx 12491 movl %ecx, OUT_ARG0(%esp) 12492 leal OFF_FP_SHADOWFRAME(rFP), %eax 12493 movl %eax, OUT_ARG1(%esp) 12494 movl rPC, OUT_ARG2(%esp) 12495 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 12496 REFRESH_IBASE 12497 jmp .L_op_nop+(255*128) 12498 12499 .balign 128 12500 SIZE(SYMBOL(artMterpAsmAltInstructionStart),SYMBOL(artMterpAsmAltInstructionStart)) 12501 .global SYMBOL(artMterpAsmAltInstructionEnd) 12502 SYMBOL(artMterpAsmAltInstructionEnd): 12503 /* File: x86/footer.S */ 12504 /* 12505 * =========================================================================== 12506 * Common subroutines and data 12507 * =========================================================================== 12508 */ 12509 12510 .text 12511 .align 2 12512 12513 /* 12514 * We've detected a condition that will result in an exception, but the exception 12515 * has not yet been thrown. Just bail out to the reference interpreter to deal with it. 12516 * TUNING: for consistency, we may want to just go ahead and handle these here. 12517 */ 12518 common_errDivideByZero: 12519 EXPORT_PC 12520 #if MTERP_LOGGING 12521 movl rSELF, %eax 12522 movl %eax, OUT_ARG0(%esp) 12523 lea OFF_FP_SHADOWFRAME(rFP), %ecx 12524 movl %ecx, OUT_ARG1(%esp) 12525 call SYMBOL(MterpLogDivideByZeroException) 12526 #endif 12527 jmp MterpCommonFallback 12528 12529 common_errArrayIndex: 12530 EXPORT_PC 12531 #if MTERP_LOGGING 12532 movl rSELF, %eax 12533 movl %eax, OUT_ARG0(%esp) 12534 lea OFF_FP_SHADOWFRAME(rFP), %ecx 12535 movl %ecx, OUT_ARG1(%esp) 12536 call SYMBOL(MterpLogArrayIndexException) 12537 #endif 12538 jmp MterpCommonFallback 12539 12540 common_errNegativeArraySize: 12541 EXPORT_PC 12542 #if MTERP_LOGGING 12543 movl rSELF, %eax 12544 movl %eax, OUT_ARG0(%esp) 12545 lea OFF_FP_SHADOWFRAME(rFP), %ecx 12546 movl %ecx, OUT_ARG1(%esp) 12547 call SYMBOL(MterpLogNegativeArraySizeException) 12548 #endif 12549 jmp MterpCommonFallback 12550 12551 common_errNoSuchMethod: 12552 EXPORT_PC 12553 #if MTERP_LOGGING 12554 movl rSELF, %eax 12555 movl %eax, OUT_ARG0(%esp) 12556 lea OFF_FP_SHADOWFRAME(rFP), %ecx 12557 movl %ecx, OUT_ARG1(%esp) 12558 call SYMBOL(MterpLogNoSuchMethodException) 12559 #endif 12560 jmp MterpCommonFallback 12561 12562 common_errNullObject: 12563 EXPORT_PC 12564 #if MTERP_LOGGING 12565 movl rSELF, %eax 12566 movl %eax, OUT_ARG0(%esp) 12567 lea OFF_FP_SHADOWFRAME(rFP), %ecx 12568 movl %ecx, OUT_ARG1(%esp) 12569 call SYMBOL(MterpLogNullObjectException) 12570 #endif 12571 jmp MterpCommonFallback 12572 12573 common_exceptionThrown: 12574 EXPORT_PC 12575 #if MTERP_LOGGING 12576 movl rSELF, %eax 12577 movl %eax, OUT_ARG0(%esp) 12578 lea OFF_FP_SHADOWFRAME(rFP), %ecx 12579 movl %ecx, OUT_ARG0(%esp) 12580 call SYMBOL(MterpLogExceptionThrownException) 12581 #endif 12582 jmp MterpCommonFallback 12583 12584 MterpSuspendFallback: 12585 EXPORT_PC 12586 #if MTERP_LOGGING 12587 movl rSELF, %eax 12588 movl %eax, OUT_ARG0(%esp) 12589 lea OFF_FP_SHADOWFRAME(rFP), %ecx 12590 movl %ecx, OUT_ARG0(%esp) 12591 movl THREAD_FLAGS_OFFSET(%eax), %eax 12592 movl %eax, OUT_ARG2(%esp) 12593 call SYMBOL(MterpLogSuspendFallback) 12594 #endif 12595 jmp MterpCommonFallback 12596 12597 /* 12598 * If we're here, something is out of the ordinary. If there is a pending 12599 * exception, handle it. Otherwise, roll back and retry with the reference 12600 * interpreter. 12601 */ 12602 MterpPossibleException: 12603 movl rSELF, %eax 12604 testl $-1, THREAD_EXCEPTION_OFFSET(%eax) 12605 jz MterpFallback 12606 /* intentional fallthrough - handle pending exception. */ 12607 12608 /* 12609 * On return from a runtime helper routine, we've found a pending exception. 12610 * Can we handle it here - or need to bail out to caller? 12611 * 12612 */ 12613 MterpException: 12614 movl rSELF, %eax 12615 movl %eax, OUT_ARG0(%esp) 12616 lea OFF_FP_SHADOWFRAME(rFP), %ecx 12617 movl %ecx, OUT_ARG1(%esp) 12618 call SYMBOL(MterpHandleException) 12619 testb %al, %al 12620 jz MterpExceptionReturn 12621 movl OFF_FP_CODE_ITEM(rFP), %eax 12622 movl OFF_FP_DEX_PC(rFP), %ecx 12623 lea CODEITEM_INSNS_OFFSET(%eax), rPC 12624 lea (rPC, %ecx, 2), rPC 12625 movl rPC, OFF_FP_DEX_PC_PTR(rFP) 12626 /* Do we need to switch interpreters? */ 12627 call SYMBOL(MterpShouldSwitchInterpreters) 12628 testb %al, %al 12629 jnz MterpFallback 12630 /* resume execution at catch block */ 12631 REFRESH_IBASE 12632 FETCH_INST 12633 GOTO_NEXT 12634 /* NOTE: no fallthrough */ 12635 12636 /* 12637 * Common handling for branches with support for Jit profiling. 12638 * On entry: 12639 * rINST <= signed offset 12640 * condition bits <= set to establish sign of offset (use "NoFlags" entry if not) 12641 * 12642 * We have quite a few different cases for branch profiling, OSR detection and 12643 * suspend check support here. 12644 * 12645 * Taken backward branches: 12646 * If profiling active, do hotness countdown and report if we hit zero. 12647 * If in osr check mode, see if our target is a compiled loop header entry and do OSR if so. 12648 * Is there a pending suspend request? If so, suspend. 12649 * 12650 * Taken forward branches and not-taken backward branches: 12651 * If in osr check mode, see if our target is a compiled loop header entry and do OSR if so. 12652 * 12653 * Our most common case is expected to be a taken backward branch with active jit profiling, 12654 * but no full OSR check and no pending suspend request. 12655 * Next most common case is not-taken branch with no full OSR check. 12656 * 12657 */ 12658 MterpCommonTakenBranch: 12659 jg .L_forward_branch # don't add forward branches to hotness 12660 /* 12661 * We need to subtract 1 from positive values and we should not see 0 here, 12662 * so we may use the result of the comparison with -1. 12663 */ 12664 #if JIT_CHECK_OSR != -1 12665 # error "JIT_CHECK_OSR must be -1." 12666 #endif 12667 cmpw $JIT_CHECK_OSR, rPROFILE 12668 je .L_osr_check 12669 decw rPROFILE 12670 je .L_add_batch # counted down to zero - report 12671 .L_resume_backward_branch: 12672 movl rSELF, %eax 12673 testl $(THREAD_SUSPEND_OR_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(%eax) 12674 leal (rPC, rINST, 2), rPC 12675 FETCH_INST 12676 jnz .L_suspend_request_pending 12677 REFRESH_IBASE 12678 GOTO_NEXT 12679 12680 .L_suspend_request_pending: 12681 EXPORT_PC 12682 movl %eax, OUT_ARG0(%esp) # rSELF in eax 12683 call SYMBOL(MterpSuspendCheck) # (self) 12684 testb %al, %al 12685 jnz MterpFallback 12686 REFRESH_IBASE # might have changed during suspend 12687 GOTO_NEXT 12688 12689 .L_no_count_backwards: 12690 cmpw $JIT_CHECK_OSR, rPROFILE # possible OSR re-entry? 12691 jne .L_resume_backward_branch 12692 .L_osr_check: 12693 EXPORT_PC 12694 movl rSELF, %eax 12695 movl %eax, OUT_ARG0(%esp) 12696 leal OFF_FP_SHADOWFRAME(rFP), %ecx 12697 movl %ecx, OUT_ARG1(%esp) 12698 movl rINST, OUT_ARG2(%esp) 12699 call SYMBOL(MterpMaybeDoOnStackReplacement) # (self, shadow_frame, offset) 12700 testb %al, %al 12701 jz .L_resume_backward_branch 12702 jmp MterpOnStackReplacement 12703 12704 .L_forward_branch: 12705 cmpw $JIT_CHECK_OSR, rPROFILE # possible OSR re-entry? 12706 je .L_check_osr_forward 12707 .L_resume_forward_branch: 12708 leal (rPC, rINST, 2), rPC 12709 FETCH_INST 12710 GOTO_NEXT 12711 12712 .L_check_osr_forward: 12713 EXPORT_PC 12714 movl rSELF, %eax 12715 movl %eax, OUT_ARG0(%esp) 12716 leal OFF_FP_SHADOWFRAME(rFP), %ecx 12717 movl %ecx, OUT_ARG1(%esp) 12718 movl rINST, OUT_ARG2(%esp) 12719 call SYMBOL(MterpMaybeDoOnStackReplacement) # (self, shadow_frame, offset) 12720 testb %al, %al 12721 REFRESH_IBASE 12722 jz .L_resume_forward_branch 12723 jmp MterpOnStackReplacement 12724 12725 .L_add_batch: 12726 movl OFF_FP_METHOD(rFP), %eax 12727 movl %eax, OUT_ARG0(%esp) 12728 leal OFF_FP_SHADOWFRAME(rFP), %ecx 12729 movl %ecx, OUT_ARG1(%esp) 12730 movl rSELF, %eax 12731 movl %eax, OUT_ARG2(%esp) 12732 call SYMBOL(MterpAddHotnessBatch) # (method, shadow_frame, self) 12733 jmp .L_no_count_backwards 12734 12735 /* 12736 * Entered from the conditional branch handlers when OSR check request active on 12737 * not-taken path. All Dalvik not-taken conditional branch offsets are 2. 12738 */ 12739 .L_check_not_taken_osr: 12740 EXPORT_PC 12741 movl rSELF, %eax 12742 movl %eax, OUT_ARG0(%esp) 12743 leal OFF_FP_SHADOWFRAME(rFP), %ecx 12744 movl %ecx, OUT_ARG1(%esp) 12745 movl $2, OUT_ARG2(%esp) 12746 call SYMBOL(MterpMaybeDoOnStackReplacement) # (self, shadow_frame, offset) 12747 testb %al, %al 12748 REFRESH_IBASE 12749 jnz MterpOnStackReplacement 12750 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 12751 12752 /* 12753 * On-stack replacement has happened, and now we've returned from the compiled method. 12754 */ 12755 MterpOnStackReplacement: 12756 #if MTERP_LOGGING 12757 movl rSELF, %eax 12758 movl %eax, OUT_ARG0(%esp) 12759 lea OFF_FP_SHADOWFRAME(rFP), %ecx 12760 movl %ecx, OUT_ARG1(%esp) 12761 movl rINST, OUT_ARG2(%esp) 12762 call SYMBOL(MterpLogOSR) 12763 #endif 12764 movl $1, %eax 12765 jmp MterpDone 12766 12767 /* 12768 * Bail out to reference interpreter. 12769 */ 12770 MterpFallback: 12771 EXPORT_PC 12772 #if MTERP_LOGGING 12773 movl rSELF, %eax 12774 movl %eax, OUT_ARG0(%esp) 12775 lea OFF_FP_SHADOWFRAME(rFP), %ecx 12776 movl %ecx, OUT_ARG1(%esp) 12777 call SYMBOL(MterpLogFallback) 12778 #endif 12779 MterpCommonFallback: 12780 xor %eax, %eax 12781 jmp MterpDone 12782 12783 /* 12784 * On entry: 12785 * uint32_t* rFP (should still be live, pointer to base of vregs) 12786 */ 12787 MterpExceptionReturn: 12788 movl $1, %eax 12789 jmp MterpDone 12790 MterpReturn: 12791 movl OFF_FP_RESULT_REGISTER(rFP), %edx 12792 movl %eax, (%edx) 12793 movl %ecx, 4(%edx) 12794 mov $1, %eax 12795 MterpDone: 12796 /* 12797 * At this point, we expect rPROFILE to be non-zero. If negative, hotness is disabled or we're 12798 * checking for OSR. If greater than zero, we might have unreported hotness to register 12799 * (the difference between the ending rPROFILE and the cached hotness counter). rPROFILE 12800 * should only reach zero immediately after a hotness decrement, and is then reset to either 12801 * a negative special state or the new non-zero countdown value. 12802 */ 12803 cmpw $0, rPROFILE 12804 jle MRestoreFrame # if > 0, we may have some counts to report. 12805 12806 movl %eax, rINST # stash return value 12807 /* Report cached hotness counts */ 12808 movl OFF_FP_METHOD(rFP), %eax 12809 movl %eax, OUT_ARG0(%esp) 12810 leal OFF_FP_SHADOWFRAME(rFP), %ecx 12811 movl %ecx, OUT_ARG1(%esp) 12812 movl rSELF, %eax 12813 movl %eax, OUT_ARG2(%esp) 12814 call SYMBOL(MterpAddHotnessBatch) # (method, shadow_frame, self) 12815 movl rINST, %eax # restore return value 12816 12817 /* pop up frame */ 12818 MRestoreFrame: 12819 addl $FRAME_SIZE, %esp 12820 .cfi_adjust_cfa_offset -FRAME_SIZE 12821 12822 /* Restore callee save register */ 12823 POP %ebx 12824 POP %esi 12825 POP %edi 12826 POP %ebp 12827 ret 12828 .cfi_endproc 12829 SIZE(ExecuteMterpImpl,ExecuteMterpImpl) 12830 12831
