1 /* 2 * This file was generated automatically by gen-mterp.py for 'x86_64'. 3 * 4 * --> DO NOT EDIT <-- 5 */ 6 7 /* File: x86_64/header.S */ 8 /* 9 * Copyright (C) 2016 The Android Open Source Project 10 * 11 * Licensed under the Apache License, Version 2.0 (the "License"); 12 * you may not use this file except in compliance with the License. 13 * You may obtain a copy of the License at 14 * 15 * http://www.apache.org/licenses/LICENSE-2.0 16 * 17 * Unless required by applicable law or agreed to in writing, software 18 * distributed under the License is distributed on an "AS IS" BASIS, 19 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 * See the License for the specific language governing permissions and 21 * limitations under the License. 22 */ 23 24 /* 25 Art assembly interpreter notes: 26 27 First validate assembly code by implementing ExecuteXXXImpl() style body (doesn't 28 handle invoke, allows higher-level code to create frame & shadow frame. 29 30 Once that's working, support direct entry code & eliminate shadow frame (and 31 excess locals allocation. 32 33 Some (hopefully) temporary ugliness. We'll treat rFP as pointing to the 34 base of the vreg array within the shadow frame. Access the other fields, 35 dex_pc_, method_ and number_of_vregs_ via negative offsets. For now, we'll continue 36 the shadow frame mechanism of double-storing object references - via rFP & 37 number_of_vregs_. 38 39 */ 40 41 /* 42 x86_64 ABI general notes: 43 44 Caller save set: 45 rax, rdx, rcx, rsi, rdi, r8-r11, st(0)-st(7) 46 Callee save set: 47 rbx, rbp, r12-r15 48 Return regs: 49 32-bit in eax 50 64-bit in rax 51 fp on xmm0 52 53 First 8 fp parameters came in xmm0-xmm7. 54 First 6 non-fp parameters came in rdi, rsi, rdx, rcx, r8, r9. 55 Other parameters passed on stack, pushed right-to-left. On entry to target, first 56 param is at 8(%esp). Traditional entry code is: 57 58 Stack must be 16-byte aligned to support SSE in native code. 59 60 If we're not doing variable stack allocation (alloca), the frame pointer can be 61 eliminated and all arg references adjusted to be esp relative. 62 */ 63 64 /* 65 Mterp and x86_64 notes: 66 67 Some key interpreter variables will be assigned to registers. 68 69 nick reg purpose 70 rPROFILE rbp countdown register for jit profiling 71 rPC r12 interpreted program counter, used for fetching instructions 72 rFP r13 interpreted frame pointer, used for accessing locals and args 73 rINSTw bx first 16-bit code of current instruction 74 rINSTbl bl opcode portion of instruction word 75 rINSTbh bh high byte of inst word, usually contains src/tgt reg names 76 rIBASE r14 base of instruction handler table 77 rREFS r15 base of object references in shadow frame. 78 79 Notes: 80 o High order 16 bits of ebx must be zero on entry to handler 81 o rPC, rFP, rINSTw/rINSTbl valid on handler entry and exit 82 o eax and ecx are scratch, rINSTw/ebx sometimes scratch 83 84 Macros are provided for common operations. Each macro MUST emit only 85 one instruction to make instruction-counting easier. They MUST NOT alter 86 unspecified registers or condition codes. 87 */ 88 89 /* 90 * This is a #include, not a %include, because we want the C pre-processor 91 * to expand the macros into assembler assignment statements. 92 */ 93 #include "asm_support.h" 94 95 /* 96 * Handle mac compiler specific 97 */ 98 #if defined(__APPLE__) 99 #define MACRO_LITERAL(value) $(value) 100 #define FUNCTION_TYPE(name) 101 #define SIZE(start,end) 102 // Mac OS' symbols have an _ prefix. 103 #define SYMBOL(name) _ ## name 104 #else 105 #define MACRO_LITERAL(value) $value 106 #define FUNCTION_TYPE(name) .type name, @function 107 #define SIZE(start,end) .size start, .-end 108 #define SYMBOL(name) name 109 #endif 110 111 .macro PUSH _reg 112 pushq \_reg 113 .cfi_adjust_cfa_offset 8 114 .cfi_rel_offset \_reg, 0 115 .endm 116 117 .macro POP _reg 118 popq \_reg 119 .cfi_adjust_cfa_offset -8 120 .cfi_restore \_reg 121 .endm 122 123 /* 124 * Instead of holding a pointer to the shadow frame, we keep rFP at the base of the vregs. So, 125 * to access other shadow frame fields, we need to use a backwards offset. Define those here. 126 */ 127 #define OFF_FP(a) (a - SHADOWFRAME_VREGS_OFFSET) 128 #define OFF_FP_NUMBER_OF_VREGS OFF_FP(SHADOWFRAME_NUMBER_OF_VREGS_OFFSET) 129 #define OFF_FP_DEX_PC OFF_FP(SHADOWFRAME_DEX_PC_OFFSET) 130 #define OFF_FP_LINK OFF_FP(SHADOWFRAME_LINK_OFFSET) 131 #define OFF_FP_METHOD OFF_FP(SHADOWFRAME_METHOD_OFFSET) 132 #define OFF_FP_RESULT_REGISTER OFF_FP(SHADOWFRAME_RESULT_REGISTER_OFFSET) 133 #define OFF_FP_DEX_PC_PTR OFF_FP(SHADOWFRAME_DEX_PC_PTR_OFFSET) 134 #define OFF_FP_CODE_ITEM OFF_FP(SHADOWFRAME_CODE_ITEM_OFFSET) 135 #define OFF_FP_COUNTDOWN_OFFSET OFF_FP(SHADOWFRAME_HOTNESS_COUNTDOWN_OFFSET) 136 #define OFF_FP_SHADOWFRAME (-SHADOWFRAME_VREGS_OFFSET) 137 138 /* Frame size must be 16-byte aligned. 139 * Remember about 8 bytes for return address + 6 * 8 for spills. 140 */ 141 #define FRAME_SIZE 8 142 143 /* Frame diagram while executing ExecuteMterpImpl, high to low addresses */ 144 #define IN_ARG3 %rcx 145 #define IN_ARG2 %rdx 146 #define IN_ARG1 %rsi 147 #define IN_ARG0 %rdi 148 /* Spill offsets relative to %esp */ 149 #define SELF_SPILL (FRAME_SIZE - 8) 150 /* Out Args */ 151 #define OUT_ARG3 %rcx 152 #define OUT_ARG2 %rdx 153 #define OUT_ARG1 %rsi 154 #define OUT_ARG0 %rdi 155 #define OUT_32_ARG3 %ecx 156 #define OUT_32_ARG2 %edx 157 #define OUT_32_ARG1 %esi 158 #define OUT_32_ARG0 %edi 159 #define OUT_FP_ARG1 %xmm1 160 #define OUT_FP_ARG0 %xmm0 161 162 /* During bringup, we'll use the shadow frame model instead of rFP */ 163 /* single-purpose registers, given names for clarity */ 164 #define rSELF SELF_SPILL(%rsp) 165 #define rPC %r12 166 #define rFP %r13 167 #define rINST %ebx 168 #define rINSTq %rbx 169 #define rINSTw %bx 170 #define rINSTbh %bh 171 #define rINSTbl %bl 172 #define rIBASE %r14 173 #define rREFS %r15 174 #define rPROFILE %ebp 175 176 #define MTERP_LOGGING 0 177 178 /* 179 * "export" the PC to dex_pc field in the shadow frame, f/b/o future exception objects. Must 180 * be done *before* something throws. 181 * 182 * It's okay to do this more than once. 183 * 184 * NOTE: the fast interpreter keeps track of dex pc as a direct pointer to the mapped 185 * dex byte codes. However, the rest of the runtime expects dex pc to be an instruction 186 * offset into the code_items_[] array. For effiency, we will "export" the 187 * current dex pc as a direct pointer using the EXPORT_PC macro, and rely on GetDexPC 188 * to convert to a dex pc when needed. 189 */ 190 .macro EXPORT_PC 191 movq rPC, OFF_FP_DEX_PC_PTR(rFP) 192 .endm 193 194 /* 195 * Refresh handler table. 196 * IBase handles uses the caller save register so we must restore it after each call. 197 * Also it is used as a result of some 64-bit operations (like imul) and we should 198 * restore it in such cases also. 199 * 200 */ 201 .macro REFRESH_IBASE 202 movq rSELF, rIBASE 203 movq THREAD_CURRENT_IBASE_OFFSET(rIBASE), rIBASE 204 .endm 205 206 /* 207 * Refresh rINST. 208 * At enter to handler rINST does not contain the opcode number. 209 * However some utilities require the full value, so this macro 210 * restores the opcode number. 211 */ 212 .macro REFRESH_INST _opnum 213 movb rINSTbl, rINSTbh 214 movb $\_opnum, rINSTbl 215 .endm 216 217 /* 218 * Fetch the next instruction from rPC into rINSTw. Does not advance rPC. 219 */ 220 .macro FETCH_INST 221 movzwq (rPC), rINSTq 222 .endm 223 224 /* 225 * Remove opcode from rINST, compute the address of handler and jump to it. 226 */ 227 .macro GOTO_NEXT 228 movzx rINSTbl,%eax 229 movzbl rINSTbh,rINST 230 shll MACRO_LITERAL(7), %eax 231 addq rIBASE, %rax 232 jmp *%rax 233 .endm 234 235 /* 236 * Advance rPC by instruction count. 237 */ 238 .macro ADVANCE_PC _count 239 leaq 2*\_count(rPC), rPC 240 .endm 241 242 /* 243 * Advance rPC by instruction count, fetch instruction and jump to handler. 244 */ 245 .macro ADVANCE_PC_FETCH_AND_GOTO_NEXT _count 246 ADVANCE_PC \_count 247 FETCH_INST 248 GOTO_NEXT 249 .endm 250 251 /* 252 * Get/set the 32-bit value from a Dalvik register. 253 */ 254 #define VREG_ADDRESS(_vreg) (rFP,_vreg,4) 255 #define VREG_REF_ADDRESS(_vreg) (rREFS,_vreg,4) 256 257 .macro GET_VREG _reg _vreg 258 movl (rFP,\_vreg,4), \_reg 259 .endm 260 261 /* Read wide value. */ 262 .macro GET_WIDE_VREG _reg _vreg 263 movq (rFP,\_vreg,4), \_reg 264 .endm 265 266 .macro SET_VREG _reg _vreg 267 movl \_reg, (rFP,\_vreg,4) 268 movl MACRO_LITERAL(0), (rREFS,\_vreg,4) 269 .endm 270 271 /* Write wide value. reg is clobbered. */ 272 .macro SET_WIDE_VREG _reg _vreg 273 movq \_reg, (rFP,\_vreg,4) 274 xorq \_reg, \_reg 275 movq \_reg, (rREFS,\_vreg,4) 276 .endm 277 278 .macro SET_VREG_OBJECT _reg _vreg 279 movl \_reg, (rFP,\_vreg,4) 280 movl \_reg, (rREFS,\_vreg,4) 281 .endm 282 283 .macro GET_VREG_HIGH _reg _vreg 284 movl 4(rFP,\_vreg,4), \_reg 285 .endm 286 287 .macro SET_VREG_HIGH _reg _vreg 288 movl \_reg, 4(rFP,\_vreg,4) 289 movl MACRO_LITERAL(0), 4(rREFS,\_vreg,4) 290 .endm 291 292 .macro CLEAR_REF _vreg 293 movl MACRO_LITERAL(0), (rREFS,\_vreg,4) 294 .endm 295 296 .macro CLEAR_WIDE_REF _vreg 297 movl MACRO_LITERAL(0), (rREFS,\_vreg,4) 298 movl MACRO_LITERAL(0), 4(rREFS,\_vreg,4) 299 .endm 300 301 /* File: x86_64/entry.S */ 302 /* 303 * Copyright (C) 2016 The Android Open Source Project 304 * 305 * Licensed under the Apache License, Version 2.0 (the "License"); 306 * you may not use this file except in compliance with the License. 307 * You may obtain a copy of the License at 308 * 309 * http://www.apache.org/licenses/LICENSE-2.0 310 * 311 * Unless required by applicable law or agreed to in writing, software 312 * distributed under the License is distributed on an "AS IS" BASIS, 313 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 314 * See the License for the specific language governing permissions and 315 * limitations under the License. 316 */ 317 /* 318 * Interpreter entry point. 319 */ 320 321 .text 322 .global SYMBOL(ExecuteMterpImpl) 323 FUNCTION_TYPE(ExecuteMterpImpl) 324 325 /* 326 * On entry: 327 * 0 Thread* self 328 * 1 code_item 329 * 2 ShadowFrame 330 * 3 JValue* result_register 331 * 332 */ 333 334 SYMBOL(ExecuteMterpImpl): 335 .cfi_startproc 336 .cfi_def_cfa rsp, 8 337 338 /* Spill callee save regs */ 339 PUSH %rbx 340 PUSH %rbp 341 PUSH %r12 342 PUSH %r13 343 PUSH %r14 344 PUSH %r15 345 346 /* Allocate frame */ 347 subq $FRAME_SIZE, %rsp 348 .cfi_adjust_cfa_offset FRAME_SIZE 349 350 /* Remember the return register */ 351 movq IN_ARG3, SHADOWFRAME_RESULT_REGISTER_OFFSET(IN_ARG2) 352 353 /* Remember the code_item */ 354 movq IN_ARG1, SHADOWFRAME_CODE_ITEM_OFFSET(IN_ARG2) 355 356 /* set up "named" registers */ 357 movl SHADOWFRAME_NUMBER_OF_VREGS_OFFSET(IN_ARG2), %eax 358 leaq SHADOWFRAME_VREGS_OFFSET(IN_ARG2), rFP 359 leaq (rFP, %rax, 4), rREFS 360 movl SHADOWFRAME_DEX_PC_OFFSET(IN_ARG2), %eax 361 leaq CODEITEM_INSNS_OFFSET(IN_ARG1), rPC 362 leaq (rPC, %rax, 2), rPC 363 EXPORT_PC 364 365 /* Starting ibase */ 366 movq IN_ARG0, rSELF 367 REFRESH_IBASE 368 369 /* Set up for backwards branches & osr profiling */ 370 movq OFF_FP_METHOD(rFP), OUT_ARG0 371 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 372 call SYMBOL(MterpSetUpHotnessCountdown) 373 movswl %ax, rPROFILE 374 375 /* start executing the instruction at rPC */ 376 FETCH_INST 377 GOTO_NEXT 378 /* NOTE: no fallthrough */ 379 380 381 .global SYMBOL(artMterpAsmInstructionStart) 382 FUNCTION_TYPE(SYMBOL(artMterpAsmInstructionStart)) 383 SYMBOL(artMterpAsmInstructionStart) = .L_op_nop 384 .text 385 386 /* ------------------------------ */ 387 .balign 128 388 .L_op_nop: /* 0x00 */ 389 /* File: x86_64/op_nop.S */ 390 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 391 392 /* ------------------------------ */ 393 .balign 128 394 .L_op_move: /* 0x01 */ 395 /* File: x86_64/op_move.S */ 396 /* for move, move-object, long-to-int */ 397 /* op vA, vB */ 398 movl rINST, %eax # eax <- BA 399 andb $0xf, %al # eax <- A 400 shrl $4, rINST # rINST <- B 401 GET_VREG %edx, rINSTq 402 .if 0 403 SET_VREG_OBJECT %edx, %rax # fp[A] <- fp[B] 404 .else 405 SET_VREG %edx, %rax # fp[A] <- fp[B] 406 .endif 407 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 408 409 /* ------------------------------ */ 410 .balign 128 411 .L_op_move_from16: /* 0x02 */ 412 /* File: x86_64/op_move_from16.S */ 413 /* for: move/from16, move-object/from16 */ 414 /* op vAA, vBBBB */ 415 movzwq 2(rPC), %rax # eax <- BBBB 416 GET_VREG %edx, %rax # edx <- fp[BBBB] 417 .if 0 418 SET_VREG_OBJECT %edx, rINSTq # fp[A] <- fp[B] 419 .else 420 SET_VREG %edx, rINSTq # fp[A] <- fp[B] 421 .endif 422 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 423 424 /* ------------------------------ */ 425 .balign 128 426 .L_op_move_16: /* 0x03 */ 427 /* File: x86_64/op_move_16.S */ 428 /* for: move/16, move-object/16 */ 429 /* op vAAAA, vBBBB */ 430 movzwq 4(rPC), %rcx # ecx <- BBBB 431 movzwq 2(rPC), %rax # eax <- AAAA 432 GET_VREG %edx, %rcx 433 .if 0 434 SET_VREG_OBJECT %edx, %rax # fp[A] <- fp[B] 435 .else 436 SET_VREG %edx, %rax # fp[A] <- fp[B] 437 .endif 438 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 439 440 /* ------------------------------ */ 441 .balign 128 442 .L_op_move_wide: /* 0x04 */ 443 /* File: x86_64/op_move_wide.S */ 444 /* move-wide vA, vB */ 445 /* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */ 446 movl rINST, %ecx # ecx <- BA 447 sarl $4, rINST # rINST <- B 448 andb $0xf, %cl # ecx <- A 449 GET_WIDE_VREG %rdx, rINSTq # rdx <- v[B] 450 SET_WIDE_VREG %rdx, %rcx # v[A] <- rdx 451 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 452 453 /* ------------------------------ */ 454 .balign 128 455 .L_op_move_wide_from16: /* 0x05 */ 456 /* File: x86_64/op_move_wide_from16.S */ 457 /* move-wide/from16 vAA, vBBBB */ 458 /* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */ 459 movzwl 2(rPC), %ecx # ecx <- BBBB 460 GET_WIDE_VREG %rdx, %rcx # rdx <- v[B] 461 SET_WIDE_VREG %rdx, rINSTq # v[A] <- rdx 462 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 463 464 /* ------------------------------ */ 465 .balign 128 466 .L_op_move_wide_16: /* 0x06 */ 467 /* File: x86_64/op_move_wide_16.S */ 468 /* move-wide/16 vAAAA, vBBBB */ 469 /* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */ 470 movzwq 4(rPC), %rcx # ecx<- BBBB 471 movzwq 2(rPC), %rax # eax<- AAAA 472 GET_WIDE_VREG %rdx, %rcx # rdx <- v[B] 473 SET_WIDE_VREG %rdx, %rax # v[A] <- rdx 474 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 475 476 /* ------------------------------ */ 477 .balign 128 478 .L_op_move_object: /* 0x07 */ 479 /* File: x86_64/op_move_object.S */ 480 /* File: x86_64/op_move.S */ 481 /* for move, move-object, long-to-int */ 482 /* op vA, vB */ 483 movl rINST, %eax # eax <- BA 484 andb $0xf, %al # eax <- A 485 shrl $4, rINST # rINST <- B 486 GET_VREG %edx, rINSTq 487 .if 1 488 SET_VREG_OBJECT %edx, %rax # fp[A] <- fp[B] 489 .else 490 SET_VREG %edx, %rax # fp[A] <- fp[B] 491 .endif 492 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 493 494 495 /* ------------------------------ */ 496 .balign 128 497 .L_op_move_object_from16: /* 0x08 */ 498 /* File: x86_64/op_move_object_from16.S */ 499 /* File: x86_64/op_move_from16.S */ 500 /* for: move/from16, move-object/from16 */ 501 /* op vAA, vBBBB */ 502 movzwq 2(rPC), %rax # eax <- BBBB 503 GET_VREG %edx, %rax # edx <- fp[BBBB] 504 .if 1 505 SET_VREG_OBJECT %edx, rINSTq # fp[A] <- fp[B] 506 .else 507 SET_VREG %edx, rINSTq # fp[A] <- fp[B] 508 .endif 509 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 510 511 512 /* ------------------------------ */ 513 .balign 128 514 .L_op_move_object_16: /* 0x09 */ 515 /* File: x86_64/op_move_object_16.S */ 516 /* File: x86_64/op_move_16.S */ 517 /* for: move/16, move-object/16 */ 518 /* op vAAAA, vBBBB */ 519 movzwq 4(rPC), %rcx # ecx <- BBBB 520 movzwq 2(rPC), %rax # eax <- AAAA 521 GET_VREG %edx, %rcx 522 .if 1 523 SET_VREG_OBJECT %edx, %rax # fp[A] <- fp[B] 524 .else 525 SET_VREG %edx, %rax # fp[A] <- fp[B] 526 .endif 527 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 528 529 530 /* ------------------------------ */ 531 .balign 128 532 .L_op_move_result: /* 0x0a */ 533 /* File: x86_64/op_move_result.S */ 534 /* for: move-result, move-result-object */ 535 /* op vAA */ 536 movq OFF_FP_RESULT_REGISTER(rFP), %rax # get pointer to result JType. 537 movl (%rax), %eax # r0 <- result.i. 538 .if 0 539 SET_VREG_OBJECT %eax, rINSTq # fp[A] <- fp[B] 540 .else 541 SET_VREG %eax, rINSTq # fp[A] <- fp[B] 542 .endif 543 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 544 545 /* ------------------------------ */ 546 .balign 128 547 .L_op_move_result_wide: /* 0x0b */ 548 /* File: x86_64/op_move_result_wide.S */ 549 /* move-result-wide vAA */ 550 movq OFF_FP_RESULT_REGISTER(rFP), %rax # get pointer to result JType. 551 movq (%rax), %rdx # Get wide 552 SET_WIDE_VREG %rdx, rINSTq # v[AA] <- rdx 553 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 554 555 /* ------------------------------ */ 556 .balign 128 557 .L_op_move_result_object: /* 0x0c */ 558 /* File: x86_64/op_move_result_object.S */ 559 /* File: x86_64/op_move_result.S */ 560 /* for: move-result, move-result-object */ 561 /* op vAA */ 562 movq OFF_FP_RESULT_REGISTER(rFP), %rax # get pointer to result JType. 563 movl (%rax), %eax # r0 <- result.i. 564 .if 1 565 SET_VREG_OBJECT %eax, rINSTq # fp[A] <- fp[B] 566 .else 567 SET_VREG %eax, rINSTq # fp[A] <- fp[B] 568 .endif 569 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 570 571 572 /* ------------------------------ */ 573 .balign 128 574 .L_op_move_exception: /* 0x0d */ 575 /* File: x86_64/op_move_exception.S */ 576 /* move-exception vAA */ 577 movq rSELF, %rcx 578 movl THREAD_EXCEPTION_OFFSET(%rcx), %eax 579 SET_VREG_OBJECT %eax, rINSTq # fp[AA] <- exception object 580 movl $0, THREAD_EXCEPTION_OFFSET(%rcx) 581 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 582 583 /* ------------------------------ */ 584 .balign 128 585 .L_op_return_void: /* 0x0e */ 586 /* File: x86_64/op_return_void.S */ 587 .extern MterpThreadFenceForConstructor 588 call SYMBOL(MterpThreadFenceForConstructor) 589 movq rSELF, OUT_ARG0 590 testl $(THREAD_SUSPEND_OR_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(OUT_ARG0) 591 jz 1f 592 call SYMBOL(MterpSuspendCheck) 593 1: 594 xorq %rax, %rax 595 jmp MterpReturn 596 597 /* ------------------------------ */ 598 .balign 128 599 .L_op_return: /* 0x0f */ 600 /* File: x86_64/op_return.S */ 601 /* 602 * Return a 32-bit value. 603 * 604 * for: return, return-object 605 */ 606 /* op vAA */ 607 .extern MterpThreadFenceForConstructor 608 call SYMBOL(MterpThreadFenceForConstructor) 609 movq rSELF, OUT_ARG0 610 testl $(THREAD_SUSPEND_OR_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(OUT_ARG0) 611 jz 1f 612 call SYMBOL(MterpSuspendCheck) 613 1: 614 GET_VREG %eax, rINSTq # eax <- vAA 615 jmp MterpReturn 616 617 /* ------------------------------ */ 618 .balign 128 619 .L_op_return_wide: /* 0x10 */ 620 /* File: x86_64/op_return_wide.S */ 621 /* 622 * Return a 64-bit value. 623 */ 624 /* return-wide vAA */ 625 .extern MterpThreadFenceForConstructor 626 call SYMBOL(MterpThreadFenceForConstructor) 627 movq rSELF, OUT_ARG0 628 testl $(THREAD_SUSPEND_OR_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(OUT_ARG0) 629 jz 1f 630 call SYMBOL(MterpSuspendCheck) 631 1: 632 GET_WIDE_VREG %rax, rINSTq # eax <- v[AA] 633 jmp MterpReturn 634 635 /* ------------------------------ */ 636 .balign 128 637 .L_op_return_object: /* 0x11 */ 638 /* File: x86_64/op_return_object.S */ 639 /* File: x86_64/op_return.S */ 640 /* 641 * Return a 32-bit value. 642 * 643 * for: return, return-object 644 */ 645 /* op vAA */ 646 .extern MterpThreadFenceForConstructor 647 call SYMBOL(MterpThreadFenceForConstructor) 648 movq rSELF, OUT_ARG0 649 testl $(THREAD_SUSPEND_OR_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(OUT_ARG0) 650 jz 1f 651 call SYMBOL(MterpSuspendCheck) 652 1: 653 GET_VREG %eax, rINSTq # eax <- vAA 654 jmp MterpReturn 655 656 657 /* ------------------------------ */ 658 .balign 128 659 .L_op_const_4: /* 0x12 */ 660 /* File: x86_64/op_const_4.S */ 661 /* const/4 vA, #+B */ 662 movsbl rINSTbl, %eax # eax <-ssssssBx 663 movl $0xf, rINST 664 andl %eax, rINST # rINST <- A 665 sarl $4, %eax 666 SET_VREG %eax, rINSTq 667 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 668 669 /* ------------------------------ */ 670 .balign 128 671 .L_op_const_16: /* 0x13 */ 672 /* File: x86_64/op_const_16.S */ 673 /* const/16 vAA, #+BBBB */ 674 movswl 2(rPC), %ecx # ecx <- ssssBBBB 675 SET_VREG %ecx, rINSTq # vAA <- ssssBBBB 676 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 677 678 /* ------------------------------ */ 679 .balign 128 680 .L_op_const: /* 0x14 */ 681 /* File: x86_64/op_const.S */ 682 /* const vAA, #+BBBBbbbb */ 683 movl 2(rPC), %eax # grab all 32 bits at once 684 SET_VREG %eax, rINSTq # vAA<- eax 685 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 686 687 /* ------------------------------ */ 688 .balign 128 689 .L_op_const_high16: /* 0x15 */ 690 /* File: x86_64/op_const_high16.S */ 691 /* const/high16 vAA, #+BBBB0000 */ 692 movzwl 2(rPC), %eax # eax <- 0000BBBB 693 sall $16, %eax # eax <- BBBB0000 694 SET_VREG %eax, rINSTq # vAA <- eax 695 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 696 697 /* ------------------------------ */ 698 .balign 128 699 .L_op_const_wide_16: /* 0x16 */ 700 /* File: x86_64/op_const_wide_16.S */ 701 /* const-wide/16 vAA, #+BBBB */ 702 movswq 2(rPC), %rax # rax <- ssssBBBB 703 SET_WIDE_VREG %rax, rINSTq # store 704 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 705 706 /* ------------------------------ */ 707 .balign 128 708 .L_op_const_wide_32: /* 0x17 */ 709 /* File: x86_64/op_const_wide_32.S */ 710 /* const-wide/32 vAA, #+BBBBbbbb */ 711 movslq 2(rPC), %rax # eax <- ssssssssBBBBbbbb 712 SET_WIDE_VREG %rax, rINSTq # store 713 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 714 715 /* ------------------------------ */ 716 .balign 128 717 .L_op_const_wide: /* 0x18 */ 718 /* File: x86_64/op_const_wide.S */ 719 /* const-wide vAA, #+HHHHhhhhBBBBbbbb */ 720 movq 2(rPC), %rax # rax <- HHHHhhhhBBBBbbbb 721 SET_WIDE_VREG %rax, rINSTq 722 ADVANCE_PC_FETCH_AND_GOTO_NEXT 5 723 724 /* ------------------------------ */ 725 .balign 128 726 .L_op_const_wide_high16: /* 0x19 */ 727 /* File: x86_64/op_const_wide_high16.S */ 728 /* const-wide/high16 vAA, #+BBBB000000000000 */ 729 movzwq 2(rPC), %rax # eax <- 0000BBBB 730 salq $48, %rax # eax <- BBBB0000 731 SET_WIDE_VREG %rax, rINSTq # v[AA+0] <- eax 732 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 733 734 /* ------------------------------ */ 735 .balign 128 736 .L_op_const_string: /* 0x1a */ 737 /* File: x86_64/op_const_string.S */ 738 /* const/string vAA, String@BBBB */ 739 EXPORT_PC 740 movzwq 2(rPC), OUT_ARG0 # OUT_ARG0 <- BBBB 741 movq rINSTq, OUT_ARG1 742 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG2 743 movq rSELF, OUT_ARG3 744 call SYMBOL(MterpConstString) # (index, tgt_reg, shadow_frame, self) 745 testb %al, %al 746 jnz MterpPossibleException 747 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 748 749 /* ------------------------------ */ 750 .balign 128 751 .L_op_const_string_jumbo: /* 0x1b */ 752 /* File: x86_64/op_const_string_jumbo.S */ 753 /* const/string vAA, String@BBBBBBBB */ 754 EXPORT_PC 755 movl 2(rPC), OUT_32_ARG0 # OUT_32_ARG0 <- BBBB 756 movq rINSTq, OUT_ARG1 757 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG2 758 movq rSELF, OUT_ARG3 759 call SYMBOL(MterpConstString) # (index, tgt_reg, shadow_frame, self) 760 testb %al, %al 761 jnz MterpPossibleException 762 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 763 764 /* ------------------------------ */ 765 .balign 128 766 .L_op_const_class: /* 0x1c */ 767 /* File: x86_64/op_const_class.S */ 768 /* const/class vAA, Class@BBBB */ 769 EXPORT_PC 770 movzwq 2(rPC), OUT_ARG0 # eax <- OUT_ARG0 771 movq rINSTq, OUT_ARG1 772 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG2 773 movq rSELF, OUT_ARG3 774 call SYMBOL(MterpConstClass) # (index, tgt_reg, shadow_frame, self) 775 testb %al, %al 776 jnz MterpPossibleException 777 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 778 779 /* ------------------------------ */ 780 .balign 128 781 .L_op_monitor_enter: /* 0x1d */ 782 /* File: x86_64/op_monitor_enter.S */ 783 /* 784 * Synchronize on an object. 785 */ 786 /* monitor-enter vAA */ 787 EXPORT_PC 788 GET_VREG OUT_32_ARG0, rINSTq 789 movq rSELF, OUT_ARG1 790 call SYMBOL(artLockObjectFromCode) # (object, self) 791 testq %rax, %rax 792 jnz MterpException 793 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 794 795 /* ------------------------------ */ 796 .balign 128 797 .L_op_monitor_exit: /* 0x1e */ 798 /* File: x86_64/op_monitor_exit.S */ 799 /* 800 * Unlock an object. 801 * 802 * Exceptions that occur when unlocking a monitor need to appear as 803 * if they happened at the following instruction. See the Dalvik 804 * instruction spec. 805 */ 806 /* monitor-exit vAA */ 807 EXPORT_PC 808 GET_VREG OUT_32_ARG0, rINSTq 809 movq rSELF, OUT_ARG1 810 call SYMBOL(artUnlockObjectFromCode) # (object, self) 811 testq %rax, %rax 812 jnz MterpException 813 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 814 815 /* ------------------------------ */ 816 .balign 128 817 .L_op_check_cast: /* 0x1f */ 818 /* File: x86_64/op_check_cast.S */ 819 /* 820 * Check to see if a cast from one class to another is allowed. 821 */ 822 /* check-cast vAA, class@BBBB */ 823 EXPORT_PC 824 movzwq 2(rPC), OUT_ARG0 # OUT_ARG0 <- BBBB 825 leaq VREG_ADDRESS(rINSTq), OUT_ARG1 826 movq OFF_FP_METHOD(rFP), OUT_ARG2 827 movq rSELF, OUT_ARG3 828 call SYMBOL(MterpCheckCast) # (index, &obj, method, self) 829 testb %al, %al 830 jnz MterpPossibleException 831 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 832 833 /* ------------------------------ */ 834 .balign 128 835 .L_op_instance_of: /* 0x20 */ 836 /* File: x86_64/op_instance_of.S */ 837 /* 838 * Check to see if an object reference is an instance of a class. 839 * 840 * Most common situation is a non-null object, being compared against 841 * an already-resolved class. 842 */ 843 /* instance-of vA, vB, class@CCCC */ 844 EXPORT_PC 845 movzwl 2(rPC), OUT_32_ARG0 # OUT_32_ARG0 <- CCCC 846 movl rINST, %eax # eax <- BA 847 sarl $4, %eax # eax <- B 848 leaq VREG_ADDRESS(%rax), OUT_ARG1 # Get object address 849 movq OFF_FP_METHOD(rFP), OUT_ARG2 850 movq rSELF, OUT_ARG3 851 call SYMBOL(MterpInstanceOf) # (index, &obj, method, self) 852 movsbl %al, %eax 853 movq rSELF, %rcx 854 cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) 855 jnz MterpException 856 andb $0xf, rINSTbl # rINSTbl <- A 857 SET_VREG %eax, rINSTq 858 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 859 860 /* ------------------------------ */ 861 .balign 128 862 .L_op_array_length: /* 0x21 */ 863 /* File: x86_64/op_array_length.S */ 864 /* 865 * Return the length of an array. 866 */ 867 movl rINST, %eax # eax <- BA 868 sarl $4, rINST # rINST <- B 869 GET_VREG %ecx, rINSTq # ecx <- vB (object ref) 870 testl %ecx, %ecx # is null? 871 je common_errNullObject 872 andb $0xf, %al # eax <- A 873 movl MIRROR_ARRAY_LENGTH_OFFSET(%rcx), rINST 874 SET_VREG rINST, %rax 875 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 876 877 /* ------------------------------ */ 878 .balign 128 879 .L_op_new_instance: /* 0x22 */ 880 /* File: x86_64/op_new_instance.S */ 881 /* 882 * Create a new instance of a class. 883 */ 884 /* new-instance vAA, class@BBBB */ 885 EXPORT_PC 886 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG0 887 movq rSELF, OUT_ARG1 888 REFRESH_INST 34 889 movq rINSTq, OUT_ARG2 890 call SYMBOL(MterpNewInstance) 891 testb %al, %al # 0 means an exception is thrown 892 jz MterpPossibleException 893 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 894 895 /* ------------------------------ */ 896 .balign 128 897 .L_op_new_array: /* 0x23 */ 898 /* File: x86_64/op_new_array.S */ 899 /* 900 * Allocate an array of objects, specified with the array class 901 * and a count. 902 * 903 * The verifier guarantees that this is an array class, so we don't 904 * check for it here. 905 */ 906 /* new-array vA, vB, class@CCCC */ 907 EXPORT_PC 908 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG0 909 movq rPC, OUT_ARG1 910 REFRESH_INST 35 911 movq rINSTq, OUT_ARG2 912 movq rSELF, OUT_ARG3 913 call SYMBOL(MterpNewArray) 914 testb %al, %al # 0 means an exception is thrown 915 jz MterpPossibleException 916 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 917 918 /* ------------------------------ */ 919 .balign 128 920 .L_op_filled_new_array: /* 0x24 */ 921 /* File: x86_64/op_filled_new_array.S */ 922 /* 923 * Create a new array with elements filled from registers. 924 * 925 * for: filled-new-array, filled-new-array/range 926 */ 927 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 928 /* op {vCCCC..v(CCCC+AA-1)}, type@BBBB */ 929 .extern MterpFilledNewArray 930 EXPORT_PC 931 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG0 932 movq rPC, OUT_ARG1 933 movq rSELF, OUT_ARG2 934 call SYMBOL(MterpFilledNewArray) 935 testb %al, %al # 0 means an exception is thrown 936 jz MterpPossibleException 937 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 938 939 /* ------------------------------ */ 940 .balign 128 941 .L_op_filled_new_array_range: /* 0x25 */ 942 /* File: x86_64/op_filled_new_array_range.S */ 943 /* File: x86_64/op_filled_new_array.S */ 944 /* 945 * Create a new array with elements filled from registers. 946 * 947 * for: filled-new-array, filled-new-array/range 948 */ 949 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 950 /* op {vCCCC..v(CCCC+AA-1)}, type@BBBB */ 951 .extern MterpFilledNewArrayRange 952 EXPORT_PC 953 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG0 954 movq rPC, OUT_ARG1 955 movq rSELF, OUT_ARG2 956 call SYMBOL(MterpFilledNewArrayRange) 957 testb %al, %al # 0 means an exception is thrown 958 jz MterpPossibleException 959 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 960 961 962 /* ------------------------------ */ 963 .balign 128 964 .L_op_fill_array_data: /* 0x26 */ 965 /* File: x86_64/op_fill_array_data.S */ 966 /* fill-array-data vAA, +BBBBBBBB */ 967 EXPORT_PC 968 movslq 2(rPC), %rcx # rcx <- ssssssssBBBBbbbb 969 leaq (rPC,%rcx,2), OUT_ARG1 # OUT_ARG1 <- PC + ssssssssBBBBbbbb*2 970 GET_VREG OUT_32_ARG0, rINSTq # OUT_ARG0 <- vAA (array object) 971 call SYMBOL(MterpFillArrayData) # (obj, payload) 972 testb %al, %al # 0 means an exception is thrown 973 jz MterpPossibleException 974 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 975 976 /* ------------------------------ */ 977 .balign 128 978 .L_op_throw: /* 0x27 */ 979 /* File: x86_64/op_throw.S */ 980 /* 981 * Throw an exception object in the current thread. 982 */ 983 /* throw vAA */ 984 EXPORT_PC 985 GET_VREG %eax, rINSTq # eax<- vAA (exception object) 986 testb %al, %al 987 jz common_errNullObject 988 movq rSELF, %rcx 989 movq %rax, THREAD_EXCEPTION_OFFSET(%rcx) 990 jmp MterpException 991 992 /* ------------------------------ */ 993 .balign 128 994 .L_op_goto: /* 0x28 */ 995 /* File: x86_64/op_goto.S */ 996 /* 997 * Unconditional branch, 8-bit offset. 998 * 999 * The branch distance is a signed code-unit offset, which we need to 1000 * double to get a byte offset. 1001 */ 1002 /* goto +AA */ 1003 movsbq rINSTbl, rINSTq # rINSTq <- ssssssAA 1004 testq rINSTq, rINSTq 1005 jmp MterpCommonTakenBranch 1006 1007 /* ------------------------------ */ 1008 .balign 128 1009 .L_op_goto_16: /* 0x29 */ 1010 /* File: x86_64/op_goto_16.S */ 1011 /* 1012 * Unconditional branch, 16-bit offset. 1013 * 1014 * The branch distance is a signed code-unit offset, which we need to 1015 * double to get a byte offset. 1016 */ 1017 /* goto/16 +AAAA */ 1018 movswq 2(rPC), rINSTq # rINSTq <- ssssAAAA 1019 testq rINSTq, rINSTq 1020 jmp MterpCommonTakenBranch 1021 1022 /* ------------------------------ */ 1023 .balign 128 1024 .L_op_goto_32: /* 0x2a */ 1025 /* File: x86_64/op_goto_32.S */ 1026 /* 1027 * Unconditional branch, 32-bit offset. 1028 * 1029 * The branch distance is a signed code-unit offset, which we need to 1030 * double to get a byte offset. 1031 * 1032 * Because we need the SF bit set, we'll use an adds 1033 * to convert from Dalvik offset to byte offset. 1034 */ 1035 /* goto/32 +AAAAAAAA */ 1036 movslq 2(rPC), rINSTq # rINSTq <- AAAAAAAA 1037 testq rINSTq, rINSTq 1038 jmp MterpCommonTakenBranch 1039 1040 /* ------------------------------ */ 1041 .balign 128 1042 .L_op_packed_switch: /* 0x2b */ 1043 /* File: x86_64/op_packed_switch.S */ 1044 /* 1045 * Handle a packed-switch or sparse-switch instruction. In both cases 1046 * we decode it and hand it off to a helper function. 1047 * 1048 * We don't really expect backward branches in a switch statement, but 1049 * they're perfectly legal, so we check for them here. 1050 * 1051 * for: packed-switch, sparse-switch 1052 */ 1053 /* op vAA, +BBBB */ 1054 movslq 2(rPC), OUT_ARG0 # rcx <- ssssssssBBBBbbbb 1055 leaq (rPC,OUT_ARG0,2), OUT_ARG0 # rcx <- PC + ssssssssBBBBbbbb*2 1056 GET_VREG OUT_32_ARG1, rINSTq # eax <- vAA 1057 call SYMBOL(MterpDoPackedSwitch) 1058 testl %eax, %eax 1059 movslq %eax, rINSTq 1060 jmp MterpCommonTakenBranch 1061 1062 /* ------------------------------ */ 1063 .balign 128 1064 .L_op_sparse_switch: /* 0x2c */ 1065 /* File: x86_64/op_sparse_switch.S */ 1066 /* File: x86_64/op_packed_switch.S */ 1067 /* 1068 * Handle a packed-switch or sparse-switch instruction. In both cases 1069 * we decode it and hand it off to a helper function. 1070 * 1071 * We don't really expect backward branches in a switch statement, but 1072 * they're perfectly legal, so we check for them here. 1073 * 1074 * for: packed-switch, sparse-switch 1075 */ 1076 /* op vAA, +BBBB */ 1077 movslq 2(rPC), OUT_ARG0 # rcx <- ssssssssBBBBbbbb 1078 leaq (rPC,OUT_ARG0,2), OUT_ARG0 # rcx <- PC + ssssssssBBBBbbbb*2 1079 GET_VREG OUT_32_ARG1, rINSTq # eax <- vAA 1080 call SYMBOL(MterpDoSparseSwitch) 1081 testl %eax, %eax 1082 movslq %eax, rINSTq 1083 jmp MterpCommonTakenBranch 1084 1085 1086 /* ------------------------------ */ 1087 .balign 128 1088 .L_op_cmpl_float: /* 0x2d */ 1089 /* File: x86_64/op_cmpl_float.S */ 1090 /* File: x86_64/fpcmp.S */ 1091 /* 1092 * Compare two floating-point values. Puts 0, 1, or -1 into the 1093 * destination register based on the results of the comparison. 1094 * 1095 * int compare(x, y) { 1096 * if (x == y) { 1097 * return 0; 1098 * } else if (x < y) { 1099 * return -1; 1100 * } else if (x > y) { 1101 * return 1; 1102 * } else { 1103 * return nanval ? 1 : -1; 1104 * } 1105 * } 1106 */ 1107 /* op vAA, vBB, vCC */ 1108 movzbq 3(rPC), %rcx # ecx<- CC 1109 movzbq 2(rPC), %rax # eax<- BB 1110 movss VREG_ADDRESS(%rax), %xmm0 1111 xor %eax, %eax 1112 ucomiss VREG_ADDRESS(%rcx), %xmm0 1113 jp .Lop_cmpl_float_nan_is_neg 1114 je .Lop_cmpl_float_finish 1115 jb .Lop_cmpl_float_less 1116 .Lop_cmpl_float_nan_is_pos: 1117 addb $1, %al 1118 jmp .Lop_cmpl_float_finish 1119 .Lop_cmpl_float_nan_is_neg: 1120 .Lop_cmpl_float_less: 1121 movl $-1, %eax 1122 .Lop_cmpl_float_finish: 1123 SET_VREG %eax, rINSTq 1124 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1125 1126 1127 /* ------------------------------ */ 1128 .balign 128 1129 .L_op_cmpg_float: /* 0x2e */ 1130 /* File: x86_64/op_cmpg_float.S */ 1131 /* File: x86_64/fpcmp.S */ 1132 /* 1133 * Compare two floating-point values. Puts 0, 1, or -1 into the 1134 * destination register based on the results of the comparison. 1135 * 1136 * int compare(x, y) { 1137 * if (x == y) { 1138 * return 0; 1139 * } else if (x < y) { 1140 * return -1; 1141 * } else if (x > y) { 1142 * return 1; 1143 * } else { 1144 * return nanval ? 1 : -1; 1145 * } 1146 * } 1147 */ 1148 /* op vAA, vBB, vCC */ 1149 movzbq 3(rPC), %rcx # ecx<- CC 1150 movzbq 2(rPC), %rax # eax<- BB 1151 movss VREG_ADDRESS(%rax), %xmm0 1152 xor %eax, %eax 1153 ucomiss VREG_ADDRESS(%rcx), %xmm0 1154 jp .Lop_cmpg_float_nan_is_pos 1155 je .Lop_cmpg_float_finish 1156 jb .Lop_cmpg_float_less 1157 .Lop_cmpg_float_nan_is_pos: 1158 addb $1, %al 1159 jmp .Lop_cmpg_float_finish 1160 .Lop_cmpg_float_nan_is_neg: 1161 .Lop_cmpg_float_less: 1162 movl $-1, %eax 1163 .Lop_cmpg_float_finish: 1164 SET_VREG %eax, rINSTq 1165 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1166 1167 1168 /* ------------------------------ */ 1169 .balign 128 1170 .L_op_cmpl_double: /* 0x2f */ 1171 /* File: x86_64/op_cmpl_double.S */ 1172 /* File: x86_64/fpcmp.S */ 1173 /* 1174 * Compare two floating-point values. Puts 0, 1, or -1 into the 1175 * destination register based on the results of the comparison. 1176 * 1177 * int compare(x, y) { 1178 * if (x == y) { 1179 * return 0; 1180 * } else if (x < y) { 1181 * return -1; 1182 * } else if (x > y) { 1183 * return 1; 1184 * } else { 1185 * return nanval ? 1 : -1; 1186 * } 1187 * } 1188 */ 1189 /* op vAA, vBB, vCC */ 1190 movzbq 3(rPC), %rcx # ecx<- CC 1191 movzbq 2(rPC), %rax # eax<- BB 1192 movsd VREG_ADDRESS(%rax), %xmm0 1193 xor %eax, %eax 1194 ucomisd VREG_ADDRESS(%rcx), %xmm0 1195 jp .Lop_cmpl_double_nan_is_neg 1196 je .Lop_cmpl_double_finish 1197 jb .Lop_cmpl_double_less 1198 .Lop_cmpl_double_nan_is_pos: 1199 addb $1, %al 1200 jmp .Lop_cmpl_double_finish 1201 .Lop_cmpl_double_nan_is_neg: 1202 .Lop_cmpl_double_less: 1203 movl $-1, %eax 1204 .Lop_cmpl_double_finish: 1205 SET_VREG %eax, rINSTq 1206 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1207 1208 1209 /* ------------------------------ */ 1210 .balign 128 1211 .L_op_cmpg_double: /* 0x30 */ 1212 /* File: x86_64/op_cmpg_double.S */ 1213 /* File: x86_64/fpcmp.S */ 1214 /* 1215 * Compare two floating-point values. Puts 0, 1, or -1 into the 1216 * destination register based on the results of the comparison. 1217 * 1218 * int compare(x, y) { 1219 * if (x == y) { 1220 * return 0; 1221 * } else if (x < y) { 1222 * return -1; 1223 * } else if (x > y) { 1224 * return 1; 1225 * } else { 1226 * return nanval ? 1 : -1; 1227 * } 1228 * } 1229 */ 1230 /* op vAA, vBB, vCC */ 1231 movzbq 3(rPC), %rcx # ecx<- CC 1232 movzbq 2(rPC), %rax # eax<- BB 1233 movsd VREG_ADDRESS(%rax), %xmm0 1234 xor %eax, %eax 1235 ucomisd VREG_ADDRESS(%rcx), %xmm0 1236 jp .Lop_cmpg_double_nan_is_pos 1237 je .Lop_cmpg_double_finish 1238 jb .Lop_cmpg_double_less 1239 .Lop_cmpg_double_nan_is_pos: 1240 addb $1, %al 1241 jmp .Lop_cmpg_double_finish 1242 .Lop_cmpg_double_nan_is_neg: 1243 .Lop_cmpg_double_less: 1244 movl $-1, %eax 1245 .Lop_cmpg_double_finish: 1246 SET_VREG %eax, rINSTq 1247 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1248 1249 1250 /* ------------------------------ */ 1251 .balign 128 1252 .L_op_cmp_long: /* 0x31 */ 1253 /* File: x86_64/op_cmp_long.S */ 1254 /* 1255 * Compare two 64-bit values. Puts 0, 1, or -1 into the destination 1256 * register based on the results of the comparison. 1257 */ 1258 /* cmp-long vAA, vBB, vCC */ 1259 movzbq 2(rPC), %rdx # edx <- BB 1260 movzbq 3(rPC), %rcx # ecx <- CC 1261 GET_WIDE_VREG %rdx, %rdx # rdx <- v[BB] 1262 xorl %eax, %eax 1263 xorl %edi, %edi 1264 addb $1, %al 1265 movl $-1, %esi 1266 cmpq VREG_ADDRESS(%rcx), %rdx 1267 cmovl %esi, %edi 1268 cmovg %eax, %edi 1269 SET_VREG %edi, rINSTq 1270 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1271 1272 /* ------------------------------ */ 1273 .balign 128 1274 .L_op_if_eq: /* 0x32 */ 1275 /* File: x86_64/op_if_eq.S */ 1276 /* File: x86_64/bincmp.S */ 1277 /* 1278 * Generic two-operand compare-and-branch operation. Provide a "revcmp" 1279 * fragment that specifies the *reverse* comparison to perform, e.g. 1280 * for "if-le" you would use "gt". 1281 * 1282 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 1283 */ 1284 /* if-cmp vA, vB, +CCCC */ 1285 movl rINST, %ecx # rcx <- A+ 1286 sarl $4, rINST # rINST <- B 1287 andb $0xf, %cl # rcx <- A 1288 GET_VREG %eax, %rcx # eax <- vA 1289 cmpl VREG_ADDRESS(rINSTq), %eax # compare (vA, vB) 1290 jne 1f 1291 movswq 2(rPC), rINSTq # Get signed branch offset 1292 testq rINSTq, rINSTq 1293 jmp MterpCommonTakenBranch 1294 1: 1295 cmpl $JIT_CHECK_OSR, rPROFILE 1296 je .L_check_not_taken_osr 1297 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1298 1299 1300 /* ------------------------------ */ 1301 .balign 128 1302 .L_op_if_ne: /* 0x33 */ 1303 /* File: x86_64/op_if_ne.S */ 1304 /* File: x86_64/bincmp.S */ 1305 /* 1306 * Generic two-operand compare-and-branch operation. Provide a "revcmp" 1307 * fragment that specifies the *reverse* comparison to perform, e.g. 1308 * for "if-le" you would use "gt". 1309 * 1310 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 1311 */ 1312 /* if-cmp vA, vB, +CCCC */ 1313 movl rINST, %ecx # rcx <- A+ 1314 sarl $4, rINST # rINST <- B 1315 andb $0xf, %cl # rcx <- A 1316 GET_VREG %eax, %rcx # eax <- vA 1317 cmpl VREG_ADDRESS(rINSTq), %eax # compare (vA, vB) 1318 je 1f 1319 movswq 2(rPC), rINSTq # Get signed branch offset 1320 testq rINSTq, rINSTq 1321 jmp MterpCommonTakenBranch 1322 1: 1323 cmpl $JIT_CHECK_OSR, rPROFILE 1324 je .L_check_not_taken_osr 1325 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1326 1327 1328 /* ------------------------------ */ 1329 .balign 128 1330 .L_op_if_lt: /* 0x34 */ 1331 /* File: x86_64/op_if_lt.S */ 1332 /* File: x86_64/bincmp.S */ 1333 /* 1334 * Generic two-operand compare-and-branch operation. Provide a "revcmp" 1335 * fragment that specifies the *reverse* comparison to perform, e.g. 1336 * for "if-le" you would use "gt". 1337 * 1338 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 1339 */ 1340 /* if-cmp vA, vB, +CCCC */ 1341 movl rINST, %ecx # rcx <- A+ 1342 sarl $4, rINST # rINST <- B 1343 andb $0xf, %cl # rcx <- A 1344 GET_VREG %eax, %rcx # eax <- vA 1345 cmpl VREG_ADDRESS(rINSTq), %eax # compare (vA, vB) 1346 jge 1f 1347 movswq 2(rPC), rINSTq # Get signed branch offset 1348 testq rINSTq, rINSTq 1349 jmp MterpCommonTakenBranch 1350 1: 1351 cmpl $JIT_CHECK_OSR, rPROFILE 1352 je .L_check_not_taken_osr 1353 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1354 1355 1356 /* ------------------------------ */ 1357 .balign 128 1358 .L_op_if_ge: /* 0x35 */ 1359 /* File: x86_64/op_if_ge.S */ 1360 /* File: x86_64/bincmp.S */ 1361 /* 1362 * Generic two-operand compare-and-branch operation. Provide a "revcmp" 1363 * fragment that specifies the *reverse* comparison to perform, e.g. 1364 * for "if-le" you would use "gt". 1365 * 1366 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 1367 */ 1368 /* if-cmp vA, vB, +CCCC */ 1369 movl rINST, %ecx # rcx <- A+ 1370 sarl $4, rINST # rINST <- B 1371 andb $0xf, %cl # rcx <- A 1372 GET_VREG %eax, %rcx # eax <- vA 1373 cmpl VREG_ADDRESS(rINSTq), %eax # compare (vA, vB) 1374 jl 1f 1375 movswq 2(rPC), rINSTq # Get signed branch offset 1376 testq rINSTq, rINSTq 1377 jmp MterpCommonTakenBranch 1378 1: 1379 cmpl $JIT_CHECK_OSR, rPROFILE 1380 je .L_check_not_taken_osr 1381 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1382 1383 1384 /* ------------------------------ */ 1385 .balign 128 1386 .L_op_if_gt: /* 0x36 */ 1387 /* File: x86_64/op_if_gt.S */ 1388 /* File: x86_64/bincmp.S */ 1389 /* 1390 * Generic two-operand compare-and-branch operation. Provide a "revcmp" 1391 * fragment that specifies the *reverse* comparison to perform, e.g. 1392 * for "if-le" you would use "gt". 1393 * 1394 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 1395 */ 1396 /* if-cmp vA, vB, +CCCC */ 1397 movl rINST, %ecx # rcx <- A+ 1398 sarl $4, rINST # rINST <- B 1399 andb $0xf, %cl # rcx <- A 1400 GET_VREG %eax, %rcx # eax <- vA 1401 cmpl VREG_ADDRESS(rINSTq), %eax # compare (vA, vB) 1402 jle 1f 1403 movswq 2(rPC), rINSTq # Get signed branch offset 1404 testq rINSTq, rINSTq 1405 jmp MterpCommonTakenBranch 1406 1: 1407 cmpl $JIT_CHECK_OSR, rPROFILE 1408 je .L_check_not_taken_osr 1409 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1410 1411 1412 /* ------------------------------ */ 1413 .balign 128 1414 .L_op_if_le: /* 0x37 */ 1415 /* File: x86_64/op_if_le.S */ 1416 /* File: x86_64/bincmp.S */ 1417 /* 1418 * Generic two-operand compare-and-branch operation. Provide a "revcmp" 1419 * fragment that specifies the *reverse* comparison to perform, e.g. 1420 * for "if-le" you would use "gt". 1421 * 1422 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 1423 */ 1424 /* if-cmp vA, vB, +CCCC */ 1425 movl rINST, %ecx # rcx <- A+ 1426 sarl $4, rINST # rINST <- B 1427 andb $0xf, %cl # rcx <- A 1428 GET_VREG %eax, %rcx # eax <- vA 1429 cmpl VREG_ADDRESS(rINSTq), %eax # compare (vA, vB) 1430 jg 1f 1431 movswq 2(rPC), rINSTq # Get signed branch offset 1432 testq rINSTq, rINSTq 1433 jmp MterpCommonTakenBranch 1434 1: 1435 cmpl $JIT_CHECK_OSR, rPROFILE 1436 je .L_check_not_taken_osr 1437 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1438 1439 1440 /* ------------------------------ */ 1441 .balign 128 1442 .L_op_if_eqz: /* 0x38 */ 1443 /* File: x86_64/op_if_eqz.S */ 1444 /* File: x86_64/zcmp.S */ 1445 /* 1446 * Generic one-operand compare-and-branch operation. Provide a "revcmp" 1447 * fragment that specifies the *reverse* comparison to perform, e.g. 1448 * for "if-le" you would use "gt". 1449 * 1450 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 1451 */ 1452 /* if-cmp vAA, +BBBB */ 1453 cmpl $0, VREG_ADDRESS(rINSTq) # compare (vA, 0) 1454 jne 1f 1455 movswq 2(rPC), rINSTq # fetch signed displacement 1456 testq rINSTq, rINSTq 1457 jmp MterpCommonTakenBranch 1458 1: 1459 cmpl $JIT_CHECK_OSR, rPROFILE 1460 je .L_check_not_taken_osr 1461 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1462 1463 1464 /* ------------------------------ */ 1465 .balign 128 1466 .L_op_if_nez: /* 0x39 */ 1467 /* File: x86_64/op_if_nez.S */ 1468 /* File: x86_64/zcmp.S */ 1469 /* 1470 * Generic one-operand compare-and-branch operation. Provide a "revcmp" 1471 * fragment that specifies the *reverse* comparison to perform, e.g. 1472 * for "if-le" you would use "gt". 1473 * 1474 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 1475 */ 1476 /* if-cmp vAA, +BBBB */ 1477 cmpl $0, VREG_ADDRESS(rINSTq) # compare (vA, 0) 1478 je 1f 1479 movswq 2(rPC), rINSTq # fetch signed displacement 1480 testq rINSTq, rINSTq 1481 jmp MterpCommonTakenBranch 1482 1: 1483 cmpl $JIT_CHECK_OSR, rPROFILE 1484 je .L_check_not_taken_osr 1485 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1486 1487 1488 /* ------------------------------ */ 1489 .balign 128 1490 .L_op_if_ltz: /* 0x3a */ 1491 /* File: x86_64/op_if_ltz.S */ 1492 /* File: x86_64/zcmp.S */ 1493 /* 1494 * Generic one-operand compare-and-branch operation. Provide a "revcmp" 1495 * fragment that specifies the *reverse* comparison to perform, e.g. 1496 * for "if-le" you would use "gt". 1497 * 1498 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 1499 */ 1500 /* if-cmp vAA, +BBBB */ 1501 cmpl $0, VREG_ADDRESS(rINSTq) # compare (vA, 0) 1502 jge 1f 1503 movswq 2(rPC), rINSTq # fetch signed displacement 1504 testq rINSTq, rINSTq 1505 jmp MterpCommonTakenBranch 1506 1: 1507 cmpl $JIT_CHECK_OSR, rPROFILE 1508 je .L_check_not_taken_osr 1509 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1510 1511 1512 /* ------------------------------ */ 1513 .balign 128 1514 .L_op_if_gez: /* 0x3b */ 1515 /* File: x86_64/op_if_gez.S */ 1516 /* File: x86_64/zcmp.S */ 1517 /* 1518 * Generic one-operand compare-and-branch operation. Provide a "revcmp" 1519 * fragment that specifies the *reverse* comparison to perform, e.g. 1520 * for "if-le" you would use "gt". 1521 * 1522 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 1523 */ 1524 /* if-cmp vAA, +BBBB */ 1525 cmpl $0, VREG_ADDRESS(rINSTq) # compare (vA, 0) 1526 jl 1f 1527 movswq 2(rPC), rINSTq # fetch signed displacement 1528 testq rINSTq, rINSTq 1529 jmp MterpCommonTakenBranch 1530 1: 1531 cmpl $JIT_CHECK_OSR, rPROFILE 1532 je .L_check_not_taken_osr 1533 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1534 1535 1536 /* ------------------------------ */ 1537 .balign 128 1538 .L_op_if_gtz: /* 0x3c */ 1539 /* File: x86_64/op_if_gtz.S */ 1540 /* File: x86_64/zcmp.S */ 1541 /* 1542 * Generic one-operand compare-and-branch operation. Provide a "revcmp" 1543 * fragment that specifies the *reverse* comparison to perform, e.g. 1544 * for "if-le" you would use "gt". 1545 * 1546 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 1547 */ 1548 /* if-cmp vAA, +BBBB */ 1549 cmpl $0, VREG_ADDRESS(rINSTq) # compare (vA, 0) 1550 jle 1f 1551 movswq 2(rPC), rINSTq # fetch signed displacement 1552 testq rINSTq, rINSTq 1553 jmp MterpCommonTakenBranch 1554 1: 1555 cmpl $JIT_CHECK_OSR, rPROFILE 1556 je .L_check_not_taken_osr 1557 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1558 1559 1560 /* ------------------------------ */ 1561 .balign 128 1562 .L_op_if_lez: /* 0x3d */ 1563 /* File: x86_64/op_if_lez.S */ 1564 /* File: x86_64/zcmp.S */ 1565 /* 1566 * Generic one-operand compare-and-branch operation. Provide a "revcmp" 1567 * fragment that specifies the *reverse* comparison to perform, e.g. 1568 * for "if-le" you would use "gt". 1569 * 1570 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 1571 */ 1572 /* if-cmp vAA, +BBBB */ 1573 cmpl $0, VREG_ADDRESS(rINSTq) # compare (vA, 0) 1574 jg 1f 1575 movswq 2(rPC), rINSTq # fetch signed displacement 1576 testq rINSTq, rINSTq 1577 jmp MterpCommonTakenBranch 1578 1: 1579 cmpl $JIT_CHECK_OSR, rPROFILE 1580 je .L_check_not_taken_osr 1581 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1582 1583 1584 /* ------------------------------ */ 1585 .balign 128 1586 .L_op_unused_3e: /* 0x3e */ 1587 /* File: x86_64/op_unused_3e.S */ 1588 /* File: x86_64/unused.S */ 1589 /* 1590 * Bail to reference interpreter to throw. 1591 */ 1592 jmp MterpFallback 1593 1594 1595 /* ------------------------------ */ 1596 .balign 128 1597 .L_op_unused_3f: /* 0x3f */ 1598 /* File: x86_64/op_unused_3f.S */ 1599 /* File: x86_64/unused.S */ 1600 /* 1601 * Bail to reference interpreter to throw. 1602 */ 1603 jmp MterpFallback 1604 1605 1606 /* ------------------------------ */ 1607 .balign 128 1608 .L_op_unused_40: /* 0x40 */ 1609 /* File: x86_64/op_unused_40.S */ 1610 /* File: x86_64/unused.S */ 1611 /* 1612 * Bail to reference interpreter to throw. 1613 */ 1614 jmp MterpFallback 1615 1616 1617 /* ------------------------------ */ 1618 .balign 128 1619 .L_op_unused_41: /* 0x41 */ 1620 /* File: x86_64/op_unused_41.S */ 1621 /* File: x86_64/unused.S */ 1622 /* 1623 * Bail to reference interpreter to throw. 1624 */ 1625 jmp MterpFallback 1626 1627 1628 /* ------------------------------ */ 1629 .balign 128 1630 .L_op_unused_42: /* 0x42 */ 1631 /* File: x86_64/op_unused_42.S */ 1632 /* File: x86_64/unused.S */ 1633 /* 1634 * Bail to reference interpreter to throw. 1635 */ 1636 jmp MterpFallback 1637 1638 1639 /* ------------------------------ */ 1640 .balign 128 1641 .L_op_unused_43: /* 0x43 */ 1642 /* File: x86_64/op_unused_43.S */ 1643 /* File: x86_64/unused.S */ 1644 /* 1645 * Bail to reference interpreter to throw. 1646 */ 1647 jmp MterpFallback 1648 1649 1650 /* ------------------------------ */ 1651 .balign 128 1652 .L_op_aget: /* 0x44 */ 1653 /* File: x86_64/op_aget.S */ 1654 /* 1655 * Array get, 32 bits or less. vAA <- vBB[vCC]. 1656 * 1657 * for: aget, aget-boolean, aget-byte, aget-char, aget-short, aget-wide 1658 * 1659 */ 1660 /* op vAA, vBB, vCC */ 1661 movzbq 2(rPC), %rax # eax <- BB 1662 movzbq 3(rPC), %rcx # ecx <- CC 1663 GET_VREG %eax, %rax # eax <- vBB (array object) 1664 GET_VREG %ecx, %rcx # ecx <- vCC (requested index) 1665 testl %eax, %eax # null array object? 1666 je common_errNullObject # bail if so 1667 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1668 jae common_errArrayIndex # index >= length, bail. 1669 .if 0 1670 movq MIRROR_INT_ARRAY_DATA_OFFSET(%rax,%rcx,8), %rax 1671 SET_WIDE_VREG %rax, rINSTq 1672 .else 1673 movl MIRROR_INT_ARRAY_DATA_OFFSET(%rax,%rcx,4), %eax 1674 SET_VREG %eax, rINSTq 1675 .endif 1676 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1677 1678 /* ------------------------------ */ 1679 .balign 128 1680 .L_op_aget_wide: /* 0x45 */ 1681 /* File: x86_64/op_aget_wide.S */ 1682 /* File: x86_64/op_aget.S */ 1683 /* 1684 * Array get, 32 bits or less. vAA <- vBB[vCC]. 1685 * 1686 * for: aget, aget-boolean, aget-byte, aget-char, aget-short, aget-wide 1687 * 1688 */ 1689 /* op vAA, vBB, vCC */ 1690 movzbq 2(rPC), %rax # eax <- BB 1691 movzbq 3(rPC), %rcx # ecx <- CC 1692 GET_VREG %eax, %rax # eax <- vBB (array object) 1693 GET_VREG %ecx, %rcx # ecx <- vCC (requested index) 1694 testl %eax, %eax # null array object? 1695 je common_errNullObject # bail if so 1696 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1697 jae common_errArrayIndex # index >= length, bail. 1698 .if 1 1699 movq MIRROR_WIDE_ARRAY_DATA_OFFSET(%rax,%rcx,8), %rax 1700 SET_WIDE_VREG %rax, rINSTq 1701 .else 1702 movq MIRROR_WIDE_ARRAY_DATA_OFFSET(%rax,%rcx,8), %eax 1703 SET_VREG %eax, rINSTq 1704 .endif 1705 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1706 1707 1708 /* ------------------------------ */ 1709 .balign 128 1710 .L_op_aget_object: /* 0x46 */ 1711 /* File: x86_64/op_aget_object.S */ 1712 /* 1713 * Array object get. vAA <- vBB[vCC]. 1714 * 1715 * for: aget-object 1716 */ 1717 /* op vAA, vBB, vCC */ 1718 movzbq 2(rPC), %rax # rax <- BB 1719 movzbq 3(rPC), %rcx # rcx <- CC 1720 GET_VREG OUT_32_ARG0, %rax # eax <- vBB (array object) 1721 GET_VREG OUT_32_ARG1, %rcx # ecx <- vCC (requested index) 1722 EXPORT_PC 1723 call SYMBOL(artAGetObjectFromMterp) # (array, index) 1724 movq rSELF, %rcx 1725 cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) 1726 jnz MterpException 1727 SET_VREG_OBJECT %eax, rINSTq 1728 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1729 1730 /* ------------------------------ */ 1731 .balign 128 1732 .L_op_aget_boolean: /* 0x47 */ 1733 /* File: x86_64/op_aget_boolean.S */ 1734 /* File: x86_64/op_aget.S */ 1735 /* 1736 * Array get, 32 bits or less. vAA <- vBB[vCC]. 1737 * 1738 * for: aget, aget-boolean, aget-byte, aget-char, aget-short, aget-wide 1739 * 1740 */ 1741 /* op vAA, vBB, vCC */ 1742 movzbq 2(rPC), %rax # eax <- BB 1743 movzbq 3(rPC), %rcx # ecx <- CC 1744 GET_VREG %eax, %rax # eax <- vBB (array object) 1745 GET_VREG %ecx, %rcx # ecx <- vCC (requested index) 1746 testl %eax, %eax # null array object? 1747 je common_errNullObject # bail if so 1748 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1749 jae common_errArrayIndex # index >= length, bail. 1750 .if 0 1751 movq MIRROR_BOOLEAN_ARRAY_DATA_OFFSET(%rax,%rcx,8), %rax 1752 SET_WIDE_VREG %rax, rINSTq 1753 .else 1754 movzbl MIRROR_BOOLEAN_ARRAY_DATA_OFFSET(%rax,%rcx,1), %eax 1755 SET_VREG %eax, rINSTq 1756 .endif 1757 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1758 1759 1760 /* ------------------------------ */ 1761 .balign 128 1762 .L_op_aget_byte: /* 0x48 */ 1763 /* File: x86_64/op_aget_byte.S */ 1764 /* File: x86_64/op_aget.S */ 1765 /* 1766 * Array get, 32 bits or less. vAA <- vBB[vCC]. 1767 * 1768 * for: aget, aget-boolean, aget-byte, aget-char, aget-short, aget-wide 1769 * 1770 */ 1771 /* op vAA, vBB, vCC */ 1772 movzbq 2(rPC), %rax # eax <- BB 1773 movzbq 3(rPC), %rcx # ecx <- CC 1774 GET_VREG %eax, %rax # eax <- vBB (array object) 1775 GET_VREG %ecx, %rcx # ecx <- vCC (requested index) 1776 testl %eax, %eax # null array object? 1777 je common_errNullObject # bail if so 1778 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1779 jae common_errArrayIndex # index >= length, bail. 1780 .if 0 1781 movq MIRROR_BYTE_ARRAY_DATA_OFFSET(%rax,%rcx,8), %rax 1782 SET_WIDE_VREG %rax, rINSTq 1783 .else 1784 movsbl MIRROR_BYTE_ARRAY_DATA_OFFSET(%rax,%rcx,1), %eax 1785 SET_VREG %eax, rINSTq 1786 .endif 1787 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1788 1789 1790 /* ------------------------------ */ 1791 .balign 128 1792 .L_op_aget_char: /* 0x49 */ 1793 /* File: x86_64/op_aget_char.S */ 1794 /* File: x86_64/op_aget.S */ 1795 /* 1796 * Array get, 32 bits or less. vAA <- vBB[vCC]. 1797 * 1798 * for: aget, aget-boolean, aget-byte, aget-char, aget-short, aget-wide 1799 * 1800 */ 1801 /* op vAA, vBB, vCC */ 1802 movzbq 2(rPC), %rax # eax <- BB 1803 movzbq 3(rPC), %rcx # ecx <- CC 1804 GET_VREG %eax, %rax # eax <- vBB (array object) 1805 GET_VREG %ecx, %rcx # ecx <- vCC (requested index) 1806 testl %eax, %eax # null array object? 1807 je common_errNullObject # bail if so 1808 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1809 jae common_errArrayIndex # index >= length, bail. 1810 .if 0 1811 movq MIRROR_CHAR_ARRAY_DATA_OFFSET(%rax,%rcx,8), %rax 1812 SET_WIDE_VREG %rax, rINSTq 1813 .else 1814 movzwl MIRROR_CHAR_ARRAY_DATA_OFFSET(%rax,%rcx,2), %eax 1815 SET_VREG %eax, rINSTq 1816 .endif 1817 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1818 1819 1820 /* ------------------------------ */ 1821 .balign 128 1822 .L_op_aget_short: /* 0x4a */ 1823 /* File: x86_64/op_aget_short.S */ 1824 /* File: x86_64/op_aget.S */ 1825 /* 1826 * Array get, 32 bits or less. vAA <- vBB[vCC]. 1827 * 1828 * for: aget, aget-boolean, aget-byte, aget-char, aget-short, aget-wide 1829 * 1830 */ 1831 /* op vAA, vBB, vCC */ 1832 movzbq 2(rPC), %rax # eax <- BB 1833 movzbq 3(rPC), %rcx # ecx <- CC 1834 GET_VREG %eax, %rax # eax <- vBB (array object) 1835 GET_VREG %ecx, %rcx # ecx <- vCC (requested index) 1836 testl %eax, %eax # null array object? 1837 je common_errNullObject # bail if so 1838 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1839 jae common_errArrayIndex # index >= length, bail. 1840 .if 0 1841 movq MIRROR_SHORT_ARRAY_DATA_OFFSET(%rax,%rcx,8), %rax 1842 SET_WIDE_VREG %rax, rINSTq 1843 .else 1844 movswl MIRROR_SHORT_ARRAY_DATA_OFFSET(%rax,%rcx,2), %eax 1845 SET_VREG %eax, rINSTq 1846 .endif 1847 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1848 1849 1850 /* ------------------------------ */ 1851 .balign 128 1852 .L_op_aput: /* 0x4b */ 1853 /* File: x86_64/op_aput.S */ 1854 /* 1855 * Array put, 32 bits or less. vBB[vCC] <- vAA. 1856 * 1857 * for: aput, aput-boolean, aput-byte, aput-char, aput-short, aput-wide 1858 * 1859 */ 1860 /* op vAA, vBB, vCC */ 1861 movzbq 2(rPC), %rax # rax <- BB 1862 movzbq 3(rPC), %rcx # rcx <- CC 1863 GET_VREG %eax, %rax # eax <- vBB (array object) 1864 GET_VREG %ecx, %rcx # ecx <- vCC (requested index) 1865 testl %eax, %eax # null array object? 1866 je common_errNullObject # bail if so 1867 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1868 jae common_errArrayIndex # index >= length, bail. 1869 .if 0 1870 GET_WIDE_VREG rINSTq, rINSTq 1871 .else 1872 GET_VREG rINST, rINSTq 1873 .endif 1874 movl rINST, MIRROR_INT_ARRAY_DATA_OFFSET(%rax,%rcx,4) 1875 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1876 1877 /* ------------------------------ */ 1878 .balign 128 1879 .L_op_aput_wide: /* 0x4c */ 1880 /* File: x86_64/op_aput_wide.S */ 1881 /* File: x86_64/op_aput.S */ 1882 /* 1883 * Array put, 32 bits or less. vBB[vCC] <- vAA. 1884 * 1885 * for: aput, aput-boolean, aput-byte, aput-char, aput-short, aput-wide 1886 * 1887 */ 1888 /* op vAA, vBB, vCC */ 1889 movzbq 2(rPC), %rax # rax <- BB 1890 movzbq 3(rPC), %rcx # rcx <- CC 1891 GET_VREG %eax, %rax # eax <- vBB (array object) 1892 GET_VREG %ecx, %rcx # ecx <- vCC (requested index) 1893 testl %eax, %eax # null array object? 1894 je common_errNullObject # bail if so 1895 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1896 jae common_errArrayIndex # index >= length, bail. 1897 .if 1 1898 GET_WIDE_VREG rINSTq, rINSTq 1899 .else 1900 GET_VREG rINST, rINSTq 1901 .endif 1902 movq rINSTq, MIRROR_WIDE_ARRAY_DATA_OFFSET(%rax,%rcx,8) 1903 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1904 1905 1906 /* ------------------------------ */ 1907 .balign 128 1908 .L_op_aput_object: /* 0x4d */ 1909 /* File: x86_64/op_aput_object.S */ 1910 /* 1911 * Store an object into an array. vBB[vCC] <- vAA. 1912 */ 1913 /* op vAA, vBB, vCC */ 1914 EXPORT_PC 1915 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG0 1916 movq rPC, OUT_ARG1 1917 REFRESH_INST 77 1918 movq rINSTq, OUT_ARG2 1919 call SYMBOL(MterpAputObject) # (array, index) 1920 testb %al, %al 1921 jz MterpPossibleException 1922 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1923 1924 /* ------------------------------ */ 1925 .balign 128 1926 .L_op_aput_boolean: /* 0x4e */ 1927 /* File: x86_64/op_aput_boolean.S */ 1928 /* File: x86_64/op_aput.S */ 1929 /* 1930 * Array put, 32 bits or less. vBB[vCC] <- vAA. 1931 * 1932 * for: aput, aput-boolean, aput-byte, aput-char, aput-short, aput-wide 1933 * 1934 */ 1935 /* op vAA, vBB, vCC */ 1936 movzbq 2(rPC), %rax # rax <- BB 1937 movzbq 3(rPC), %rcx # rcx <- CC 1938 GET_VREG %eax, %rax # eax <- vBB (array object) 1939 GET_VREG %ecx, %rcx # ecx <- vCC (requested index) 1940 testl %eax, %eax # null array object? 1941 je common_errNullObject # bail if so 1942 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1943 jae common_errArrayIndex # index >= length, bail. 1944 .if 0 1945 GET_WIDE_VREG rINSTq, rINSTq 1946 .else 1947 GET_VREG rINST, rINSTq 1948 .endif 1949 movb rINSTbl, MIRROR_BOOLEAN_ARRAY_DATA_OFFSET(%rax,%rcx,1) 1950 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1951 1952 1953 /* ------------------------------ */ 1954 .balign 128 1955 .L_op_aput_byte: /* 0x4f */ 1956 /* File: x86_64/op_aput_byte.S */ 1957 /* File: x86_64/op_aput.S */ 1958 /* 1959 * Array put, 32 bits or less. vBB[vCC] <- vAA. 1960 * 1961 * for: aput, aput-boolean, aput-byte, aput-char, aput-short, aput-wide 1962 * 1963 */ 1964 /* op vAA, vBB, vCC */ 1965 movzbq 2(rPC), %rax # rax <- BB 1966 movzbq 3(rPC), %rcx # rcx <- CC 1967 GET_VREG %eax, %rax # eax <- vBB (array object) 1968 GET_VREG %ecx, %rcx # ecx <- vCC (requested index) 1969 testl %eax, %eax # null array object? 1970 je common_errNullObject # bail if so 1971 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1972 jae common_errArrayIndex # index >= length, bail. 1973 .if 0 1974 GET_WIDE_VREG rINSTq, rINSTq 1975 .else 1976 GET_VREG rINST, rINSTq 1977 .endif 1978 movb rINSTbl, MIRROR_BYTE_ARRAY_DATA_OFFSET(%rax,%rcx,1) 1979 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1980 1981 1982 /* ------------------------------ */ 1983 .balign 128 1984 .L_op_aput_char: /* 0x50 */ 1985 /* File: x86_64/op_aput_char.S */ 1986 /* File: x86_64/op_aput.S */ 1987 /* 1988 * Array put, 32 bits or less. vBB[vCC] <- vAA. 1989 * 1990 * for: aput, aput-boolean, aput-byte, aput-char, aput-short, aput-wide 1991 * 1992 */ 1993 /* op vAA, vBB, vCC */ 1994 movzbq 2(rPC), %rax # rax <- BB 1995 movzbq 3(rPC), %rcx # rcx <- CC 1996 GET_VREG %eax, %rax # eax <- vBB (array object) 1997 GET_VREG %ecx, %rcx # ecx <- vCC (requested index) 1998 testl %eax, %eax # null array object? 1999 je common_errNullObject # bail if so 2000 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 2001 jae common_errArrayIndex # index >= length, bail. 2002 .if 0 2003 GET_WIDE_VREG rINSTq, rINSTq 2004 .else 2005 GET_VREG rINST, rINSTq 2006 .endif 2007 movw rINSTw, MIRROR_CHAR_ARRAY_DATA_OFFSET(%rax,%rcx,2) 2008 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2009 2010 2011 /* ------------------------------ */ 2012 .balign 128 2013 .L_op_aput_short: /* 0x51 */ 2014 /* File: x86_64/op_aput_short.S */ 2015 /* File: x86_64/op_aput.S */ 2016 /* 2017 * Array put, 32 bits or less. vBB[vCC] <- vAA. 2018 * 2019 * for: aput, aput-boolean, aput-byte, aput-char, aput-short, aput-wide 2020 * 2021 */ 2022 /* op vAA, vBB, vCC */ 2023 movzbq 2(rPC), %rax # rax <- BB 2024 movzbq 3(rPC), %rcx # rcx <- CC 2025 GET_VREG %eax, %rax # eax <- vBB (array object) 2026 GET_VREG %ecx, %rcx # ecx <- vCC (requested index) 2027 testl %eax, %eax # null array object? 2028 je common_errNullObject # bail if so 2029 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 2030 jae common_errArrayIndex # index >= length, bail. 2031 .if 0 2032 GET_WIDE_VREG rINSTq, rINSTq 2033 .else 2034 GET_VREG rINST, rINSTq 2035 .endif 2036 movw rINSTw, MIRROR_SHORT_ARRAY_DATA_OFFSET(%rax,%rcx,2) 2037 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2038 2039 2040 /* ------------------------------ */ 2041 .balign 128 2042 .L_op_iget: /* 0x52 */ 2043 /* File: x86_64/op_iget.S */ 2044 /* 2045 * General instance field get. 2046 * 2047 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short, iget-wide 2048 */ 2049 EXPORT_PC 2050 movzbq rINSTbl, %rcx # rcx <- BA 2051 movzwl 2(rPC), OUT_32_ARG0 # eax <- field ref CCCC 2052 sarl $4, %ecx # ecx <- B 2053 GET_VREG OUT_32_ARG1, %rcx # the object pointer 2054 movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer 2055 movq rSELF, OUT_ARG3 2056 call SYMBOL(artGet32InstanceFromCode) 2057 movq rSELF, %rcx 2058 cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) 2059 jnz MterpException # bail out 2060 andb $0xf, rINSTbl # rINST <- A 2061 .if 0 2062 SET_VREG_OBJECT %eax, rINSTq # fp[A] <-value 2063 .else 2064 .if 0 2065 SET_WIDE_VREG %rax, rINSTq # fp[A] <-value 2066 .else 2067 SET_VREG %eax, rINSTq # fp[A] <-value 2068 .endif 2069 .endif 2070 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2071 2072 /* ------------------------------ */ 2073 .balign 128 2074 .L_op_iget_wide: /* 0x53 */ 2075 /* File: x86_64/op_iget_wide.S */ 2076 /* File: x86_64/op_iget.S */ 2077 /* 2078 * General instance field get. 2079 * 2080 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short, iget-wide 2081 */ 2082 EXPORT_PC 2083 movzbq rINSTbl, %rcx # rcx <- BA 2084 movzwl 2(rPC), OUT_32_ARG0 # eax <- field ref CCCC 2085 sarl $4, %ecx # ecx <- B 2086 GET_VREG OUT_32_ARG1, %rcx # the object pointer 2087 movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer 2088 movq rSELF, OUT_ARG3 2089 call SYMBOL(artGet64InstanceFromCode) 2090 movq rSELF, %rcx 2091 cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) 2092 jnz MterpException # bail out 2093 andb $0xf, rINSTbl # rINST <- A 2094 .if 0 2095 SET_VREG_OBJECT %eax, rINSTq # fp[A] <-value 2096 .else 2097 .if 1 2098 SET_WIDE_VREG %rax, rINSTq # fp[A] <-value 2099 .else 2100 SET_VREG %eax, rINSTq # fp[A] <-value 2101 .endif 2102 .endif 2103 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2104 2105 2106 /* ------------------------------ */ 2107 .balign 128 2108 .L_op_iget_object: /* 0x54 */ 2109 /* File: x86_64/op_iget_object.S */ 2110 /* File: x86_64/op_iget.S */ 2111 /* 2112 * General instance field get. 2113 * 2114 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short, iget-wide 2115 */ 2116 EXPORT_PC 2117 movzbq rINSTbl, %rcx # rcx <- BA 2118 movzwl 2(rPC), OUT_32_ARG0 # eax <- field ref CCCC 2119 sarl $4, %ecx # ecx <- B 2120 GET_VREG OUT_32_ARG1, %rcx # the object pointer 2121 movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer 2122 movq rSELF, OUT_ARG3 2123 call SYMBOL(artGetObjInstanceFromCode) 2124 movq rSELF, %rcx 2125 cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) 2126 jnz MterpException # bail out 2127 andb $0xf, rINSTbl # rINST <- A 2128 .if 1 2129 SET_VREG_OBJECT %eax, rINSTq # fp[A] <-value 2130 .else 2131 .if 0 2132 SET_WIDE_VREG %rax, rINSTq # fp[A] <-value 2133 .else 2134 SET_VREG %eax, rINSTq # fp[A] <-value 2135 .endif 2136 .endif 2137 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2138 2139 2140 /* ------------------------------ */ 2141 .balign 128 2142 .L_op_iget_boolean: /* 0x55 */ 2143 /* File: x86_64/op_iget_boolean.S */ 2144 /* File: x86_64/op_iget.S */ 2145 /* 2146 * General instance field get. 2147 * 2148 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short, iget-wide 2149 */ 2150 EXPORT_PC 2151 movzbq rINSTbl, %rcx # rcx <- BA 2152 movzwl 2(rPC), OUT_32_ARG0 # eax <- field ref CCCC 2153 sarl $4, %ecx # ecx <- B 2154 GET_VREG OUT_32_ARG1, %rcx # the object pointer 2155 movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer 2156 movq rSELF, OUT_ARG3 2157 call SYMBOL(artGetBooleanInstanceFromCode) 2158 movq rSELF, %rcx 2159 cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) 2160 jnz MterpException # bail out 2161 andb $0xf, rINSTbl # rINST <- A 2162 .if 0 2163 SET_VREG_OBJECT %eax, rINSTq # fp[A] <-value 2164 .else 2165 .if 0 2166 SET_WIDE_VREG %rax, rINSTq # fp[A] <-value 2167 .else 2168 SET_VREG %eax, rINSTq # fp[A] <-value 2169 .endif 2170 .endif 2171 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2172 2173 2174 /* ------------------------------ */ 2175 .balign 128 2176 .L_op_iget_byte: /* 0x56 */ 2177 /* File: x86_64/op_iget_byte.S */ 2178 /* File: x86_64/op_iget.S */ 2179 /* 2180 * General instance field get. 2181 * 2182 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short, iget-wide 2183 */ 2184 EXPORT_PC 2185 movzbq rINSTbl, %rcx # rcx <- BA 2186 movzwl 2(rPC), OUT_32_ARG0 # eax <- field ref CCCC 2187 sarl $4, %ecx # ecx <- B 2188 GET_VREG OUT_32_ARG1, %rcx # the object pointer 2189 movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer 2190 movq rSELF, OUT_ARG3 2191 call SYMBOL(artGetByteInstanceFromCode) 2192 movq rSELF, %rcx 2193 cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) 2194 jnz MterpException # bail out 2195 andb $0xf, rINSTbl # rINST <- A 2196 .if 0 2197 SET_VREG_OBJECT %eax, rINSTq # fp[A] <-value 2198 .else 2199 .if 0 2200 SET_WIDE_VREG %rax, rINSTq # fp[A] <-value 2201 .else 2202 SET_VREG %eax, rINSTq # fp[A] <-value 2203 .endif 2204 .endif 2205 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2206 2207 2208 /* ------------------------------ */ 2209 .balign 128 2210 .L_op_iget_char: /* 0x57 */ 2211 /* File: x86_64/op_iget_char.S */ 2212 /* File: x86_64/op_iget.S */ 2213 /* 2214 * General instance field get. 2215 * 2216 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short, iget-wide 2217 */ 2218 EXPORT_PC 2219 movzbq rINSTbl, %rcx # rcx <- BA 2220 movzwl 2(rPC), OUT_32_ARG0 # eax <- field ref CCCC 2221 sarl $4, %ecx # ecx <- B 2222 GET_VREG OUT_32_ARG1, %rcx # the object pointer 2223 movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer 2224 movq rSELF, OUT_ARG3 2225 call SYMBOL(artGetCharInstanceFromCode) 2226 movq rSELF, %rcx 2227 cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) 2228 jnz MterpException # bail out 2229 andb $0xf, rINSTbl # rINST <- A 2230 .if 0 2231 SET_VREG_OBJECT %eax, rINSTq # fp[A] <-value 2232 .else 2233 .if 0 2234 SET_WIDE_VREG %rax, rINSTq # fp[A] <-value 2235 .else 2236 SET_VREG %eax, rINSTq # fp[A] <-value 2237 .endif 2238 .endif 2239 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2240 2241 2242 /* ------------------------------ */ 2243 .balign 128 2244 .L_op_iget_short: /* 0x58 */ 2245 /* File: x86_64/op_iget_short.S */ 2246 /* File: x86_64/op_iget.S */ 2247 /* 2248 * General instance field get. 2249 * 2250 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short, iget-wide 2251 */ 2252 EXPORT_PC 2253 movzbq rINSTbl, %rcx # rcx <- BA 2254 movzwl 2(rPC), OUT_32_ARG0 # eax <- field ref CCCC 2255 sarl $4, %ecx # ecx <- B 2256 GET_VREG OUT_32_ARG1, %rcx # the object pointer 2257 movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer 2258 movq rSELF, OUT_ARG3 2259 call SYMBOL(artGetShortInstanceFromCode) 2260 movq rSELF, %rcx 2261 cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) 2262 jnz MterpException # bail out 2263 andb $0xf, rINSTbl # rINST <- A 2264 .if 0 2265 SET_VREG_OBJECT %eax, rINSTq # fp[A] <-value 2266 .else 2267 .if 0 2268 SET_WIDE_VREG %rax, rINSTq # fp[A] <-value 2269 .else 2270 SET_VREG %eax, rINSTq # fp[A] <-value 2271 .endif 2272 .endif 2273 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2274 2275 2276 /* ------------------------------ */ 2277 .balign 128 2278 .L_op_iput: /* 0x59 */ 2279 /* File: x86_64/op_iput.S */ 2280 /* 2281 * General 32-bit instance field put. 2282 * 2283 * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short 2284 */ 2285 /* op vA, vB, field@CCCC */ 2286 .extern artSet32InstanceFromMterp 2287 EXPORT_PC 2288 movzwl 2(rPC), OUT_32_ARG0 # field ref <- 0000CCCC 2289 movzbq rINSTbl, %rcx # rcx<- BA 2290 sarl $4, %ecx # ecx<- B 2291 GET_VREG OUT_32_ARG1, %rcx # the object pointer 2292 andb $0xf, rINSTbl # rINST<- A 2293 GET_VREG OUT_32_ARG2, rINSTq # fp[A] 2294 movq OFF_FP_METHOD(rFP), OUT_ARG3 # referrer 2295 call SYMBOL(artSet32InstanceFromMterp) 2296 testb %al, %al 2297 jnz MterpPossibleException 2298 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2299 2300 /* ------------------------------ */ 2301 .balign 128 2302 .L_op_iput_wide: /* 0x5a */ 2303 /* File: x86_64/op_iput_wide.S */ 2304 /* iput-wide vA, vB, field@CCCC */ 2305 .extern artSet64InstanceFromMterp 2306 EXPORT_PC 2307 movzwq 2(rPC), OUT_ARG0 # field ref CCCC 2308 movzbq rINSTbl, %rcx # rcx <- BA 2309 sarl $4, %ecx # ecx <- B 2310 GET_VREG OUT_32_ARG1, %rcx # the object pointer 2311 andb $0xf, rINSTbl # rINST <- A 2312 leaq VREG_ADDRESS(rINSTq), OUT_ARG2 # &fp[A] 2313 movq OFF_FP_METHOD(rFP), OUT_ARG3 # referrer 2314 call SYMBOL(artSet64InstanceFromMterp) 2315 testb %al, %al 2316 jnz MterpPossibleException 2317 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2318 2319 /* ------------------------------ */ 2320 .balign 128 2321 .L_op_iput_object: /* 0x5b */ 2322 /* File: x86_64/op_iput_object.S */ 2323 EXPORT_PC 2324 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG0 2325 movq rPC, OUT_ARG1 2326 REFRESH_INST 91 2327 movl rINST, OUT_32_ARG2 2328 movq rSELF, OUT_ARG3 2329 call SYMBOL(MterpIputObject) 2330 testb %al, %al 2331 jz MterpException 2332 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2333 2334 /* ------------------------------ */ 2335 .balign 128 2336 .L_op_iput_boolean: /* 0x5c */ 2337 /* File: x86_64/op_iput_boolean.S */ 2338 /* File: x86_64/op_iput.S */ 2339 /* 2340 * General 32-bit instance field put. 2341 * 2342 * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short 2343 */ 2344 /* op vA, vB, field@CCCC */ 2345 .extern artSet8InstanceFromMterp 2346 EXPORT_PC 2347 movzwl 2(rPC), OUT_32_ARG0 # field ref <- 0000CCCC 2348 movzbq rINSTbl, %rcx # rcx<- BA 2349 sarl $4, %ecx # ecx<- B 2350 GET_VREG OUT_32_ARG1, %rcx # the object pointer 2351 andb $0xf, rINSTbl # rINST<- A 2352 GET_VREG OUT_32_ARG2, rINSTq # fp[A] 2353 movq OFF_FP_METHOD(rFP), OUT_ARG3 # referrer 2354 call SYMBOL(artSet8InstanceFromMterp) 2355 testb %al, %al 2356 jnz MterpPossibleException 2357 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2358 2359 2360 /* ------------------------------ */ 2361 .balign 128 2362 .L_op_iput_byte: /* 0x5d */ 2363 /* File: x86_64/op_iput_byte.S */ 2364 /* File: x86_64/op_iput.S */ 2365 /* 2366 * General 32-bit instance field put. 2367 * 2368 * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short 2369 */ 2370 /* op vA, vB, field@CCCC */ 2371 .extern artSet8InstanceFromMterp 2372 EXPORT_PC 2373 movzwl 2(rPC), OUT_32_ARG0 # field ref <- 0000CCCC 2374 movzbq rINSTbl, %rcx # rcx<- BA 2375 sarl $4, %ecx # ecx<- B 2376 GET_VREG OUT_32_ARG1, %rcx # the object pointer 2377 andb $0xf, rINSTbl # rINST<- A 2378 GET_VREG OUT_32_ARG2, rINSTq # fp[A] 2379 movq OFF_FP_METHOD(rFP), OUT_ARG3 # referrer 2380 call SYMBOL(artSet8InstanceFromMterp) 2381 testb %al, %al 2382 jnz MterpPossibleException 2383 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2384 2385 2386 /* ------------------------------ */ 2387 .balign 128 2388 .L_op_iput_char: /* 0x5e */ 2389 /* File: x86_64/op_iput_char.S */ 2390 /* File: x86_64/op_iput.S */ 2391 /* 2392 * General 32-bit instance field put. 2393 * 2394 * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short 2395 */ 2396 /* op vA, vB, field@CCCC */ 2397 .extern artSet16InstanceFromMterp 2398 EXPORT_PC 2399 movzwl 2(rPC), OUT_32_ARG0 # field ref <- 0000CCCC 2400 movzbq rINSTbl, %rcx # rcx<- BA 2401 sarl $4, %ecx # ecx<- B 2402 GET_VREG OUT_32_ARG1, %rcx # the object pointer 2403 andb $0xf, rINSTbl # rINST<- A 2404 GET_VREG OUT_32_ARG2, rINSTq # fp[A] 2405 movq OFF_FP_METHOD(rFP), OUT_ARG3 # referrer 2406 call SYMBOL(artSet16InstanceFromMterp) 2407 testb %al, %al 2408 jnz MterpPossibleException 2409 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2410 2411 2412 /* ------------------------------ */ 2413 .balign 128 2414 .L_op_iput_short: /* 0x5f */ 2415 /* File: x86_64/op_iput_short.S */ 2416 /* File: x86_64/op_iput.S */ 2417 /* 2418 * General 32-bit instance field put. 2419 * 2420 * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short 2421 */ 2422 /* op vA, vB, field@CCCC */ 2423 .extern artSet16InstanceFromMterp 2424 EXPORT_PC 2425 movzwl 2(rPC), OUT_32_ARG0 # field ref <- 0000CCCC 2426 movzbq rINSTbl, %rcx # rcx<- BA 2427 sarl $4, %ecx # ecx<- B 2428 GET_VREG OUT_32_ARG1, %rcx # the object pointer 2429 andb $0xf, rINSTbl # rINST<- A 2430 GET_VREG OUT_32_ARG2, rINSTq # fp[A] 2431 movq OFF_FP_METHOD(rFP), OUT_ARG3 # referrer 2432 call SYMBOL(artSet16InstanceFromMterp) 2433 testb %al, %al 2434 jnz MterpPossibleException 2435 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2436 2437 2438 /* ------------------------------ */ 2439 .balign 128 2440 .L_op_sget: /* 0x60 */ 2441 /* File: x86_64/op_sget.S */ 2442 /* 2443 * General SGET handler wrapper. 2444 * 2445 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short, sget-wide 2446 */ 2447 /* op vAA, field@BBBB */ 2448 .extern MterpGet32Static 2449 EXPORT_PC 2450 movzwq 2(rPC), OUT_ARG0 # field ref CCCC 2451 movq OFF_FP_METHOD(rFP), OUT_ARG1 # referrer 2452 movq rSELF, OUT_ARG2 # self 2453 call SYMBOL(MterpGet32Static) 2454 movq rSELF, %rcx 2455 cmpl $0, THREAD_EXCEPTION_OFFSET(%rcx) 2456 jnz MterpException 2457 .if 0 2458 SET_VREG_OBJECT %eax, rINSTq # fp[A] <- value 2459 .else 2460 .if 0 2461 SET_WIDE_VREG %rax, rINSTq # fp[A] <- value 2462 .else 2463 SET_VREG %eax, rINSTq # fp[A] <- value 2464 .endif 2465 .endif 2466 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2467 2468 /* ------------------------------ */ 2469 .balign 128 2470 .L_op_sget_wide: /* 0x61 */ 2471 /* File: x86_64/op_sget_wide.S */ 2472 /* File: x86_64/op_sget.S */ 2473 /* 2474 * General SGET handler wrapper. 2475 * 2476 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short, sget-wide 2477 */ 2478 /* op vAA, field@BBBB */ 2479 .extern MterpGet64Static 2480 EXPORT_PC 2481 movzwq 2(rPC), OUT_ARG0 # field ref CCCC 2482 movq OFF_FP_METHOD(rFP), OUT_ARG1 # referrer 2483 movq rSELF, OUT_ARG2 # self 2484 call SYMBOL(MterpGet64Static) 2485 movq rSELF, %rcx 2486 cmpl $0, THREAD_EXCEPTION_OFFSET(%rcx) 2487 jnz MterpException 2488 .if 0 2489 SET_VREG_OBJECT %eax, rINSTq # fp[A] <- value 2490 .else 2491 .if 1 2492 SET_WIDE_VREG %rax, rINSTq # fp[A] <- value 2493 .else 2494 SET_VREG %eax, rINSTq # fp[A] <- value 2495 .endif 2496 .endif 2497 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2498 2499 2500 /* ------------------------------ */ 2501 .balign 128 2502 .L_op_sget_object: /* 0x62 */ 2503 /* File: x86_64/op_sget_object.S */ 2504 /* File: x86_64/op_sget.S */ 2505 /* 2506 * General SGET handler wrapper. 2507 * 2508 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short, sget-wide 2509 */ 2510 /* op vAA, field@BBBB */ 2511 .extern MterpGetObjStatic 2512 EXPORT_PC 2513 movzwq 2(rPC), OUT_ARG0 # field ref CCCC 2514 movq OFF_FP_METHOD(rFP), OUT_ARG1 # referrer 2515 movq rSELF, OUT_ARG2 # self 2516 call SYMBOL(MterpGetObjStatic) 2517 movq rSELF, %rcx 2518 cmpl $0, THREAD_EXCEPTION_OFFSET(%rcx) 2519 jnz MterpException 2520 .if 1 2521 SET_VREG_OBJECT %eax, rINSTq # fp[A] <- value 2522 .else 2523 .if 0 2524 SET_WIDE_VREG %rax, rINSTq # fp[A] <- value 2525 .else 2526 SET_VREG %eax, rINSTq # fp[A] <- value 2527 .endif 2528 .endif 2529 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2530 2531 2532 /* ------------------------------ */ 2533 .balign 128 2534 .L_op_sget_boolean: /* 0x63 */ 2535 /* File: x86_64/op_sget_boolean.S */ 2536 /* File: x86_64/op_sget.S */ 2537 /* 2538 * General SGET handler wrapper. 2539 * 2540 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short, sget-wide 2541 */ 2542 /* op vAA, field@BBBB */ 2543 .extern MterpGetBooleanStatic 2544 EXPORT_PC 2545 movzwq 2(rPC), OUT_ARG0 # field ref CCCC 2546 movq OFF_FP_METHOD(rFP), OUT_ARG1 # referrer 2547 movq rSELF, OUT_ARG2 # self 2548 call SYMBOL(MterpGetBooleanStatic) 2549 movq rSELF, %rcx 2550 cmpl $0, THREAD_EXCEPTION_OFFSET(%rcx) 2551 jnz MterpException 2552 .if 0 2553 SET_VREG_OBJECT %eax, rINSTq # fp[A] <- value 2554 .else 2555 .if 0 2556 SET_WIDE_VREG %rax, rINSTq # fp[A] <- value 2557 .else 2558 SET_VREG %eax, rINSTq # fp[A] <- value 2559 .endif 2560 .endif 2561 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2562 2563 2564 /* ------------------------------ */ 2565 .balign 128 2566 .L_op_sget_byte: /* 0x64 */ 2567 /* File: x86_64/op_sget_byte.S */ 2568 /* File: x86_64/op_sget.S */ 2569 /* 2570 * General SGET handler wrapper. 2571 * 2572 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short, sget-wide 2573 */ 2574 /* op vAA, field@BBBB */ 2575 .extern MterpGetByteStatic 2576 EXPORT_PC 2577 movzwq 2(rPC), OUT_ARG0 # field ref CCCC 2578 movq OFF_FP_METHOD(rFP), OUT_ARG1 # referrer 2579 movq rSELF, OUT_ARG2 # self 2580 call SYMBOL(MterpGetByteStatic) 2581 movq rSELF, %rcx 2582 cmpl $0, THREAD_EXCEPTION_OFFSET(%rcx) 2583 jnz MterpException 2584 .if 0 2585 SET_VREG_OBJECT %eax, rINSTq # fp[A] <- value 2586 .else 2587 .if 0 2588 SET_WIDE_VREG %rax, rINSTq # fp[A] <- value 2589 .else 2590 SET_VREG %eax, rINSTq # fp[A] <- value 2591 .endif 2592 .endif 2593 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2594 2595 2596 /* ------------------------------ */ 2597 .balign 128 2598 .L_op_sget_char: /* 0x65 */ 2599 /* File: x86_64/op_sget_char.S */ 2600 /* File: x86_64/op_sget.S */ 2601 /* 2602 * General SGET handler wrapper. 2603 * 2604 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short, sget-wide 2605 */ 2606 /* op vAA, field@BBBB */ 2607 .extern MterpGetCharStatic 2608 EXPORT_PC 2609 movzwq 2(rPC), OUT_ARG0 # field ref CCCC 2610 movq OFF_FP_METHOD(rFP), OUT_ARG1 # referrer 2611 movq rSELF, OUT_ARG2 # self 2612 call SYMBOL(MterpGetCharStatic) 2613 movq rSELF, %rcx 2614 cmpl $0, THREAD_EXCEPTION_OFFSET(%rcx) 2615 jnz MterpException 2616 .if 0 2617 SET_VREG_OBJECT %eax, rINSTq # fp[A] <- value 2618 .else 2619 .if 0 2620 SET_WIDE_VREG %rax, rINSTq # fp[A] <- value 2621 .else 2622 SET_VREG %eax, rINSTq # fp[A] <- value 2623 .endif 2624 .endif 2625 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2626 2627 2628 /* ------------------------------ */ 2629 .balign 128 2630 .L_op_sget_short: /* 0x66 */ 2631 /* File: x86_64/op_sget_short.S */ 2632 /* File: x86_64/op_sget.S */ 2633 /* 2634 * General SGET handler wrapper. 2635 * 2636 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short, sget-wide 2637 */ 2638 /* op vAA, field@BBBB */ 2639 .extern MterpGetShortStatic 2640 EXPORT_PC 2641 movzwq 2(rPC), OUT_ARG0 # field ref CCCC 2642 movq OFF_FP_METHOD(rFP), OUT_ARG1 # referrer 2643 movq rSELF, OUT_ARG2 # self 2644 call SYMBOL(MterpGetShortStatic) 2645 movq rSELF, %rcx 2646 cmpl $0, THREAD_EXCEPTION_OFFSET(%rcx) 2647 jnz MterpException 2648 .if 0 2649 SET_VREG_OBJECT %eax, rINSTq # fp[A] <- value 2650 .else 2651 .if 0 2652 SET_WIDE_VREG %rax, rINSTq # fp[A] <- value 2653 .else 2654 SET_VREG %eax, rINSTq # fp[A] <- value 2655 .endif 2656 .endif 2657 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2658 2659 2660 /* ------------------------------ */ 2661 .balign 128 2662 .L_op_sput: /* 0x67 */ 2663 /* File: x86_64/op_sput.S */ 2664 /* 2665 * General SPUT handler wrapper. 2666 * 2667 * for: sput, sput-boolean, sput-byte, sput-char, sput-short 2668 */ 2669 /* op vAA, field@BBBB */ 2670 .extern MterpSet32Static 2671 EXPORT_PC 2672 movzwq 2(rPC), OUT_ARG0 # field ref BBBB 2673 GET_VREG OUT_32_ARG1, rINSTq # fp[AA] 2674 movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer 2675 movq rSELF, OUT_ARG3 # self 2676 call SYMBOL(MterpSet32Static) 2677 testb %al, %al 2678 jnz MterpException 2679 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2680 2681 /* ------------------------------ */ 2682 .balign 128 2683 .L_op_sput_wide: /* 0x68 */ 2684 /* File: x86_64/op_sput_wide.S */ 2685 /* 2686 * SPUT_WIDE handler wrapper. 2687 * 2688 */ 2689 /* sput-wide vAA, field@BBBB */ 2690 .extern MterpSet64Static 2691 EXPORT_PC 2692 movzwq 2(rPC), OUT_ARG0 # field ref BBBB 2693 leaq VREG_ADDRESS(rINSTq), OUT_ARG1 # &fp[AA] 2694 movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer 2695 movq rSELF, OUT_ARG3 # self 2696 call SYMBOL(MterpSet64Static) 2697 testb %al, %al 2698 jnz MterpException 2699 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2700 2701 /* ------------------------------ */ 2702 .balign 128 2703 .L_op_sput_object: /* 0x69 */ 2704 /* File: x86_64/op_sput_object.S */ 2705 EXPORT_PC 2706 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG0 2707 movq rPC, OUT_ARG1 2708 REFRESH_INST 105 2709 movq rINSTq, OUT_ARG2 2710 movq rSELF, OUT_ARG3 2711 call SYMBOL(MterpSputObject) 2712 testb %al, %al 2713 jz MterpException 2714 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2715 2716 /* ------------------------------ */ 2717 .balign 128 2718 .L_op_sput_boolean: /* 0x6a */ 2719 /* File: x86_64/op_sput_boolean.S */ 2720 /* File: x86_64/op_sput.S */ 2721 /* 2722 * General SPUT handler wrapper. 2723 * 2724 * for: sput, sput-boolean, sput-byte, sput-char, sput-short 2725 */ 2726 /* op vAA, field@BBBB */ 2727 .extern MterpSetBooleanStatic 2728 EXPORT_PC 2729 movzwq 2(rPC), OUT_ARG0 # field ref BBBB 2730 GET_VREG OUT_32_ARG1, rINSTq # fp[AA] 2731 movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer 2732 movq rSELF, OUT_ARG3 # self 2733 call SYMBOL(MterpSetBooleanStatic) 2734 testb %al, %al 2735 jnz MterpException 2736 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2737 2738 2739 /* ------------------------------ */ 2740 .balign 128 2741 .L_op_sput_byte: /* 0x6b */ 2742 /* File: x86_64/op_sput_byte.S */ 2743 /* File: x86_64/op_sput.S */ 2744 /* 2745 * General SPUT handler wrapper. 2746 * 2747 * for: sput, sput-boolean, sput-byte, sput-char, sput-short 2748 */ 2749 /* op vAA, field@BBBB */ 2750 .extern MterpSetByteStatic 2751 EXPORT_PC 2752 movzwq 2(rPC), OUT_ARG0 # field ref BBBB 2753 GET_VREG OUT_32_ARG1, rINSTq # fp[AA] 2754 movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer 2755 movq rSELF, OUT_ARG3 # self 2756 call SYMBOL(MterpSetByteStatic) 2757 testb %al, %al 2758 jnz MterpException 2759 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2760 2761 2762 /* ------------------------------ */ 2763 .balign 128 2764 .L_op_sput_char: /* 0x6c */ 2765 /* File: x86_64/op_sput_char.S */ 2766 /* File: x86_64/op_sput.S */ 2767 /* 2768 * General SPUT handler wrapper. 2769 * 2770 * for: sput, sput-boolean, sput-byte, sput-char, sput-short 2771 */ 2772 /* op vAA, field@BBBB */ 2773 .extern MterpSetCharStatic 2774 EXPORT_PC 2775 movzwq 2(rPC), OUT_ARG0 # field ref BBBB 2776 GET_VREG OUT_32_ARG1, rINSTq # fp[AA] 2777 movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer 2778 movq rSELF, OUT_ARG3 # self 2779 call SYMBOL(MterpSetCharStatic) 2780 testb %al, %al 2781 jnz MterpException 2782 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2783 2784 2785 /* ------------------------------ */ 2786 .balign 128 2787 .L_op_sput_short: /* 0x6d */ 2788 /* File: x86_64/op_sput_short.S */ 2789 /* File: x86_64/op_sput.S */ 2790 /* 2791 * General SPUT handler wrapper. 2792 * 2793 * for: sput, sput-boolean, sput-byte, sput-char, sput-short 2794 */ 2795 /* op vAA, field@BBBB */ 2796 .extern MterpSetShortStatic 2797 EXPORT_PC 2798 movzwq 2(rPC), OUT_ARG0 # field ref BBBB 2799 GET_VREG OUT_32_ARG1, rINSTq # fp[AA] 2800 movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer 2801 movq rSELF, OUT_ARG3 # self 2802 call SYMBOL(MterpSetShortStatic) 2803 testb %al, %al 2804 jnz MterpException 2805 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2806 2807 2808 /* ------------------------------ */ 2809 .balign 128 2810 .L_op_invoke_virtual: /* 0x6e */ 2811 /* File: x86_64/op_invoke_virtual.S */ 2812 /* File: x86_64/invoke.S */ 2813 /* 2814 * Generic invoke handler wrapper. 2815 */ 2816 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 2817 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 2818 .extern MterpInvokeVirtual 2819 EXPORT_PC 2820 movq rSELF, OUT_ARG0 2821 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 2822 movq rPC, OUT_ARG2 2823 REFRESH_INST 110 2824 movl rINST, OUT_32_ARG3 2825 call SYMBOL(MterpInvokeVirtual) 2826 testb %al, %al 2827 jz MterpException 2828 ADVANCE_PC 3 2829 call SYMBOL(MterpShouldSwitchInterpreters) 2830 testb %al, %al 2831 jnz MterpFallback 2832 FETCH_INST 2833 GOTO_NEXT 2834 2835 /* 2836 * Handle a virtual method call. 2837 * 2838 * for: invoke-virtual, invoke-virtual/range 2839 */ 2840 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 2841 /* op vAA, {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 2842 2843 /* ------------------------------ */ 2844 .balign 128 2845 .L_op_invoke_super: /* 0x6f */ 2846 /* File: x86_64/op_invoke_super.S */ 2847 /* File: x86_64/invoke.S */ 2848 /* 2849 * Generic invoke handler wrapper. 2850 */ 2851 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 2852 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 2853 .extern MterpInvokeSuper 2854 EXPORT_PC 2855 movq rSELF, OUT_ARG0 2856 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 2857 movq rPC, OUT_ARG2 2858 REFRESH_INST 111 2859 movl rINST, OUT_32_ARG3 2860 call SYMBOL(MterpInvokeSuper) 2861 testb %al, %al 2862 jz MterpException 2863 ADVANCE_PC 3 2864 call SYMBOL(MterpShouldSwitchInterpreters) 2865 testb %al, %al 2866 jnz MterpFallback 2867 FETCH_INST 2868 GOTO_NEXT 2869 2870 /* 2871 * Handle a "super" method call. 2872 * 2873 * for: invoke-super, invoke-super/range 2874 */ 2875 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 2876 /* op vAA, {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 2877 2878 /* ------------------------------ */ 2879 .balign 128 2880 .L_op_invoke_direct: /* 0x70 */ 2881 /* File: x86_64/op_invoke_direct.S */ 2882 /* File: x86_64/invoke.S */ 2883 /* 2884 * Generic invoke handler wrapper. 2885 */ 2886 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 2887 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 2888 .extern MterpInvokeDirect 2889 EXPORT_PC 2890 movq rSELF, OUT_ARG0 2891 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 2892 movq rPC, OUT_ARG2 2893 REFRESH_INST 112 2894 movl rINST, OUT_32_ARG3 2895 call SYMBOL(MterpInvokeDirect) 2896 testb %al, %al 2897 jz MterpException 2898 ADVANCE_PC 3 2899 call SYMBOL(MterpShouldSwitchInterpreters) 2900 testb %al, %al 2901 jnz MterpFallback 2902 FETCH_INST 2903 GOTO_NEXT 2904 2905 2906 /* ------------------------------ */ 2907 .balign 128 2908 .L_op_invoke_static: /* 0x71 */ 2909 /* File: x86_64/op_invoke_static.S */ 2910 /* File: x86_64/invoke.S */ 2911 /* 2912 * Generic invoke handler wrapper. 2913 */ 2914 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 2915 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 2916 .extern MterpInvokeStatic 2917 EXPORT_PC 2918 movq rSELF, OUT_ARG0 2919 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 2920 movq rPC, OUT_ARG2 2921 REFRESH_INST 113 2922 movl rINST, OUT_32_ARG3 2923 call SYMBOL(MterpInvokeStatic) 2924 testb %al, %al 2925 jz MterpException 2926 ADVANCE_PC 3 2927 call SYMBOL(MterpShouldSwitchInterpreters) 2928 testb %al, %al 2929 jnz MterpFallback 2930 FETCH_INST 2931 GOTO_NEXT 2932 2933 2934 2935 /* ------------------------------ */ 2936 .balign 128 2937 .L_op_invoke_interface: /* 0x72 */ 2938 /* File: x86_64/op_invoke_interface.S */ 2939 /* File: x86_64/invoke.S */ 2940 /* 2941 * Generic invoke handler wrapper. 2942 */ 2943 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 2944 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 2945 .extern MterpInvokeInterface 2946 EXPORT_PC 2947 movq rSELF, OUT_ARG0 2948 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 2949 movq rPC, OUT_ARG2 2950 REFRESH_INST 114 2951 movl rINST, OUT_32_ARG3 2952 call SYMBOL(MterpInvokeInterface) 2953 testb %al, %al 2954 jz MterpException 2955 ADVANCE_PC 3 2956 call SYMBOL(MterpShouldSwitchInterpreters) 2957 testb %al, %al 2958 jnz MterpFallback 2959 FETCH_INST 2960 GOTO_NEXT 2961 2962 /* 2963 * Handle an interface method call. 2964 * 2965 * for: invoke-interface, invoke-interface/range 2966 */ 2967 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 2968 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 2969 2970 /* ------------------------------ */ 2971 .balign 128 2972 .L_op_return_void_no_barrier: /* 0x73 */ 2973 /* File: x86_64/op_return_void_no_barrier.S */ 2974 movq rSELF, OUT_ARG0 2975 testl $(THREAD_SUSPEND_OR_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(OUT_ARG0) 2976 jz 1f 2977 call SYMBOL(MterpSuspendCheck) 2978 1: 2979 xorq %rax, %rax 2980 jmp MterpReturn 2981 2982 /* ------------------------------ */ 2983 .balign 128 2984 .L_op_invoke_virtual_range: /* 0x74 */ 2985 /* File: x86_64/op_invoke_virtual_range.S */ 2986 /* File: x86_64/invoke.S */ 2987 /* 2988 * Generic invoke handler wrapper. 2989 */ 2990 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 2991 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 2992 .extern MterpInvokeVirtualRange 2993 EXPORT_PC 2994 movq rSELF, OUT_ARG0 2995 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 2996 movq rPC, OUT_ARG2 2997 REFRESH_INST 116 2998 movl rINST, OUT_32_ARG3 2999 call SYMBOL(MterpInvokeVirtualRange) 3000 testb %al, %al 3001 jz MterpException 3002 ADVANCE_PC 3 3003 call SYMBOL(MterpShouldSwitchInterpreters) 3004 testb %al, %al 3005 jnz MterpFallback 3006 FETCH_INST 3007 GOTO_NEXT 3008 3009 3010 /* ------------------------------ */ 3011 .balign 128 3012 .L_op_invoke_super_range: /* 0x75 */ 3013 /* File: x86_64/op_invoke_super_range.S */ 3014 /* File: x86_64/invoke.S */ 3015 /* 3016 * Generic invoke handler wrapper. 3017 */ 3018 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 3019 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 3020 .extern MterpInvokeSuperRange 3021 EXPORT_PC 3022 movq rSELF, OUT_ARG0 3023 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 3024 movq rPC, OUT_ARG2 3025 REFRESH_INST 117 3026 movl rINST, OUT_32_ARG3 3027 call SYMBOL(MterpInvokeSuperRange) 3028 testb %al, %al 3029 jz MterpException 3030 ADVANCE_PC 3 3031 call SYMBOL(MterpShouldSwitchInterpreters) 3032 testb %al, %al 3033 jnz MterpFallback 3034 FETCH_INST 3035 GOTO_NEXT 3036 3037 3038 /* ------------------------------ */ 3039 .balign 128 3040 .L_op_invoke_direct_range: /* 0x76 */ 3041 /* File: x86_64/op_invoke_direct_range.S */ 3042 /* File: x86_64/invoke.S */ 3043 /* 3044 * Generic invoke handler wrapper. 3045 */ 3046 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 3047 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 3048 .extern MterpInvokeDirectRange 3049 EXPORT_PC 3050 movq rSELF, OUT_ARG0 3051 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 3052 movq rPC, OUT_ARG2 3053 REFRESH_INST 118 3054 movl rINST, OUT_32_ARG3 3055 call SYMBOL(MterpInvokeDirectRange) 3056 testb %al, %al 3057 jz MterpException 3058 ADVANCE_PC 3 3059 call SYMBOL(MterpShouldSwitchInterpreters) 3060 testb %al, %al 3061 jnz MterpFallback 3062 FETCH_INST 3063 GOTO_NEXT 3064 3065 3066 /* ------------------------------ */ 3067 .balign 128 3068 .L_op_invoke_static_range: /* 0x77 */ 3069 /* File: x86_64/op_invoke_static_range.S */ 3070 /* File: x86_64/invoke.S */ 3071 /* 3072 * Generic invoke handler wrapper. 3073 */ 3074 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 3075 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 3076 .extern MterpInvokeStaticRange 3077 EXPORT_PC 3078 movq rSELF, OUT_ARG0 3079 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 3080 movq rPC, OUT_ARG2 3081 REFRESH_INST 119 3082 movl rINST, OUT_32_ARG3 3083 call SYMBOL(MterpInvokeStaticRange) 3084 testb %al, %al 3085 jz MterpException 3086 ADVANCE_PC 3 3087 call SYMBOL(MterpShouldSwitchInterpreters) 3088 testb %al, %al 3089 jnz MterpFallback 3090 FETCH_INST 3091 GOTO_NEXT 3092 3093 3094 /* ------------------------------ */ 3095 .balign 128 3096 .L_op_invoke_interface_range: /* 0x78 */ 3097 /* File: x86_64/op_invoke_interface_range.S */ 3098 /* File: x86_64/invoke.S */ 3099 /* 3100 * Generic invoke handler wrapper. 3101 */ 3102 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 3103 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 3104 .extern MterpInvokeInterfaceRange 3105 EXPORT_PC 3106 movq rSELF, OUT_ARG0 3107 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 3108 movq rPC, OUT_ARG2 3109 REFRESH_INST 120 3110 movl rINST, OUT_32_ARG3 3111 call SYMBOL(MterpInvokeInterfaceRange) 3112 testb %al, %al 3113 jz MterpException 3114 ADVANCE_PC 3 3115 call SYMBOL(MterpShouldSwitchInterpreters) 3116 testb %al, %al 3117 jnz MterpFallback 3118 FETCH_INST 3119 GOTO_NEXT 3120 3121 3122 /* ------------------------------ */ 3123 .balign 128 3124 .L_op_unused_79: /* 0x79 */ 3125 /* File: x86_64/op_unused_79.S */ 3126 /* File: x86_64/unused.S */ 3127 /* 3128 * Bail to reference interpreter to throw. 3129 */ 3130 jmp MterpFallback 3131 3132 3133 /* ------------------------------ */ 3134 .balign 128 3135 .L_op_unused_7a: /* 0x7a */ 3136 /* File: x86_64/op_unused_7a.S */ 3137 /* File: x86_64/unused.S */ 3138 /* 3139 * Bail to reference interpreter to throw. 3140 */ 3141 jmp MterpFallback 3142 3143 3144 /* ------------------------------ */ 3145 .balign 128 3146 .L_op_neg_int: /* 0x7b */ 3147 /* File: x86_64/op_neg_int.S */ 3148 /* File: x86_64/unop.S */ 3149 /* 3150 * Generic 32/64-bit unary operation. Provide an "instr" line that 3151 * specifies an instruction that performs "result = op eax". 3152 */ 3153 /* unop vA, vB */ 3154 movl rINST, %ecx # rcx <- A+ 3155 sarl $4,rINST # rINST <- B 3156 .if 0 3157 GET_WIDE_VREG %rax, rINSTq # rax <- vB 3158 .else 3159 GET_VREG %eax, rINSTq # eax <- vB 3160 .endif 3161 andb $0xf,%cl # ecx <- A 3162 3163 negl %eax 3164 .if 0 3165 SET_WIDE_VREG %rax, %rcx 3166 .else 3167 SET_VREG %eax, %rcx 3168 .endif 3169 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3170 3171 3172 /* ------------------------------ */ 3173 .balign 128 3174 .L_op_not_int: /* 0x7c */ 3175 /* File: x86_64/op_not_int.S */ 3176 /* File: x86_64/unop.S */ 3177 /* 3178 * Generic 32/64-bit unary operation. Provide an "instr" line that 3179 * specifies an instruction that performs "result = op eax". 3180 */ 3181 /* unop vA, vB */ 3182 movl rINST, %ecx # rcx <- A+ 3183 sarl $4,rINST # rINST <- B 3184 .if 0 3185 GET_WIDE_VREG %rax, rINSTq # rax <- vB 3186 .else 3187 GET_VREG %eax, rINSTq # eax <- vB 3188 .endif 3189 andb $0xf,%cl # ecx <- A 3190 3191 notl %eax 3192 .if 0 3193 SET_WIDE_VREG %rax, %rcx 3194 .else 3195 SET_VREG %eax, %rcx 3196 .endif 3197 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3198 3199 3200 /* ------------------------------ */ 3201 .balign 128 3202 .L_op_neg_long: /* 0x7d */ 3203 /* File: x86_64/op_neg_long.S */ 3204 /* File: x86_64/unop.S */ 3205 /* 3206 * Generic 32/64-bit unary operation. Provide an "instr" line that 3207 * specifies an instruction that performs "result = op eax". 3208 */ 3209 /* unop vA, vB */ 3210 movl rINST, %ecx # rcx <- A+ 3211 sarl $4,rINST # rINST <- B 3212 .if 1 3213 GET_WIDE_VREG %rax, rINSTq # rax <- vB 3214 .else 3215 GET_VREG %eax, rINSTq # eax <- vB 3216 .endif 3217 andb $0xf,%cl # ecx <- A 3218 3219 negq %rax 3220 .if 1 3221 SET_WIDE_VREG %rax, %rcx 3222 .else 3223 SET_VREG %eax, %rcx 3224 .endif 3225 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3226 3227 3228 /* ------------------------------ */ 3229 .balign 128 3230 .L_op_not_long: /* 0x7e */ 3231 /* File: x86_64/op_not_long.S */ 3232 /* File: x86_64/unop.S */ 3233 /* 3234 * Generic 32/64-bit unary operation. Provide an "instr" line that 3235 * specifies an instruction that performs "result = op eax". 3236 */ 3237 /* unop vA, vB */ 3238 movl rINST, %ecx # rcx <- A+ 3239 sarl $4,rINST # rINST <- B 3240 .if 1 3241 GET_WIDE_VREG %rax, rINSTq # rax <- vB 3242 .else 3243 GET_VREG %eax, rINSTq # eax <- vB 3244 .endif 3245 andb $0xf,%cl # ecx <- A 3246 3247 notq %rax 3248 .if 1 3249 SET_WIDE_VREG %rax, %rcx 3250 .else 3251 SET_VREG %eax, %rcx 3252 .endif 3253 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3254 3255 3256 /* ------------------------------ */ 3257 .balign 128 3258 .L_op_neg_float: /* 0x7f */ 3259 /* File: x86_64/op_neg_float.S */ 3260 /* File: x86_64/unop.S */ 3261 /* 3262 * Generic 32/64-bit unary operation. Provide an "instr" line that 3263 * specifies an instruction that performs "result = op eax". 3264 */ 3265 /* unop vA, vB */ 3266 movl rINST, %ecx # rcx <- A+ 3267 sarl $4,rINST # rINST <- B 3268 .if 0 3269 GET_WIDE_VREG %rax, rINSTq # rax <- vB 3270 .else 3271 GET_VREG %eax, rINSTq # eax <- vB 3272 .endif 3273 andb $0xf,%cl # ecx <- A 3274 3275 xorl $0x80000000, %eax 3276 .if 0 3277 SET_WIDE_VREG %rax, %rcx 3278 .else 3279 SET_VREG %eax, %rcx 3280 .endif 3281 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3282 3283 3284 /* ------------------------------ */ 3285 .balign 128 3286 .L_op_neg_double: /* 0x80 */ 3287 /* File: x86_64/op_neg_double.S */ 3288 /* File: x86_64/unop.S */ 3289 /* 3290 * Generic 32/64-bit unary operation. Provide an "instr" line that 3291 * specifies an instruction that performs "result = op eax". 3292 */ 3293 /* unop vA, vB */ 3294 movl rINST, %ecx # rcx <- A+ 3295 sarl $4,rINST # rINST <- B 3296 .if 1 3297 GET_WIDE_VREG %rax, rINSTq # rax <- vB 3298 .else 3299 GET_VREG %eax, rINSTq # eax <- vB 3300 .endif 3301 andb $0xf,%cl # ecx <- A 3302 movq $0x8000000000000000, %rsi 3303 xorq %rsi, %rax 3304 .if 1 3305 SET_WIDE_VREG %rax, %rcx 3306 .else 3307 SET_VREG %eax, %rcx 3308 .endif 3309 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3310 3311 3312 /* ------------------------------ */ 3313 .balign 128 3314 .L_op_int_to_long: /* 0x81 */ 3315 /* File: x86_64/op_int_to_long.S */ 3316 /* int to long vA, vB */ 3317 movzbq rINSTbl, %rax # rax <- +A 3318 sarl $4, %eax # eax <- B 3319 andb $0xf, rINSTbl # rINST <- A 3320 movslq VREG_ADDRESS(%rax), %rax 3321 SET_WIDE_VREG %rax, rINSTq # v[A] <- %rax 3322 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3323 3324 3325 /* ------------------------------ */ 3326 .balign 128 3327 .L_op_int_to_float: /* 0x82 */ 3328 /* File: x86_64/op_int_to_float.S */ 3329 /* File: x86_64/fpcvt.S */ 3330 /* 3331 * Generic 32-bit FP conversion operation. 3332 */ 3333 /* unop vA, vB */ 3334 movl rINST, %ecx # rcx <- A+ 3335 sarl $4, rINST # rINST <- B 3336 andb $0xf, %cl # ecx <- A 3337 cvtsi2ssl VREG_ADDRESS(rINSTq), %xmm0 3338 .if 0 3339 movsd %xmm0, VREG_ADDRESS(%rcx) 3340 CLEAR_WIDE_REF %rcx 3341 .else 3342 movss %xmm0, VREG_ADDRESS(%rcx) 3343 CLEAR_REF %rcx 3344 .endif 3345 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3346 3347 3348 /* ------------------------------ */ 3349 .balign 128 3350 .L_op_int_to_double: /* 0x83 */ 3351 /* File: x86_64/op_int_to_double.S */ 3352 /* File: x86_64/fpcvt.S */ 3353 /* 3354 * Generic 32-bit FP conversion operation. 3355 */ 3356 /* unop vA, vB */ 3357 movl rINST, %ecx # rcx <- A+ 3358 sarl $4, rINST # rINST <- B 3359 andb $0xf, %cl # ecx <- A 3360 cvtsi2sdl VREG_ADDRESS(rINSTq), %xmm0 3361 .if 1 3362 movsd %xmm0, VREG_ADDRESS(%rcx) 3363 CLEAR_WIDE_REF %rcx 3364 .else 3365 movss %xmm0, VREG_ADDRESS(%rcx) 3366 CLEAR_REF %rcx 3367 .endif 3368 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3369 3370 3371 /* ------------------------------ */ 3372 .balign 128 3373 .L_op_long_to_int: /* 0x84 */ 3374 /* File: x86_64/op_long_to_int.S */ 3375 /* we ignore the high word, making this equivalent to a 32-bit reg move */ 3376 /* File: x86_64/op_move.S */ 3377 /* for move, move-object, long-to-int */ 3378 /* op vA, vB */ 3379 movl rINST, %eax # eax <- BA 3380 andb $0xf, %al # eax <- A 3381 shrl $4, rINST # rINST <- B 3382 GET_VREG %edx, rINSTq 3383 .if 0 3384 SET_VREG_OBJECT %edx, %rax # fp[A] <- fp[B] 3385 .else 3386 SET_VREG %edx, %rax # fp[A] <- fp[B] 3387 .endif 3388 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3389 3390 3391 /* ------------------------------ */ 3392 .balign 128 3393 .L_op_long_to_float: /* 0x85 */ 3394 /* File: x86_64/op_long_to_float.S */ 3395 /* File: x86_64/fpcvt.S */ 3396 /* 3397 * Generic 32-bit FP conversion operation. 3398 */ 3399 /* unop vA, vB */ 3400 movl rINST, %ecx # rcx <- A+ 3401 sarl $4, rINST # rINST <- B 3402 andb $0xf, %cl # ecx <- A 3403 cvtsi2ssq VREG_ADDRESS(rINSTq), %xmm0 3404 .if 0 3405 movsd %xmm0, VREG_ADDRESS(%rcx) 3406 CLEAR_WIDE_REF %rcx 3407 .else 3408 movss %xmm0, VREG_ADDRESS(%rcx) 3409 CLEAR_REF %rcx 3410 .endif 3411 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3412 3413 3414 /* ------------------------------ */ 3415 .balign 128 3416 .L_op_long_to_double: /* 0x86 */ 3417 /* File: x86_64/op_long_to_double.S */ 3418 /* File: x86_64/fpcvt.S */ 3419 /* 3420 * Generic 32-bit FP conversion operation. 3421 */ 3422 /* unop vA, vB */ 3423 movl rINST, %ecx # rcx <- A+ 3424 sarl $4, rINST # rINST <- B 3425 andb $0xf, %cl # ecx <- A 3426 cvtsi2sdq VREG_ADDRESS(rINSTq), %xmm0 3427 .if 1 3428 movsd %xmm0, VREG_ADDRESS(%rcx) 3429 CLEAR_WIDE_REF %rcx 3430 .else 3431 movss %xmm0, VREG_ADDRESS(%rcx) 3432 CLEAR_REF %rcx 3433 .endif 3434 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3435 3436 3437 /* ------------------------------ */ 3438 .balign 128 3439 .L_op_float_to_int: /* 0x87 */ 3440 /* File: x86_64/op_float_to_int.S */ 3441 /* File: x86_64/cvtfp_int.S */ 3442 /* On fp to int conversions, Java requires that 3443 * if the result > maxint, it should be clamped to maxint. If it is less 3444 * than minint, it should be clamped to minint. If it is a nan, the result 3445 * should be zero. Further, the rounding mode is to truncate. 3446 */ 3447 /* float/double to int/long vA, vB */ 3448 movl rINST, %ecx # rcx <- A+ 3449 sarl $4, rINST # rINST <- B 3450 andb $0xf, %cl # ecx <- A 3451 movss VREG_ADDRESS(rINSTq), %xmm0 3452 movl $0x7fffffff, %eax 3453 cvtsi2ssl %eax, %xmm1 3454 comiss %xmm1, %xmm0 3455 jae 1f 3456 jp 2f 3457 cvttss2sil %xmm0, %eax 3458 jmp 1f 3459 2: 3460 xorl %eax, %eax 3461 1: 3462 .if 0 3463 SET_WIDE_VREG %eax, %rcx 3464 .else 3465 SET_VREG %eax, %rcx 3466 .endif 3467 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3468 3469 3470 /* ------------------------------ */ 3471 .balign 128 3472 .L_op_float_to_long: /* 0x88 */ 3473 /* File: x86_64/op_float_to_long.S */ 3474 /* File: x86_64/cvtfp_int.S */ 3475 /* On fp to int conversions, Java requires that 3476 * if the result > maxint, it should be clamped to maxint. If it is less 3477 * than minint, it should be clamped to minint. If it is a nan, the result 3478 * should be zero. Further, the rounding mode is to truncate. 3479 */ 3480 /* float/double to int/long vA, vB */ 3481 movl rINST, %ecx # rcx <- A+ 3482 sarl $4, rINST # rINST <- B 3483 andb $0xf, %cl # ecx <- A 3484 movss VREG_ADDRESS(rINSTq), %xmm0 3485 movq $0x7fffffffffffffff, %rax 3486 cvtsi2ssq %rax, %xmm1 3487 comiss %xmm1, %xmm0 3488 jae 1f 3489 jp 2f 3490 cvttss2siq %xmm0, %rax 3491 jmp 1f 3492 2: 3493 xorq %rax, %rax 3494 1: 3495 .if 1 3496 SET_WIDE_VREG %rax, %rcx 3497 .else 3498 SET_VREG %rax, %rcx 3499 .endif 3500 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3501 3502 3503 /* ------------------------------ */ 3504 .balign 128 3505 .L_op_float_to_double: /* 0x89 */ 3506 /* File: x86_64/op_float_to_double.S */ 3507 /* File: x86_64/fpcvt.S */ 3508 /* 3509 * Generic 32-bit FP conversion operation. 3510 */ 3511 /* unop vA, vB */ 3512 movl rINST, %ecx # rcx <- A+ 3513 sarl $4, rINST # rINST <- B 3514 andb $0xf, %cl # ecx <- A 3515 cvtss2sd VREG_ADDRESS(rINSTq), %xmm0 3516 .if 1 3517 movsd %xmm0, VREG_ADDRESS(%rcx) 3518 CLEAR_WIDE_REF %rcx 3519 .else 3520 movss %xmm0, VREG_ADDRESS(%rcx) 3521 CLEAR_REF %rcx 3522 .endif 3523 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3524 3525 3526 /* ------------------------------ */ 3527 .balign 128 3528 .L_op_double_to_int: /* 0x8a */ 3529 /* File: x86_64/op_double_to_int.S */ 3530 /* File: x86_64/cvtfp_int.S */ 3531 /* On fp to int conversions, Java requires that 3532 * if the result > maxint, it should be clamped to maxint. If it is less 3533 * than minint, it should be clamped to minint. If it is a nan, the result 3534 * should be zero. Further, the rounding mode is to truncate. 3535 */ 3536 /* float/double to int/long vA, vB */ 3537 movl rINST, %ecx # rcx <- A+ 3538 sarl $4, rINST # rINST <- B 3539 andb $0xf, %cl # ecx <- A 3540 movsd VREG_ADDRESS(rINSTq), %xmm0 3541 movl $0x7fffffff, %eax 3542 cvtsi2sdl %eax, %xmm1 3543 comisd %xmm1, %xmm0 3544 jae 1f 3545 jp 2f 3546 cvttsd2sil %xmm0, %eax 3547 jmp 1f 3548 2: 3549 xorl %eax, %eax 3550 1: 3551 .if 0 3552 SET_WIDE_VREG %eax, %rcx 3553 .else 3554 SET_VREG %eax, %rcx 3555 .endif 3556 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3557 3558 3559 /* ------------------------------ */ 3560 .balign 128 3561 .L_op_double_to_long: /* 0x8b */ 3562 /* File: x86_64/op_double_to_long.S */ 3563 /* File: x86_64/cvtfp_int.S */ 3564 /* On fp to int conversions, Java requires that 3565 * if the result > maxint, it should be clamped to maxint. If it is less 3566 * than minint, it should be clamped to minint. If it is a nan, the result 3567 * should be zero. Further, the rounding mode is to truncate. 3568 */ 3569 /* float/double to int/long vA, vB */ 3570 movl rINST, %ecx # rcx <- A+ 3571 sarl $4, rINST # rINST <- B 3572 andb $0xf, %cl # ecx <- A 3573 movsd VREG_ADDRESS(rINSTq), %xmm0 3574 movq $0x7fffffffffffffff, %rax 3575 cvtsi2sdq %rax, %xmm1 3576 comisd %xmm1, %xmm0 3577 jae 1f 3578 jp 2f 3579 cvttsd2siq %xmm0, %rax 3580 jmp 1f 3581 2: 3582 xorq %rax, %rax 3583 1: 3584 .if 1 3585 SET_WIDE_VREG %rax, %rcx 3586 .else 3587 SET_VREG %rax, %rcx 3588 .endif 3589 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3590 3591 3592 /* ------------------------------ */ 3593 .balign 128 3594 .L_op_double_to_float: /* 0x8c */ 3595 /* File: x86_64/op_double_to_float.S */ 3596 /* File: x86_64/fpcvt.S */ 3597 /* 3598 * Generic 32-bit FP conversion operation. 3599 */ 3600 /* unop vA, vB */ 3601 movl rINST, %ecx # rcx <- A+ 3602 sarl $4, rINST # rINST <- B 3603 andb $0xf, %cl # ecx <- A 3604 cvtsd2ss VREG_ADDRESS(rINSTq), %xmm0 3605 .if 0 3606 movsd %xmm0, VREG_ADDRESS(%rcx) 3607 CLEAR_WIDE_REF %rcx 3608 .else 3609 movss %xmm0, VREG_ADDRESS(%rcx) 3610 CLEAR_REF %rcx 3611 .endif 3612 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3613 3614 3615 /* ------------------------------ */ 3616 .balign 128 3617 .L_op_int_to_byte: /* 0x8d */ 3618 /* File: x86_64/op_int_to_byte.S */ 3619 /* File: x86_64/unop.S */ 3620 /* 3621 * Generic 32/64-bit unary operation. Provide an "instr" line that 3622 * specifies an instruction that performs "result = op eax". 3623 */ 3624 /* unop vA, vB */ 3625 movl rINST, %ecx # rcx <- A+ 3626 sarl $4,rINST # rINST <- B 3627 .if 0 3628 GET_WIDE_VREG %rax, rINSTq # rax <- vB 3629 .else 3630 GET_VREG %eax, rINSTq # eax <- vB 3631 .endif 3632 andb $0xf,%cl # ecx <- A 3633 3634 movsbl %al, %eax 3635 .if 0 3636 SET_WIDE_VREG %rax, %rcx 3637 .else 3638 SET_VREG %eax, %rcx 3639 .endif 3640 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3641 3642 3643 /* ------------------------------ */ 3644 .balign 128 3645 .L_op_int_to_char: /* 0x8e */ 3646 /* File: x86_64/op_int_to_char.S */ 3647 /* File: x86_64/unop.S */ 3648 /* 3649 * Generic 32/64-bit unary operation. Provide an "instr" line that 3650 * specifies an instruction that performs "result = op eax". 3651 */ 3652 /* unop vA, vB */ 3653 movl rINST, %ecx # rcx <- A+ 3654 sarl $4,rINST # rINST <- B 3655 .if 0 3656 GET_WIDE_VREG %rax, rINSTq # rax <- vB 3657 .else 3658 GET_VREG %eax, rINSTq # eax <- vB 3659 .endif 3660 andb $0xf,%cl # ecx <- A 3661 3662 movzwl %ax,%eax 3663 .if 0 3664 SET_WIDE_VREG %rax, %rcx 3665 .else 3666 SET_VREG %eax, %rcx 3667 .endif 3668 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3669 3670 3671 /* ------------------------------ */ 3672 .balign 128 3673 .L_op_int_to_short: /* 0x8f */ 3674 /* File: x86_64/op_int_to_short.S */ 3675 /* File: x86_64/unop.S */ 3676 /* 3677 * Generic 32/64-bit unary operation. Provide an "instr" line that 3678 * specifies an instruction that performs "result = op eax". 3679 */ 3680 /* unop vA, vB */ 3681 movl rINST, %ecx # rcx <- A+ 3682 sarl $4,rINST # rINST <- B 3683 .if 0 3684 GET_WIDE_VREG %rax, rINSTq # rax <- vB 3685 .else 3686 GET_VREG %eax, rINSTq # eax <- vB 3687 .endif 3688 andb $0xf,%cl # ecx <- A 3689 3690 movswl %ax, %eax 3691 .if 0 3692 SET_WIDE_VREG %rax, %rcx 3693 .else 3694 SET_VREG %eax, %rcx 3695 .endif 3696 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3697 3698 3699 /* ------------------------------ */ 3700 .balign 128 3701 .L_op_add_int: /* 0x90 */ 3702 /* File: x86_64/op_add_int.S */ 3703 /* File: x86_64/binop.S */ 3704 /* 3705 * Generic 32-bit binary operation. Provide an "instr" line that 3706 * specifies an instruction that performs "result = eax op (rFP,%ecx,4)". 3707 * This could be an x86 instruction or a function call. (If the result 3708 * comes back in a register other than eax, you can override "result".) 3709 * 3710 * For: add-int, sub-int, and-int, or-int, 3711 * xor-int, shl-int, shr-int, ushr-int 3712 */ 3713 /* binop vAA, vBB, vCC */ 3714 movzbq 2(rPC), %rax # rax <- BB 3715 movzbq 3(rPC), %rcx # rcx <- CC 3716 GET_VREG %eax, %rax # eax <- vBB 3717 addl (rFP,%rcx,4), %eax # ex: addl (rFP,%rcx,4),%eax 3718 SET_VREG %eax, rINSTq 3719 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 3720 3721 3722 /* ------------------------------ */ 3723 .balign 128 3724 .L_op_sub_int: /* 0x91 */ 3725 /* File: x86_64/op_sub_int.S */ 3726 /* File: x86_64/binop.S */ 3727 /* 3728 * Generic 32-bit binary operation. Provide an "instr" line that 3729 * specifies an instruction that performs "result = eax op (rFP,%ecx,4)". 3730 * This could be an x86 instruction or a function call. (If the result 3731 * comes back in a register other than eax, you can override "result".) 3732 * 3733 * For: add-int, sub-int, and-int, or-int, 3734 * xor-int, shl-int, shr-int, ushr-int 3735 */ 3736 /* binop vAA, vBB, vCC */ 3737 movzbq 2(rPC), %rax # rax <- BB 3738 movzbq 3(rPC), %rcx # rcx <- CC 3739 GET_VREG %eax, %rax # eax <- vBB 3740 subl (rFP,%rcx,4), %eax # ex: addl (rFP,%rcx,4),%eax 3741 SET_VREG %eax, rINSTq 3742 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 3743 3744 3745 /* ------------------------------ */ 3746 .balign 128 3747 .L_op_mul_int: /* 0x92 */ 3748 /* File: x86_64/op_mul_int.S */ 3749 /* File: x86_64/binop.S */ 3750 /* 3751 * Generic 32-bit binary operation. Provide an "instr" line that 3752 * specifies an instruction that performs "result = eax op (rFP,%ecx,4)". 3753 * This could be an x86 instruction or a function call. (If the result 3754 * comes back in a register other than eax, you can override "result".) 3755 * 3756 * For: add-int, sub-int, and-int, or-int, 3757 * xor-int, shl-int, shr-int, ushr-int 3758 */ 3759 /* binop vAA, vBB, vCC */ 3760 movzbq 2(rPC), %rax # rax <- BB 3761 movzbq 3(rPC), %rcx # rcx <- CC 3762 GET_VREG %eax, %rax # eax <- vBB 3763 imull (rFP,%rcx,4), %eax # ex: addl (rFP,%rcx,4),%eax 3764 SET_VREG %eax, rINSTq 3765 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 3766 3767 3768 /* ------------------------------ */ 3769 .balign 128 3770 .L_op_div_int: /* 0x93 */ 3771 /* File: x86_64/op_div_int.S */ 3772 /* File: x86_64/bindiv.S */ 3773 /* 3774 * 32-bit binary div/rem operation. Handles special case of op1=-1. 3775 */ 3776 /* div/rem vAA, vBB, vCC */ 3777 movzbq 2(rPC), %rax # rax <- BB 3778 movzbq 3(rPC), %rcx # rcx <- CC 3779 .if 0 3780 GET_WIDE_VREG %rax, %rax # eax <- vBB 3781 GET_WIDE_VREG %ecx, %rcx # ecx <- vCC 3782 .else 3783 GET_VREG %eax, %rax # eax <- vBB 3784 GET_VREG %ecx, %rcx # ecx <- vCC 3785 .endif 3786 testl %ecx, %ecx 3787 jz common_errDivideByZero 3788 cmpl $-1, %ecx 3789 je 2f 3790 cdq # rdx:rax <- sign-extended of rax 3791 idivl %ecx 3792 1: 3793 .if 0 3794 SET_WIDE_VREG %eax, rINSTq # eax <- vBB 3795 .else 3796 SET_VREG %eax, rINSTq # eax <- vBB 3797 .endif 3798 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 3799 2: 3800 .if 0 3801 xorl %eax, %eax 3802 .else 3803 negl %eax 3804 .endif 3805 jmp 1b 3806 3807 3808 /* ------------------------------ */ 3809 .balign 128 3810 .L_op_rem_int: /* 0x94 */ 3811 /* File: x86_64/op_rem_int.S */ 3812 /* File: x86_64/bindiv.S */ 3813 /* 3814 * 32-bit binary div/rem operation. Handles special case of op1=-1. 3815 */ 3816 /* div/rem vAA, vBB, vCC */ 3817 movzbq 2(rPC), %rax # rax <- BB 3818 movzbq 3(rPC), %rcx # rcx <- CC 3819 .if 0 3820 GET_WIDE_VREG %rax, %rax # eax <- vBB 3821 GET_WIDE_VREG %ecx, %rcx # ecx <- vCC 3822 .else 3823 GET_VREG %eax, %rax # eax <- vBB 3824 GET_VREG %ecx, %rcx # ecx <- vCC 3825 .endif 3826 testl %ecx, %ecx 3827 jz common_errDivideByZero 3828 cmpl $-1, %ecx 3829 je 2f 3830 cdq # rdx:rax <- sign-extended of rax 3831 idivl %ecx 3832 1: 3833 .if 0 3834 SET_WIDE_VREG %edx, rINSTq # eax <- vBB 3835 .else 3836 SET_VREG %edx, rINSTq # eax <- vBB 3837 .endif 3838 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 3839 2: 3840 .if 1 3841 xorl %edx, %edx 3842 .else 3843 negl %edx 3844 .endif 3845 jmp 1b 3846 3847 3848 /* ------------------------------ */ 3849 .balign 128 3850 .L_op_and_int: /* 0x95 */ 3851 /* File: x86_64/op_and_int.S */ 3852 /* File: x86_64/binop.S */ 3853 /* 3854 * Generic 32-bit binary operation. Provide an "instr" line that 3855 * specifies an instruction that performs "result = eax op (rFP,%ecx,4)". 3856 * This could be an x86 instruction or a function call. (If the result 3857 * comes back in a register other than eax, you can override "result".) 3858 * 3859 * For: add-int, sub-int, and-int, or-int, 3860 * xor-int, shl-int, shr-int, ushr-int 3861 */ 3862 /* binop vAA, vBB, vCC */ 3863 movzbq 2(rPC), %rax # rax <- BB 3864 movzbq 3(rPC), %rcx # rcx <- CC 3865 GET_VREG %eax, %rax # eax <- vBB 3866 andl (rFP,%rcx,4), %eax # ex: addl (rFP,%rcx,4),%eax 3867 SET_VREG %eax, rINSTq 3868 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 3869 3870 3871 /* ------------------------------ */ 3872 .balign 128 3873 .L_op_or_int: /* 0x96 */ 3874 /* File: x86_64/op_or_int.S */ 3875 /* File: x86_64/binop.S */ 3876 /* 3877 * Generic 32-bit binary operation. Provide an "instr" line that 3878 * specifies an instruction that performs "result = eax op (rFP,%ecx,4)". 3879 * This could be an x86 instruction or a function call. (If the result 3880 * comes back in a register other than eax, you can override "result".) 3881 * 3882 * For: add-int, sub-int, and-int, or-int, 3883 * xor-int, shl-int, shr-int, ushr-int 3884 */ 3885 /* binop vAA, vBB, vCC */ 3886 movzbq 2(rPC), %rax # rax <- BB 3887 movzbq 3(rPC), %rcx # rcx <- CC 3888 GET_VREG %eax, %rax # eax <- vBB 3889 orl (rFP,%rcx,4), %eax # ex: addl (rFP,%rcx,4),%eax 3890 SET_VREG %eax, rINSTq 3891 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 3892 3893 3894 /* ------------------------------ */ 3895 .balign 128 3896 .L_op_xor_int: /* 0x97 */ 3897 /* File: x86_64/op_xor_int.S */ 3898 /* File: x86_64/binop.S */ 3899 /* 3900 * Generic 32-bit binary operation. Provide an "instr" line that 3901 * specifies an instruction that performs "result = eax op (rFP,%ecx,4)". 3902 * This could be an x86 instruction or a function call. (If the result 3903 * comes back in a register other than eax, you can override "result".) 3904 * 3905 * For: add-int, sub-int, and-int, or-int, 3906 * xor-int, shl-int, shr-int, ushr-int 3907 */ 3908 /* binop vAA, vBB, vCC */ 3909 movzbq 2(rPC), %rax # rax <- BB 3910 movzbq 3(rPC), %rcx # rcx <- CC 3911 GET_VREG %eax, %rax # eax <- vBB 3912 xorl (rFP,%rcx,4), %eax # ex: addl (rFP,%rcx,4),%eax 3913 SET_VREG %eax, rINSTq 3914 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 3915 3916 3917 /* ------------------------------ */ 3918 .balign 128 3919 .L_op_shl_int: /* 0x98 */ 3920 /* File: x86_64/op_shl_int.S */ 3921 /* File: x86_64/binop1.S */ 3922 /* 3923 * Generic 32-bit binary operation in which both operands loaded to 3924 * registers (op0 in eax, op1 in ecx). 3925 */ 3926 /* binop vAA, vBB, vCC */ 3927 movzbq 2(rPC), %rax # eax <- BB 3928 movzbq 3(rPC), %rcx # ecx <- CC 3929 GET_VREG %ecx, %rcx # eax <- vCC 3930 .if 0 3931 GET_WIDE_VREG %rax, %rax # rax <- vBB 3932 sall %cl, %eax # ex: addl %ecx,%eax 3933 SET_WIDE_VREG %rax, rINSTq 3934 .else 3935 GET_VREG %eax, %rax # eax <- vBB 3936 sall %cl, %eax # ex: addl %ecx,%eax 3937 SET_VREG %eax, rINSTq 3938 .endif 3939 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 3940 3941 3942 /* ------------------------------ */ 3943 .balign 128 3944 .L_op_shr_int: /* 0x99 */ 3945 /* File: x86_64/op_shr_int.S */ 3946 /* File: x86_64/binop1.S */ 3947 /* 3948 * Generic 32-bit binary operation in which both operands loaded to 3949 * registers (op0 in eax, op1 in ecx). 3950 */ 3951 /* binop vAA, vBB, vCC */ 3952 movzbq 2(rPC), %rax # eax <- BB 3953 movzbq 3(rPC), %rcx # ecx <- CC 3954 GET_VREG %ecx, %rcx # eax <- vCC 3955 .if 0 3956 GET_WIDE_VREG %rax, %rax # rax <- vBB 3957 sarl %cl, %eax # ex: addl %ecx,%eax 3958 SET_WIDE_VREG %rax, rINSTq 3959 .else 3960 GET_VREG %eax, %rax # eax <- vBB 3961 sarl %cl, %eax # ex: addl %ecx,%eax 3962 SET_VREG %eax, rINSTq 3963 .endif 3964 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 3965 3966 3967 /* ------------------------------ */ 3968 .balign 128 3969 .L_op_ushr_int: /* 0x9a */ 3970 /* File: x86_64/op_ushr_int.S */ 3971 /* File: x86_64/binop1.S */ 3972 /* 3973 * Generic 32-bit binary operation in which both operands loaded to 3974 * registers (op0 in eax, op1 in ecx). 3975 */ 3976 /* binop vAA, vBB, vCC */ 3977 movzbq 2(rPC), %rax # eax <- BB 3978 movzbq 3(rPC), %rcx # ecx <- CC 3979 GET_VREG %ecx, %rcx # eax <- vCC 3980 .if 0 3981 GET_WIDE_VREG %rax, %rax # rax <- vBB 3982 shrl %cl, %eax # ex: addl %ecx,%eax 3983 SET_WIDE_VREG %rax, rINSTq 3984 .else 3985 GET_VREG %eax, %rax # eax <- vBB 3986 shrl %cl, %eax # ex: addl %ecx,%eax 3987 SET_VREG %eax, rINSTq 3988 .endif 3989 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 3990 3991 3992 /* ------------------------------ */ 3993 .balign 128 3994 .L_op_add_long: /* 0x9b */ 3995 /* File: x86_64/op_add_long.S */ 3996 /* File: x86_64/binopWide.S */ 3997 /* 3998 * Generic 64-bit binary operation. 3999 */ 4000 /* binop vAA, vBB, vCC */ 4001 movzbq 2(rPC), %rax # eax <- BB 4002 movzbq 3(rPC), %rcx # ecx <- CC 4003 GET_WIDE_VREG %rax, %rax # rax <- v[BB] 4004 addq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax 4005 SET_WIDE_VREG %rax, rINSTq # v[AA] <- rax 4006 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4007 4008 4009 /* ------------------------------ */ 4010 .balign 128 4011 .L_op_sub_long: /* 0x9c */ 4012 /* File: x86_64/op_sub_long.S */ 4013 /* File: x86_64/binopWide.S */ 4014 /* 4015 * Generic 64-bit binary operation. 4016 */ 4017 /* binop vAA, vBB, vCC */ 4018 movzbq 2(rPC), %rax # eax <- BB 4019 movzbq 3(rPC), %rcx # ecx <- CC 4020 GET_WIDE_VREG %rax, %rax # rax <- v[BB] 4021 subq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax 4022 SET_WIDE_VREG %rax, rINSTq # v[AA] <- rax 4023 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4024 4025 4026 /* ------------------------------ */ 4027 .balign 128 4028 .L_op_mul_long: /* 0x9d */ 4029 /* File: x86_64/op_mul_long.S */ 4030 /* File: x86_64/binopWide.S */ 4031 /* 4032 * Generic 64-bit binary operation. 4033 */ 4034 /* binop vAA, vBB, vCC */ 4035 movzbq 2(rPC), %rax # eax <- BB 4036 movzbq 3(rPC), %rcx # ecx <- CC 4037 GET_WIDE_VREG %rax, %rax # rax <- v[BB] 4038 imulq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax 4039 SET_WIDE_VREG %rax, rINSTq # v[AA] <- rax 4040 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4041 4042 4043 /* ------------------------------ */ 4044 .balign 128 4045 .L_op_div_long: /* 0x9e */ 4046 /* File: x86_64/op_div_long.S */ 4047 /* File: x86_64/bindiv.S */ 4048 /* 4049 * 32-bit binary div/rem operation. Handles special case of op1=-1. 4050 */ 4051 /* div/rem vAA, vBB, vCC */ 4052 movzbq 2(rPC), %rax # rax <- BB 4053 movzbq 3(rPC), %rcx # rcx <- CC 4054 .if 1 4055 GET_WIDE_VREG %rax, %rax # eax <- vBB 4056 GET_WIDE_VREG %rcx, %rcx # ecx <- vCC 4057 .else 4058 GET_VREG %eax, %rax # eax <- vBB 4059 GET_VREG %rcx, %rcx # ecx <- vCC 4060 .endif 4061 testq %rcx, %rcx 4062 jz common_errDivideByZero 4063 cmpq $-1, %rcx 4064 je 2f 4065 cqo # rdx:rax <- sign-extended of rax 4066 idivq %rcx 4067 1: 4068 .if 1 4069 SET_WIDE_VREG %rax, rINSTq # eax <- vBB 4070 .else 4071 SET_VREG %rax, rINSTq # eax <- vBB 4072 .endif 4073 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4074 2: 4075 .if 0 4076 xorq %rax, %rax 4077 .else 4078 negq %rax 4079 .endif 4080 jmp 1b 4081 4082 4083 /* ------------------------------ */ 4084 .balign 128 4085 .L_op_rem_long: /* 0x9f */ 4086 /* File: x86_64/op_rem_long.S */ 4087 /* File: x86_64/bindiv.S */ 4088 /* 4089 * 32-bit binary div/rem operation. Handles special case of op1=-1. 4090 */ 4091 /* div/rem vAA, vBB, vCC */ 4092 movzbq 2(rPC), %rax # rax <- BB 4093 movzbq 3(rPC), %rcx # rcx <- CC 4094 .if 1 4095 GET_WIDE_VREG %rax, %rax # eax <- vBB 4096 GET_WIDE_VREG %rcx, %rcx # ecx <- vCC 4097 .else 4098 GET_VREG %eax, %rax # eax <- vBB 4099 GET_VREG %rcx, %rcx # ecx <- vCC 4100 .endif 4101 testq %rcx, %rcx 4102 jz common_errDivideByZero 4103 cmpq $-1, %rcx 4104 je 2f 4105 cqo # rdx:rax <- sign-extended of rax 4106 idivq %rcx 4107 1: 4108 .if 1 4109 SET_WIDE_VREG %rdx, rINSTq # eax <- vBB 4110 .else 4111 SET_VREG %rdx, rINSTq # eax <- vBB 4112 .endif 4113 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4114 2: 4115 .if 1 4116 xorq %rdx, %rdx 4117 .else 4118 negq %rdx 4119 .endif 4120 jmp 1b 4121 4122 4123 /* ------------------------------ */ 4124 .balign 128 4125 .L_op_and_long: /* 0xa0 */ 4126 /* File: x86_64/op_and_long.S */ 4127 /* File: x86_64/binopWide.S */ 4128 /* 4129 * Generic 64-bit binary operation. 4130 */ 4131 /* binop vAA, vBB, vCC */ 4132 movzbq 2(rPC), %rax # eax <- BB 4133 movzbq 3(rPC), %rcx # ecx <- CC 4134 GET_WIDE_VREG %rax, %rax # rax <- v[BB] 4135 andq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax 4136 SET_WIDE_VREG %rax, rINSTq # v[AA] <- rax 4137 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4138 4139 4140 /* ------------------------------ */ 4141 .balign 128 4142 .L_op_or_long: /* 0xa1 */ 4143 /* File: x86_64/op_or_long.S */ 4144 /* File: x86_64/binopWide.S */ 4145 /* 4146 * Generic 64-bit binary operation. 4147 */ 4148 /* binop vAA, vBB, vCC */ 4149 movzbq 2(rPC), %rax # eax <- BB 4150 movzbq 3(rPC), %rcx # ecx <- CC 4151 GET_WIDE_VREG %rax, %rax # rax <- v[BB] 4152 orq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax 4153 SET_WIDE_VREG %rax, rINSTq # v[AA] <- rax 4154 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4155 4156 4157 /* ------------------------------ */ 4158 .balign 128 4159 .L_op_xor_long: /* 0xa2 */ 4160 /* File: x86_64/op_xor_long.S */ 4161 /* File: x86_64/binopWide.S */ 4162 /* 4163 * Generic 64-bit binary operation. 4164 */ 4165 /* binop vAA, vBB, vCC */ 4166 movzbq 2(rPC), %rax # eax <- BB 4167 movzbq 3(rPC), %rcx # ecx <- CC 4168 GET_WIDE_VREG %rax, %rax # rax <- v[BB] 4169 xorq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax 4170 SET_WIDE_VREG %rax, rINSTq # v[AA] <- rax 4171 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4172 4173 4174 /* ------------------------------ */ 4175 .balign 128 4176 .L_op_shl_long: /* 0xa3 */ 4177 /* File: x86_64/op_shl_long.S */ 4178 /* File: x86_64/binop1.S */ 4179 /* 4180 * Generic 32-bit binary operation in which both operands loaded to 4181 * registers (op0 in eax, op1 in ecx). 4182 */ 4183 /* binop vAA, vBB, vCC */ 4184 movzbq 2(rPC), %rax # eax <- BB 4185 movzbq 3(rPC), %rcx # ecx <- CC 4186 GET_VREG %ecx, %rcx # eax <- vCC 4187 .if 1 4188 GET_WIDE_VREG %rax, %rax # rax <- vBB 4189 salq %cl, %rax # ex: addl %ecx,%eax 4190 SET_WIDE_VREG %rax, rINSTq 4191 .else 4192 GET_VREG %eax, %rax # eax <- vBB 4193 salq %cl, %rax # ex: addl %ecx,%eax 4194 SET_VREG %eax, rINSTq 4195 .endif 4196 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4197 4198 4199 /* ------------------------------ */ 4200 .balign 128 4201 .L_op_shr_long: /* 0xa4 */ 4202 /* File: x86_64/op_shr_long.S */ 4203 /* File: x86_64/binop1.S */ 4204 /* 4205 * Generic 32-bit binary operation in which both operands loaded to 4206 * registers (op0 in eax, op1 in ecx). 4207 */ 4208 /* binop vAA, vBB, vCC */ 4209 movzbq 2(rPC), %rax # eax <- BB 4210 movzbq 3(rPC), %rcx # ecx <- CC 4211 GET_VREG %ecx, %rcx # eax <- vCC 4212 .if 1 4213 GET_WIDE_VREG %rax, %rax # rax <- vBB 4214 sarq %cl, %rax # ex: addl %ecx,%eax 4215 SET_WIDE_VREG %rax, rINSTq 4216 .else 4217 GET_VREG %eax, %rax # eax <- vBB 4218 sarq %cl, %rax # ex: addl %ecx,%eax 4219 SET_VREG %eax, rINSTq 4220 .endif 4221 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4222 4223 4224 /* ------------------------------ */ 4225 .balign 128 4226 .L_op_ushr_long: /* 0xa5 */ 4227 /* File: x86_64/op_ushr_long.S */ 4228 /* File: x86_64/binop1.S */ 4229 /* 4230 * Generic 32-bit binary operation in which both operands loaded to 4231 * registers (op0 in eax, op1 in ecx). 4232 */ 4233 /* binop vAA, vBB, vCC */ 4234 movzbq 2(rPC), %rax # eax <- BB 4235 movzbq 3(rPC), %rcx # ecx <- CC 4236 GET_VREG %ecx, %rcx # eax <- vCC 4237 .if 1 4238 GET_WIDE_VREG %rax, %rax # rax <- vBB 4239 shrq %cl, %rax # ex: addl %ecx,%eax 4240 SET_WIDE_VREG %rax, rINSTq 4241 .else 4242 GET_VREG %eax, %rax # eax <- vBB 4243 shrq %cl, %rax # ex: addl %ecx,%eax 4244 SET_VREG %eax, rINSTq 4245 .endif 4246 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4247 4248 4249 /* ------------------------------ */ 4250 .balign 128 4251 .L_op_add_float: /* 0xa6 */ 4252 /* File: x86_64/op_add_float.S */ 4253 /* File: x86_64/sseBinop.S */ 4254 movzbq 2(rPC), %rcx # ecx <- BB 4255 movzbq 3(rPC), %rax # eax <- CC 4256 movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 4257 addss VREG_ADDRESS(%rax), %xmm0 4258 movss %xmm0, VREG_ADDRESS(rINSTq) # vAA <- %xmm0 4259 pxor %xmm0, %xmm0 4260 movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 4261 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4262 4263 4264 /* ------------------------------ */ 4265 .balign 128 4266 .L_op_sub_float: /* 0xa7 */ 4267 /* File: x86_64/op_sub_float.S */ 4268 /* File: x86_64/sseBinop.S */ 4269 movzbq 2(rPC), %rcx # ecx <- BB 4270 movzbq 3(rPC), %rax # eax <- CC 4271 movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 4272 subss VREG_ADDRESS(%rax), %xmm0 4273 movss %xmm0, VREG_ADDRESS(rINSTq) # vAA <- %xmm0 4274 pxor %xmm0, %xmm0 4275 movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 4276 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4277 4278 4279 /* ------------------------------ */ 4280 .balign 128 4281 .L_op_mul_float: /* 0xa8 */ 4282 /* File: x86_64/op_mul_float.S */ 4283 /* File: x86_64/sseBinop.S */ 4284 movzbq 2(rPC), %rcx # ecx <- BB 4285 movzbq 3(rPC), %rax # eax <- CC 4286 movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 4287 mulss VREG_ADDRESS(%rax), %xmm0 4288 movss %xmm0, VREG_ADDRESS(rINSTq) # vAA <- %xmm0 4289 pxor %xmm0, %xmm0 4290 movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 4291 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4292 4293 4294 /* ------------------------------ */ 4295 .balign 128 4296 .L_op_div_float: /* 0xa9 */ 4297 /* File: x86_64/op_div_float.S */ 4298 /* File: x86_64/sseBinop.S */ 4299 movzbq 2(rPC), %rcx # ecx <- BB 4300 movzbq 3(rPC), %rax # eax <- CC 4301 movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 4302 divss VREG_ADDRESS(%rax), %xmm0 4303 movss %xmm0, VREG_ADDRESS(rINSTq) # vAA <- %xmm0 4304 pxor %xmm0, %xmm0 4305 movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 4306 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4307 4308 4309 /* ------------------------------ */ 4310 .balign 128 4311 .L_op_rem_float: /* 0xaa */ 4312 /* File: x86_64/op_rem_float.S */ 4313 /* rem_float vAA, vBB, vCC */ 4314 movzbq 3(rPC), %rcx # ecx <- BB 4315 movzbq 2(rPC), %rax # eax <- CC 4316 flds VREG_ADDRESS(%rcx) # vBB to fp stack 4317 flds VREG_ADDRESS(%rax) # vCC to fp stack 4318 1: 4319 fprem 4320 fstsw %ax 4321 sahf 4322 jp 1b 4323 fstp %st(1) 4324 fstps VREG_ADDRESS(rINSTq) # %st to vAA 4325 CLEAR_REF rINSTq 4326 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4327 4328 /* ------------------------------ */ 4329 .balign 128 4330 .L_op_add_double: /* 0xab */ 4331 /* File: x86_64/op_add_double.S */ 4332 /* File: x86_64/sseBinop.S */ 4333 movzbq 2(rPC), %rcx # ecx <- BB 4334 movzbq 3(rPC), %rax # eax <- CC 4335 movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 4336 addsd VREG_ADDRESS(%rax), %xmm0 4337 movsd %xmm0, VREG_ADDRESS(rINSTq) # vAA <- %xmm0 4338 pxor %xmm0, %xmm0 4339 movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 4340 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4341 4342 4343 /* ------------------------------ */ 4344 .balign 128 4345 .L_op_sub_double: /* 0xac */ 4346 /* File: x86_64/op_sub_double.S */ 4347 /* File: x86_64/sseBinop.S */ 4348 movzbq 2(rPC), %rcx # ecx <- BB 4349 movzbq 3(rPC), %rax # eax <- CC 4350 movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 4351 subsd VREG_ADDRESS(%rax), %xmm0 4352 movsd %xmm0, VREG_ADDRESS(rINSTq) # vAA <- %xmm0 4353 pxor %xmm0, %xmm0 4354 movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 4355 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4356 4357 4358 /* ------------------------------ */ 4359 .balign 128 4360 .L_op_mul_double: /* 0xad */ 4361 /* File: x86_64/op_mul_double.S */ 4362 /* File: x86_64/sseBinop.S */ 4363 movzbq 2(rPC), %rcx # ecx <- BB 4364 movzbq 3(rPC), %rax # eax <- CC 4365 movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 4366 mulsd VREG_ADDRESS(%rax), %xmm0 4367 movsd %xmm0, VREG_ADDRESS(rINSTq) # vAA <- %xmm0 4368 pxor %xmm0, %xmm0 4369 movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 4370 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4371 4372 4373 /* ------------------------------ */ 4374 .balign 128 4375 .L_op_div_double: /* 0xae */ 4376 /* File: x86_64/op_div_double.S */ 4377 /* File: x86_64/sseBinop.S */ 4378 movzbq 2(rPC), %rcx # ecx <- BB 4379 movzbq 3(rPC), %rax # eax <- CC 4380 movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 4381 divsd VREG_ADDRESS(%rax), %xmm0 4382 movsd %xmm0, VREG_ADDRESS(rINSTq) # vAA <- %xmm0 4383 pxor %xmm0, %xmm0 4384 movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 4385 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4386 4387 4388 /* ------------------------------ */ 4389 .balign 128 4390 .L_op_rem_double: /* 0xaf */ 4391 /* File: x86_64/op_rem_double.S */ 4392 /* rem_double vAA, vBB, vCC */ 4393 movzbq 3(rPC), %rcx # ecx <- BB 4394 movzbq 2(rPC), %rax # eax <- CC 4395 fldl VREG_ADDRESS(%rcx) # %st1 <- fp[vBB] 4396 fldl VREG_ADDRESS(%rax) # %st0 <- fp[vCC] 4397 1: 4398 fprem 4399 fstsw %ax 4400 sahf 4401 jp 1b 4402 fstp %st(1) 4403 fstpl VREG_ADDRESS(rINSTq) # fp[vAA] <- %st 4404 CLEAR_WIDE_REF rINSTq 4405 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4406 4407 /* ------------------------------ */ 4408 .balign 128 4409 .L_op_add_int_2addr: /* 0xb0 */ 4410 /* File: x86_64/op_add_int_2addr.S */ 4411 /* File: x86_64/binop2addr.S */ 4412 /* 4413 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 4414 * that specifies an instruction that performs "result = r0 op r1". 4415 * This could be an instruction or a function call. 4416 * 4417 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 4418 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 4419 * shl-int/2addr, shr-int/2addr, ushr-int/2addr, add-float/2addr, 4420 * sub-float/2addr, mul-float/2addr, div-float/2addr, rem-float/2addr 4421 */ 4422 /* binop/2addr vA, vB */ 4423 movl rINST, %ecx # rcx <- A+ 4424 sarl $4, rINST # rINST <- B 4425 andb $0xf, %cl # ecx <- A 4426 GET_VREG %eax, rINSTq # eax <- vB 4427 addl %eax, (rFP,%rcx,4) # for ex: addl %eax,(rFP,%ecx,4) 4428 CLEAR_REF %rcx 4429 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4430 4431 4432 /* ------------------------------ */ 4433 .balign 128 4434 .L_op_sub_int_2addr: /* 0xb1 */ 4435 /* File: x86_64/op_sub_int_2addr.S */ 4436 /* File: x86_64/binop2addr.S */ 4437 /* 4438 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 4439 * that specifies an instruction that performs "result = r0 op r1". 4440 * This could be an instruction or a function call. 4441 * 4442 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 4443 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 4444 * shl-int/2addr, shr-int/2addr, ushr-int/2addr, add-float/2addr, 4445 * sub-float/2addr, mul-float/2addr, div-float/2addr, rem-float/2addr 4446 */ 4447 /* binop/2addr vA, vB */ 4448 movl rINST, %ecx # rcx <- A+ 4449 sarl $4, rINST # rINST <- B 4450 andb $0xf, %cl # ecx <- A 4451 GET_VREG %eax, rINSTq # eax <- vB 4452 subl %eax, (rFP,%rcx,4) # for ex: addl %eax,(rFP,%ecx,4) 4453 CLEAR_REF %rcx 4454 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4455 4456 4457 /* ------------------------------ */ 4458 .balign 128 4459 .L_op_mul_int_2addr: /* 0xb2 */ 4460 /* File: x86_64/op_mul_int_2addr.S */ 4461 /* mul vA, vB */ 4462 movl rINST, %ecx # rcx <- A+ 4463 sarl $4, rINST # rINST <- B 4464 andb $0xf, %cl # ecx <- A 4465 GET_VREG %eax, %rcx # eax <- vA 4466 imull (rFP,rINSTq,4), %eax 4467 SET_VREG %eax, %rcx 4468 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4469 4470 /* ------------------------------ */ 4471 .balign 128 4472 .L_op_div_int_2addr: /* 0xb3 */ 4473 /* File: x86_64/op_div_int_2addr.S */ 4474 /* File: x86_64/bindiv2addr.S */ 4475 /* 4476 * 32-bit binary div/rem operation. Handles special case of op1=-1. 4477 */ 4478 /* div/rem/2addr vA, vB */ 4479 movl rINST, %ecx # rcx <- BA 4480 sarl $4, %ecx # rcx <- B 4481 andb $0xf, rINSTbl # rINST <- A 4482 .if 0 4483 GET_WIDE_VREG %rax, rINSTq # eax <- vA 4484 GET_WIDE_VREG %ecx, %rcx # ecx <- vB 4485 .else 4486 GET_VREG %eax, rINSTq # eax <- vA 4487 GET_VREG %ecx, %rcx # ecx <- vB 4488 .endif 4489 testl %ecx, %ecx 4490 jz common_errDivideByZero 4491 cmpl $-1, %ecx 4492 je 2f 4493 cdq # rdx:rax <- sign-extended of rax 4494 idivl %ecx 4495 1: 4496 .if 0 4497 SET_WIDE_VREG %eax, rINSTq # vA <- result 4498 .else 4499 SET_VREG %eax, rINSTq # vA <- result 4500 .endif 4501 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4502 2: 4503 .if 0 4504 xorl %eax, %eax 4505 .else 4506 negl %eax 4507 .endif 4508 jmp 1b 4509 4510 4511 /* ------------------------------ */ 4512 .balign 128 4513 .L_op_rem_int_2addr: /* 0xb4 */ 4514 /* File: x86_64/op_rem_int_2addr.S */ 4515 /* File: x86_64/bindiv2addr.S */ 4516 /* 4517 * 32-bit binary div/rem operation. Handles special case of op1=-1. 4518 */ 4519 /* div/rem/2addr vA, vB */ 4520 movl rINST, %ecx # rcx <- BA 4521 sarl $4, %ecx # rcx <- B 4522 andb $0xf, rINSTbl # rINST <- A 4523 .if 0 4524 GET_WIDE_VREG %rax, rINSTq # eax <- vA 4525 GET_WIDE_VREG %ecx, %rcx # ecx <- vB 4526 .else 4527 GET_VREG %eax, rINSTq # eax <- vA 4528 GET_VREG %ecx, %rcx # ecx <- vB 4529 .endif 4530 testl %ecx, %ecx 4531 jz common_errDivideByZero 4532 cmpl $-1, %ecx 4533 je 2f 4534 cdq # rdx:rax <- sign-extended of rax 4535 idivl %ecx 4536 1: 4537 .if 0 4538 SET_WIDE_VREG %edx, rINSTq # vA <- result 4539 .else 4540 SET_VREG %edx, rINSTq # vA <- result 4541 .endif 4542 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4543 2: 4544 .if 1 4545 xorl %edx, %edx 4546 .else 4547 negl %edx 4548 .endif 4549 jmp 1b 4550 4551 4552 /* ------------------------------ */ 4553 .balign 128 4554 .L_op_and_int_2addr: /* 0xb5 */ 4555 /* File: x86_64/op_and_int_2addr.S */ 4556 /* File: x86_64/binop2addr.S */ 4557 /* 4558 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 4559 * that specifies an instruction that performs "result = r0 op r1". 4560 * This could be an instruction or a function call. 4561 * 4562 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 4563 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 4564 * shl-int/2addr, shr-int/2addr, ushr-int/2addr, add-float/2addr, 4565 * sub-float/2addr, mul-float/2addr, div-float/2addr, rem-float/2addr 4566 */ 4567 /* binop/2addr vA, vB */ 4568 movl rINST, %ecx # rcx <- A+ 4569 sarl $4, rINST # rINST <- B 4570 andb $0xf, %cl # ecx <- A 4571 GET_VREG %eax, rINSTq # eax <- vB 4572 andl %eax, (rFP,%rcx,4) # for ex: addl %eax,(rFP,%ecx,4) 4573 CLEAR_REF %rcx 4574 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4575 4576 4577 /* ------------------------------ */ 4578 .balign 128 4579 .L_op_or_int_2addr: /* 0xb6 */ 4580 /* File: x86_64/op_or_int_2addr.S */ 4581 /* File: x86_64/binop2addr.S */ 4582 /* 4583 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 4584 * that specifies an instruction that performs "result = r0 op r1". 4585 * This could be an instruction or a function call. 4586 * 4587 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 4588 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 4589 * shl-int/2addr, shr-int/2addr, ushr-int/2addr, add-float/2addr, 4590 * sub-float/2addr, mul-float/2addr, div-float/2addr, rem-float/2addr 4591 */ 4592 /* binop/2addr vA, vB */ 4593 movl rINST, %ecx # rcx <- A+ 4594 sarl $4, rINST # rINST <- B 4595 andb $0xf, %cl # ecx <- A 4596 GET_VREG %eax, rINSTq # eax <- vB 4597 orl %eax, (rFP,%rcx,4) # for ex: addl %eax,(rFP,%ecx,4) 4598 CLEAR_REF %rcx 4599 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4600 4601 4602 /* ------------------------------ */ 4603 .balign 128 4604 .L_op_xor_int_2addr: /* 0xb7 */ 4605 /* File: x86_64/op_xor_int_2addr.S */ 4606 /* File: x86_64/binop2addr.S */ 4607 /* 4608 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 4609 * that specifies an instruction that performs "result = r0 op r1". 4610 * This could be an instruction or a function call. 4611 * 4612 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 4613 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 4614 * shl-int/2addr, shr-int/2addr, ushr-int/2addr, add-float/2addr, 4615 * sub-float/2addr, mul-float/2addr, div-float/2addr, rem-float/2addr 4616 */ 4617 /* binop/2addr vA, vB */ 4618 movl rINST, %ecx # rcx <- A+ 4619 sarl $4, rINST # rINST <- B 4620 andb $0xf, %cl # ecx <- A 4621 GET_VREG %eax, rINSTq # eax <- vB 4622 xorl %eax, (rFP,%rcx,4) # for ex: addl %eax,(rFP,%ecx,4) 4623 CLEAR_REF %rcx 4624 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4625 4626 4627 /* ------------------------------ */ 4628 .balign 128 4629 .L_op_shl_int_2addr: /* 0xb8 */ 4630 /* File: x86_64/op_shl_int_2addr.S */ 4631 /* File: x86_64/shop2addr.S */ 4632 /* 4633 * Generic 32-bit "shift/2addr" operation. 4634 */ 4635 /* shift/2addr vA, vB */ 4636 movl rINST, %ecx # ecx <- BA 4637 sarl $4, %ecx # ecx <- B 4638 GET_VREG %ecx, %rcx # ecx <- vBB 4639 andb $0xf, rINSTbl # rINST <- A 4640 .if 0 4641 GET_WIDE_VREG %rax, rINSTq # rax <- vAA 4642 sall %cl, %eax # ex: sarl %cl, %eax 4643 SET_WIDE_VREG %rax, rINSTq 4644 .else 4645 GET_VREG %eax, rINSTq # eax <- vAA 4646 sall %cl, %eax # ex: sarl %cl, %eax 4647 SET_VREG %eax, rINSTq 4648 .endif 4649 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4650 4651 4652 /* ------------------------------ */ 4653 .balign 128 4654 .L_op_shr_int_2addr: /* 0xb9 */ 4655 /* File: x86_64/op_shr_int_2addr.S */ 4656 /* File: x86_64/shop2addr.S */ 4657 /* 4658 * Generic 32-bit "shift/2addr" operation. 4659 */ 4660 /* shift/2addr vA, vB */ 4661 movl rINST, %ecx # ecx <- BA 4662 sarl $4, %ecx # ecx <- B 4663 GET_VREG %ecx, %rcx # ecx <- vBB 4664 andb $0xf, rINSTbl # rINST <- A 4665 .if 0 4666 GET_WIDE_VREG %rax, rINSTq # rax <- vAA 4667 sarl %cl, %eax # ex: sarl %cl, %eax 4668 SET_WIDE_VREG %rax, rINSTq 4669 .else 4670 GET_VREG %eax, rINSTq # eax <- vAA 4671 sarl %cl, %eax # ex: sarl %cl, %eax 4672 SET_VREG %eax, rINSTq 4673 .endif 4674 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4675 4676 4677 /* ------------------------------ */ 4678 .balign 128 4679 .L_op_ushr_int_2addr: /* 0xba */ 4680 /* File: x86_64/op_ushr_int_2addr.S */ 4681 /* File: x86_64/shop2addr.S */ 4682 /* 4683 * Generic 32-bit "shift/2addr" operation. 4684 */ 4685 /* shift/2addr vA, vB */ 4686 movl rINST, %ecx # ecx <- BA 4687 sarl $4, %ecx # ecx <- B 4688 GET_VREG %ecx, %rcx # ecx <- vBB 4689 andb $0xf, rINSTbl # rINST <- A 4690 .if 0 4691 GET_WIDE_VREG %rax, rINSTq # rax <- vAA 4692 shrl %cl, %eax # ex: sarl %cl, %eax 4693 SET_WIDE_VREG %rax, rINSTq 4694 .else 4695 GET_VREG %eax, rINSTq # eax <- vAA 4696 shrl %cl, %eax # ex: sarl %cl, %eax 4697 SET_VREG %eax, rINSTq 4698 .endif 4699 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4700 4701 4702 /* ------------------------------ */ 4703 .balign 128 4704 .L_op_add_long_2addr: /* 0xbb */ 4705 /* File: x86_64/op_add_long_2addr.S */ 4706 /* File: x86_64/binopWide2addr.S */ 4707 /* 4708 * Generic 64-bit binary operation. 4709 */ 4710 /* binop/2addr vA, vB */ 4711 movl rINST, %ecx # rcx <- A+ 4712 sarl $4, rINST # rINST <- B 4713 andb $0xf, %cl # ecx <- A 4714 GET_WIDE_VREG %rax, rINSTq # rax <- vB 4715 addq %rax, (rFP,%rcx,4) # for ex: addq %rax,(rFP,%rcx,4) 4716 CLEAR_WIDE_REF %rcx 4717 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4718 4719 4720 /* ------------------------------ */ 4721 .balign 128 4722 .L_op_sub_long_2addr: /* 0xbc */ 4723 /* File: x86_64/op_sub_long_2addr.S */ 4724 /* File: x86_64/binopWide2addr.S */ 4725 /* 4726 * Generic 64-bit binary operation. 4727 */ 4728 /* binop/2addr vA, vB */ 4729 movl rINST, %ecx # rcx <- A+ 4730 sarl $4, rINST # rINST <- B 4731 andb $0xf, %cl # ecx <- A 4732 GET_WIDE_VREG %rax, rINSTq # rax <- vB 4733 subq %rax, (rFP,%rcx,4) # for ex: addq %rax,(rFP,%rcx,4) 4734 CLEAR_WIDE_REF %rcx 4735 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4736 4737 4738 /* ------------------------------ */ 4739 .balign 128 4740 .L_op_mul_long_2addr: /* 0xbd */ 4741 /* File: x86_64/op_mul_long_2addr.S */ 4742 /* mul vA, vB */ 4743 movl rINST, %ecx # rcx <- A+ 4744 sarl $4, rINST # rINST <- B 4745 andb $0xf, %cl # ecx <- A 4746 GET_WIDE_VREG %rax, %rcx # rax <- vA 4747 imulq (rFP,rINSTq,4), %rax 4748 SET_WIDE_VREG %rax, %rcx 4749 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4750 4751 /* ------------------------------ */ 4752 .balign 128 4753 .L_op_div_long_2addr: /* 0xbe */ 4754 /* File: x86_64/op_div_long_2addr.S */ 4755 /* File: x86_64/bindiv2addr.S */ 4756 /* 4757 * 32-bit binary div/rem operation. Handles special case of op1=-1. 4758 */ 4759 /* div/rem/2addr vA, vB */ 4760 movl rINST, %ecx # rcx <- BA 4761 sarl $4, %ecx # rcx <- B 4762 andb $0xf, rINSTbl # rINST <- A 4763 .if 1 4764 GET_WIDE_VREG %rax, rINSTq # eax <- vA 4765 GET_WIDE_VREG %rcx, %rcx # ecx <- vB 4766 .else 4767 GET_VREG %eax, rINSTq # eax <- vA 4768 GET_VREG %rcx, %rcx # ecx <- vB 4769 .endif 4770 testq %rcx, %rcx 4771 jz common_errDivideByZero 4772 cmpq $-1, %rcx 4773 je 2f 4774 cqo # rdx:rax <- sign-extended of rax 4775 idivq %rcx 4776 1: 4777 .if 1 4778 SET_WIDE_VREG %rax, rINSTq # vA <- result 4779 .else 4780 SET_VREG %rax, rINSTq # vA <- result 4781 .endif 4782 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4783 2: 4784 .if 0 4785 xorq %rax, %rax 4786 .else 4787 negq %rax 4788 .endif 4789 jmp 1b 4790 4791 4792 /* ------------------------------ */ 4793 .balign 128 4794 .L_op_rem_long_2addr: /* 0xbf */ 4795 /* File: x86_64/op_rem_long_2addr.S */ 4796 /* File: x86_64/bindiv2addr.S */ 4797 /* 4798 * 32-bit binary div/rem operation. Handles special case of op1=-1. 4799 */ 4800 /* div/rem/2addr vA, vB */ 4801 movl rINST, %ecx # rcx <- BA 4802 sarl $4, %ecx # rcx <- B 4803 andb $0xf, rINSTbl # rINST <- A 4804 .if 1 4805 GET_WIDE_VREG %rax, rINSTq # eax <- vA 4806 GET_WIDE_VREG %rcx, %rcx # ecx <- vB 4807 .else 4808 GET_VREG %eax, rINSTq # eax <- vA 4809 GET_VREG %rcx, %rcx # ecx <- vB 4810 .endif 4811 testq %rcx, %rcx 4812 jz common_errDivideByZero 4813 cmpq $-1, %rcx 4814 je 2f 4815 cqo # rdx:rax <- sign-extended of rax 4816 idivq %rcx 4817 1: 4818 .if 1 4819 SET_WIDE_VREG %rdx, rINSTq # vA <- result 4820 .else 4821 SET_VREG %rdx, rINSTq # vA <- result 4822 .endif 4823 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4824 2: 4825 .if 1 4826 xorq %rdx, %rdx 4827 .else 4828 negq %rdx 4829 .endif 4830 jmp 1b 4831 4832 4833 /* ------------------------------ */ 4834 .balign 128 4835 .L_op_and_long_2addr: /* 0xc0 */ 4836 /* File: x86_64/op_and_long_2addr.S */ 4837 /* File: x86_64/binopWide2addr.S */ 4838 /* 4839 * Generic 64-bit binary operation. 4840 */ 4841 /* binop/2addr vA, vB */ 4842 movl rINST, %ecx # rcx <- A+ 4843 sarl $4, rINST # rINST <- B 4844 andb $0xf, %cl # ecx <- A 4845 GET_WIDE_VREG %rax, rINSTq # rax <- vB 4846 andq %rax, (rFP,%rcx,4) # for ex: addq %rax,(rFP,%rcx,4) 4847 CLEAR_WIDE_REF %rcx 4848 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4849 4850 4851 /* ------------------------------ */ 4852 .balign 128 4853 .L_op_or_long_2addr: /* 0xc1 */ 4854 /* File: x86_64/op_or_long_2addr.S */ 4855 /* File: x86_64/binopWide2addr.S */ 4856 /* 4857 * Generic 64-bit binary operation. 4858 */ 4859 /* binop/2addr vA, vB */ 4860 movl rINST, %ecx # rcx <- A+ 4861 sarl $4, rINST # rINST <- B 4862 andb $0xf, %cl # ecx <- A 4863 GET_WIDE_VREG %rax, rINSTq # rax <- vB 4864 orq %rax, (rFP,%rcx,4) # for ex: addq %rax,(rFP,%rcx,4) 4865 CLEAR_WIDE_REF %rcx 4866 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4867 4868 4869 /* ------------------------------ */ 4870 .balign 128 4871 .L_op_xor_long_2addr: /* 0xc2 */ 4872 /* File: x86_64/op_xor_long_2addr.S */ 4873 /* File: x86_64/binopWide2addr.S */ 4874 /* 4875 * Generic 64-bit binary operation. 4876 */ 4877 /* binop/2addr vA, vB */ 4878 movl rINST, %ecx # rcx <- A+ 4879 sarl $4, rINST # rINST <- B 4880 andb $0xf, %cl # ecx <- A 4881 GET_WIDE_VREG %rax, rINSTq # rax <- vB 4882 xorq %rax, (rFP,%rcx,4) # for ex: addq %rax,(rFP,%rcx,4) 4883 CLEAR_WIDE_REF %rcx 4884 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4885 4886 4887 /* ------------------------------ */ 4888 .balign 128 4889 .L_op_shl_long_2addr: /* 0xc3 */ 4890 /* File: x86_64/op_shl_long_2addr.S */ 4891 /* File: x86_64/shop2addr.S */ 4892 /* 4893 * Generic 32-bit "shift/2addr" operation. 4894 */ 4895 /* shift/2addr vA, vB */ 4896 movl rINST, %ecx # ecx <- BA 4897 sarl $4, %ecx # ecx <- B 4898 GET_VREG %ecx, %rcx # ecx <- vBB 4899 andb $0xf, rINSTbl # rINST <- A 4900 .if 1 4901 GET_WIDE_VREG %rax, rINSTq # rax <- vAA 4902 salq %cl, %rax # ex: sarl %cl, %eax 4903 SET_WIDE_VREG %rax, rINSTq 4904 .else 4905 GET_VREG %eax, rINSTq # eax <- vAA 4906 salq %cl, %rax # ex: sarl %cl, %eax 4907 SET_VREG %eax, rINSTq 4908 .endif 4909 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4910 4911 4912 /* ------------------------------ */ 4913 .balign 128 4914 .L_op_shr_long_2addr: /* 0xc4 */ 4915 /* File: x86_64/op_shr_long_2addr.S */ 4916 /* File: x86_64/shop2addr.S */ 4917 /* 4918 * Generic 32-bit "shift/2addr" operation. 4919 */ 4920 /* shift/2addr vA, vB */ 4921 movl rINST, %ecx # ecx <- BA 4922 sarl $4, %ecx # ecx <- B 4923 GET_VREG %ecx, %rcx # ecx <- vBB 4924 andb $0xf, rINSTbl # rINST <- A 4925 .if 1 4926 GET_WIDE_VREG %rax, rINSTq # rax <- vAA 4927 sarq %cl, %rax # ex: sarl %cl, %eax 4928 SET_WIDE_VREG %rax, rINSTq 4929 .else 4930 GET_VREG %eax, rINSTq # eax <- vAA 4931 sarq %cl, %rax # ex: sarl %cl, %eax 4932 SET_VREG %eax, rINSTq 4933 .endif 4934 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4935 4936 4937 /* ------------------------------ */ 4938 .balign 128 4939 .L_op_ushr_long_2addr: /* 0xc5 */ 4940 /* File: x86_64/op_ushr_long_2addr.S */ 4941 /* File: x86_64/shop2addr.S */ 4942 /* 4943 * Generic 32-bit "shift/2addr" operation. 4944 */ 4945 /* shift/2addr vA, vB */ 4946 movl rINST, %ecx # ecx <- BA 4947 sarl $4, %ecx # ecx <- B 4948 GET_VREG %ecx, %rcx # ecx <- vBB 4949 andb $0xf, rINSTbl # rINST <- A 4950 .if 1 4951 GET_WIDE_VREG %rax, rINSTq # rax <- vAA 4952 shrq %cl, %rax # ex: sarl %cl, %eax 4953 SET_WIDE_VREG %rax, rINSTq 4954 .else 4955 GET_VREG %eax, rINSTq # eax <- vAA 4956 shrq %cl, %rax # ex: sarl %cl, %eax 4957 SET_VREG %eax, rINSTq 4958 .endif 4959 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4960 4961 4962 /* ------------------------------ */ 4963 .balign 128 4964 .L_op_add_float_2addr: /* 0xc6 */ 4965 /* File: x86_64/op_add_float_2addr.S */ 4966 /* File: x86_64/sseBinop2Addr.S */ 4967 movl rINST, %ecx # ecx <- A+ 4968 andl $0xf, %ecx # ecx <- A 4969 movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 4970 sarl $4, rINST # rINST<- B 4971 addss VREG_ADDRESS(rINSTq), %xmm0 4972 movss %xmm0, VREG_ADDRESS(%rcx) # vAA<- %xmm0 4973 pxor %xmm0, %xmm0 4974 movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 4975 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4976 4977 4978 /* ------------------------------ */ 4979 .balign 128 4980 .L_op_sub_float_2addr: /* 0xc7 */ 4981 /* File: x86_64/op_sub_float_2addr.S */ 4982 /* File: x86_64/sseBinop2Addr.S */ 4983 movl rINST, %ecx # ecx <- A+ 4984 andl $0xf, %ecx # ecx <- A 4985 movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 4986 sarl $4, rINST # rINST<- B 4987 subss VREG_ADDRESS(rINSTq), %xmm0 4988 movss %xmm0, VREG_ADDRESS(%rcx) # vAA<- %xmm0 4989 pxor %xmm0, %xmm0 4990 movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 4991 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4992 4993 4994 /* ------------------------------ */ 4995 .balign 128 4996 .L_op_mul_float_2addr: /* 0xc8 */ 4997 /* File: x86_64/op_mul_float_2addr.S */ 4998 /* File: x86_64/sseBinop2Addr.S */ 4999 movl rINST, %ecx # ecx <- A+ 5000 andl $0xf, %ecx # ecx <- A 5001 movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 5002 sarl $4, rINST # rINST<- B 5003 mulss VREG_ADDRESS(rINSTq), %xmm0 5004 movss %xmm0, VREG_ADDRESS(%rcx) # vAA<- %xmm0 5005 pxor %xmm0, %xmm0 5006 movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 5007 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5008 5009 5010 /* ------------------------------ */ 5011 .balign 128 5012 .L_op_div_float_2addr: /* 0xc9 */ 5013 /* File: x86_64/op_div_float_2addr.S */ 5014 /* File: x86_64/sseBinop2Addr.S */ 5015 movl rINST, %ecx # ecx <- A+ 5016 andl $0xf, %ecx # ecx <- A 5017 movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 5018 sarl $4, rINST # rINST<- B 5019 divss VREG_ADDRESS(rINSTq), %xmm0 5020 movss %xmm0, VREG_ADDRESS(%rcx) # vAA<- %xmm0 5021 pxor %xmm0, %xmm0 5022 movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 5023 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5024 5025 5026 /* ------------------------------ */ 5027 .balign 128 5028 .L_op_rem_float_2addr: /* 0xca */ 5029 /* File: x86_64/op_rem_float_2addr.S */ 5030 /* rem_float/2addr vA, vB */ 5031 movzbq rINSTbl, %rcx # ecx <- A+ 5032 sarl $4, rINST # rINST <- B 5033 flds VREG_ADDRESS(rINSTq) # vB to fp stack 5034 andb $0xf, %cl # ecx <- A 5035 flds VREG_ADDRESS(%rcx) # vA to fp stack 5036 1: 5037 fprem 5038 fstsw %ax 5039 sahf 5040 jp 1b 5041 fstp %st(1) 5042 fstps VREG_ADDRESS(%rcx) # %st to vA 5043 CLEAR_REF %rcx 5044 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5045 5046 /* ------------------------------ */ 5047 .balign 128 5048 .L_op_add_double_2addr: /* 0xcb */ 5049 /* File: x86_64/op_add_double_2addr.S */ 5050 /* File: x86_64/sseBinop2Addr.S */ 5051 movl rINST, %ecx # ecx <- A+ 5052 andl $0xf, %ecx # ecx <- A 5053 movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 5054 sarl $4, rINST # rINST<- B 5055 addsd VREG_ADDRESS(rINSTq), %xmm0 5056 movsd %xmm0, VREG_ADDRESS(%rcx) # vAA<- %xmm0 5057 pxor %xmm0, %xmm0 5058 movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 5059 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5060 5061 5062 /* ------------------------------ */ 5063 .balign 128 5064 .L_op_sub_double_2addr: /* 0xcc */ 5065 /* File: x86_64/op_sub_double_2addr.S */ 5066 /* File: x86_64/sseBinop2Addr.S */ 5067 movl rINST, %ecx # ecx <- A+ 5068 andl $0xf, %ecx # ecx <- A 5069 movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 5070 sarl $4, rINST # rINST<- B 5071 subsd VREG_ADDRESS(rINSTq), %xmm0 5072 movsd %xmm0, VREG_ADDRESS(%rcx) # vAA<- %xmm0 5073 pxor %xmm0, %xmm0 5074 movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 5075 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5076 5077 5078 /* ------------------------------ */ 5079 .balign 128 5080 .L_op_mul_double_2addr: /* 0xcd */ 5081 /* File: x86_64/op_mul_double_2addr.S */ 5082 /* File: x86_64/sseBinop2Addr.S */ 5083 movl rINST, %ecx # ecx <- A+ 5084 andl $0xf, %ecx # ecx <- A 5085 movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 5086 sarl $4, rINST # rINST<- B 5087 mulsd VREG_ADDRESS(rINSTq), %xmm0 5088 movsd %xmm0, VREG_ADDRESS(%rcx) # vAA<- %xmm0 5089 pxor %xmm0, %xmm0 5090 movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 5091 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5092 5093 5094 /* ------------------------------ */ 5095 .balign 128 5096 .L_op_div_double_2addr: /* 0xce */ 5097 /* File: x86_64/op_div_double_2addr.S */ 5098 /* File: x86_64/sseBinop2Addr.S */ 5099 movl rINST, %ecx # ecx <- A+ 5100 andl $0xf, %ecx # ecx <- A 5101 movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src 5102 sarl $4, rINST # rINST<- B 5103 divsd VREG_ADDRESS(rINSTq), %xmm0 5104 movsd %xmm0, VREG_ADDRESS(%rcx) # vAA<- %xmm0 5105 pxor %xmm0, %xmm0 5106 movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref 5107 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5108 5109 5110 /* ------------------------------ */ 5111 .balign 128 5112 .L_op_rem_double_2addr: /* 0xcf */ 5113 /* File: x86_64/op_rem_double_2addr.S */ 5114 /* rem_double/2addr vA, vB */ 5115 movzbq rINSTbl, %rcx # ecx <- A+ 5116 sarl $4, rINST # rINST <- B 5117 fldl VREG_ADDRESS(rINSTq) # vB to fp stack 5118 andb $0xf, %cl # ecx <- A 5119 fldl VREG_ADDRESS(%rcx) # vA to fp stack 5120 1: 5121 fprem 5122 fstsw %ax 5123 sahf 5124 jp 1b 5125 fstp %st(1) 5126 fstpl VREG_ADDRESS(%rcx) # %st to vA 5127 CLEAR_WIDE_REF %rcx 5128 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5129 5130 /* ------------------------------ */ 5131 .balign 128 5132 .L_op_add_int_lit16: /* 0xd0 */ 5133 /* File: x86_64/op_add_int_lit16.S */ 5134 /* File: x86_64/binopLit16.S */ 5135 /* 5136 * Generic 32-bit "lit16" binary operation. Provide an "instr" line 5137 * that specifies an instruction that performs "result = eax op ecx". 5138 * This could be an x86 instruction or a function call. (If the result 5139 * comes back in a register other than eax, you can override "result".) 5140 * 5141 * For: add-int/lit16, rsub-int, 5142 * and-int/lit16, or-int/lit16, xor-int/lit16 5143 */ 5144 /* binop/lit16 vA, vB, #+CCCC */ 5145 movl rINST, %eax # rax <- 000000BA 5146 sarl $4, %eax # eax <- B 5147 GET_VREG %eax, %rax # eax <- vB 5148 andb $0xf, rINSTbl # rINST <- A 5149 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5150 addl %ecx, %eax # for example: addl %ecx, %eax 5151 SET_VREG %eax, rINSTq 5152 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5153 5154 5155 /* ------------------------------ */ 5156 .balign 128 5157 .L_op_rsub_int: /* 0xd1 */ 5158 /* File: x86_64/op_rsub_int.S */ 5159 /* this op is "rsub-int", but can be thought of as "rsub-int/lit16" */ 5160 /* File: x86_64/binopLit16.S */ 5161 /* 5162 * Generic 32-bit "lit16" binary operation. Provide an "instr" line 5163 * that specifies an instruction that performs "result = eax op ecx". 5164 * This could be an x86 instruction or a function call. (If the result 5165 * comes back in a register other than eax, you can override "result".) 5166 * 5167 * For: add-int/lit16, rsub-int, 5168 * and-int/lit16, or-int/lit16, xor-int/lit16 5169 */ 5170 /* binop/lit16 vA, vB, #+CCCC */ 5171 movl rINST, %eax # rax <- 000000BA 5172 sarl $4, %eax # eax <- B 5173 GET_VREG %eax, %rax # eax <- vB 5174 andb $0xf, rINSTbl # rINST <- A 5175 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5176 subl %eax, %ecx # for example: addl %ecx, %eax 5177 SET_VREG %ecx, rINSTq 5178 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5179 5180 5181 /* ------------------------------ */ 5182 .balign 128 5183 .L_op_mul_int_lit16: /* 0xd2 */ 5184 /* File: x86_64/op_mul_int_lit16.S */ 5185 /* File: x86_64/binopLit16.S */ 5186 /* 5187 * Generic 32-bit "lit16" binary operation. Provide an "instr" line 5188 * that specifies an instruction that performs "result = eax op ecx". 5189 * This could be an x86 instruction or a function call. (If the result 5190 * comes back in a register other than eax, you can override "result".) 5191 * 5192 * For: add-int/lit16, rsub-int, 5193 * and-int/lit16, or-int/lit16, xor-int/lit16 5194 */ 5195 /* binop/lit16 vA, vB, #+CCCC */ 5196 movl rINST, %eax # rax <- 000000BA 5197 sarl $4, %eax # eax <- B 5198 GET_VREG %eax, %rax # eax <- vB 5199 andb $0xf, rINSTbl # rINST <- A 5200 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5201 imull %ecx, %eax # for example: addl %ecx, %eax 5202 SET_VREG %eax, rINSTq 5203 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5204 5205 5206 /* ------------------------------ */ 5207 .balign 128 5208 .L_op_div_int_lit16: /* 0xd3 */ 5209 /* File: x86_64/op_div_int_lit16.S */ 5210 /* File: x86_64/bindivLit16.S */ 5211 /* 5212 * 32-bit binary div/rem operation. Handles special case of op1=-1. 5213 */ 5214 /* div/rem/lit16 vA, vB, #+CCCC */ 5215 /* Need A in rINST, ssssCCCC in ecx, vB in eax */ 5216 movl rINST, %eax # rax <- 000000BA 5217 sarl $4, %eax # eax <- B 5218 GET_VREG %eax, %rax # eax <- vB 5219 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5220 andb $0xf, rINSTbl # rINST <- A 5221 testl %ecx, %ecx 5222 jz common_errDivideByZero 5223 cmpl $-1, %ecx 5224 je 2f 5225 cdq # rax <- sign-extended of eax 5226 idivl %ecx 5227 1: 5228 SET_VREG %eax, rINSTq # vA <- result 5229 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5230 2: 5231 .if 0 5232 xorl %eax, %eax 5233 .else 5234 negl %eax 5235 .endif 5236 jmp 1b 5237 5238 5239 /* ------------------------------ */ 5240 .balign 128 5241 .L_op_rem_int_lit16: /* 0xd4 */ 5242 /* File: x86_64/op_rem_int_lit16.S */ 5243 /* File: x86_64/bindivLit16.S */ 5244 /* 5245 * 32-bit binary div/rem operation. Handles special case of op1=-1. 5246 */ 5247 /* div/rem/lit16 vA, vB, #+CCCC */ 5248 /* Need A in rINST, ssssCCCC in ecx, vB in eax */ 5249 movl rINST, %eax # rax <- 000000BA 5250 sarl $4, %eax # eax <- B 5251 GET_VREG %eax, %rax # eax <- vB 5252 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5253 andb $0xf, rINSTbl # rINST <- A 5254 testl %ecx, %ecx 5255 jz common_errDivideByZero 5256 cmpl $-1, %ecx 5257 je 2f 5258 cdq # rax <- sign-extended of eax 5259 idivl %ecx 5260 1: 5261 SET_VREG %edx, rINSTq # vA <- result 5262 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5263 2: 5264 .if 1 5265 xorl %edx, %edx 5266 .else 5267 negl %edx 5268 .endif 5269 jmp 1b 5270 5271 5272 /* ------------------------------ */ 5273 .balign 128 5274 .L_op_and_int_lit16: /* 0xd5 */ 5275 /* File: x86_64/op_and_int_lit16.S */ 5276 /* File: x86_64/binopLit16.S */ 5277 /* 5278 * Generic 32-bit "lit16" binary operation. Provide an "instr" line 5279 * that specifies an instruction that performs "result = eax op ecx". 5280 * This could be an x86 instruction or a function call. (If the result 5281 * comes back in a register other than eax, you can override "result".) 5282 * 5283 * For: add-int/lit16, rsub-int, 5284 * and-int/lit16, or-int/lit16, xor-int/lit16 5285 */ 5286 /* binop/lit16 vA, vB, #+CCCC */ 5287 movl rINST, %eax # rax <- 000000BA 5288 sarl $4, %eax # eax <- B 5289 GET_VREG %eax, %rax # eax <- vB 5290 andb $0xf, rINSTbl # rINST <- A 5291 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5292 andl %ecx, %eax # for example: addl %ecx, %eax 5293 SET_VREG %eax, rINSTq 5294 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5295 5296 5297 /* ------------------------------ */ 5298 .balign 128 5299 .L_op_or_int_lit16: /* 0xd6 */ 5300 /* File: x86_64/op_or_int_lit16.S */ 5301 /* File: x86_64/binopLit16.S */ 5302 /* 5303 * Generic 32-bit "lit16" binary operation. Provide an "instr" line 5304 * that specifies an instruction that performs "result = eax op ecx". 5305 * This could be an x86 instruction or a function call. (If the result 5306 * comes back in a register other than eax, you can override "result".) 5307 * 5308 * For: add-int/lit16, rsub-int, 5309 * and-int/lit16, or-int/lit16, xor-int/lit16 5310 */ 5311 /* binop/lit16 vA, vB, #+CCCC */ 5312 movl rINST, %eax # rax <- 000000BA 5313 sarl $4, %eax # eax <- B 5314 GET_VREG %eax, %rax # eax <- vB 5315 andb $0xf, rINSTbl # rINST <- A 5316 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5317 orl %ecx, %eax # for example: addl %ecx, %eax 5318 SET_VREG %eax, rINSTq 5319 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5320 5321 5322 /* ------------------------------ */ 5323 .balign 128 5324 .L_op_xor_int_lit16: /* 0xd7 */ 5325 /* File: x86_64/op_xor_int_lit16.S */ 5326 /* File: x86_64/binopLit16.S */ 5327 /* 5328 * Generic 32-bit "lit16" binary operation. Provide an "instr" line 5329 * that specifies an instruction that performs "result = eax op ecx". 5330 * This could be an x86 instruction or a function call. (If the result 5331 * comes back in a register other than eax, you can override "result".) 5332 * 5333 * For: add-int/lit16, rsub-int, 5334 * and-int/lit16, or-int/lit16, xor-int/lit16 5335 */ 5336 /* binop/lit16 vA, vB, #+CCCC */ 5337 movl rINST, %eax # rax <- 000000BA 5338 sarl $4, %eax # eax <- B 5339 GET_VREG %eax, %rax # eax <- vB 5340 andb $0xf, rINSTbl # rINST <- A 5341 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5342 xorl %ecx, %eax # for example: addl %ecx, %eax 5343 SET_VREG %eax, rINSTq 5344 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5345 5346 5347 /* ------------------------------ */ 5348 .balign 128 5349 .L_op_add_int_lit8: /* 0xd8 */ 5350 /* File: x86_64/op_add_int_lit8.S */ 5351 /* File: x86_64/binopLit8.S */ 5352 /* 5353 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5354 * that specifies an instruction that performs "result = eax op ecx". 5355 * This could be an x86 instruction or a function call. (If the result 5356 * comes back in a register other than r0, you can override "result".) 5357 * 5358 * For: add-int/lit8, rsub-int/lit8 5359 * and-int/lit8, or-int/lit8, xor-int/lit8, 5360 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5361 */ 5362 /* binop/lit8 vAA, vBB, #+CC */ 5363 movzbq 2(rPC), %rax # rax <- BB 5364 movsbl 3(rPC), %ecx # rcx <- ssssssCC 5365 GET_VREG %eax, %rax # eax <- rBB 5366 addl %ecx, %eax # ex: addl %ecx,%eax 5367 SET_VREG %eax, rINSTq 5368 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5369 5370 5371 /* ------------------------------ */ 5372 .balign 128 5373 .L_op_rsub_int_lit8: /* 0xd9 */ 5374 /* File: x86_64/op_rsub_int_lit8.S */ 5375 /* File: x86_64/binopLit8.S */ 5376 /* 5377 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5378 * that specifies an instruction that performs "result = eax op ecx". 5379 * This could be an x86 instruction or a function call. (If the result 5380 * comes back in a register other than r0, you can override "result".) 5381 * 5382 * For: add-int/lit8, rsub-int/lit8 5383 * and-int/lit8, or-int/lit8, xor-int/lit8, 5384 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5385 */ 5386 /* binop/lit8 vAA, vBB, #+CC */ 5387 movzbq 2(rPC), %rax # rax <- BB 5388 movsbl 3(rPC), %ecx # rcx <- ssssssCC 5389 GET_VREG %eax, %rax # eax <- rBB 5390 subl %eax, %ecx # ex: addl %ecx,%eax 5391 SET_VREG %ecx, rINSTq 5392 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5393 5394 5395 /* ------------------------------ */ 5396 .balign 128 5397 .L_op_mul_int_lit8: /* 0xda */ 5398 /* File: x86_64/op_mul_int_lit8.S */ 5399 /* File: x86_64/binopLit8.S */ 5400 /* 5401 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5402 * that specifies an instruction that performs "result = eax op ecx". 5403 * This could be an x86 instruction or a function call. (If the result 5404 * comes back in a register other than r0, you can override "result".) 5405 * 5406 * For: add-int/lit8, rsub-int/lit8 5407 * and-int/lit8, or-int/lit8, xor-int/lit8, 5408 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5409 */ 5410 /* binop/lit8 vAA, vBB, #+CC */ 5411 movzbq 2(rPC), %rax # rax <- BB 5412 movsbl 3(rPC), %ecx # rcx <- ssssssCC 5413 GET_VREG %eax, %rax # eax <- rBB 5414 imull %ecx, %eax # ex: addl %ecx,%eax 5415 SET_VREG %eax, rINSTq 5416 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5417 5418 5419 /* ------------------------------ */ 5420 .balign 128 5421 .L_op_div_int_lit8: /* 0xdb */ 5422 /* File: x86_64/op_div_int_lit8.S */ 5423 /* File: x86_64/bindivLit8.S */ 5424 /* 5425 * 32-bit div/rem "lit8" binary operation. Handles special case of 5426 * op0=minint & op1=-1 5427 */ 5428 /* div/rem/lit8 vAA, vBB, #+CC */ 5429 movzbq 2(rPC), %rax # eax <- BB 5430 movsbl 3(rPC), %ecx # ecx <- ssssssCC 5431 GET_VREG %eax, %rax # eax <- rBB 5432 testl %ecx, %ecx 5433 je common_errDivideByZero 5434 cmpl $-1, %ecx 5435 je 2f 5436 cdq # rax <- sign-extended of eax 5437 idivl %ecx 5438 1: 5439 SET_VREG %eax, rINSTq # vA <- result 5440 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5441 2: 5442 .if 0 5443 xorl %eax, %eax 5444 .else 5445 negl %eax 5446 .endif 5447 jmp 1b 5448 5449 5450 /* ------------------------------ */ 5451 .balign 128 5452 .L_op_rem_int_lit8: /* 0xdc */ 5453 /* File: x86_64/op_rem_int_lit8.S */ 5454 /* File: x86_64/bindivLit8.S */ 5455 /* 5456 * 32-bit div/rem "lit8" binary operation. Handles special case of 5457 * op0=minint & op1=-1 5458 */ 5459 /* div/rem/lit8 vAA, vBB, #+CC */ 5460 movzbq 2(rPC), %rax # eax <- BB 5461 movsbl 3(rPC), %ecx # ecx <- ssssssCC 5462 GET_VREG %eax, %rax # eax <- rBB 5463 testl %ecx, %ecx 5464 je common_errDivideByZero 5465 cmpl $-1, %ecx 5466 je 2f 5467 cdq # rax <- sign-extended of eax 5468 idivl %ecx 5469 1: 5470 SET_VREG %edx, rINSTq # vA <- result 5471 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5472 2: 5473 .if 1 5474 xorl %edx, %edx 5475 .else 5476 negl %edx 5477 .endif 5478 jmp 1b 5479 5480 5481 /* ------------------------------ */ 5482 .balign 128 5483 .L_op_and_int_lit8: /* 0xdd */ 5484 /* File: x86_64/op_and_int_lit8.S */ 5485 /* File: x86_64/binopLit8.S */ 5486 /* 5487 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5488 * that specifies an instruction that performs "result = eax op ecx". 5489 * This could be an x86 instruction or a function call. (If the result 5490 * comes back in a register other than r0, you can override "result".) 5491 * 5492 * For: add-int/lit8, rsub-int/lit8 5493 * and-int/lit8, or-int/lit8, xor-int/lit8, 5494 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5495 */ 5496 /* binop/lit8 vAA, vBB, #+CC */ 5497 movzbq 2(rPC), %rax # rax <- BB 5498 movsbl 3(rPC), %ecx # rcx <- ssssssCC 5499 GET_VREG %eax, %rax # eax <- rBB 5500 andl %ecx, %eax # ex: addl %ecx,%eax 5501 SET_VREG %eax, rINSTq 5502 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5503 5504 5505 /* ------------------------------ */ 5506 .balign 128 5507 .L_op_or_int_lit8: /* 0xde */ 5508 /* File: x86_64/op_or_int_lit8.S */ 5509 /* File: x86_64/binopLit8.S */ 5510 /* 5511 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5512 * that specifies an instruction that performs "result = eax op ecx". 5513 * This could be an x86 instruction or a function call. (If the result 5514 * comes back in a register other than r0, you can override "result".) 5515 * 5516 * For: add-int/lit8, rsub-int/lit8 5517 * and-int/lit8, or-int/lit8, xor-int/lit8, 5518 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5519 */ 5520 /* binop/lit8 vAA, vBB, #+CC */ 5521 movzbq 2(rPC), %rax # rax <- BB 5522 movsbl 3(rPC), %ecx # rcx <- ssssssCC 5523 GET_VREG %eax, %rax # eax <- rBB 5524 orl %ecx, %eax # ex: addl %ecx,%eax 5525 SET_VREG %eax, rINSTq 5526 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5527 5528 5529 /* ------------------------------ */ 5530 .balign 128 5531 .L_op_xor_int_lit8: /* 0xdf */ 5532 /* File: x86_64/op_xor_int_lit8.S */ 5533 /* File: x86_64/binopLit8.S */ 5534 /* 5535 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5536 * that specifies an instruction that performs "result = eax op ecx". 5537 * This could be an x86 instruction or a function call. (If the result 5538 * comes back in a register other than r0, you can override "result".) 5539 * 5540 * For: add-int/lit8, rsub-int/lit8 5541 * and-int/lit8, or-int/lit8, xor-int/lit8, 5542 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5543 */ 5544 /* binop/lit8 vAA, vBB, #+CC */ 5545 movzbq 2(rPC), %rax # rax <- BB 5546 movsbl 3(rPC), %ecx # rcx <- ssssssCC 5547 GET_VREG %eax, %rax # eax <- rBB 5548 xorl %ecx, %eax # ex: addl %ecx,%eax 5549 SET_VREG %eax, rINSTq 5550 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5551 5552 5553 /* ------------------------------ */ 5554 .balign 128 5555 .L_op_shl_int_lit8: /* 0xe0 */ 5556 /* File: x86_64/op_shl_int_lit8.S */ 5557 /* File: x86_64/binopLit8.S */ 5558 /* 5559 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5560 * that specifies an instruction that performs "result = eax op ecx". 5561 * This could be an x86 instruction or a function call. (If the result 5562 * comes back in a register other than r0, you can override "result".) 5563 * 5564 * For: add-int/lit8, rsub-int/lit8 5565 * and-int/lit8, or-int/lit8, xor-int/lit8, 5566 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5567 */ 5568 /* binop/lit8 vAA, vBB, #+CC */ 5569 movzbq 2(rPC), %rax # rax <- BB 5570 movsbl 3(rPC), %ecx # rcx <- ssssssCC 5571 GET_VREG %eax, %rax # eax <- rBB 5572 sall %cl, %eax # ex: addl %ecx,%eax 5573 SET_VREG %eax, rINSTq 5574 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5575 5576 5577 /* ------------------------------ */ 5578 .balign 128 5579 .L_op_shr_int_lit8: /* 0xe1 */ 5580 /* File: x86_64/op_shr_int_lit8.S */ 5581 /* File: x86_64/binopLit8.S */ 5582 /* 5583 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5584 * that specifies an instruction that performs "result = eax op ecx". 5585 * This could be an x86 instruction or a function call. (If the result 5586 * comes back in a register other than r0, you can override "result".) 5587 * 5588 * For: add-int/lit8, rsub-int/lit8 5589 * and-int/lit8, or-int/lit8, xor-int/lit8, 5590 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5591 */ 5592 /* binop/lit8 vAA, vBB, #+CC */ 5593 movzbq 2(rPC), %rax # rax <- BB 5594 movsbl 3(rPC), %ecx # rcx <- ssssssCC 5595 GET_VREG %eax, %rax # eax <- rBB 5596 sarl %cl, %eax # ex: addl %ecx,%eax 5597 SET_VREG %eax, rINSTq 5598 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5599 5600 5601 /* ------------------------------ */ 5602 .balign 128 5603 .L_op_ushr_int_lit8: /* 0xe2 */ 5604 /* File: x86_64/op_ushr_int_lit8.S */ 5605 /* File: x86_64/binopLit8.S */ 5606 /* 5607 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5608 * that specifies an instruction that performs "result = eax op ecx". 5609 * This could be an x86 instruction or a function call. (If the result 5610 * comes back in a register other than r0, you can override "result".) 5611 * 5612 * For: add-int/lit8, rsub-int/lit8 5613 * and-int/lit8, or-int/lit8, xor-int/lit8, 5614 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5615 */ 5616 /* binop/lit8 vAA, vBB, #+CC */ 5617 movzbq 2(rPC), %rax # rax <- BB 5618 movsbl 3(rPC), %ecx # rcx <- ssssssCC 5619 GET_VREG %eax, %rax # eax <- rBB 5620 shrl %cl, %eax # ex: addl %ecx,%eax 5621 SET_VREG %eax, rINSTq 5622 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5623 5624 5625 /* ------------------------------ */ 5626 .balign 128 5627 .L_op_iget_quick: /* 0xe3 */ 5628 /* File: x86_64/op_iget_quick.S */ 5629 /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick, iget-wide-quick */ 5630 /* op vA, vB, offset@CCCC */ 5631 movl rINST, %ecx # rcx <- BA 5632 sarl $4, %ecx # ecx <- B 5633 GET_VREG %ecx, %rcx # vB (object we're operating on) 5634 movzwq 2(rPC), %rax # eax <- field byte offset 5635 testl %ecx, %ecx # is object null? 5636 je common_errNullObject 5637 andb $0xf,rINSTbl # rINST <- A 5638 .if 0 5639 movq (%rcx,%rax,1), %rax 5640 SET_WIDE_VREG %rax, rINSTq # fp[A] <- value 5641 .else 5642 movl (%rcx,%rax,1), %eax 5643 SET_VREG %eax, rINSTq # fp[A] <- value 5644 .endif 5645 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5646 5647 /* ------------------------------ */ 5648 .balign 128 5649 .L_op_iget_wide_quick: /* 0xe4 */ 5650 /* File: x86_64/op_iget_wide_quick.S */ 5651 /* File: x86_64/op_iget_quick.S */ 5652 /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick, iget-wide-quick */ 5653 /* op vA, vB, offset@CCCC */ 5654 movl rINST, %ecx # rcx <- BA 5655 sarl $4, %ecx # ecx <- B 5656 GET_VREG %ecx, %rcx # vB (object we're operating on) 5657 movzwq 2(rPC), %rax # eax <- field byte offset 5658 testl %ecx, %ecx # is object null? 5659 je common_errNullObject 5660 andb $0xf,rINSTbl # rINST <- A 5661 .if 1 5662 movq (%rcx,%rax,1), %rax 5663 SET_WIDE_VREG %rax, rINSTq # fp[A] <- value 5664 .else 5665 movswl (%rcx,%rax,1), %eax 5666 SET_VREG %eax, rINSTq # fp[A] <- value 5667 .endif 5668 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5669 5670 5671 /* ------------------------------ */ 5672 .balign 128 5673 .L_op_iget_object_quick: /* 0xe5 */ 5674 /* File: x86_64/op_iget_object_quick.S */ 5675 /* For: iget-object-quick */ 5676 /* op vA, vB, offset@CCCC */ 5677 .extern artIGetObjectFromMterp 5678 movzbq rINSTbl, %rcx # rcx <- BA 5679 sarl $4, %ecx # ecx <- B 5680 GET_VREG OUT_32_ARG0, %rcx # vB (object we're operating on) 5681 movzwl 2(rPC), OUT_32_ARG1 # eax <- field byte offset 5682 EXPORT_PC 5683 callq SYMBOL(artIGetObjectFromMterp) # (obj, offset) 5684 movq rSELF, %rcx 5685 cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) 5686 jnz MterpException # bail out 5687 andb $0xf, rINSTbl # rINST <- A 5688 SET_VREG_OBJECT %eax, rINSTq # fp[A] <- value 5689 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5690 5691 /* ------------------------------ */ 5692 .balign 128 5693 .L_op_iput_quick: /* 0xe6 */ 5694 /* File: x86_64/op_iput_quick.S */ 5695 /* For: iput-quick, iput-object-quick */ 5696 /* op vA, vB, offset@CCCC */ 5697 movzbq rINSTbl, %rcx # rcx <- BA 5698 sarl $4, %ecx # ecx <- B 5699 GET_VREG %ecx, %rcx # vB (object we're operating on) 5700 testl %ecx, %ecx # is object null? 5701 je common_errNullObject 5702 andb $0xf, rINSTbl # rINST <- A 5703 GET_VREG rINST, rINSTq # rINST <- v[A] 5704 movzwq 2(rPC), %rax # rax <- field byte offset 5705 movl rINST, (%rcx,%rax,1) 5706 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5707 5708 /* ------------------------------ */ 5709 .balign 128 5710 .L_op_iput_wide_quick: /* 0xe7 */ 5711 /* File: x86_64/op_iput_wide_quick.S */ 5712 /* iput-wide-quick vA, vB, offset@CCCC */ 5713 movzbq rINSTbl, %rcx # rcx<- BA 5714 sarl $4, %ecx # ecx<- B 5715 GET_VREG %ecx, %rcx # vB (object we're operating on) 5716 testl %ecx, %ecx # is object null? 5717 je common_errNullObject 5718 movzwq 2(rPC), %rax # rax<- field byte offset 5719 leaq (%rcx,%rax,1), %rcx # ecx<- Address of 64-bit target 5720 andb $0xf, rINSTbl # rINST<- A 5721 GET_WIDE_VREG %rax, rINSTq # rax<- fp[A]/fp[A+1] 5722 movq %rax, (%rcx) # obj.field<- r0/r1 5723 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5724 5725 /* ------------------------------ */ 5726 .balign 128 5727 .L_op_iput_object_quick: /* 0xe8 */ 5728 /* File: x86_64/op_iput_object_quick.S */ 5729 EXPORT_PC 5730 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG0 5731 movq rPC, OUT_ARG1 5732 REFRESH_INST 232 5733 movl rINST, OUT_32_ARG2 5734 call SYMBOL(MterpIputObjectQuick) 5735 testb %al, %al 5736 jz MterpException 5737 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5738 5739 /* ------------------------------ */ 5740 .balign 128 5741 .L_op_invoke_virtual_quick: /* 0xe9 */ 5742 /* File: x86_64/op_invoke_virtual_quick.S */ 5743 /* File: x86_64/invoke.S */ 5744 /* 5745 * Generic invoke handler wrapper. 5746 */ 5747 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 5748 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 5749 .extern MterpInvokeVirtualQuick 5750 EXPORT_PC 5751 movq rSELF, OUT_ARG0 5752 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 5753 movq rPC, OUT_ARG2 5754 REFRESH_INST 233 5755 movl rINST, OUT_32_ARG3 5756 call SYMBOL(MterpInvokeVirtualQuick) 5757 testb %al, %al 5758 jz MterpException 5759 ADVANCE_PC 3 5760 call SYMBOL(MterpShouldSwitchInterpreters) 5761 testb %al, %al 5762 jnz MterpFallback 5763 FETCH_INST 5764 GOTO_NEXT 5765 5766 5767 /* ------------------------------ */ 5768 .balign 128 5769 .L_op_invoke_virtual_range_quick: /* 0xea */ 5770 /* File: x86_64/op_invoke_virtual_range_quick.S */ 5771 /* File: x86_64/invoke.S */ 5772 /* 5773 * Generic invoke handler wrapper. 5774 */ 5775 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 5776 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 5777 .extern MterpInvokeVirtualQuickRange 5778 EXPORT_PC 5779 movq rSELF, OUT_ARG0 5780 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 5781 movq rPC, OUT_ARG2 5782 REFRESH_INST 234 5783 movl rINST, OUT_32_ARG3 5784 call SYMBOL(MterpInvokeVirtualQuickRange) 5785 testb %al, %al 5786 jz MterpException 5787 ADVANCE_PC 3 5788 call SYMBOL(MterpShouldSwitchInterpreters) 5789 testb %al, %al 5790 jnz MterpFallback 5791 FETCH_INST 5792 GOTO_NEXT 5793 5794 5795 /* ------------------------------ */ 5796 .balign 128 5797 .L_op_iput_boolean_quick: /* 0xeb */ 5798 /* File: x86_64/op_iput_boolean_quick.S */ 5799 /* File: x86_64/op_iput_quick.S */ 5800 /* For: iput-quick, iput-object-quick */ 5801 /* op vA, vB, offset@CCCC */ 5802 movzbq rINSTbl, %rcx # rcx <- BA 5803 sarl $4, %ecx # ecx <- B 5804 GET_VREG %ecx, %rcx # vB (object we're operating on) 5805 testl %ecx, %ecx # is object null? 5806 je common_errNullObject 5807 andb $0xf, rINSTbl # rINST <- A 5808 GET_VREG rINST, rINSTq # rINST <- v[A] 5809 movzwq 2(rPC), %rax # rax <- field byte offset 5810 movb rINSTbl, (%rcx,%rax,1) 5811 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5812 5813 5814 /* ------------------------------ */ 5815 .balign 128 5816 .L_op_iput_byte_quick: /* 0xec */ 5817 /* File: x86_64/op_iput_byte_quick.S */ 5818 /* File: x86_64/op_iput_quick.S */ 5819 /* For: iput-quick, iput-object-quick */ 5820 /* op vA, vB, offset@CCCC */ 5821 movzbq rINSTbl, %rcx # rcx <- BA 5822 sarl $4, %ecx # ecx <- B 5823 GET_VREG %ecx, %rcx # vB (object we're operating on) 5824 testl %ecx, %ecx # is object null? 5825 je common_errNullObject 5826 andb $0xf, rINSTbl # rINST <- A 5827 GET_VREG rINST, rINSTq # rINST <- v[A] 5828 movzwq 2(rPC), %rax # rax <- field byte offset 5829 movb rINSTbl, (%rcx,%rax,1) 5830 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5831 5832 5833 /* ------------------------------ */ 5834 .balign 128 5835 .L_op_iput_char_quick: /* 0xed */ 5836 /* File: x86_64/op_iput_char_quick.S */ 5837 /* File: x86_64/op_iput_quick.S */ 5838 /* For: iput-quick, iput-object-quick */ 5839 /* op vA, vB, offset@CCCC */ 5840 movzbq rINSTbl, %rcx # rcx <- BA 5841 sarl $4, %ecx # ecx <- B 5842 GET_VREG %ecx, %rcx # vB (object we're operating on) 5843 testl %ecx, %ecx # is object null? 5844 je common_errNullObject 5845 andb $0xf, rINSTbl # rINST <- A 5846 GET_VREG rINST, rINSTq # rINST <- v[A] 5847 movzwq 2(rPC), %rax # rax <- field byte offset 5848 movw rINSTw, (%rcx,%rax,1) 5849 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5850 5851 5852 /* ------------------------------ */ 5853 .balign 128 5854 .L_op_iput_short_quick: /* 0xee */ 5855 /* File: x86_64/op_iput_short_quick.S */ 5856 /* File: x86_64/op_iput_quick.S */ 5857 /* For: iput-quick, iput-object-quick */ 5858 /* op vA, vB, offset@CCCC */ 5859 movzbq rINSTbl, %rcx # rcx <- BA 5860 sarl $4, %ecx # ecx <- B 5861 GET_VREG %ecx, %rcx # vB (object we're operating on) 5862 testl %ecx, %ecx # is object null? 5863 je common_errNullObject 5864 andb $0xf, rINSTbl # rINST <- A 5865 GET_VREG rINST, rINSTq # rINST <- v[A] 5866 movzwq 2(rPC), %rax # rax <- field byte offset 5867 movw rINSTw, (%rcx,%rax,1) 5868 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5869 5870 5871 /* ------------------------------ */ 5872 .balign 128 5873 .L_op_iget_boolean_quick: /* 0xef */ 5874 /* File: x86_64/op_iget_boolean_quick.S */ 5875 /* File: x86_64/op_iget_quick.S */ 5876 /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick, iget-wide-quick */ 5877 /* op vA, vB, offset@CCCC */ 5878 movl rINST, %ecx # rcx <- BA 5879 sarl $4, %ecx # ecx <- B 5880 GET_VREG %ecx, %rcx # vB (object we're operating on) 5881 movzwq 2(rPC), %rax # eax <- field byte offset 5882 testl %ecx, %ecx # is object null? 5883 je common_errNullObject 5884 andb $0xf,rINSTbl # rINST <- A 5885 .if 0 5886 movq (%rcx,%rax,1), %rax 5887 SET_WIDE_VREG %rax, rINSTq # fp[A] <- value 5888 .else 5889 movsbl (%rcx,%rax,1), %eax 5890 SET_VREG %eax, rINSTq # fp[A] <- value 5891 .endif 5892 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5893 5894 5895 /* ------------------------------ */ 5896 .balign 128 5897 .L_op_iget_byte_quick: /* 0xf0 */ 5898 /* File: x86_64/op_iget_byte_quick.S */ 5899 /* File: x86_64/op_iget_quick.S */ 5900 /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick, iget-wide-quick */ 5901 /* op vA, vB, offset@CCCC */ 5902 movl rINST, %ecx # rcx <- BA 5903 sarl $4, %ecx # ecx <- B 5904 GET_VREG %ecx, %rcx # vB (object we're operating on) 5905 movzwq 2(rPC), %rax # eax <- field byte offset 5906 testl %ecx, %ecx # is object null? 5907 je common_errNullObject 5908 andb $0xf,rINSTbl # rINST <- A 5909 .if 0 5910 movq (%rcx,%rax,1), %rax 5911 SET_WIDE_VREG %rax, rINSTq # fp[A] <- value 5912 .else 5913 movsbl (%rcx,%rax,1), %eax 5914 SET_VREG %eax, rINSTq # fp[A] <- value 5915 .endif 5916 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5917 5918 5919 /* ------------------------------ */ 5920 .balign 128 5921 .L_op_iget_char_quick: /* 0xf1 */ 5922 /* File: x86_64/op_iget_char_quick.S */ 5923 /* File: x86_64/op_iget_quick.S */ 5924 /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick, iget-wide-quick */ 5925 /* op vA, vB, offset@CCCC */ 5926 movl rINST, %ecx # rcx <- BA 5927 sarl $4, %ecx # ecx <- B 5928 GET_VREG %ecx, %rcx # vB (object we're operating on) 5929 movzwq 2(rPC), %rax # eax <- field byte offset 5930 testl %ecx, %ecx # is object null? 5931 je common_errNullObject 5932 andb $0xf,rINSTbl # rINST <- A 5933 .if 0 5934 movq (%rcx,%rax,1), %rax 5935 SET_WIDE_VREG %rax, rINSTq # fp[A] <- value 5936 .else 5937 movzwl (%rcx,%rax,1), %eax 5938 SET_VREG %eax, rINSTq # fp[A] <- value 5939 .endif 5940 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5941 5942 5943 /* ------------------------------ */ 5944 .balign 128 5945 .L_op_iget_short_quick: /* 0xf2 */ 5946 /* File: x86_64/op_iget_short_quick.S */ 5947 /* File: x86_64/op_iget_quick.S */ 5948 /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick, iget-wide-quick */ 5949 /* op vA, vB, offset@CCCC */ 5950 movl rINST, %ecx # rcx <- BA 5951 sarl $4, %ecx # ecx <- B 5952 GET_VREG %ecx, %rcx # vB (object we're operating on) 5953 movzwq 2(rPC), %rax # eax <- field byte offset 5954 testl %ecx, %ecx # is object null? 5955 je common_errNullObject 5956 andb $0xf,rINSTbl # rINST <- A 5957 .if 0 5958 movq (%rcx,%rax,1), %rax 5959 SET_WIDE_VREG %rax, rINSTq # fp[A] <- value 5960 .else 5961 movswl (%rcx,%rax,1), %eax 5962 SET_VREG %eax, rINSTq # fp[A] <- value 5963 .endif 5964 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5965 5966 5967 /* ------------------------------ */ 5968 .balign 128 5969 .L_op_unused_f3: /* 0xf3 */ 5970 /* File: x86_64/op_unused_f3.S */ 5971 /* File: x86_64/unused.S */ 5972 /* 5973 * Bail to reference interpreter to throw. 5974 */ 5975 jmp MterpFallback 5976 5977 5978 /* ------------------------------ */ 5979 .balign 128 5980 .L_op_unused_f4: /* 0xf4 */ 5981 /* File: x86_64/op_unused_f4.S */ 5982 /* File: x86_64/unused.S */ 5983 /* 5984 * Bail to reference interpreter to throw. 5985 */ 5986 jmp MterpFallback 5987 5988 5989 /* ------------------------------ */ 5990 .balign 128 5991 .L_op_unused_f5: /* 0xf5 */ 5992 /* File: x86_64/op_unused_f5.S */ 5993 /* File: x86_64/unused.S */ 5994 /* 5995 * Bail to reference interpreter to throw. 5996 */ 5997 jmp MterpFallback 5998 5999 6000 /* ------------------------------ */ 6001 .balign 128 6002 .L_op_unused_f6: /* 0xf6 */ 6003 /* File: x86_64/op_unused_f6.S */ 6004 /* File: x86_64/unused.S */ 6005 /* 6006 * Bail to reference interpreter to throw. 6007 */ 6008 jmp MterpFallback 6009 6010 6011 /* ------------------------------ */ 6012 .balign 128 6013 .L_op_unused_f7: /* 0xf7 */ 6014 /* File: x86_64/op_unused_f7.S */ 6015 /* File: x86_64/unused.S */ 6016 /* 6017 * Bail to reference interpreter to throw. 6018 */ 6019 jmp MterpFallback 6020 6021 6022 /* ------------------------------ */ 6023 .balign 128 6024 .L_op_unused_f8: /* 0xf8 */ 6025 /* File: x86_64/op_unused_f8.S */ 6026 /* File: x86_64/unused.S */ 6027 /* 6028 * Bail to reference interpreter to throw. 6029 */ 6030 jmp MterpFallback 6031 6032 6033 /* ------------------------------ */ 6034 .balign 128 6035 .L_op_unused_f9: /* 0xf9 */ 6036 /* File: x86_64/op_unused_f9.S */ 6037 /* File: x86_64/unused.S */ 6038 /* 6039 * Bail to reference interpreter to throw. 6040 */ 6041 jmp MterpFallback 6042 6043 6044 /* ------------------------------ */ 6045 .balign 128 6046 .L_op_invoke_polymorphic: /* 0xfa */ 6047 /* Transfer stub to alternate interpreter */ 6048 jmp MterpFallback 6049 6050 6051 /* ------------------------------ */ 6052 .balign 128 6053 .L_op_invoke_polymorphic_range: /* 0xfb */ 6054 /* Transfer stub to alternate interpreter */ 6055 jmp MterpFallback 6056 6057 6058 /* ------------------------------ */ 6059 .balign 128 6060 .L_op_invoke_custom: /* 0xfc */ 6061 /* Transfer stub to alternate interpreter */ 6062 jmp MterpFallback 6063 6064 6065 /* ------------------------------ */ 6066 .balign 128 6067 .L_op_invoke_custom_range: /* 0xfd */ 6068 /* Transfer stub to alternate interpreter */ 6069 jmp MterpFallback 6070 6071 6072 /* ------------------------------ */ 6073 .balign 128 6074 .L_op_unused_fe: /* 0xfe */ 6075 /* File: x86_64/op_unused_fe.S */ 6076 /* File: x86_64/unused.S */ 6077 /* 6078 * Bail to reference interpreter to throw. 6079 */ 6080 jmp MterpFallback 6081 6082 6083 /* ------------------------------ */ 6084 .balign 128 6085 .L_op_unused_ff: /* 0xff */ 6086 /* File: x86_64/op_unused_ff.S */ 6087 /* File: x86_64/unused.S */ 6088 /* 6089 * Bail to reference interpreter to throw. 6090 */ 6091 jmp MterpFallback 6092 6093 6094 .balign 128 6095 SIZE(SYMBOL(artMterpAsmInstructionStart),SYMBOL(artMterpAsmInstructionStart)) 6096 .global SYMBOL(artMterpAsmInstructionEnd) 6097 SYMBOL(artMterpAsmInstructionEnd): 6098 6099 /* 6100 * =========================================================================== 6101 * Sister implementations 6102 * =========================================================================== 6103 */ 6104 .global SYMBOL(artMterpAsmSisterStart) 6105 FUNCTION_TYPE(SYMBOL(artMterpAsmSisterStart)) 6106 .text 6107 .balign 4 6108 SYMBOL(artMterpAsmSisterStart): 6109 6110 SIZE(SYMBOL(artMterpAsmSisterStart),SYMBOL(artMterpAsmSisterStart)) 6111 .global SYMBOL(artMterpAsmSisterEnd) 6112 SYMBOL(artMterpAsmSisterEnd): 6113 6114 6115 .global SYMBOL(artMterpAsmAltInstructionStart) 6116 FUNCTION_TYPE(SYMBOL(artMterpAsmAltInstructionStart)) 6117 .text 6118 6119 SYMBOL(artMterpAsmAltInstructionStart) = .L_ALT_op_nop 6120 /* ------------------------------ */ 6121 .balign 128 6122 .L_ALT_op_nop: /* 0x00 */ 6123 /* File: x86_64/alt_stub.S */ 6124 /* 6125 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6126 * any interesting requests and then jump to the real instruction 6127 * handler. Unlike the Arm handler, we can't do this as a tail call 6128 * because rIBASE is caller save and we need to reload it. 6129 * 6130 * Note that unlike in the Arm implementation, we should never arrive 6131 * here with a zero breakFlag because we always refresh rIBASE on 6132 * return. 6133 */ 6134 .extern MterpCheckBefore 6135 REFRESH_IBASE 6136 movq rSELF, OUT_ARG0 6137 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6138 movq rPC, OUT_ARG2 6139 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6140 jmp .L_op_nop+(0*128) 6141 6142 /* ------------------------------ */ 6143 .balign 128 6144 .L_ALT_op_move: /* 0x01 */ 6145 /* File: x86_64/alt_stub.S */ 6146 /* 6147 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6148 * any interesting requests and then jump to the real instruction 6149 * handler. Unlike the Arm handler, we can't do this as a tail call 6150 * because rIBASE is caller save and we need to reload it. 6151 * 6152 * Note that unlike in the Arm implementation, we should never arrive 6153 * here with a zero breakFlag because we always refresh rIBASE on 6154 * return. 6155 */ 6156 .extern MterpCheckBefore 6157 REFRESH_IBASE 6158 movq rSELF, OUT_ARG0 6159 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6160 movq rPC, OUT_ARG2 6161 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6162 jmp .L_op_nop+(1*128) 6163 6164 /* ------------------------------ */ 6165 .balign 128 6166 .L_ALT_op_move_from16: /* 0x02 */ 6167 /* File: x86_64/alt_stub.S */ 6168 /* 6169 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6170 * any interesting requests and then jump to the real instruction 6171 * handler. Unlike the Arm handler, we can't do this as a tail call 6172 * because rIBASE is caller save and we need to reload it. 6173 * 6174 * Note that unlike in the Arm implementation, we should never arrive 6175 * here with a zero breakFlag because we always refresh rIBASE on 6176 * return. 6177 */ 6178 .extern MterpCheckBefore 6179 REFRESH_IBASE 6180 movq rSELF, OUT_ARG0 6181 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6182 movq rPC, OUT_ARG2 6183 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6184 jmp .L_op_nop+(2*128) 6185 6186 /* ------------------------------ */ 6187 .balign 128 6188 .L_ALT_op_move_16: /* 0x03 */ 6189 /* File: x86_64/alt_stub.S */ 6190 /* 6191 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6192 * any interesting requests and then jump to the real instruction 6193 * handler. Unlike the Arm handler, we can't do this as a tail call 6194 * because rIBASE is caller save and we need to reload it. 6195 * 6196 * Note that unlike in the Arm implementation, we should never arrive 6197 * here with a zero breakFlag because we always refresh rIBASE on 6198 * return. 6199 */ 6200 .extern MterpCheckBefore 6201 REFRESH_IBASE 6202 movq rSELF, OUT_ARG0 6203 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6204 movq rPC, OUT_ARG2 6205 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6206 jmp .L_op_nop+(3*128) 6207 6208 /* ------------------------------ */ 6209 .balign 128 6210 .L_ALT_op_move_wide: /* 0x04 */ 6211 /* File: x86_64/alt_stub.S */ 6212 /* 6213 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6214 * any interesting requests and then jump to the real instruction 6215 * handler. Unlike the Arm handler, we can't do this as a tail call 6216 * because rIBASE is caller save and we need to reload it. 6217 * 6218 * Note that unlike in the Arm implementation, we should never arrive 6219 * here with a zero breakFlag because we always refresh rIBASE on 6220 * return. 6221 */ 6222 .extern MterpCheckBefore 6223 REFRESH_IBASE 6224 movq rSELF, OUT_ARG0 6225 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6226 movq rPC, OUT_ARG2 6227 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6228 jmp .L_op_nop+(4*128) 6229 6230 /* ------------------------------ */ 6231 .balign 128 6232 .L_ALT_op_move_wide_from16: /* 0x05 */ 6233 /* File: x86_64/alt_stub.S */ 6234 /* 6235 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6236 * any interesting requests and then jump to the real instruction 6237 * handler. Unlike the Arm handler, we can't do this as a tail call 6238 * because rIBASE is caller save and we need to reload it. 6239 * 6240 * Note that unlike in the Arm implementation, we should never arrive 6241 * here with a zero breakFlag because we always refresh rIBASE on 6242 * return. 6243 */ 6244 .extern MterpCheckBefore 6245 REFRESH_IBASE 6246 movq rSELF, OUT_ARG0 6247 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6248 movq rPC, OUT_ARG2 6249 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6250 jmp .L_op_nop+(5*128) 6251 6252 /* ------------------------------ */ 6253 .balign 128 6254 .L_ALT_op_move_wide_16: /* 0x06 */ 6255 /* File: x86_64/alt_stub.S */ 6256 /* 6257 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6258 * any interesting requests and then jump to the real instruction 6259 * handler. Unlike the Arm handler, we can't do this as a tail call 6260 * because rIBASE is caller save and we need to reload it. 6261 * 6262 * Note that unlike in the Arm implementation, we should never arrive 6263 * here with a zero breakFlag because we always refresh rIBASE on 6264 * return. 6265 */ 6266 .extern MterpCheckBefore 6267 REFRESH_IBASE 6268 movq rSELF, OUT_ARG0 6269 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6270 movq rPC, OUT_ARG2 6271 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6272 jmp .L_op_nop+(6*128) 6273 6274 /* ------------------------------ */ 6275 .balign 128 6276 .L_ALT_op_move_object: /* 0x07 */ 6277 /* File: x86_64/alt_stub.S */ 6278 /* 6279 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6280 * any interesting requests and then jump to the real instruction 6281 * handler. Unlike the Arm handler, we can't do this as a tail call 6282 * because rIBASE is caller save and we need to reload it. 6283 * 6284 * Note that unlike in the Arm implementation, we should never arrive 6285 * here with a zero breakFlag because we always refresh rIBASE on 6286 * return. 6287 */ 6288 .extern MterpCheckBefore 6289 REFRESH_IBASE 6290 movq rSELF, OUT_ARG0 6291 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6292 movq rPC, OUT_ARG2 6293 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6294 jmp .L_op_nop+(7*128) 6295 6296 /* ------------------------------ */ 6297 .balign 128 6298 .L_ALT_op_move_object_from16: /* 0x08 */ 6299 /* File: x86_64/alt_stub.S */ 6300 /* 6301 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6302 * any interesting requests and then jump to the real instruction 6303 * handler. Unlike the Arm handler, we can't do this as a tail call 6304 * because rIBASE is caller save and we need to reload it. 6305 * 6306 * Note that unlike in the Arm implementation, we should never arrive 6307 * here with a zero breakFlag because we always refresh rIBASE on 6308 * return. 6309 */ 6310 .extern MterpCheckBefore 6311 REFRESH_IBASE 6312 movq rSELF, OUT_ARG0 6313 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6314 movq rPC, OUT_ARG2 6315 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6316 jmp .L_op_nop+(8*128) 6317 6318 /* ------------------------------ */ 6319 .balign 128 6320 .L_ALT_op_move_object_16: /* 0x09 */ 6321 /* File: x86_64/alt_stub.S */ 6322 /* 6323 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6324 * any interesting requests and then jump to the real instruction 6325 * handler. Unlike the Arm handler, we can't do this as a tail call 6326 * because rIBASE is caller save and we need to reload it. 6327 * 6328 * Note that unlike in the Arm implementation, we should never arrive 6329 * here with a zero breakFlag because we always refresh rIBASE on 6330 * return. 6331 */ 6332 .extern MterpCheckBefore 6333 REFRESH_IBASE 6334 movq rSELF, OUT_ARG0 6335 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6336 movq rPC, OUT_ARG2 6337 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6338 jmp .L_op_nop+(9*128) 6339 6340 /* ------------------------------ */ 6341 .balign 128 6342 .L_ALT_op_move_result: /* 0x0a */ 6343 /* File: x86_64/alt_stub.S */ 6344 /* 6345 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6346 * any interesting requests and then jump to the real instruction 6347 * handler. Unlike the Arm handler, we can't do this as a tail call 6348 * because rIBASE is caller save and we need to reload it. 6349 * 6350 * Note that unlike in the Arm implementation, we should never arrive 6351 * here with a zero breakFlag because we always refresh rIBASE on 6352 * return. 6353 */ 6354 .extern MterpCheckBefore 6355 REFRESH_IBASE 6356 movq rSELF, OUT_ARG0 6357 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6358 movq rPC, OUT_ARG2 6359 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6360 jmp .L_op_nop+(10*128) 6361 6362 /* ------------------------------ */ 6363 .balign 128 6364 .L_ALT_op_move_result_wide: /* 0x0b */ 6365 /* File: x86_64/alt_stub.S */ 6366 /* 6367 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6368 * any interesting requests and then jump to the real instruction 6369 * handler. Unlike the Arm handler, we can't do this as a tail call 6370 * because rIBASE is caller save and we need to reload it. 6371 * 6372 * Note that unlike in the Arm implementation, we should never arrive 6373 * here with a zero breakFlag because we always refresh rIBASE on 6374 * return. 6375 */ 6376 .extern MterpCheckBefore 6377 REFRESH_IBASE 6378 movq rSELF, OUT_ARG0 6379 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6380 movq rPC, OUT_ARG2 6381 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6382 jmp .L_op_nop+(11*128) 6383 6384 /* ------------------------------ */ 6385 .balign 128 6386 .L_ALT_op_move_result_object: /* 0x0c */ 6387 /* File: x86_64/alt_stub.S */ 6388 /* 6389 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6390 * any interesting requests and then jump to the real instruction 6391 * handler. Unlike the Arm handler, we can't do this as a tail call 6392 * because rIBASE is caller save and we need to reload it. 6393 * 6394 * Note that unlike in the Arm implementation, we should never arrive 6395 * here with a zero breakFlag because we always refresh rIBASE on 6396 * return. 6397 */ 6398 .extern MterpCheckBefore 6399 REFRESH_IBASE 6400 movq rSELF, OUT_ARG0 6401 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6402 movq rPC, OUT_ARG2 6403 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6404 jmp .L_op_nop+(12*128) 6405 6406 /* ------------------------------ */ 6407 .balign 128 6408 .L_ALT_op_move_exception: /* 0x0d */ 6409 /* File: x86_64/alt_stub.S */ 6410 /* 6411 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6412 * any interesting requests and then jump to the real instruction 6413 * handler. Unlike the Arm handler, we can't do this as a tail call 6414 * because rIBASE is caller save and we need to reload it. 6415 * 6416 * Note that unlike in the Arm implementation, we should never arrive 6417 * here with a zero breakFlag because we always refresh rIBASE on 6418 * return. 6419 */ 6420 .extern MterpCheckBefore 6421 REFRESH_IBASE 6422 movq rSELF, OUT_ARG0 6423 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6424 movq rPC, OUT_ARG2 6425 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6426 jmp .L_op_nop+(13*128) 6427 6428 /* ------------------------------ */ 6429 .balign 128 6430 .L_ALT_op_return_void: /* 0x0e */ 6431 /* File: x86_64/alt_stub.S */ 6432 /* 6433 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6434 * any interesting requests and then jump to the real instruction 6435 * handler. Unlike the Arm handler, we can't do this as a tail call 6436 * because rIBASE is caller save and we need to reload it. 6437 * 6438 * Note that unlike in the Arm implementation, we should never arrive 6439 * here with a zero breakFlag because we always refresh rIBASE on 6440 * return. 6441 */ 6442 .extern MterpCheckBefore 6443 REFRESH_IBASE 6444 movq rSELF, OUT_ARG0 6445 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6446 movq rPC, OUT_ARG2 6447 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6448 jmp .L_op_nop+(14*128) 6449 6450 /* ------------------------------ */ 6451 .balign 128 6452 .L_ALT_op_return: /* 0x0f */ 6453 /* File: x86_64/alt_stub.S */ 6454 /* 6455 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6456 * any interesting requests and then jump to the real instruction 6457 * handler. Unlike the Arm handler, we can't do this as a tail call 6458 * because rIBASE is caller save and we need to reload it. 6459 * 6460 * Note that unlike in the Arm implementation, we should never arrive 6461 * here with a zero breakFlag because we always refresh rIBASE on 6462 * return. 6463 */ 6464 .extern MterpCheckBefore 6465 REFRESH_IBASE 6466 movq rSELF, OUT_ARG0 6467 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6468 movq rPC, OUT_ARG2 6469 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6470 jmp .L_op_nop+(15*128) 6471 6472 /* ------------------------------ */ 6473 .balign 128 6474 .L_ALT_op_return_wide: /* 0x10 */ 6475 /* File: x86_64/alt_stub.S */ 6476 /* 6477 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6478 * any interesting requests and then jump to the real instruction 6479 * handler. Unlike the Arm handler, we can't do this as a tail call 6480 * because rIBASE is caller save and we need to reload it. 6481 * 6482 * Note that unlike in the Arm implementation, we should never arrive 6483 * here with a zero breakFlag because we always refresh rIBASE on 6484 * return. 6485 */ 6486 .extern MterpCheckBefore 6487 REFRESH_IBASE 6488 movq rSELF, OUT_ARG0 6489 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6490 movq rPC, OUT_ARG2 6491 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6492 jmp .L_op_nop+(16*128) 6493 6494 /* ------------------------------ */ 6495 .balign 128 6496 .L_ALT_op_return_object: /* 0x11 */ 6497 /* File: x86_64/alt_stub.S */ 6498 /* 6499 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6500 * any interesting requests and then jump to the real instruction 6501 * handler. Unlike the Arm handler, we can't do this as a tail call 6502 * because rIBASE is caller save and we need to reload it. 6503 * 6504 * Note that unlike in the Arm implementation, we should never arrive 6505 * here with a zero breakFlag because we always refresh rIBASE on 6506 * return. 6507 */ 6508 .extern MterpCheckBefore 6509 REFRESH_IBASE 6510 movq rSELF, OUT_ARG0 6511 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6512 movq rPC, OUT_ARG2 6513 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6514 jmp .L_op_nop+(17*128) 6515 6516 /* ------------------------------ */ 6517 .balign 128 6518 .L_ALT_op_const_4: /* 0x12 */ 6519 /* File: x86_64/alt_stub.S */ 6520 /* 6521 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6522 * any interesting requests and then jump to the real instruction 6523 * handler. Unlike the Arm handler, we can't do this as a tail call 6524 * because rIBASE is caller save and we need to reload it. 6525 * 6526 * Note that unlike in the Arm implementation, we should never arrive 6527 * here with a zero breakFlag because we always refresh rIBASE on 6528 * return. 6529 */ 6530 .extern MterpCheckBefore 6531 REFRESH_IBASE 6532 movq rSELF, OUT_ARG0 6533 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6534 movq rPC, OUT_ARG2 6535 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6536 jmp .L_op_nop+(18*128) 6537 6538 /* ------------------------------ */ 6539 .balign 128 6540 .L_ALT_op_const_16: /* 0x13 */ 6541 /* File: x86_64/alt_stub.S */ 6542 /* 6543 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6544 * any interesting requests and then jump to the real instruction 6545 * handler. Unlike the Arm handler, we can't do this as a tail call 6546 * because rIBASE is caller save and we need to reload it. 6547 * 6548 * Note that unlike in the Arm implementation, we should never arrive 6549 * here with a zero breakFlag because we always refresh rIBASE on 6550 * return. 6551 */ 6552 .extern MterpCheckBefore 6553 REFRESH_IBASE 6554 movq rSELF, OUT_ARG0 6555 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6556 movq rPC, OUT_ARG2 6557 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6558 jmp .L_op_nop+(19*128) 6559 6560 /* ------------------------------ */ 6561 .balign 128 6562 .L_ALT_op_const: /* 0x14 */ 6563 /* File: x86_64/alt_stub.S */ 6564 /* 6565 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6566 * any interesting requests and then jump to the real instruction 6567 * handler. Unlike the Arm handler, we can't do this as a tail call 6568 * because rIBASE is caller save and we need to reload it. 6569 * 6570 * Note that unlike in the Arm implementation, we should never arrive 6571 * here with a zero breakFlag because we always refresh rIBASE on 6572 * return. 6573 */ 6574 .extern MterpCheckBefore 6575 REFRESH_IBASE 6576 movq rSELF, OUT_ARG0 6577 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6578 movq rPC, OUT_ARG2 6579 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6580 jmp .L_op_nop+(20*128) 6581 6582 /* ------------------------------ */ 6583 .balign 128 6584 .L_ALT_op_const_high16: /* 0x15 */ 6585 /* File: x86_64/alt_stub.S */ 6586 /* 6587 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6588 * any interesting requests and then jump to the real instruction 6589 * handler. Unlike the Arm handler, we can't do this as a tail call 6590 * because rIBASE is caller save and we need to reload it. 6591 * 6592 * Note that unlike in the Arm implementation, we should never arrive 6593 * here with a zero breakFlag because we always refresh rIBASE on 6594 * return. 6595 */ 6596 .extern MterpCheckBefore 6597 REFRESH_IBASE 6598 movq rSELF, OUT_ARG0 6599 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6600 movq rPC, OUT_ARG2 6601 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6602 jmp .L_op_nop+(21*128) 6603 6604 /* ------------------------------ */ 6605 .balign 128 6606 .L_ALT_op_const_wide_16: /* 0x16 */ 6607 /* File: x86_64/alt_stub.S */ 6608 /* 6609 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6610 * any interesting requests and then jump to the real instruction 6611 * handler. Unlike the Arm handler, we can't do this as a tail call 6612 * because rIBASE is caller save and we need to reload it. 6613 * 6614 * Note that unlike in the Arm implementation, we should never arrive 6615 * here with a zero breakFlag because we always refresh rIBASE on 6616 * return. 6617 */ 6618 .extern MterpCheckBefore 6619 REFRESH_IBASE 6620 movq rSELF, OUT_ARG0 6621 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6622 movq rPC, OUT_ARG2 6623 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6624 jmp .L_op_nop+(22*128) 6625 6626 /* ------------------------------ */ 6627 .balign 128 6628 .L_ALT_op_const_wide_32: /* 0x17 */ 6629 /* File: x86_64/alt_stub.S */ 6630 /* 6631 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6632 * any interesting requests and then jump to the real instruction 6633 * handler. Unlike the Arm handler, we can't do this as a tail call 6634 * because rIBASE is caller save and we need to reload it. 6635 * 6636 * Note that unlike in the Arm implementation, we should never arrive 6637 * here with a zero breakFlag because we always refresh rIBASE on 6638 * return. 6639 */ 6640 .extern MterpCheckBefore 6641 REFRESH_IBASE 6642 movq rSELF, OUT_ARG0 6643 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6644 movq rPC, OUT_ARG2 6645 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6646 jmp .L_op_nop+(23*128) 6647 6648 /* ------------------------------ */ 6649 .balign 128 6650 .L_ALT_op_const_wide: /* 0x18 */ 6651 /* File: x86_64/alt_stub.S */ 6652 /* 6653 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6654 * any interesting requests and then jump to the real instruction 6655 * handler. Unlike the Arm handler, we can't do this as a tail call 6656 * because rIBASE is caller save and we need to reload it. 6657 * 6658 * Note that unlike in the Arm implementation, we should never arrive 6659 * here with a zero breakFlag because we always refresh rIBASE on 6660 * return. 6661 */ 6662 .extern MterpCheckBefore 6663 REFRESH_IBASE 6664 movq rSELF, OUT_ARG0 6665 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6666 movq rPC, OUT_ARG2 6667 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6668 jmp .L_op_nop+(24*128) 6669 6670 /* ------------------------------ */ 6671 .balign 128 6672 .L_ALT_op_const_wide_high16: /* 0x19 */ 6673 /* File: x86_64/alt_stub.S */ 6674 /* 6675 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6676 * any interesting requests and then jump to the real instruction 6677 * handler. Unlike the Arm handler, we can't do this as a tail call 6678 * because rIBASE is caller save and we need to reload it. 6679 * 6680 * Note that unlike in the Arm implementation, we should never arrive 6681 * here with a zero breakFlag because we always refresh rIBASE on 6682 * return. 6683 */ 6684 .extern MterpCheckBefore 6685 REFRESH_IBASE 6686 movq rSELF, OUT_ARG0 6687 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6688 movq rPC, OUT_ARG2 6689 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6690 jmp .L_op_nop+(25*128) 6691 6692 /* ------------------------------ */ 6693 .balign 128 6694 .L_ALT_op_const_string: /* 0x1a */ 6695 /* File: x86_64/alt_stub.S */ 6696 /* 6697 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6698 * any interesting requests and then jump to the real instruction 6699 * handler. Unlike the Arm handler, we can't do this as a tail call 6700 * because rIBASE is caller save and we need to reload it. 6701 * 6702 * Note that unlike in the Arm implementation, we should never arrive 6703 * here with a zero breakFlag because we always refresh rIBASE on 6704 * return. 6705 */ 6706 .extern MterpCheckBefore 6707 REFRESH_IBASE 6708 movq rSELF, OUT_ARG0 6709 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6710 movq rPC, OUT_ARG2 6711 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6712 jmp .L_op_nop+(26*128) 6713 6714 /* ------------------------------ */ 6715 .balign 128 6716 .L_ALT_op_const_string_jumbo: /* 0x1b */ 6717 /* File: x86_64/alt_stub.S */ 6718 /* 6719 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6720 * any interesting requests and then jump to the real instruction 6721 * handler. Unlike the Arm handler, we can't do this as a tail call 6722 * because rIBASE is caller save and we need to reload it. 6723 * 6724 * Note that unlike in the Arm implementation, we should never arrive 6725 * here with a zero breakFlag because we always refresh rIBASE on 6726 * return. 6727 */ 6728 .extern MterpCheckBefore 6729 REFRESH_IBASE 6730 movq rSELF, OUT_ARG0 6731 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6732 movq rPC, OUT_ARG2 6733 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6734 jmp .L_op_nop+(27*128) 6735 6736 /* ------------------------------ */ 6737 .balign 128 6738 .L_ALT_op_const_class: /* 0x1c */ 6739 /* File: x86_64/alt_stub.S */ 6740 /* 6741 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6742 * any interesting requests and then jump to the real instruction 6743 * handler. Unlike the Arm handler, we can't do this as a tail call 6744 * because rIBASE is caller save and we need to reload it. 6745 * 6746 * Note that unlike in the Arm implementation, we should never arrive 6747 * here with a zero breakFlag because we always refresh rIBASE on 6748 * return. 6749 */ 6750 .extern MterpCheckBefore 6751 REFRESH_IBASE 6752 movq rSELF, OUT_ARG0 6753 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6754 movq rPC, OUT_ARG2 6755 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6756 jmp .L_op_nop+(28*128) 6757 6758 /* ------------------------------ */ 6759 .balign 128 6760 .L_ALT_op_monitor_enter: /* 0x1d */ 6761 /* File: x86_64/alt_stub.S */ 6762 /* 6763 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6764 * any interesting requests and then jump to the real instruction 6765 * handler. Unlike the Arm handler, we can't do this as a tail call 6766 * because rIBASE is caller save and we need to reload it. 6767 * 6768 * Note that unlike in the Arm implementation, we should never arrive 6769 * here with a zero breakFlag because we always refresh rIBASE on 6770 * return. 6771 */ 6772 .extern MterpCheckBefore 6773 REFRESH_IBASE 6774 movq rSELF, OUT_ARG0 6775 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6776 movq rPC, OUT_ARG2 6777 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6778 jmp .L_op_nop+(29*128) 6779 6780 /* ------------------------------ */ 6781 .balign 128 6782 .L_ALT_op_monitor_exit: /* 0x1e */ 6783 /* File: x86_64/alt_stub.S */ 6784 /* 6785 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6786 * any interesting requests and then jump to the real instruction 6787 * handler. Unlike the Arm handler, we can't do this as a tail call 6788 * because rIBASE is caller save and we need to reload it. 6789 * 6790 * Note that unlike in the Arm implementation, we should never arrive 6791 * here with a zero breakFlag because we always refresh rIBASE on 6792 * return. 6793 */ 6794 .extern MterpCheckBefore 6795 REFRESH_IBASE 6796 movq rSELF, OUT_ARG0 6797 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6798 movq rPC, OUT_ARG2 6799 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6800 jmp .L_op_nop+(30*128) 6801 6802 /* ------------------------------ */ 6803 .balign 128 6804 .L_ALT_op_check_cast: /* 0x1f */ 6805 /* File: x86_64/alt_stub.S */ 6806 /* 6807 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6808 * any interesting requests and then jump to the real instruction 6809 * handler. Unlike the Arm handler, we can't do this as a tail call 6810 * because rIBASE is caller save and we need to reload it. 6811 * 6812 * Note that unlike in the Arm implementation, we should never arrive 6813 * here with a zero breakFlag because we always refresh rIBASE on 6814 * return. 6815 */ 6816 .extern MterpCheckBefore 6817 REFRESH_IBASE 6818 movq rSELF, OUT_ARG0 6819 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6820 movq rPC, OUT_ARG2 6821 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6822 jmp .L_op_nop+(31*128) 6823 6824 /* ------------------------------ */ 6825 .balign 128 6826 .L_ALT_op_instance_of: /* 0x20 */ 6827 /* File: x86_64/alt_stub.S */ 6828 /* 6829 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6830 * any interesting requests and then jump to the real instruction 6831 * handler. Unlike the Arm handler, we can't do this as a tail call 6832 * because rIBASE is caller save and we need to reload it. 6833 * 6834 * Note that unlike in the Arm implementation, we should never arrive 6835 * here with a zero breakFlag because we always refresh rIBASE on 6836 * return. 6837 */ 6838 .extern MterpCheckBefore 6839 REFRESH_IBASE 6840 movq rSELF, OUT_ARG0 6841 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6842 movq rPC, OUT_ARG2 6843 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6844 jmp .L_op_nop+(32*128) 6845 6846 /* ------------------------------ */ 6847 .balign 128 6848 .L_ALT_op_array_length: /* 0x21 */ 6849 /* File: x86_64/alt_stub.S */ 6850 /* 6851 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6852 * any interesting requests and then jump to the real instruction 6853 * handler. Unlike the Arm handler, we can't do this as a tail call 6854 * because rIBASE is caller save and we need to reload it. 6855 * 6856 * Note that unlike in the Arm implementation, we should never arrive 6857 * here with a zero breakFlag because we always refresh rIBASE on 6858 * return. 6859 */ 6860 .extern MterpCheckBefore 6861 REFRESH_IBASE 6862 movq rSELF, OUT_ARG0 6863 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6864 movq rPC, OUT_ARG2 6865 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6866 jmp .L_op_nop+(33*128) 6867 6868 /* ------------------------------ */ 6869 .balign 128 6870 .L_ALT_op_new_instance: /* 0x22 */ 6871 /* File: x86_64/alt_stub.S */ 6872 /* 6873 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6874 * any interesting requests and then jump to the real instruction 6875 * handler. Unlike the Arm handler, we can't do this as a tail call 6876 * because rIBASE is caller save and we need to reload it. 6877 * 6878 * Note that unlike in the Arm implementation, we should never arrive 6879 * here with a zero breakFlag because we always refresh rIBASE on 6880 * return. 6881 */ 6882 .extern MterpCheckBefore 6883 REFRESH_IBASE 6884 movq rSELF, OUT_ARG0 6885 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6886 movq rPC, OUT_ARG2 6887 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6888 jmp .L_op_nop+(34*128) 6889 6890 /* ------------------------------ */ 6891 .balign 128 6892 .L_ALT_op_new_array: /* 0x23 */ 6893 /* File: x86_64/alt_stub.S */ 6894 /* 6895 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6896 * any interesting requests and then jump to the real instruction 6897 * handler. Unlike the Arm handler, we can't do this as a tail call 6898 * because rIBASE is caller save and we need to reload it. 6899 * 6900 * Note that unlike in the Arm implementation, we should never arrive 6901 * here with a zero breakFlag because we always refresh rIBASE on 6902 * return. 6903 */ 6904 .extern MterpCheckBefore 6905 REFRESH_IBASE 6906 movq rSELF, OUT_ARG0 6907 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6908 movq rPC, OUT_ARG2 6909 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6910 jmp .L_op_nop+(35*128) 6911 6912 /* ------------------------------ */ 6913 .balign 128 6914 .L_ALT_op_filled_new_array: /* 0x24 */ 6915 /* File: x86_64/alt_stub.S */ 6916 /* 6917 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6918 * any interesting requests and then jump to the real instruction 6919 * handler. Unlike the Arm handler, we can't do this as a tail call 6920 * because rIBASE is caller save and we need to reload it. 6921 * 6922 * Note that unlike in the Arm implementation, we should never arrive 6923 * here with a zero breakFlag because we always refresh rIBASE on 6924 * return. 6925 */ 6926 .extern MterpCheckBefore 6927 REFRESH_IBASE 6928 movq rSELF, OUT_ARG0 6929 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6930 movq rPC, OUT_ARG2 6931 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6932 jmp .L_op_nop+(36*128) 6933 6934 /* ------------------------------ */ 6935 .balign 128 6936 .L_ALT_op_filled_new_array_range: /* 0x25 */ 6937 /* File: x86_64/alt_stub.S */ 6938 /* 6939 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6940 * any interesting requests and then jump to the real instruction 6941 * handler. Unlike the Arm handler, we can't do this as a tail call 6942 * because rIBASE is caller save and we need to reload it. 6943 * 6944 * Note that unlike in the Arm implementation, we should never arrive 6945 * here with a zero breakFlag because we always refresh rIBASE on 6946 * return. 6947 */ 6948 .extern MterpCheckBefore 6949 REFRESH_IBASE 6950 movq rSELF, OUT_ARG0 6951 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6952 movq rPC, OUT_ARG2 6953 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6954 jmp .L_op_nop+(37*128) 6955 6956 /* ------------------------------ */ 6957 .balign 128 6958 .L_ALT_op_fill_array_data: /* 0x26 */ 6959 /* File: x86_64/alt_stub.S */ 6960 /* 6961 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6962 * any interesting requests and then jump to the real instruction 6963 * handler. Unlike the Arm handler, we can't do this as a tail call 6964 * because rIBASE is caller save and we need to reload it. 6965 * 6966 * Note that unlike in the Arm implementation, we should never arrive 6967 * here with a zero breakFlag because we always refresh rIBASE on 6968 * return. 6969 */ 6970 .extern MterpCheckBefore 6971 REFRESH_IBASE 6972 movq rSELF, OUT_ARG0 6973 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6974 movq rPC, OUT_ARG2 6975 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6976 jmp .L_op_nop+(38*128) 6977 6978 /* ------------------------------ */ 6979 .balign 128 6980 .L_ALT_op_throw: /* 0x27 */ 6981 /* File: x86_64/alt_stub.S */ 6982 /* 6983 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6984 * any interesting requests and then jump to the real instruction 6985 * handler. Unlike the Arm handler, we can't do this as a tail call 6986 * because rIBASE is caller save and we need to reload it. 6987 * 6988 * Note that unlike in the Arm implementation, we should never arrive 6989 * here with a zero breakFlag because we always refresh rIBASE on 6990 * return. 6991 */ 6992 .extern MterpCheckBefore 6993 REFRESH_IBASE 6994 movq rSELF, OUT_ARG0 6995 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 6996 movq rPC, OUT_ARG2 6997 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 6998 jmp .L_op_nop+(39*128) 6999 7000 /* ------------------------------ */ 7001 .balign 128 7002 .L_ALT_op_goto: /* 0x28 */ 7003 /* File: x86_64/alt_stub.S */ 7004 /* 7005 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7006 * any interesting requests and then jump to the real instruction 7007 * handler. Unlike the Arm handler, we can't do this as a tail call 7008 * because rIBASE is caller save and we need to reload it. 7009 * 7010 * Note that unlike in the Arm implementation, we should never arrive 7011 * here with a zero breakFlag because we always refresh rIBASE on 7012 * return. 7013 */ 7014 .extern MterpCheckBefore 7015 REFRESH_IBASE 7016 movq rSELF, OUT_ARG0 7017 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7018 movq rPC, OUT_ARG2 7019 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7020 jmp .L_op_nop+(40*128) 7021 7022 /* ------------------------------ */ 7023 .balign 128 7024 .L_ALT_op_goto_16: /* 0x29 */ 7025 /* File: x86_64/alt_stub.S */ 7026 /* 7027 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7028 * any interesting requests and then jump to the real instruction 7029 * handler. Unlike the Arm handler, we can't do this as a tail call 7030 * because rIBASE is caller save and we need to reload it. 7031 * 7032 * Note that unlike in the Arm implementation, we should never arrive 7033 * here with a zero breakFlag because we always refresh rIBASE on 7034 * return. 7035 */ 7036 .extern MterpCheckBefore 7037 REFRESH_IBASE 7038 movq rSELF, OUT_ARG0 7039 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7040 movq rPC, OUT_ARG2 7041 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7042 jmp .L_op_nop+(41*128) 7043 7044 /* ------------------------------ */ 7045 .balign 128 7046 .L_ALT_op_goto_32: /* 0x2a */ 7047 /* File: x86_64/alt_stub.S */ 7048 /* 7049 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7050 * any interesting requests and then jump to the real instruction 7051 * handler. Unlike the Arm handler, we can't do this as a tail call 7052 * because rIBASE is caller save and we need to reload it. 7053 * 7054 * Note that unlike in the Arm implementation, we should never arrive 7055 * here with a zero breakFlag because we always refresh rIBASE on 7056 * return. 7057 */ 7058 .extern MterpCheckBefore 7059 REFRESH_IBASE 7060 movq rSELF, OUT_ARG0 7061 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7062 movq rPC, OUT_ARG2 7063 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7064 jmp .L_op_nop+(42*128) 7065 7066 /* ------------------------------ */ 7067 .balign 128 7068 .L_ALT_op_packed_switch: /* 0x2b */ 7069 /* File: x86_64/alt_stub.S */ 7070 /* 7071 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7072 * any interesting requests and then jump to the real instruction 7073 * handler. Unlike the Arm handler, we can't do this as a tail call 7074 * because rIBASE is caller save and we need to reload it. 7075 * 7076 * Note that unlike in the Arm implementation, we should never arrive 7077 * here with a zero breakFlag because we always refresh rIBASE on 7078 * return. 7079 */ 7080 .extern MterpCheckBefore 7081 REFRESH_IBASE 7082 movq rSELF, OUT_ARG0 7083 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7084 movq rPC, OUT_ARG2 7085 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7086 jmp .L_op_nop+(43*128) 7087 7088 /* ------------------------------ */ 7089 .balign 128 7090 .L_ALT_op_sparse_switch: /* 0x2c */ 7091 /* File: x86_64/alt_stub.S */ 7092 /* 7093 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7094 * any interesting requests and then jump to the real instruction 7095 * handler. Unlike the Arm handler, we can't do this as a tail call 7096 * because rIBASE is caller save and we need to reload it. 7097 * 7098 * Note that unlike in the Arm implementation, we should never arrive 7099 * here with a zero breakFlag because we always refresh rIBASE on 7100 * return. 7101 */ 7102 .extern MterpCheckBefore 7103 REFRESH_IBASE 7104 movq rSELF, OUT_ARG0 7105 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7106 movq rPC, OUT_ARG2 7107 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7108 jmp .L_op_nop+(44*128) 7109 7110 /* ------------------------------ */ 7111 .balign 128 7112 .L_ALT_op_cmpl_float: /* 0x2d */ 7113 /* File: x86_64/alt_stub.S */ 7114 /* 7115 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7116 * any interesting requests and then jump to the real instruction 7117 * handler. Unlike the Arm handler, we can't do this as a tail call 7118 * because rIBASE is caller save and we need to reload it. 7119 * 7120 * Note that unlike in the Arm implementation, we should never arrive 7121 * here with a zero breakFlag because we always refresh rIBASE on 7122 * return. 7123 */ 7124 .extern MterpCheckBefore 7125 REFRESH_IBASE 7126 movq rSELF, OUT_ARG0 7127 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7128 movq rPC, OUT_ARG2 7129 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7130 jmp .L_op_nop+(45*128) 7131 7132 /* ------------------------------ */ 7133 .balign 128 7134 .L_ALT_op_cmpg_float: /* 0x2e */ 7135 /* File: x86_64/alt_stub.S */ 7136 /* 7137 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7138 * any interesting requests and then jump to the real instruction 7139 * handler. Unlike the Arm handler, we can't do this as a tail call 7140 * because rIBASE is caller save and we need to reload it. 7141 * 7142 * Note that unlike in the Arm implementation, we should never arrive 7143 * here with a zero breakFlag because we always refresh rIBASE on 7144 * return. 7145 */ 7146 .extern MterpCheckBefore 7147 REFRESH_IBASE 7148 movq rSELF, OUT_ARG0 7149 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7150 movq rPC, OUT_ARG2 7151 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7152 jmp .L_op_nop+(46*128) 7153 7154 /* ------------------------------ */ 7155 .balign 128 7156 .L_ALT_op_cmpl_double: /* 0x2f */ 7157 /* File: x86_64/alt_stub.S */ 7158 /* 7159 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7160 * any interesting requests and then jump to the real instruction 7161 * handler. Unlike the Arm handler, we can't do this as a tail call 7162 * because rIBASE is caller save and we need to reload it. 7163 * 7164 * Note that unlike in the Arm implementation, we should never arrive 7165 * here with a zero breakFlag because we always refresh rIBASE on 7166 * return. 7167 */ 7168 .extern MterpCheckBefore 7169 REFRESH_IBASE 7170 movq rSELF, OUT_ARG0 7171 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7172 movq rPC, OUT_ARG2 7173 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7174 jmp .L_op_nop+(47*128) 7175 7176 /* ------------------------------ */ 7177 .balign 128 7178 .L_ALT_op_cmpg_double: /* 0x30 */ 7179 /* File: x86_64/alt_stub.S */ 7180 /* 7181 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7182 * any interesting requests and then jump to the real instruction 7183 * handler. Unlike the Arm handler, we can't do this as a tail call 7184 * because rIBASE is caller save and we need to reload it. 7185 * 7186 * Note that unlike in the Arm implementation, we should never arrive 7187 * here with a zero breakFlag because we always refresh rIBASE on 7188 * return. 7189 */ 7190 .extern MterpCheckBefore 7191 REFRESH_IBASE 7192 movq rSELF, OUT_ARG0 7193 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7194 movq rPC, OUT_ARG2 7195 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7196 jmp .L_op_nop+(48*128) 7197 7198 /* ------------------------------ */ 7199 .balign 128 7200 .L_ALT_op_cmp_long: /* 0x31 */ 7201 /* File: x86_64/alt_stub.S */ 7202 /* 7203 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7204 * any interesting requests and then jump to the real instruction 7205 * handler. Unlike the Arm handler, we can't do this as a tail call 7206 * because rIBASE is caller save and we need to reload it. 7207 * 7208 * Note that unlike in the Arm implementation, we should never arrive 7209 * here with a zero breakFlag because we always refresh rIBASE on 7210 * return. 7211 */ 7212 .extern MterpCheckBefore 7213 REFRESH_IBASE 7214 movq rSELF, OUT_ARG0 7215 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7216 movq rPC, OUT_ARG2 7217 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7218 jmp .L_op_nop+(49*128) 7219 7220 /* ------------------------------ */ 7221 .balign 128 7222 .L_ALT_op_if_eq: /* 0x32 */ 7223 /* File: x86_64/alt_stub.S */ 7224 /* 7225 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7226 * any interesting requests and then jump to the real instruction 7227 * handler. Unlike the Arm handler, we can't do this as a tail call 7228 * because rIBASE is caller save and we need to reload it. 7229 * 7230 * Note that unlike in the Arm implementation, we should never arrive 7231 * here with a zero breakFlag because we always refresh rIBASE on 7232 * return. 7233 */ 7234 .extern MterpCheckBefore 7235 REFRESH_IBASE 7236 movq rSELF, OUT_ARG0 7237 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7238 movq rPC, OUT_ARG2 7239 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7240 jmp .L_op_nop+(50*128) 7241 7242 /* ------------------------------ */ 7243 .balign 128 7244 .L_ALT_op_if_ne: /* 0x33 */ 7245 /* File: x86_64/alt_stub.S */ 7246 /* 7247 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7248 * any interesting requests and then jump to the real instruction 7249 * handler. Unlike the Arm handler, we can't do this as a tail call 7250 * because rIBASE is caller save and we need to reload it. 7251 * 7252 * Note that unlike in the Arm implementation, we should never arrive 7253 * here with a zero breakFlag because we always refresh rIBASE on 7254 * return. 7255 */ 7256 .extern MterpCheckBefore 7257 REFRESH_IBASE 7258 movq rSELF, OUT_ARG0 7259 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7260 movq rPC, OUT_ARG2 7261 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7262 jmp .L_op_nop+(51*128) 7263 7264 /* ------------------------------ */ 7265 .balign 128 7266 .L_ALT_op_if_lt: /* 0x34 */ 7267 /* File: x86_64/alt_stub.S */ 7268 /* 7269 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7270 * any interesting requests and then jump to the real instruction 7271 * handler. Unlike the Arm handler, we can't do this as a tail call 7272 * because rIBASE is caller save and we need to reload it. 7273 * 7274 * Note that unlike in the Arm implementation, we should never arrive 7275 * here with a zero breakFlag because we always refresh rIBASE on 7276 * return. 7277 */ 7278 .extern MterpCheckBefore 7279 REFRESH_IBASE 7280 movq rSELF, OUT_ARG0 7281 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7282 movq rPC, OUT_ARG2 7283 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7284 jmp .L_op_nop+(52*128) 7285 7286 /* ------------------------------ */ 7287 .balign 128 7288 .L_ALT_op_if_ge: /* 0x35 */ 7289 /* File: x86_64/alt_stub.S */ 7290 /* 7291 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7292 * any interesting requests and then jump to the real instruction 7293 * handler. Unlike the Arm handler, we can't do this as a tail call 7294 * because rIBASE is caller save and we need to reload it. 7295 * 7296 * Note that unlike in the Arm implementation, we should never arrive 7297 * here with a zero breakFlag because we always refresh rIBASE on 7298 * return. 7299 */ 7300 .extern MterpCheckBefore 7301 REFRESH_IBASE 7302 movq rSELF, OUT_ARG0 7303 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7304 movq rPC, OUT_ARG2 7305 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7306 jmp .L_op_nop+(53*128) 7307 7308 /* ------------------------------ */ 7309 .balign 128 7310 .L_ALT_op_if_gt: /* 0x36 */ 7311 /* File: x86_64/alt_stub.S */ 7312 /* 7313 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7314 * any interesting requests and then jump to the real instruction 7315 * handler. Unlike the Arm handler, we can't do this as a tail call 7316 * because rIBASE is caller save and we need to reload it. 7317 * 7318 * Note that unlike in the Arm implementation, we should never arrive 7319 * here with a zero breakFlag because we always refresh rIBASE on 7320 * return. 7321 */ 7322 .extern MterpCheckBefore 7323 REFRESH_IBASE 7324 movq rSELF, OUT_ARG0 7325 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7326 movq rPC, OUT_ARG2 7327 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7328 jmp .L_op_nop+(54*128) 7329 7330 /* ------------------------------ */ 7331 .balign 128 7332 .L_ALT_op_if_le: /* 0x37 */ 7333 /* File: x86_64/alt_stub.S */ 7334 /* 7335 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7336 * any interesting requests and then jump to the real instruction 7337 * handler. Unlike the Arm handler, we can't do this as a tail call 7338 * because rIBASE is caller save and we need to reload it. 7339 * 7340 * Note that unlike in the Arm implementation, we should never arrive 7341 * here with a zero breakFlag because we always refresh rIBASE on 7342 * return. 7343 */ 7344 .extern MterpCheckBefore 7345 REFRESH_IBASE 7346 movq rSELF, OUT_ARG0 7347 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7348 movq rPC, OUT_ARG2 7349 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7350 jmp .L_op_nop+(55*128) 7351 7352 /* ------------------------------ */ 7353 .balign 128 7354 .L_ALT_op_if_eqz: /* 0x38 */ 7355 /* File: x86_64/alt_stub.S */ 7356 /* 7357 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7358 * any interesting requests and then jump to the real instruction 7359 * handler. Unlike the Arm handler, we can't do this as a tail call 7360 * because rIBASE is caller save and we need to reload it. 7361 * 7362 * Note that unlike in the Arm implementation, we should never arrive 7363 * here with a zero breakFlag because we always refresh rIBASE on 7364 * return. 7365 */ 7366 .extern MterpCheckBefore 7367 REFRESH_IBASE 7368 movq rSELF, OUT_ARG0 7369 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7370 movq rPC, OUT_ARG2 7371 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7372 jmp .L_op_nop+(56*128) 7373 7374 /* ------------------------------ */ 7375 .balign 128 7376 .L_ALT_op_if_nez: /* 0x39 */ 7377 /* File: x86_64/alt_stub.S */ 7378 /* 7379 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7380 * any interesting requests and then jump to the real instruction 7381 * handler. Unlike the Arm handler, we can't do this as a tail call 7382 * because rIBASE is caller save and we need to reload it. 7383 * 7384 * Note that unlike in the Arm implementation, we should never arrive 7385 * here with a zero breakFlag because we always refresh rIBASE on 7386 * return. 7387 */ 7388 .extern MterpCheckBefore 7389 REFRESH_IBASE 7390 movq rSELF, OUT_ARG0 7391 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7392 movq rPC, OUT_ARG2 7393 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7394 jmp .L_op_nop+(57*128) 7395 7396 /* ------------------------------ */ 7397 .balign 128 7398 .L_ALT_op_if_ltz: /* 0x3a */ 7399 /* File: x86_64/alt_stub.S */ 7400 /* 7401 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7402 * any interesting requests and then jump to the real instruction 7403 * handler. Unlike the Arm handler, we can't do this as a tail call 7404 * because rIBASE is caller save and we need to reload it. 7405 * 7406 * Note that unlike in the Arm implementation, we should never arrive 7407 * here with a zero breakFlag because we always refresh rIBASE on 7408 * return. 7409 */ 7410 .extern MterpCheckBefore 7411 REFRESH_IBASE 7412 movq rSELF, OUT_ARG0 7413 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7414 movq rPC, OUT_ARG2 7415 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7416 jmp .L_op_nop+(58*128) 7417 7418 /* ------------------------------ */ 7419 .balign 128 7420 .L_ALT_op_if_gez: /* 0x3b */ 7421 /* File: x86_64/alt_stub.S */ 7422 /* 7423 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7424 * any interesting requests and then jump to the real instruction 7425 * handler. Unlike the Arm handler, we can't do this as a tail call 7426 * because rIBASE is caller save and we need to reload it. 7427 * 7428 * Note that unlike in the Arm implementation, we should never arrive 7429 * here with a zero breakFlag because we always refresh rIBASE on 7430 * return. 7431 */ 7432 .extern MterpCheckBefore 7433 REFRESH_IBASE 7434 movq rSELF, OUT_ARG0 7435 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7436 movq rPC, OUT_ARG2 7437 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7438 jmp .L_op_nop+(59*128) 7439 7440 /* ------------------------------ */ 7441 .balign 128 7442 .L_ALT_op_if_gtz: /* 0x3c */ 7443 /* File: x86_64/alt_stub.S */ 7444 /* 7445 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7446 * any interesting requests and then jump to the real instruction 7447 * handler. Unlike the Arm handler, we can't do this as a tail call 7448 * because rIBASE is caller save and we need to reload it. 7449 * 7450 * Note that unlike in the Arm implementation, we should never arrive 7451 * here with a zero breakFlag because we always refresh rIBASE on 7452 * return. 7453 */ 7454 .extern MterpCheckBefore 7455 REFRESH_IBASE 7456 movq rSELF, OUT_ARG0 7457 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7458 movq rPC, OUT_ARG2 7459 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7460 jmp .L_op_nop+(60*128) 7461 7462 /* ------------------------------ */ 7463 .balign 128 7464 .L_ALT_op_if_lez: /* 0x3d */ 7465 /* File: x86_64/alt_stub.S */ 7466 /* 7467 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7468 * any interesting requests and then jump to the real instruction 7469 * handler. Unlike the Arm handler, we can't do this as a tail call 7470 * because rIBASE is caller save and we need to reload it. 7471 * 7472 * Note that unlike in the Arm implementation, we should never arrive 7473 * here with a zero breakFlag because we always refresh rIBASE on 7474 * return. 7475 */ 7476 .extern MterpCheckBefore 7477 REFRESH_IBASE 7478 movq rSELF, OUT_ARG0 7479 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7480 movq rPC, OUT_ARG2 7481 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7482 jmp .L_op_nop+(61*128) 7483 7484 /* ------------------------------ */ 7485 .balign 128 7486 .L_ALT_op_unused_3e: /* 0x3e */ 7487 /* File: x86_64/alt_stub.S */ 7488 /* 7489 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7490 * any interesting requests and then jump to the real instruction 7491 * handler. Unlike the Arm handler, we can't do this as a tail call 7492 * because rIBASE is caller save and we need to reload it. 7493 * 7494 * Note that unlike in the Arm implementation, we should never arrive 7495 * here with a zero breakFlag because we always refresh rIBASE on 7496 * return. 7497 */ 7498 .extern MterpCheckBefore 7499 REFRESH_IBASE 7500 movq rSELF, OUT_ARG0 7501 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7502 movq rPC, OUT_ARG2 7503 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7504 jmp .L_op_nop+(62*128) 7505 7506 /* ------------------------------ */ 7507 .balign 128 7508 .L_ALT_op_unused_3f: /* 0x3f */ 7509 /* File: x86_64/alt_stub.S */ 7510 /* 7511 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7512 * any interesting requests and then jump to the real instruction 7513 * handler. Unlike the Arm handler, we can't do this as a tail call 7514 * because rIBASE is caller save and we need to reload it. 7515 * 7516 * Note that unlike in the Arm implementation, we should never arrive 7517 * here with a zero breakFlag because we always refresh rIBASE on 7518 * return. 7519 */ 7520 .extern MterpCheckBefore 7521 REFRESH_IBASE 7522 movq rSELF, OUT_ARG0 7523 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7524 movq rPC, OUT_ARG2 7525 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7526 jmp .L_op_nop+(63*128) 7527 7528 /* ------------------------------ */ 7529 .balign 128 7530 .L_ALT_op_unused_40: /* 0x40 */ 7531 /* File: x86_64/alt_stub.S */ 7532 /* 7533 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7534 * any interesting requests and then jump to the real instruction 7535 * handler. Unlike the Arm handler, we can't do this as a tail call 7536 * because rIBASE is caller save and we need to reload it. 7537 * 7538 * Note that unlike in the Arm implementation, we should never arrive 7539 * here with a zero breakFlag because we always refresh rIBASE on 7540 * return. 7541 */ 7542 .extern MterpCheckBefore 7543 REFRESH_IBASE 7544 movq rSELF, OUT_ARG0 7545 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7546 movq rPC, OUT_ARG2 7547 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7548 jmp .L_op_nop+(64*128) 7549 7550 /* ------------------------------ */ 7551 .balign 128 7552 .L_ALT_op_unused_41: /* 0x41 */ 7553 /* File: x86_64/alt_stub.S */ 7554 /* 7555 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7556 * any interesting requests and then jump to the real instruction 7557 * handler. Unlike the Arm handler, we can't do this as a tail call 7558 * because rIBASE is caller save and we need to reload it. 7559 * 7560 * Note that unlike in the Arm implementation, we should never arrive 7561 * here with a zero breakFlag because we always refresh rIBASE on 7562 * return. 7563 */ 7564 .extern MterpCheckBefore 7565 REFRESH_IBASE 7566 movq rSELF, OUT_ARG0 7567 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7568 movq rPC, OUT_ARG2 7569 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7570 jmp .L_op_nop+(65*128) 7571 7572 /* ------------------------------ */ 7573 .balign 128 7574 .L_ALT_op_unused_42: /* 0x42 */ 7575 /* File: x86_64/alt_stub.S */ 7576 /* 7577 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7578 * any interesting requests and then jump to the real instruction 7579 * handler. Unlike the Arm handler, we can't do this as a tail call 7580 * because rIBASE is caller save and we need to reload it. 7581 * 7582 * Note that unlike in the Arm implementation, we should never arrive 7583 * here with a zero breakFlag because we always refresh rIBASE on 7584 * return. 7585 */ 7586 .extern MterpCheckBefore 7587 REFRESH_IBASE 7588 movq rSELF, OUT_ARG0 7589 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7590 movq rPC, OUT_ARG2 7591 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7592 jmp .L_op_nop+(66*128) 7593 7594 /* ------------------------------ */ 7595 .balign 128 7596 .L_ALT_op_unused_43: /* 0x43 */ 7597 /* File: x86_64/alt_stub.S */ 7598 /* 7599 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7600 * any interesting requests and then jump to the real instruction 7601 * handler. Unlike the Arm handler, we can't do this as a tail call 7602 * because rIBASE is caller save and we need to reload it. 7603 * 7604 * Note that unlike in the Arm implementation, we should never arrive 7605 * here with a zero breakFlag because we always refresh rIBASE on 7606 * return. 7607 */ 7608 .extern MterpCheckBefore 7609 REFRESH_IBASE 7610 movq rSELF, OUT_ARG0 7611 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7612 movq rPC, OUT_ARG2 7613 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7614 jmp .L_op_nop+(67*128) 7615 7616 /* ------------------------------ */ 7617 .balign 128 7618 .L_ALT_op_aget: /* 0x44 */ 7619 /* File: x86_64/alt_stub.S */ 7620 /* 7621 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7622 * any interesting requests and then jump to the real instruction 7623 * handler. Unlike the Arm handler, we can't do this as a tail call 7624 * because rIBASE is caller save and we need to reload it. 7625 * 7626 * Note that unlike in the Arm implementation, we should never arrive 7627 * here with a zero breakFlag because we always refresh rIBASE on 7628 * return. 7629 */ 7630 .extern MterpCheckBefore 7631 REFRESH_IBASE 7632 movq rSELF, OUT_ARG0 7633 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7634 movq rPC, OUT_ARG2 7635 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7636 jmp .L_op_nop+(68*128) 7637 7638 /* ------------------------------ */ 7639 .balign 128 7640 .L_ALT_op_aget_wide: /* 0x45 */ 7641 /* File: x86_64/alt_stub.S */ 7642 /* 7643 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7644 * any interesting requests and then jump to the real instruction 7645 * handler. Unlike the Arm handler, we can't do this as a tail call 7646 * because rIBASE is caller save and we need to reload it. 7647 * 7648 * Note that unlike in the Arm implementation, we should never arrive 7649 * here with a zero breakFlag because we always refresh rIBASE on 7650 * return. 7651 */ 7652 .extern MterpCheckBefore 7653 REFRESH_IBASE 7654 movq rSELF, OUT_ARG0 7655 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7656 movq rPC, OUT_ARG2 7657 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7658 jmp .L_op_nop+(69*128) 7659 7660 /* ------------------------------ */ 7661 .balign 128 7662 .L_ALT_op_aget_object: /* 0x46 */ 7663 /* File: x86_64/alt_stub.S */ 7664 /* 7665 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7666 * any interesting requests and then jump to the real instruction 7667 * handler. Unlike the Arm handler, we can't do this as a tail call 7668 * because rIBASE is caller save and we need to reload it. 7669 * 7670 * Note that unlike in the Arm implementation, we should never arrive 7671 * here with a zero breakFlag because we always refresh rIBASE on 7672 * return. 7673 */ 7674 .extern MterpCheckBefore 7675 REFRESH_IBASE 7676 movq rSELF, OUT_ARG0 7677 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7678 movq rPC, OUT_ARG2 7679 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7680 jmp .L_op_nop+(70*128) 7681 7682 /* ------------------------------ */ 7683 .balign 128 7684 .L_ALT_op_aget_boolean: /* 0x47 */ 7685 /* File: x86_64/alt_stub.S */ 7686 /* 7687 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7688 * any interesting requests and then jump to the real instruction 7689 * handler. Unlike the Arm handler, we can't do this as a tail call 7690 * because rIBASE is caller save and we need to reload it. 7691 * 7692 * Note that unlike in the Arm implementation, we should never arrive 7693 * here with a zero breakFlag because we always refresh rIBASE on 7694 * return. 7695 */ 7696 .extern MterpCheckBefore 7697 REFRESH_IBASE 7698 movq rSELF, OUT_ARG0 7699 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7700 movq rPC, OUT_ARG2 7701 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7702 jmp .L_op_nop+(71*128) 7703 7704 /* ------------------------------ */ 7705 .balign 128 7706 .L_ALT_op_aget_byte: /* 0x48 */ 7707 /* File: x86_64/alt_stub.S */ 7708 /* 7709 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7710 * any interesting requests and then jump to the real instruction 7711 * handler. Unlike the Arm handler, we can't do this as a tail call 7712 * because rIBASE is caller save and we need to reload it. 7713 * 7714 * Note that unlike in the Arm implementation, we should never arrive 7715 * here with a zero breakFlag because we always refresh rIBASE on 7716 * return. 7717 */ 7718 .extern MterpCheckBefore 7719 REFRESH_IBASE 7720 movq rSELF, OUT_ARG0 7721 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7722 movq rPC, OUT_ARG2 7723 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7724 jmp .L_op_nop+(72*128) 7725 7726 /* ------------------------------ */ 7727 .balign 128 7728 .L_ALT_op_aget_char: /* 0x49 */ 7729 /* File: x86_64/alt_stub.S */ 7730 /* 7731 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7732 * any interesting requests and then jump to the real instruction 7733 * handler. Unlike the Arm handler, we can't do this as a tail call 7734 * because rIBASE is caller save and we need to reload it. 7735 * 7736 * Note that unlike in the Arm implementation, we should never arrive 7737 * here with a zero breakFlag because we always refresh rIBASE on 7738 * return. 7739 */ 7740 .extern MterpCheckBefore 7741 REFRESH_IBASE 7742 movq rSELF, OUT_ARG0 7743 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7744 movq rPC, OUT_ARG2 7745 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7746 jmp .L_op_nop+(73*128) 7747 7748 /* ------------------------------ */ 7749 .balign 128 7750 .L_ALT_op_aget_short: /* 0x4a */ 7751 /* File: x86_64/alt_stub.S */ 7752 /* 7753 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7754 * any interesting requests and then jump to the real instruction 7755 * handler. Unlike the Arm handler, we can't do this as a tail call 7756 * because rIBASE is caller save and we need to reload it. 7757 * 7758 * Note that unlike in the Arm implementation, we should never arrive 7759 * here with a zero breakFlag because we always refresh rIBASE on 7760 * return. 7761 */ 7762 .extern MterpCheckBefore 7763 REFRESH_IBASE 7764 movq rSELF, OUT_ARG0 7765 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7766 movq rPC, OUT_ARG2 7767 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7768 jmp .L_op_nop+(74*128) 7769 7770 /* ------------------------------ */ 7771 .balign 128 7772 .L_ALT_op_aput: /* 0x4b */ 7773 /* File: x86_64/alt_stub.S */ 7774 /* 7775 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7776 * any interesting requests and then jump to the real instruction 7777 * handler. Unlike the Arm handler, we can't do this as a tail call 7778 * because rIBASE is caller save and we need to reload it. 7779 * 7780 * Note that unlike in the Arm implementation, we should never arrive 7781 * here with a zero breakFlag because we always refresh rIBASE on 7782 * return. 7783 */ 7784 .extern MterpCheckBefore 7785 REFRESH_IBASE 7786 movq rSELF, OUT_ARG0 7787 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7788 movq rPC, OUT_ARG2 7789 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7790 jmp .L_op_nop+(75*128) 7791 7792 /* ------------------------------ */ 7793 .balign 128 7794 .L_ALT_op_aput_wide: /* 0x4c */ 7795 /* File: x86_64/alt_stub.S */ 7796 /* 7797 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7798 * any interesting requests and then jump to the real instruction 7799 * handler. Unlike the Arm handler, we can't do this as a tail call 7800 * because rIBASE is caller save and we need to reload it. 7801 * 7802 * Note that unlike in the Arm implementation, we should never arrive 7803 * here with a zero breakFlag because we always refresh rIBASE on 7804 * return. 7805 */ 7806 .extern MterpCheckBefore 7807 REFRESH_IBASE 7808 movq rSELF, OUT_ARG0 7809 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7810 movq rPC, OUT_ARG2 7811 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7812 jmp .L_op_nop+(76*128) 7813 7814 /* ------------------------------ */ 7815 .balign 128 7816 .L_ALT_op_aput_object: /* 0x4d */ 7817 /* File: x86_64/alt_stub.S */ 7818 /* 7819 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7820 * any interesting requests and then jump to the real instruction 7821 * handler. Unlike the Arm handler, we can't do this as a tail call 7822 * because rIBASE is caller save and we need to reload it. 7823 * 7824 * Note that unlike in the Arm implementation, we should never arrive 7825 * here with a zero breakFlag because we always refresh rIBASE on 7826 * return. 7827 */ 7828 .extern MterpCheckBefore 7829 REFRESH_IBASE 7830 movq rSELF, OUT_ARG0 7831 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7832 movq rPC, OUT_ARG2 7833 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7834 jmp .L_op_nop+(77*128) 7835 7836 /* ------------------------------ */ 7837 .balign 128 7838 .L_ALT_op_aput_boolean: /* 0x4e */ 7839 /* File: x86_64/alt_stub.S */ 7840 /* 7841 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7842 * any interesting requests and then jump to the real instruction 7843 * handler. Unlike the Arm handler, we can't do this as a tail call 7844 * because rIBASE is caller save and we need to reload it. 7845 * 7846 * Note that unlike in the Arm implementation, we should never arrive 7847 * here with a zero breakFlag because we always refresh rIBASE on 7848 * return. 7849 */ 7850 .extern MterpCheckBefore 7851 REFRESH_IBASE 7852 movq rSELF, OUT_ARG0 7853 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7854 movq rPC, OUT_ARG2 7855 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7856 jmp .L_op_nop+(78*128) 7857 7858 /* ------------------------------ */ 7859 .balign 128 7860 .L_ALT_op_aput_byte: /* 0x4f */ 7861 /* File: x86_64/alt_stub.S */ 7862 /* 7863 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7864 * any interesting requests and then jump to the real instruction 7865 * handler. Unlike the Arm handler, we can't do this as a tail call 7866 * because rIBASE is caller save and we need to reload it. 7867 * 7868 * Note that unlike in the Arm implementation, we should never arrive 7869 * here with a zero breakFlag because we always refresh rIBASE on 7870 * return. 7871 */ 7872 .extern MterpCheckBefore 7873 REFRESH_IBASE 7874 movq rSELF, OUT_ARG0 7875 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7876 movq rPC, OUT_ARG2 7877 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7878 jmp .L_op_nop+(79*128) 7879 7880 /* ------------------------------ */ 7881 .balign 128 7882 .L_ALT_op_aput_char: /* 0x50 */ 7883 /* File: x86_64/alt_stub.S */ 7884 /* 7885 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7886 * any interesting requests and then jump to the real instruction 7887 * handler. Unlike the Arm handler, we can't do this as a tail call 7888 * because rIBASE is caller save and we need to reload it. 7889 * 7890 * Note that unlike in the Arm implementation, we should never arrive 7891 * here with a zero breakFlag because we always refresh rIBASE on 7892 * return. 7893 */ 7894 .extern MterpCheckBefore 7895 REFRESH_IBASE 7896 movq rSELF, OUT_ARG0 7897 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7898 movq rPC, OUT_ARG2 7899 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7900 jmp .L_op_nop+(80*128) 7901 7902 /* ------------------------------ */ 7903 .balign 128 7904 .L_ALT_op_aput_short: /* 0x51 */ 7905 /* File: x86_64/alt_stub.S */ 7906 /* 7907 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7908 * any interesting requests and then jump to the real instruction 7909 * handler. Unlike the Arm handler, we can't do this as a tail call 7910 * because rIBASE is caller save and we need to reload it. 7911 * 7912 * Note that unlike in the Arm implementation, we should never arrive 7913 * here with a zero breakFlag because we always refresh rIBASE on 7914 * return. 7915 */ 7916 .extern MterpCheckBefore 7917 REFRESH_IBASE 7918 movq rSELF, OUT_ARG0 7919 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7920 movq rPC, OUT_ARG2 7921 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7922 jmp .L_op_nop+(81*128) 7923 7924 /* ------------------------------ */ 7925 .balign 128 7926 .L_ALT_op_iget: /* 0x52 */ 7927 /* File: x86_64/alt_stub.S */ 7928 /* 7929 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7930 * any interesting requests and then jump to the real instruction 7931 * handler. Unlike the Arm handler, we can't do this as a tail call 7932 * because rIBASE is caller save and we need to reload it. 7933 * 7934 * Note that unlike in the Arm implementation, we should never arrive 7935 * here with a zero breakFlag because we always refresh rIBASE on 7936 * return. 7937 */ 7938 .extern MterpCheckBefore 7939 REFRESH_IBASE 7940 movq rSELF, OUT_ARG0 7941 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7942 movq rPC, OUT_ARG2 7943 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7944 jmp .L_op_nop+(82*128) 7945 7946 /* ------------------------------ */ 7947 .balign 128 7948 .L_ALT_op_iget_wide: /* 0x53 */ 7949 /* File: x86_64/alt_stub.S */ 7950 /* 7951 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7952 * any interesting requests and then jump to the real instruction 7953 * handler. Unlike the Arm handler, we can't do this as a tail call 7954 * because rIBASE is caller save and we need to reload it. 7955 * 7956 * Note that unlike in the Arm implementation, we should never arrive 7957 * here with a zero breakFlag because we always refresh rIBASE on 7958 * return. 7959 */ 7960 .extern MterpCheckBefore 7961 REFRESH_IBASE 7962 movq rSELF, OUT_ARG0 7963 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7964 movq rPC, OUT_ARG2 7965 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7966 jmp .L_op_nop+(83*128) 7967 7968 /* ------------------------------ */ 7969 .balign 128 7970 .L_ALT_op_iget_object: /* 0x54 */ 7971 /* File: x86_64/alt_stub.S */ 7972 /* 7973 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7974 * any interesting requests and then jump to the real instruction 7975 * handler. Unlike the Arm handler, we can't do this as a tail call 7976 * because rIBASE is caller save and we need to reload it. 7977 * 7978 * Note that unlike in the Arm implementation, we should never arrive 7979 * here with a zero breakFlag because we always refresh rIBASE on 7980 * return. 7981 */ 7982 .extern MterpCheckBefore 7983 REFRESH_IBASE 7984 movq rSELF, OUT_ARG0 7985 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 7986 movq rPC, OUT_ARG2 7987 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 7988 jmp .L_op_nop+(84*128) 7989 7990 /* ------------------------------ */ 7991 .balign 128 7992 .L_ALT_op_iget_boolean: /* 0x55 */ 7993 /* File: x86_64/alt_stub.S */ 7994 /* 7995 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7996 * any interesting requests and then jump to the real instruction 7997 * handler. Unlike the Arm handler, we can't do this as a tail call 7998 * because rIBASE is caller save and we need to reload it. 7999 * 8000 * Note that unlike in the Arm implementation, we should never arrive 8001 * here with a zero breakFlag because we always refresh rIBASE on 8002 * return. 8003 */ 8004 .extern MterpCheckBefore 8005 REFRESH_IBASE 8006 movq rSELF, OUT_ARG0 8007 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8008 movq rPC, OUT_ARG2 8009 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8010 jmp .L_op_nop+(85*128) 8011 8012 /* ------------------------------ */ 8013 .balign 128 8014 .L_ALT_op_iget_byte: /* 0x56 */ 8015 /* File: x86_64/alt_stub.S */ 8016 /* 8017 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8018 * any interesting requests and then jump to the real instruction 8019 * handler. Unlike the Arm handler, we can't do this as a tail call 8020 * because rIBASE is caller save and we need to reload it. 8021 * 8022 * Note that unlike in the Arm implementation, we should never arrive 8023 * here with a zero breakFlag because we always refresh rIBASE on 8024 * return. 8025 */ 8026 .extern MterpCheckBefore 8027 REFRESH_IBASE 8028 movq rSELF, OUT_ARG0 8029 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8030 movq rPC, OUT_ARG2 8031 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8032 jmp .L_op_nop+(86*128) 8033 8034 /* ------------------------------ */ 8035 .balign 128 8036 .L_ALT_op_iget_char: /* 0x57 */ 8037 /* File: x86_64/alt_stub.S */ 8038 /* 8039 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8040 * any interesting requests and then jump to the real instruction 8041 * handler. Unlike the Arm handler, we can't do this as a tail call 8042 * because rIBASE is caller save and we need to reload it. 8043 * 8044 * Note that unlike in the Arm implementation, we should never arrive 8045 * here with a zero breakFlag because we always refresh rIBASE on 8046 * return. 8047 */ 8048 .extern MterpCheckBefore 8049 REFRESH_IBASE 8050 movq rSELF, OUT_ARG0 8051 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8052 movq rPC, OUT_ARG2 8053 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8054 jmp .L_op_nop+(87*128) 8055 8056 /* ------------------------------ */ 8057 .balign 128 8058 .L_ALT_op_iget_short: /* 0x58 */ 8059 /* File: x86_64/alt_stub.S */ 8060 /* 8061 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8062 * any interesting requests and then jump to the real instruction 8063 * handler. Unlike the Arm handler, we can't do this as a tail call 8064 * because rIBASE is caller save and we need to reload it. 8065 * 8066 * Note that unlike in the Arm implementation, we should never arrive 8067 * here with a zero breakFlag because we always refresh rIBASE on 8068 * return. 8069 */ 8070 .extern MterpCheckBefore 8071 REFRESH_IBASE 8072 movq rSELF, OUT_ARG0 8073 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8074 movq rPC, OUT_ARG2 8075 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8076 jmp .L_op_nop+(88*128) 8077 8078 /* ------------------------------ */ 8079 .balign 128 8080 .L_ALT_op_iput: /* 0x59 */ 8081 /* File: x86_64/alt_stub.S */ 8082 /* 8083 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8084 * any interesting requests and then jump to the real instruction 8085 * handler. Unlike the Arm handler, we can't do this as a tail call 8086 * because rIBASE is caller save and we need to reload it. 8087 * 8088 * Note that unlike in the Arm implementation, we should never arrive 8089 * here with a zero breakFlag because we always refresh rIBASE on 8090 * return. 8091 */ 8092 .extern MterpCheckBefore 8093 REFRESH_IBASE 8094 movq rSELF, OUT_ARG0 8095 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8096 movq rPC, OUT_ARG2 8097 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8098 jmp .L_op_nop+(89*128) 8099 8100 /* ------------------------------ */ 8101 .balign 128 8102 .L_ALT_op_iput_wide: /* 0x5a */ 8103 /* File: x86_64/alt_stub.S */ 8104 /* 8105 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8106 * any interesting requests and then jump to the real instruction 8107 * handler. Unlike the Arm handler, we can't do this as a tail call 8108 * because rIBASE is caller save and we need to reload it. 8109 * 8110 * Note that unlike in the Arm implementation, we should never arrive 8111 * here with a zero breakFlag because we always refresh rIBASE on 8112 * return. 8113 */ 8114 .extern MterpCheckBefore 8115 REFRESH_IBASE 8116 movq rSELF, OUT_ARG0 8117 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8118 movq rPC, OUT_ARG2 8119 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8120 jmp .L_op_nop+(90*128) 8121 8122 /* ------------------------------ */ 8123 .balign 128 8124 .L_ALT_op_iput_object: /* 0x5b */ 8125 /* File: x86_64/alt_stub.S */ 8126 /* 8127 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8128 * any interesting requests and then jump to the real instruction 8129 * handler. Unlike the Arm handler, we can't do this as a tail call 8130 * because rIBASE is caller save and we need to reload it. 8131 * 8132 * Note that unlike in the Arm implementation, we should never arrive 8133 * here with a zero breakFlag because we always refresh rIBASE on 8134 * return. 8135 */ 8136 .extern MterpCheckBefore 8137 REFRESH_IBASE 8138 movq rSELF, OUT_ARG0 8139 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8140 movq rPC, OUT_ARG2 8141 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8142 jmp .L_op_nop+(91*128) 8143 8144 /* ------------------------------ */ 8145 .balign 128 8146 .L_ALT_op_iput_boolean: /* 0x5c */ 8147 /* File: x86_64/alt_stub.S */ 8148 /* 8149 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8150 * any interesting requests and then jump to the real instruction 8151 * handler. Unlike the Arm handler, we can't do this as a tail call 8152 * because rIBASE is caller save and we need to reload it. 8153 * 8154 * Note that unlike in the Arm implementation, we should never arrive 8155 * here with a zero breakFlag because we always refresh rIBASE on 8156 * return. 8157 */ 8158 .extern MterpCheckBefore 8159 REFRESH_IBASE 8160 movq rSELF, OUT_ARG0 8161 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8162 movq rPC, OUT_ARG2 8163 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8164 jmp .L_op_nop+(92*128) 8165 8166 /* ------------------------------ */ 8167 .balign 128 8168 .L_ALT_op_iput_byte: /* 0x5d */ 8169 /* File: x86_64/alt_stub.S */ 8170 /* 8171 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8172 * any interesting requests and then jump to the real instruction 8173 * handler. Unlike the Arm handler, we can't do this as a tail call 8174 * because rIBASE is caller save and we need to reload it. 8175 * 8176 * Note that unlike in the Arm implementation, we should never arrive 8177 * here with a zero breakFlag because we always refresh rIBASE on 8178 * return. 8179 */ 8180 .extern MterpCheckBefore 8181 REFRESH_IBASE 8182 movq rSELF, OUT_ARG0 8183 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8184 movq rPC, OUT_ARG2 8185 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8186 jmp .L_op_nop+(93*128) 8187 8188 /* ------------------------------ */ 8189 .balign 128 8190 .L_ALT_op_iput_char: /* 0x5e */ 8191 /* File: x86_64/alt_stub.S */ 8192 /* 8193 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8194 * any interesting requests and then jump to the real instruction 8195 * handler. Unlike the Arm handler, we can't do this as a tail call 8196 * because rIBASE is caller save and we need to reload it. 8197 * 8198 * Note that unlike in the Arm implementation, we should never arrive 8199 * here with a zero breakFlag because we always refresh rIBASE on 8200 * return. 8201 */ 8202 .extern MterpCheckBefore 8203 REFRESH_IBASE 8204 movq rSELF, OUT_ARG0 8205 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8206 movq rPC, OUT_ARG2 8207 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8208 jmp .L_op_nop+(94*128) 8209 8210 /* ------------------------------ */ 8211 .balign 128 8212 .L_ALT_op_iput_short: /* 0x5f */ 8213 /* File: x86_64/alt_stub.S */ 8214 /* 8215 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8216 * any interesting requests and then jump to the real instruction 8217 * handler. Unlike the Arm handler, we can't do this as a tail call 8218 * because rIBASE is caller save and we need to reload it. 8219 * 8220 * Note that unlike in the Arm implementation, we should never arrive 8221 * here with a zero breakFlag because we always refresh rIBASE on 8222 * return. 8223 */ 8224 .extern MterpCheckBefore 8225 REFRESH_IBASE 8226 movq rSELF, OUT_ARG0 8227 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8228 movq rPC, OUT_ARG2 8229 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8230 jmp .L_op_nop+(95*128) 8231 8232 /* ------------------------------ */ 8233 .balign 128 8234 .L_ALT_op_sget: /* 0x60 */ 8235 /* File: x86_64/alt_stub.S */ 8236 /* 8237 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8238 * any interesting requests and then jump to the real instruction 8239 * handler. Unlike the Arm handler, we can't do this as a tail call 8240 * because rIBASE is caller save and we need to reload it. 8241 * 8242 * Note that unlike in the Arm implementation, we should never arrive 8243 * here with a zero breakFlag because we always refresh rIBASE on 8244 * return. 8245 */ 8246 .extern MterpCheckBefore 8247 REFRESH_IBASE 8248 movq rSELF, OUT_ARG0 8249 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8250 movq rPC, OUT_ARG2 8251 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8252 jmp .L_op_nop+(96*128) 8253 8254 /* ------------------------------ */ 8255 .balign 128 8256 .L_ALT_op_sget_wide: /* 0x61 */ 8257 /* File: x86_64/alt_stub.S */ 8258 /* 8259 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8260 * any interesting requests and then jump to the real instruction 8261 * handler. Unlike the Arm handler, we can't do this as a tail call 8262 * because rIBASE is caller save and we need to reload it. 8263 * 8264 * Note that unlike in the Arm implementation, we should never arrive 8265 * here with a zero breakFlag because we always refresh rIBASE on 8266 * return. 8267 */ 8268 .extern MterpCheckBefore 8269 REFRESH_IBASE 8270 movq rSELF, OUT_ARG0 8271 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8272 movq rPC, OUT_ARG2 8273 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8274 jmp .L_op_nop+(97*128) 8275 8276 /* ------------------------------ */ 8277 .balign 128 8278 .L_ALT_op_sget_object: /* 0x62 */ 8279 /* File: x86_64/alt_stub.S */ 8280 /* 8281 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8282 * any interesting requests and then jump to the real instruction 8283 * handler. Unlike the Arm handler, we can't do this as a tail call 8284 * because rIBASE is caller save and we need to reload it. 8285 * 8286 * Note that unlike in the Arm implementation, we should never arrive 8287 * here with a zero breakFlag because we always refresh rIBASE on 8288 * return. 8289 */ 8290 .extern MterpCheckBefore 8291 REFRESH_IBASE 8292 movq rSELF, OUT_ARG0 8293 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8294 movq rPC, OUT_ARG2 8295 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8296 jmp .L_op_nop+(98*128) 8297 8298 /* ------------------------------ */ 8299 .balign 128 8300 .L_ALT_op_sget_boolean: /* 0x63 */ 8301 /* File: x86_64/alt_stub.S */ 8302 /* 8303 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8304 * any interesting requests and then jump to the real instruction 8305 * handler. Unlike the Arm handler, we can't do this as a tail call 8306 * because rIBASE is caller save and we need to reload it. 8307 * 8308 * Note that unlike in the Arm implementation, we should never arrive 8309 * here with a zero breakFlag because we always refresh rIBASE on 8310 * return. 8311 */ 8312 .extern MterpCheckBefore 8313 REFRESH_IBASE 8314 movq rSELF, OUT_ARG0 8315 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8316 movq rPC, OUT_ARG2 8317 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8318 jmp .L_op_nop+(99*128) 8319 8320 /* ------------------------------ */ 8321 .balign 128 8322 .L_ALT_op_sget_byte: /* 0x64 */ 8323 /* File: x86_64/alt_stub.S */ 8324 /* 8325 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8326 * any interesting requests and then jump to the real instruction 8327 * handler. Unlike the Arm handler, we can't do this as a tail call 8328 * because rIBASE is caller save and we need to reload it. 8329 * 8330 * Note that unlike in the Arm implementation, we should never arrive 8331 * here with a zero breakFlag because we always refresh rIBASE on 8332 * return. 8333 */ 8334 .extern MterpCheckBefore 8335 REFRESH_IBASE 8336 movq rSELF, OUT_ARG0 8337 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8338 movq rPC, OUT_ARG2 8339 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8340 jmp .L_op_nop+(100*128) 8341 8342 /* ------------------------------ */ 8343 .balign 128 8344 .L_ALT_op_sget_char: /* 0x65 */ 8345 /* File: x86_64/alt_stub.S */ 8346 /* 8347 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8348 * any interesting requests and then jump to the real instruction 8349 * handler. Unlike the Arm handler, we can't do this as a tail call 8350 * because rIBASE is caller save and we need to reload it. 8351 * 8352 * Note that unlike in the Arm implementation, we should never arrive 8353 * here with a zero breakFlag because we always refresh rIBASE on 8354 * return. 8355 */ 8356 .extern MterpCheckBefore 8357 REFRESH_IBASE 8358 movq rSELF, OUT_ARG0 8359 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8360 movq rPC, OUT_ARG2 8361 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8362 jmp .L_op_nop+(101*128) 8363 8364 /* ------------------------------ */ 8365 .balign 128 8366 .L_ALT_op_sget_short: /* 0x66 */ 8367 /* File: x86_64/alt_stub.S */ 8368 /* 8369 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8370 * any interesting requests and then jump to the real instruction 8371 * handler. Unlike the Arm handler, we can't do this as a tail call 8372 * because rIBASE is caller save and we need to reload it. 8373 * 8374 * Note that unlike in the Arm implementation, we should never arrive 8375 * here with a zero breakFlag because we always refresh rIBASE on 8376 * return. 8377 */ 8378 .extern MterpCheckBefore 8379 REFRESH_IBASE 8380 movq rSELF, OUT_ARG0 8381 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8382 movq rPC, OUT_ARG2 8383 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8384 jmp .L_op_nop+(102*128) 8385 8386 /* ------------------------------ */ 8387 .balign 128 8388 .L_ALT_op_sput: /* 0x67 */ 8389 /* File: x86_64/alt_stub.S */ 8390 /* 8391 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8392 * any interesting requests and then jump to the real instruction 8393 * handler. Unlike the Arm handler, we can't do this as a tail call 8394 * because rIBASE is caller save and we need to reload it. 8395 * 8396 * Note that unlike in the Arm implementation, we should never arrive 8397 * here with a zero breakFlag because we always refresh rIBASE on 8398 * return. 8399 */ 8400 .extern MterpCheckBefore 8401 REFRESH_IBASE 8402 movq rSELF, OUT_ARG0 8403 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8404 movq rPC, OUT_ARG2 8405 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8406 jmp .L_op_nop+(103*128) 8407 8408 /* ------------------------------ */ 8409 .balign 128 8410 .L_ALT_op_sput_wide: /* 0x68 */ 8411 /* File: x86_64/alt_stub.S */ 8412 /* 8413 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8414 * any interesting requests and then jump to the real instruction 8415 * handler. Unlike the Arm handler, we can't do this as a tail call 8416 * because rIBASE is caller save and we need to reload it. 8417 * 8418 * Note that unlike in the Arm implementation, we should never arrive 8419 * here with a zero breakFlag because we always refresh rIBASE on 8420 * return. 8421 */ 8422 .extern MterpCheckBefore 8423 REFRESH_IBASE 8424 movq rSELF, OUT_ARG0 8425 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8426 movq rPC, OUT_ARG2 8427 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8428 jmp .L_op_nop+(104*128) 8429 8430 /* ------------------------------ */ 8431 .balign 128 8432 .L_ALT_op_sput_object: /* 0x69 */ 8433 /* File: x86_64/alt_stub.S */ 8434 /* 8435 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8436 * any interesting requests and then jump to the real instruction 8437 * handler. Unlike the Arm handler, we can't do this as a tail call 8438 * because rIBASE is caller save and we need to reload it. 8439 * 8440 * Note that unlike in the Arm implementation, we should never arrive 8441 * here with a zero breakFlag because we always refresh rIBASE on 8442 * return. 8443 */ 8444 .extern MterpCheckBefore 8445 REFRESH_IBASE 8446 movq rSELF, OUT_ARG0 8447 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8448 movq rPC, OUT_ARG2 8449 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8450 jmp .L_op_nop+(105*128) 8451 8452 /* ------------------------------ */ 8453 .balign 128 8454 .L_ALT_op_sput_boolean: /* 0x6a */ 8455 /* File: x86_64/alt_stub.S */ 8456 /* 8457 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8458 * any interesting requests and then jump to the real instruction 8459 * handler. Unlike the Arm handler, we can't do this as a tail call 8460 * because rIBASE is caller save and we need to reload it. 8461 * 8462 * Note that unlike in the Arm implementation, we should never arrive 8463 * here with a zero breakFlag because we always refresh rIBASE on 8464 * return. 8465 */ 8466 .extern MterpCheckBefore 8467 REFRESH_IBASE 8468 movq rSELF, OUT_ARG0 8469 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8470 movq rPC, OUT_ARG2 8471 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8472 jmp .L_op_nop+(106*128) 8473 8474 /* ------------------------------ */ 8475 .balign 128 8476 .L_ALT_op_sput_byte: /* 0x6b */ 8477 /* File: x86_64/alt_stub.S */ 8478 /* 8479 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8480 * any interesting requests and then jump to the real instruction 8481 * handler. Unlike the Arm handler, we can't do this as a tail call 8482 * because rIBASE is caller save and we need to reload it. 8483 * 8484 * Note that unlike in the Arm implementation, we should never arrive 8485 * here with a zero breakFlag because we always refresh rIBASE on 8486 * return. 8487 */ 8488 .extern MterpCheckBefore 8489 REFRESH_IBASE 8490 movq rSELF, OUT_ARG0 8491 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8492 movq rPC, OUT_ARG2 8493 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8494 jmp .L_op_nop+(107*128) 8495 8496 /* ------------------------------ */ 8497 .balign 128 8498 .L_ALT_op_sput_char: /* 0x6c */ 8499 /* File: x86_64/alt_stub.S */ 8500 /* 8501 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8502 * any interesting requests and then jump to the real instruction 8503 * handler. Unlike the Arm handler, we can't do this as a tail call 8504 * because rIBASE is caller save and we need to reload it. 8505 * 8506 * Note that unlike in the Arm implementation, we should never arrive 8507 * here with a zero breakFlag because we always refresh rIBASE on 8508 * return. 8509 */ 8510 .extern MterpCheckBefore 8511 REFRESH_IBASE 8512 movq rSELF, OUT_ARG0 8513 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8514 movq rPC, OUT_ARG2 8515 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8516 jmp .L_op_nop+(108*128) 8517 8518 /* ------------------------------ */ 8519 .balign 128 8520 .L_ALT_op_sput_short: /* 0x6d */ 8521 /* File: x86_64/alt_stub.S */ 8522 /* 8523 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8524 * any interesting requests and then jump to the real instruction 8525 * handler. Unlike the Arm handler, we can't do this as a tail call 8526 * because rIBASE is caller save and we need to reload it. 8527 * 8528 * Note that unlike in the Arm implementation, we should never arrive 8529 * here with a zero breakFlag because we always refresh rIBASE on 8530 * return. 8531 */ 8532 .extern MterpCheckBefore 8533 REFRESH_IBASE 8534 movq rSELF, OUT_ARG0 8535 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8536 movq rPC, OUT_ARG2 8537 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8538 jmp .L_op_nop+(109*128) 8539 8540 /* ------------------------------ */ 8541 .balign 128 8542 .L_ALT_op_invoke_virtual: /* 0x6e */ 8543 /* File: x86_64/alt_stub.S */ 8544 /* 8545 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8546 * any interesting requests and then jump to the real instruction 8547 * handler. Unlike the Arm handler, we can't do this as a tail call 8548 * because rIBASE is caller save and we need to reload it. 8549 * 8550 * Note that unlike in the Arm implementation, we should never arrive 8551 * here with a zero breakFlag because we always refresh rIBASE on 8552 * return. 8553 */ 8554 .extern MterpCheckBefore 8555 REFRESH_IBASE 8556 movq rSELF, OUT_ARG0 8557 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8558 movq rPC, OUT_ARG2 8559 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8560 jmp .L_op_nop+(110*128) 8561 8562 /* ------------------------------ */ 8563 .balign 128 8564 .L_ALT_op_invoke_super: /* 0x6f */ 8565 /* File: x86_64/alt_stub.S */ 8566 /* 8567 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8568 * any interesting requests and then jump to the real instruction 8569 * handler. Unlike the Arm handler, we can't do this as a tail call 8570 * because rIBASE is caller save and we need to reload it. 8571 * 8572 * Note that unlike in the Arm implementation, we should never arrive 8573 * here with a zero breakFlag because we always refresh rIBASE on 8574 * return. 8575 */ 8576 .extern MterpCheckBefore 8577 REFRESH_IBASE 8578 movq rSELF, OUT_ARG0 8579 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8580 movq rPC, OUT_ARG2 8581 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8582 jmp .L_op_nop+(111*128) 8583 8584 /* ------------------------------ */ 8585 .balign 128 8586 .L_ALT_op_invoke_direct: /* 0x70 */ 8587 /* File: x86_64/alt_stub.S */ 8588 /* 8589 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8590 * any interesting requests and then jump to the real instruction 8591 * handler. Unlike the Arm handler, we can't do this as a tail call 8592 * because rIBASE is caller save and we need to reload it. 8593 * 8594 * Note that unlike in the Arm implementation, we should never arrive 8595 * here with a zero breakFlag because we always refresh rIBASE on 8596 * return. 8597 */ 8598 .extern MterpCheckBefore 8599 REFRESH_IBASE 8600 movq rSELF, OUT_ARG0 8601 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8602 movq rPC, OUT_ARG2 8603 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8604 jmp .L_op_nop+(112*128) 8605 8606 /* ------------------------------ */ 8607 .balign 128 8608 .L_ALT_op_invoke_static: /* 0x71 */ 8609 /* File: x86_64/alt_stub.S */ 8610 /* 8611 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8612 * any interesting requests and then jump to the real instruction 8613 * handler. Unlike the Arm handler, we can't do this as a tail call 8614 * because rIBASE is caller save and we need to reload it. 8615 * 8616 * Note that unlike in the Arm implementation, we should never arrive 8617 * here with a zero breakFlag because we always refresh rIBASE on 8618 * return. 8619 */ 8620 .extern MterpCheckBefore 8621 REFRESH_IBASE 8622 movq rSELF, OUT_ARG0 8623 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8624 movq rPC, OUT_ARG2 8625 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8626 jmp .L_op_nop+(113*128) 8627 8628 /* ------------------------------ */ 8629 .balign 128 8630 .L_ALT_op_invoke_interface: /* 0x72 */ 8631 /* File: x86_64/alt_stub.S */ 8632 /* 8633 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8634 * any interesting requests and then jump to the real instruction 8635 * handler. Unlike the Arm handler, we can't do this as a tail call 8636 * because rIBASE is caller save and we need to reload it. 8637 * 8638 * Note that unlike in the Arm implementation, we should never arrive 8639 * here with a zero breakFlag because we always refresh rIBASE on 8640 * return. 8641 */ 8642 .extern MterpCheckBefore 8643 REFRESH_IBASE 8644 movq rSELF, OUT_ARG0 8645 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8646 movq rPC, OUT_ARG2 8647 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8648 jmp .L_op_nop+(114*128) 8649 8650 /* ------------------------------ */ 8651 .balign 128 8652 .L_ALT_op_return_void_no_barrier: /* 0x73 */ 8653 /* File: x86_64/alt_stub.S */ 8654 /* 8655 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8656 * any interesting requests and then jump to the real instruction 8657 * handler. Unlike the Arm handler, we can't do this as a tail call 8658 * because rIBASE is caller save and we need to reload it. 8659 * 8660 * Note that unlike in the Arm implementation, we should never arrive 8661 * here with a zero breakFlag because we always refresh rIBASE on 8662 * return. 8663 */ 8664 .extern MterpCheckBefore 8665 REFRESH_IBASE 8666 movq rSELF, OUT_ARG0 8667 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8668 movq rPC, OUT_ARG2 8669 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8670 jmp .L_op_nop+(115*128) 8671 8672 /* ------------------------------ */ 8673 .balign 128 8674 .L_ALT_op_invoke_virtual_range: /* 0x74 */ 8675 /* File: x86_64/alt_stub.S */ 8676 /* 8677 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8678 * any interesting requests and then jump to the real instruction 8679 * handler. Unlike the Arm handler, we can't do this as a tail call 8680 * because rIBASE is caller save and we need to reload it. 8681 * 8682 * Note that unlike in the Arm implementation, we should never arrive 8683 * here with a zero breakFlag because we always refresh rIBASE on 8684 * return. 8685 */ 8686 .extern MterpCheckBefore 8687 REFRESH_IBASE 8688 movq rSELF, OUT_ARG0 8689 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8690 movq rPC, OUT_ARG2 8691 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8692 jmp .L_op_nop+(116*128) 8693 8694 /* ------------------------------ */ 8695 .balign 128 8696 .L_ALT_op_invoke_super_range: /* 0x75 */ 8697 /* File: x86_64/alt_stub.S */ 8698 /* 8699 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8700 * any interesting requests and then jump to the real instruction 8701 * handler. Unlike the Arm handler, we can't do this as a tail call 8702 * because rIBASE is caller save and we need to reload it. 8703 * 8704 * Note that unlike in the Arm implementation, we should never arrive 8705 * here with a zero breakFlag because we always refresh rIBASE on 8706 * return. 8707 */ 8708 .extern MterpCheckBefore 8709 REFRESH_IBASE 8710 movq rSELF, OUT_ARG0 8711 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8712 movq rPC, OUT_ARG2 8713 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8714 jmp .L_op_nop+(117*128) 8715 8716 /* ------------------------------ */ 8717 .balign 128 8718 .L_ALT_op_invoke_direct_range: /* 0x76 */ 8719 /* File: x86_64/alt_stub.S */ 8720 /* 8721 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8722 * any interesting requests and then jump to the real instruction 8723 * handler. Unlike the Arm handler, we can't do this as a tail call 8724 * because rIBASE is caller save and we need to reload it. 8725 * 8726 * Note that unlike in the Arm implementation, we should never arrive 8727 * here with a zero breakFlag because we always refresh rIBASE on 8728 * return. 8729 */ 8730 .extern MterpCheckBefore 8731 REFRESH_IBASE 8732 movq rSELF, OUT_ARG0 8733 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8734 movq rPC, OUT_ARG2 8735 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8736 jmp .L_op_nop+(118*128) 8737 8738 /* ------------------------------ */ 8739 .balign 128 8740 .L_ALT_op_invoke_static_range: /* 0x77 */ 8741 /* File: x86_64/alt_stub.S */ 8742 /* 8743 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8744 * any interesting requests and then jump to the real instruction 8745 * handler. Unlike the Arm handler, we can't do this as a tail call 8746 * because rIBASE is caller save and we need to reload it. 8747 * 8748 * Note that unlike in the Arm implementation, we should never arrive 8749 * here with a zero breakFlag because we always refresh rIBASE on 8750 * return. 8751 */ 8752 .extern MterpCheckBefore 8753 REFRESH_IBASE 8754 movq rSELF, OUT_ARG0 8755 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8756 movq rPC, OUT_ARG2 8757 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8758 jmp .L_op_nop+(119*128) 8759 8760 /* ------------------------------ */ 8761 .balign 128 8762 .L_ALT_op_invoke_interface_range: /* 0x78 */ 8763 /* File: x86_64/alt_stub.S */ 8764 /* 8765 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8766 * any interesting requests and then jump to the real instruction 8767 * handler. Unlike the Arm handler, we can't do this as a tail call 8768 * because rIBASE is caller save and we need to reload it. 8769 * 8770 * Note that unlike in the Arm implementation, we should never arrive 8771 * here with a zero breakFlag because we always refresh rIBASE on 8772 * return. 8773 */ 8774 .extern MterpCheckBefore 8775 REFRESH_IBASE 8776 movq rSELF, OUT_ARG0 8777 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8778 movq rPC, OUT_ARG2 8779 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8780 jmp .L_op_nop+(120*128) 8781 8782 /* ------------------------------ */ 8783 .balign 128 8784 .L_ALT_op_unused_79: /* 0x79 */ 8785 /* File: x86_64/alt_stub.S */ 8786 /* 8787 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8788 * any interesting requests and then jump to the real instruction 8789 * handler. Unlike the Arm handler, we can't do this as a tail call 8790 * because rIBASE is caller save and we need to reload it. 8791 * 8792 * Note that unlike in the Arm implementation, we should never arrive 8793 * here with a zero breakFlag because we always refresh rIBASE on 8794 * return. 8795 */ 8796 .extern MterpCheckBefore 8797 REFRESH_IBASE 8798 movq rSELF, OUT_ARG0 8799 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8800 movq rPC, OUT_ARG2 8801 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8802 jmp .L_op_nop+(121*128) 8803 8804 /* ------------------------------ */ 8805 .balign 128 8806 .L_ALT_op_unused_7a: /* 0x7a */ 8807 /* File: x86_64/alt_stub.S */ 8808 /* 8809 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8810 * any interesting requests and then jump to the real instruction 8811 * handler. Unlike the Arm handler, we can't do this as a tail call 8812 * because rIBASE is caller save and we need to reload it. 8813 * 8814 * Note that unlike in the Arm implementation, we should never arrive 8815 * here with a zero breakFlag because we always refresh rIBASE on 8816 * return. 8817 */ 8818 .extern MterpCheckBefore 8819 REFRESH_IBASE 8820 movq rSELF, OUT_ARG0 8821 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8822 movq rPC, OUT_ARG2 8823 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8824 jmp .L_op_nop+(122*128) 8825 8826 /* ------------------------------ */ 8827 .balign 128 8828 .L_ALT_op_neg_int: /* 0x7b */ 8829 /* File: x86_64/alt_stub.S */ 8830 /* 8831 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8832 * any interesting requests and then jump to the real instruction 8833 * handler. Unlike the Arm handler, we can't do this as a tail call 8834 * because rIBASE is caller save and we need to reload it. 8835 * 8836 * Note that unlike in the Arm implementation, we should never arrive 8837 * here with a zero breakFlag because we always refresh rIBASE on 8838 * return. 8839 */ 8840 .extern MterpCheckBefore 8841 REFRESH_IBASE 8842 movq rSELF, OUT_ARG0 8843 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8844 movq rPC, OUT_ARG2 8845 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8846 jmp .L_op_nop+(123*128) 8847 8848 /* ------------------------------ */ 8849 .balign 128 8850 .L_ALT_op_not_int: /* 0x7c */ 8851 /* File: x86_64/alt_stub.S */ 8852 /* 8853 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8854 * any interesting requests and then jump to the real instruction 8855 * handler. Unlike the Arm handler, we can't do this as a tail call 8856 * because rIBASE is caller save and we need to reload it. 8857 * 8858 * Note that unlike in the Arm implementation, we should never arrive 8859 * here with a zero breakFlag because we always refresh rIBASE on 8860 * return. 8861 */ 8862 .extern MterpCheckBefore 8863 REFRESH_IBASE 8864 movq rSELF, OUT_ARG0 8865 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8866 movq rPC, OUT_ARG2 8867 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8868 jmp .L_op_nop+(124*128) 8869 8870 /* ------------------------------ */ 8871 .balign 128 8872 .L_ALT_op_neg_long: /* 0x7d */ 8873 /* File: x86_64/alt_stub.S */ 8874 /* 8875 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8876 * any interesting requests and then jump to the real instruction 8877 * handler. Unlike the Arm handler, we can't do this as a tail call 8878 * because rIBASE is caller save and we need to reload it. 8879 * 8880 * Note that unlike in the Arm implementation, we should never arrive 8881 * here with a zero breakFlag because we always refresh rIBASE on 8882 * return. 8883 */ 8884 .extern MterpCheckBefore 8885 REFRESH_IBASE 8886 movq rSELF, OUT_ARG0 8887 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8888 movq rPC, OUT_ARG2 8889 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8890 jmp .L_op_nop+(125*128) 8891 8892 /* ------------------------------ */ 8893 .balign 128 8894 .L_ALT_op_not_long: /* 0x7e */ 8895 /* File: x86_64/alt_stub.S */ 8896 /* 8897 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8898 * any interesting requests and then jump to the real instruction 8899 * handler. Unlike the Arm handler, we can't do this as a tail call 8900 * because rIBASE is caller save and we need to reload it. 8901 * 8902 * Note that unlike in the Arm implementation, we should never arrive 8903 * here with a zero breakFlag because we always refresh rIBASE on 8904 * return. 8905 */ 8906 .extern MterpCheckBefore 8907 REFRESH_IBASE 8908 movq rSELF, OUT_ARG0 8909 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8910 movq rPC, OUT_ARG2 8911 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8912 jmp .L_op_nop+(126*128) 8913 8914 /* ------------------------------ */ 8915 .balign 128 8916 .L_ALT_op_neg_float: /* 0x7f */ 8917 /* File: x86_64/alt_stub.S */ 8918 /* 8919 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8920 * any interesting requests and then jump to the real instruction 8921 * handler. Unlike the Arm handler, we can't do this as a tail call 8922 * because rIBASE is caller save and we need to reload it. 8923 * 8924 * Note that unlike in the Arm implementation, we should never arrive 8925 * here with a zero breakFlag because we always refresh rIBASE on 8926 * return. 8927 */ 8928 .extern MterpCheckBefore 8929 REFRESH_IBASE 8930 movq rSELF, OUT_ARG0 8931 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8932 movq rPC, OUT_ARG2 8933 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8934 jmp .L_op_nop+(127*128) 8935 8936 /* ------------------------------ */ 8937 .balign 128 8938 .L_ALT_op_neg_double: /* 0x80 */ 8939 /* File: x86_64/alt_stub.S */ 8940 /* 8941 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8942 * any interesting requests and then jump to the real instruction 8943 * handler. Unlike the Arm handler, we can't do this as a tail call 8944 * because rIBASE is caller save and we need to reload it. 8945 * 8946 * Note that unlike in the Arm implementation, we should never arrive 8947 * here with a zero breakFlag because we always refresh rIBASE on 8948 * return. 8949 */ 8950 .extern MterpCheckBefore 8951 REFRESH_IBASE 8952 movq rSELF, OUT_ARG0 8953 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8954 movq rPC, OUT_ARG2 8955 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8956 jmp .L_op_nop+(128*128) 8957 8958 /* ------------------------------ */ 8959 .balign 128 8960 .L_ALT_op_int_to_long: /* 0x81 */ 8961 /* File: x86_64/alt_stub.S */ 8962 /* 8963 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8964 * any interesting requests and then jump to the real instruction 8965 * handler. Unlike the Arm handler, we can't do this as a tail call 8966 * because rIBASE is caller save and we need to reload it. 8967 * 8968 * Note that unlike in the Arm implementation, we should never arrive 8969 * here with a zero breakFlag because we always refresh rIBASE on 8970 * return. 8971 */ 8972 .extern MterpCheckBefore 8973 REFRESH_IBASE 8974 movq rSELF, OUT_ARG0 8975 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8976 movq rPC, OUT_ARG2 8977 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 8978 jmp .L_op_nop+(129*128) 8979 8980 /* ------------------------------ */ 8981 .balign 128 8982 .L_ALT_op_int_to_float: /* 0x82 */ 8983 /* File: x86_64/alt_stub.S */ 8984 /* 8985 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8986 * any interesting requests and then jump to the real instruction 8987 * handler. Unlike the Arm handler, we can't do this as a tail call 8988 * because rIBASE is caller save and we need to reload it. 8989 * 8990 * Note that unlike in the Arm implementation, we should never arrive 8991 * here with a zero breakFlag because we always refresh rIBASE on 8992 * return. 8993 */ 8994 .extern MterpCheckBefore 8995 REFRESH_IBASE 8996 movq rSELF, OUT_ARG0 8997 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 8998 movq rPC, OUT_ARG2 8999 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9000 jmp .L_op_nop+(130*128) 9001 9002 /* ------------------------------ */ 9003 .balign 128 9004 .L_ALT_op_int_to_double: /* 0x83 */ 9005 /* File: x86_64/alt_stub.S */ 9006 /* 9007 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9008 * any interesting requests and then jump to the real instruction 9009 * handler. Unlike the Arm handler, we can't do this as a tail call 9010 * because rIBASE is caller save and we need to reload it. 9011 * 9012 * Note that unlike in the Arm implementation, we should never arrive 9013 * here with a zero breakFlag because we always refresh rIBASE on 9014 * return. 9015 */ 9016 .extern MterpCheckBefore 9017 REFRESH_IBASE 9018 movq rSELF, OUT_ARG0 9019 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9020 movq rPC, OUT_ARG2 9021 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9022 jmp .L_op_nop+(131*128) 9023 9024 /* ------------------------------ */ 9025 .balign 128 9026 .L_ALT_op_long_to_int: /* 0x84 */ 9027 /* File: x86_64/alt_stub.S */ 9028 /* 9029 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9030 * any interesting requests and then jump to the real instruction 9031 * handler. Unlike the Arm handler, we can't do this as a tail call 9032 * because rIBASE is caller save and we need to reload it. 9033 * 9034 * Note that unlike in the Arm implementation, we should never arrive 9035 * here with a zero breakFlag because we always refresh rIBASE on 9036 * return. 9037 */ 9038 .extern MterpCheckBefore 9039 REFRESH_IBASE 9040 movq rSELF, OUT_ARG0 9041 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9042 movq rPC, OUT_ARG2 9043 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9044 jmp .L_op_nop+(132*128) 9045 9046 /* ------------------------------ */ 9047 .balign 128 9048 .L_ALT_op_long_to_float: /* 0x85 */ 9049 /* File: x86_64/alt_stub.S */ 9050 /* 9051 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9052 * any interesting requests and then jump to the real instruction 9053 * handler. Unlike the Arm handler, we can't do this as a tail call 9054 * because rIBASE is caller save and we need to reload it. 9055 * 9056 * Note that unlike in the Arm implementation, we should never arrive 9057 * here with a zero breakFlag because we always refresh rIBASE on 9058 * return. 9059 */ 9060 .extern MterpCheckBefore 9061 REFRESH_IBASE 9062 movq rSELF, OUT_ARG0 9063 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9064 movq rPC, OUT_ARG2 9065 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9066 jmp .L_op_nop+(133*128) 9067 9068 /* ------------------------------ */ 9069 .balign 128 9070 .L_ALT_op_long_to_double: /* 0x86 */ 9071 /* File: x86_64/alt_stub.S */ 9072 /* 9073 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9074 * any interesting requests and then jump to the real instruction 9075 * handler. Unlike the Arm handler, we can't do this as a tail call 9076 * because rIBASE is caller save and we need to reload it. 9077 * 9078 * Note that unlike in the Arm implementation, we should never arrive 9079 * here with a zero breakFlag because we always refresh rIBASE on 9080 * return. 9081 */ 9082 .extern MterpCheckBefore 9083 REFRESH_IBASE 9084 movq rSELF, OUT_ARG0 9085 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9086 movq rPC, OUT_ARG2 9087 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9088 jmp .L_op_nop+(134*128) 9089 9090 /* ------------------------------ */ 9091 .balign 128 9092 .L_ALT_op_float_to_int: /* 0x87 */ 9093 /* File: x86_64/alt_stub.S */ 9094 /* 9095 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9096 * any interesting requests and then jump to the real instruction 9097 * handler. Unlike the Arm handler, we can't do this as a tail call 9098 * because rIBASE is caller save and we need to reload it. 9099 * 9100 * Note that unlike in the Arm implementation, we should never arrive 9101 * here with a zero breakFlag because we always refresh rIBASE on 9102 * return. 9103 */ 9104 .extern MterpCheckBefore 9105 REFRESH_IBASE 9106 movq rSELF, OUT_ARG0 9107 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9108 movq rPC, OUT_ARG2 9109 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9110 jmp .L_op_nop+(135*128) 9111 9112 /* ------------------------------ */ 9113 .balign 128 9114 .L_ALT_op_float_to_long: /* 0x88 */ 9115 /* File: x86_64/alt_stub.S */ 9116 /* 9117 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9118 * any interesting requests and then jump to the real instruction 9119 * handler. Unlike the Arm handler, we can't do this as a tail call 9120 * because rIBASE is caller save and we need to reload it. 9121 * 9122 * Note that unlike in the Arm implementation, we should never arrive 9123 * here with a zero breakFlag because we always refresh rIBASE on 9124 * return. 9125 */ 9126 .extern MterpCheckBefore 9127 REFRESH_IBASE 9128 movq rSELF, OUT_ARG0 9129 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9130 movq rPC, OUT_ARG2 9131 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9132 jmp .L_op_nop+(136*128) 9133 9134 /* ------------------------------ */ 9135 .balign 128 9136 .L_ALT_op_float_to_double: /* 0x89 */ 9137 /* File: x86_64/alt_stub.S */ 9138 /* 9139 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9140 * any interesting requests and then jump to the real instruction 9141 * handler. Unlike the Arm handler, we can't do this as a tail call 9142 * because rIBASE is caller save and we need to reload it. 9143 * 9144 * Note that unlike in the Arm implementation, we should never arrive 9145 * here with a zero breakFlag because we always refresh rIBASE on 9146 * return. 9147 */ 9148 .extern MterpCheckBefore 9149 REFRESH_IBASE 9150 movq rSELF, OUT_ARG0 9151 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9152 movq rPC, OUT_ARG2 9153 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9154 jmp .L_op_nop+(137*128) 9155 9156 /* ------------------------------ */ 9157 .balign 128 9158 .L_ALT_op_double_to_int: /* 0x8a */ 9159 /* File: x86_64/alt_stub.S */ 9160 /* 9161 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9162 * any interesting requests and then jump to the real instruction 9163 * handler. Unlike the Arm handler, we can't do this as a tail call 9164 * because rIBASE is caller save and we need to reload it. 9165 * 9166 * Note that unlike in the Arm implementation, we should never arrive 9167 * here with a zero breakFlag because we always refresh rIBASE on 9168 * return. 9169 */ 9170 .extern MterpCheckBefore 9171 REFRESH_IBASE 9172 movq rSELF, OUT_ARG0 9173 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9174 movq rPC, OUT_ARG2 9175 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9176 jmp .L_op_nop+(138*128) 9177 9178 /* ------------------------------ */ 9179 .balign 128 9180 .L_ALT_op_double_to_long: /* 0x8b */ 9181 /* File: x86_64/alt_stub.S */ 9182 /* 9183 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9184 * any interesting requests and then jump to the real instruction 9185 * handler. Unlike the Arm handler, we can't do this as a tail call 9186 * because rIBASE is caller save and we need to reload it. 9187 * 9188 * Note that unlike in the Arm implementation, we should never arrive 9189 * here with a zero breakFlag because we always refresh rIBASE on 9190 * return. 9191 */ 9192 .extern MterpCheckBefore 9193 REFRESH_IBASE 9194 movq rSELF, OUT_ARG0 9195 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9196 movq rPC, OUT_ARG2 9197 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9198 jmp .L_op_nop+(139*128) 9199 9200 /* ------------------------------ */ 9201 .balign 128 9202 .L_ALT_op_double_to_float: /* 0x8c */ 9203 /* File: x86_64/alt_stub.S */ 9204 /* 9205 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9206 * any interesting requests and then jump to the real instruction 9207 * handler. Unlike the Arm handler, we can't do this as a tail call 9208 * because rIBASE is caller save and we need to reload it. 9209 * 9210 * Note that unlike in the Arm implementation, we should never arrive 9211 * here with a zero breakFlag because we always refresh rIBASE on 9212 * return. 9213 */ 9214 .extern MterpCheckBefore 9215 REFRESH_IBASE 9216 movq rSELF, OUT_ARG0 9217 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9218 movq rPC, OUT_ARG2 9219 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9220 jmp .L_op_nop+(140*128) 9221 9222 /* ------------------------------ */ 9223 .balign 128 9224 .L_ALT_op_int_to_byte: /* 0x8d */ 9225 /* File: x86_64/alt_stub.S */ 9226 /* 9227 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9228 * any interesting requests and then jump to the real instruction 9229 * handler. Unlike the Arm handler, we can't do this as a tail call 9230 * because rIBASE is caller save and we need to reload it. 9231 * 9232 * Note that unlike in the Arm implementation, we should never arrive 9233 * here with a zero breakFlag because we always refresh rIBASE on 9234 * return. 9235 */ 9236 .extern MterpCheckBefore 9237 REFRESH_IBASE 9238 movq rSELF, OUT_ARG0 9239 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9240 movq rPC, OUT_ARG2 9241 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9242 jmp .L_op_nop+(141*128) 9243 9244 /* ------------------------------ */ 9245 .balign 128 9246 .L_ALT_op_int_to_char: /* 0x8e */ 9247 /* File: x86_64/alt_stub.S */ 9248 /* 9249 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9250 * any interesting requests and then jump to the real instruction 9251 * handler. Unlike the Arm handler, we can't do this as a tail call 9252 * because rIBASE is caller save and we need to reload it. 9253 * 9254 * Note that unlike in the Arm implementation, we should never arrive 9255 * here with a zero breakFlag because we always refresh rIBASE on 9256 * return. 9257 */ 9258 .extern MterpCheckBefore 9259 REFRESH_IBASE 9260 movq rSELF, OUT_ARG0 9261 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9262 movq rPC, OUT_ARG2 9263 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9264 jmp .L_op_nop+(142*128) 9265 9266 /* ------------------------------ */ 9267 .balign 128 9268 .L_ALT_op_int_to_short: /* 0x8f */ 9269 /* File: x86_64/alt_stub.S */ 9270 /* 9271 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9272 * any interesting requests and then jump to the real instruction 9273 * handler. Unlike the Arm handler, we can't do this as a tail call 9274 * because rIBASE is caller save and we need to reload it. 9275 * 9276 * Note that unlike in the Arm implementation, we should never arrive 9277 * here with a zero breakFlag because we always refresh rIBASE on 9278 * return. 9279 */ 9280 .extern MterpCheckBefore 9281 REFRESH_IBASE 9282 movq rSELF, OUT_ARG0 9283 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9284 movq rPC, OUT_ARG2 9285 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9286 jmp .L_op_nop+(143*128) 9287 9288 /* ------------------------------ */ 9289 .balign 128 9290 .L_ALT_op_add_int: /* 0x90 */ 9291 /* File: x86_64/alt_stub.S */ 9292 /* 9293 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9294 * any interesting requests and then jump to the real instruction 9295 * handler. Unlike the Arm handler, we can't do this as a tail call 9296 * because rIBASE is caller save and we need to reload it. 9297 * 9298 * Note that unlike in the Arm implementation, we should never arrive 9299 * here with a zero breakFlag because we always refresh rIBASE on 9300 * return. 9301 */ 9302 .extern MterpCheckBefore 9303 REFRESH_IBASE 9304 movq rSELF, OUT_ARG0 9305 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9306 movq rPC, OUT_ARG2 9307 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9308 jmp .L_op_nop+(144*128) 9309 9310 /* ------------------------------ */ 9311 .balign 128 9312 .L_ALT_op_sub_int: /* 0x91 */ 9313 /* File: x86_64/alt_stub.S */ 9314 /* 9315 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9316 * any interesting requests and then jump to the real instruction 9317 * handler. Unlike the Arm handler, we can't do this as a tail call 9318 * because rIBASE is caller save and we need to reload it. 9319 * 9320 * Note that unlike in the Arm implementation, we should never arrive 9321 * here with a zero breakFlag because we always refresh rIBASE on 9322 * return. 9323 */ 9324 .extern MterpCheckBefore 9325 REFRESH_IBASE 9326 movq rSELF, OUT_ARG0 9327 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9328 movq rPC, OUT_ARG2 9329 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9330 jmp .L_op_nop+(145*128) 9331 9332 /* ------------------------------ */ 9333 .balign 128 9334 .L_ALT_op_mul_int: /* 0x92 */ 9335 /* File: x86_64/alt_stub.S */ 9336 /* 9337 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9338 * any interesting requests and then jump to the real instruction 9339 * handler. Unlike the Arm handler, we can't do this as a tail call 9340 * because rIBASE is caller save and we need to reload it. 9341 * 9342 * Note that unlike in the Arm implementation, we should never arrive 9343 * here with a zero breakFlag because we always refresh rIBASE on 9344 * return. 9345 */ 9346 .extern MterpCheckBefore 9347 REFRESH_IBASE 9348 movq rSELF, OUT_ARG0 9349 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9350 movq rPC, OUT_ARG2 9351 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9352 jmp .L_op_nop+(146*128) 9353 9354 /* ------------------------------ */ 9355 .balign 128 9356 .L_ALT_op_div_int: /* 0x93 */ 9357 /* File: x86_64/alt_stub.S */ 9358 /* 9359 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9360 * any interesting requests and then jump to the real instruction 9361 * handler. Unlike the Arm handler, we can't do this as a tail call 9362 * because rIBASE is caller save and we need to reload it. 9363 * 9364 * Note that unlike in the Arm implementation, we should never arrive 9365 * here with a zero breakFlag because we always refresh rIBASE on 9366 * return. 9367 */ 9368 .extern MterpCheckBefore 9369 REFRESH_IBASE 9370 movq rSELF, OUT_ARG0 9371 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9372 movq rPC, OUT_ARG2 9373 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9374 jmp .L_op_nop+(147*128) 9375 9376 /* ------------------------------ */ 9377 .balign 128 9378 .L_ALT_op_rem_int: /* 0x94 */ 9379 /* File: x86_64/alt_stub.S */ 9380 /* 9381 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9382 * any interesting requests and then jump to the real instruction 9383 * handler. Unlike the Arm handler, we can't do this as a tail call 9384 * because rIBASE is caller save and we need to reload it. 9385 * 9386 * Note that unlike in the Arm implementation, we should never arrive 9387 * here with a zero breakFlag because we always refresh rIBASE on 9388 * return. 9389 */ 9390 .extern MterpCheckBefore 9391 REFRESH_IBASE 9392 movq rSELF, OUT_ARG0 9393 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9394 movq rPC, OUT_ARG2 9395 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9396 jmp .L_op_nop+(148*128) 9397 9398 /* ------------------------------ */ 9399 .balign 128 9400 .L_ALT_op_and_int: /* 0x95 */ 9401 /* File: x86_64/alt_stub.S */ 9402 /* 9403 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9404 * any interesting requests and then jump to the real instruction 9405 * handler. Unlike the Arm handler, we can't do this as a tail call 9406 * because rIBASE is caller save and we need to reload it. 9407 * 9408 * Note that unlike in the Arm implementation, we should never arrive 9409 * here with a zero breakFlag because we always refresh rIBASE on 9410 * return. 9411 */ 9412 .extern MterpCheckBefore 9413 REFRESH_IBASE 9414 movq rSELF, OUT_ARG0 9415 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9416 movq rPC, OUT_ARG2 9417 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9418 jmp .L_op_nop+(149*128) 9419 9420 /* ------------------------------ */ 9421 .balign 128 9422 .L_ALT_op_or_int: /* 0x96 */ 9423 /* File: x86_64/alt_stub.S */ 9424 /* 9425 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9426 * any interesting requests and then jump to the real instruction 9427 * handler. Unlike the Arm handler, we can't do this as a tail call 9428 * because rIBASE is caller save and we need to reload it. 9429 * 9430 * Note that unlike in the Arm implementation, we should never arrive 9431 * here with a zero breakFlag because we always refresh rIBASE on 9432 * return. 9433 */ 9434 .extern MterpCheckBefore 9435 REFRESH_IBASE 9436 movq rSELF, OUT_ARG0 9437 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9438 movq rPC, OUT_ARG2 9439 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9440 jmp .L_op_nop+(150*128) 9441 9442 /* ------------------------------ */ 9443 .balign 128 9444 .L_ALT_op_xor_int: /* 0x97 */ 9445 /* File: x86_64/alt_stub.S */ 9446 /* 9447 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9448 * any interesting requests and then jump to the real instruction 9449 * handler. Unlike the Arm handler, we can't do this as a tail call 9450 * because rIBASE is caller save and we need to reload it. 9451 * 9452 * Note that unlike in the Arm implementation, we should never arrive 9453 * here with a zero breakFlag because we always refresh rIBASE on 9454 * return. 9455 */ 9456 .extern MterpCheckBefore 9457 REFRESH_IBASE 9458 movq rSELF, OUT_ARG0 9459 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9460 movq rPC, OUT_ARG2 9461 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9462 jmp .L_op_nop+(151*128) 9463 9464 /* ------------------------------ */ 9465 .balign 128 9466 .L_ALT_op_shl_int: /* 0x98 */ 9467 /* File: x86_64/alt_stub.S */ 9468 /* 9469 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9470 * any interesting requests and then jump to the real instruction 9471 * handler. Unlike the Arm handler, we can't do this as a tail call 9472 * because rIBASE is caller save and we need to reload it. 9473 * 9474 * Note that unlike in the Arm implementation, we should never arrive 9475 * here with a zero breakFlag because we always refresh rIBASE on 9476 * return. 9477 */ 9478 .extern MterpCheckBefore 9479 REFRESH_IBASE 9480 movq rSELF, OUT_ARG0 9481 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9482 movq rPC, OUT_ARG2 9483 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9484 jmp .L_op_nop+(152*128) 9485 9486 /* ------------------------------ */ 9487 .balign 128 9488 .L_ALT_op_shr_int: /* 0x99 */ 9489 /* File: x86_64/alt_stub.S */ 9490 /* 9491 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9492 * any interesting requests and then jump to the real instruction 9493 * handler. Unlike the Arm handler, we can't do this as a tail call 9494 * because rIBASE is caller save and we need to reload it. 9495 * 9496 * Note that unlike in the Arm implementation, we should never arrive 9497 * here with a zero breakFlag because we always refresh rIBASE on 9498 * return. 9499 */ 9500 .extern MterpCheckBefore 9501 REFRESH_IBASE 9502 movq rSELF, OUT_ARG0 9503 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9504 movq rPC, OUT_ARG2 9505 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9506 jmp .L_op_nop+(153*128) 9507 9508 /* ------------------------------ */ 9509 .balign 128 9510 .L_ALT_op_ushr_int: /* 0x9a */ 9511 /* File: x86_64/alt_stub.S */ 9512 /* 9513 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9514 * any interesting requests and then jump to the real instruction 9515 * handler. Unlike the Arm handler, we can't do this as a tail call 9516 * because rIBASE is caller save and we need to reload it. 9517 * 9518 * Note that unlike in the Arm implementation, we should never arrive 9519 * here with a zero breakFlag because we always refresh rIBASE on 9520 * return. 9521 */ 9522 .extern MterpCheckBefore 9523 REFRESH_IBASE 9524 movq rSELF, OUT_ARG0 9525 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9526 movq rPC, OUT_ARG2 9527 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9528 jmp .L_op_nop+(154*128) 9529 9530 /* ------------------------------ */ 9531 .balign 128 9532 .L_ALT_op_add_long: /* 0x9b */ 9533 /* File: x86_64/alt_stub.S */ 9534 /* 9535 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9536 * any interesting requests and then jump to the real instruction 9537 * handler. Unlike the Arm handler, we can't do this as a tail call 9538 * because rIBASE is caller save and we need to reload it. 9539 * 9540 * Note that unlike in the Arm implementation, we should never arrive 9541 * here with a zero breakFlag because we always refresh rIBASE on 9542 * return. 9543 */ 9544 .extern MterpCheckBefore 9545 REFRESH_IBASE 9546 movq rSELF, OUT_ARG0 9547 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9548 movq rPC, OUT_ARG2 9549 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9550 jmp .L_op_nop+(155*128) 9551 9552 /* ------------------------------ */ 9553 .balign 128 9554 .L_ALT_op_sub_long: /* 0x9c */ 9555 /* File: x86_64/alt_stub.S */ 9556 /* 9557 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9558 * any interesting requests and then jump to the real instruction 9559 * handler. Unlike the Arm handler, we can't do this as a tail call 9560 * because rIBASE is caller save and we need to reload it. 9561 * 9562 * Note that unlike in the Arm implementation, we should never arrive 9563 * here with a zero breakFlag because we always refresh rIBASE on 9564 * return. 9565 */ 9566 .extern MterpCheckBefore 9567 REFRESH_IBASE 9568 movq rSELF, OUT_ARG0 9569 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9570 movq rPC, OUT_ARG2 9571 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9572 jmp .L_op_nop+(156*128) 9573 9574 /* ------------------------------ */ 9575 .balign 128 9576 .L_ALT_op_mul_long: /* 0x9d */ 9577 /* File: x86_64/alt_stub.S */ 9578 /* 9579 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9580 * any interesting requests and then jump to the real instruction 9581 * handler. Unlike the Arm handler, we can't do this as a tail call 9582 * because rIBASE is caller save and we need to reload it. 9583 * 9584 * Note that unlike in the Arm implementation, we should never arrive 9585 * here with a zero breakFlag because we always refresh rIBASE on 9586 * return. 9587 */ 9588 .extern MterpCheckBefore 9589 REFRESH_IBASE 9590 movq rSELF, OUT_ARG0 9591 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9592 movq rPC, OUT_ARG2 9593 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9594 jmp .L_op_nop+(157*128) 9595 9596 /* ------------------------------ */ 9597 .balign 128 9598 .L_ALT_op_div_long: /* 0x9e */ 9599 /* File: x86_64/alt_stub.S */ 9600 /* 9601 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9602 * any interesting requests and then jump to the real instruction 9603 * handler. Unlike the Arm handler, we can't do this as a tail call 9604 * because rIBASE is caller save and we need to reload it. 9605 * 9606 * Note that unlike in the Arm implementation, we should never arrive 9607 * here with a zero breakFlag because we always refresh rIBASE on 9608 * return. 9609 */ 9610 .extern MterpCheckBefore 9611 REFRESH_IBASE 9612 movq rSELF, OUT_ARG0 9613 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9614 movq rPC, OUT_ARG2 9615 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9616 jmp .L_op_nop+(158*128) 9617 9618 /* ------------------------------ */ 9619 .balign 128 9620 .L_ALT_op_rem_long: /* 0x9f */ 9621 /* File: x86_64/alt_stub.S */ 9622 /* 9623 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9624 * any interesting requests and then jump to the real instruction 9625 * handler. Unlike the Arm handler, we can't do this as a tail call 9626 * because rIBASE is caller save and we need to reload it. 9627 * 9628 * Note that unlike in the Arm implementation, we should never arrive 9629 * here with a zero breakFlag because we always refresh rIBASE on 9630 * return. 9631 */ 9632 .extern MterpCheckBefore 9633 REFRESH_IBASE 9634 movq rSELF, OUT_ARG0 9635 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9636 movq rPC, OUT_ARG2 9637 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9638 jmp .L_op_nop+(159*128) 9639 9640 /* ------------------------------ */ 9641 .balign 128 9642 .L_ALT_op_and_long: /* 0xa0 */ 9643 /* File: x86_64/alt_stub.S */ 9644 /* 9645 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9646 * any interesting requests and then jump to the real instruction 9647 * handler. Unlike the Arm handler, we can't do this as a tail call 9648 * because rIBASE is caller save and we need to reload it. 9649 * 9650 * Note that unlike in the Arm implementation, we should never arrive 9651 * here with a zero breakFlag because we always refresh rIBASE on 9652 * return. 9653 */ 9654 .extern MterpCheckBefore 9655 REFRESH_IBASE 9656 movq rSELF, OUT_ARG0 9657 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9658 movq rPC, OUT_ARG2 9659 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9660 jmp .L_op_nop+(160*128) 9661 9662 /* ------------------------------ */ 9663 .balign 128 9664 .L_ALT_op_or_long: /* 0xa1 */ 9665 /* File: x86_64/alt_stub.S */ 9666 /* 9667 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9668 * any interesting requests and then jump to the real instruction 9669 * handler. Unlike the Arm handler, we can't do this as a tail call 9670 * because rIBASE is caller save and we need to reload it. 9671 * 9672 * Note that unlike in the Arm implementation, we should never arrive 9673 * here with a zero breakFlag because we always refresh rIBASE on 9674 * return. 9675 */ 9676 .extern MterpCheckBefore 9677 REFRESH_IBASE 9678 movq rSELF, OUT_ARG0 9679 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9680 movq rPC, OUT_ARG2 9681 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9682 jmp .L_op_nop+(161*128) 9683 9684 /* ------------------------------ */ 9685 .balign 128 9686 .L_ALT_op_xor_long: /* 0xa2 */ 9687 /* File: x86_64/alt_stub.S */ 9688 /* 9689 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9690 * any interesting requests and then jump to the real instruction 9691 * handler. Unlike the Arm handler, we can't do this as a tail call 9692 * because rIBASE is caller save and we need to reload it. 9693 * 9694 * Note that unlike in the Arm implementation, we should never arrive 9695 * here with a zero breakFlag because we always refresh rIBASE on 9696 * return. 9697 */ 9698 .extern MterpCheckBefore 9699 REFRESH_IBASE 9700 movq rSELF, OUT_ARG0 9701 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9702 movq rPC, OUT_ARG2 9703 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9704 jmp .L_op_nop+(162*128) 9705 9706 /* ------------------------------ */ 9707 .balign 128 9708 .L_ALT_op_shl_long: /* 0xa3 */ 9709 /* File: x86_64/alt_stub.S */ 9710 /* 9711 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9712 * any interesting requests and then jump to the real instruction 9713 * handler. Unlike the Arm handler, we can't do this as a tail call 9714 * because rIBASE is caller save and we need to reload it. 9715 * 9716 * Note that unlike in the Arm implementation, we should never arrive 9717 * here with a zero breakFlag because we always refresh rIBASE on 9718 * return. 9719 */ 9720 .extern MterpCheckBefore 9721 REFRESH_IBASE 9722 movq rSELF, OUT_ARG0 9723 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9724 movq rPC, OUT_ARG2 9725 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9726 jmp .L_op_nop+(163*128) 9727 9728 /* ------------------------------ */ 9729 .balign 128 9730 .L_ALT_op_shr_long: /* 0xa4 */ 9731 /* File: x86_64/alt_stub.S */ 9732 /* 9733 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9734 * any interesting requests and then jump to the real instruction 9735 * handler. Unlike the Arm handler, we can't do this as a tail call 9736 * because rIBASE is caller save and we need to reload it. 9737 * 9738 * Note that unlike in the Arm implementation, we should never arrive 9739 * here with a zero breakFlag because we always refresh rIBASE on 9740 * return. 9741 */ 9742 .extern MterpCheckBefore 9743 REFRESH_IBASE 9744 movq rSELF, OUT_ARG0 9745 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9746 movq rPC, OUT_ARG2 9747 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9748 jmp .L_op_nop+(164*128) 9749 9750 /* ------------------------------ */ 9751 .balign 128 9752 .L_ALT_op_ushr_long: /* 0xa5 */ 9753 /* File: x86_64/alt_stub.S */ 9754 /* 9755 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9756 * any interesting requests and then jump to the real instruction 9757 * handler. Unlike the Arm handler, we can't do this as a tail call 9758 * because rIBASE is caller save and we need to reload it. 9759 * 9760 * Note that unlike in the Arm implementation, we should never arrive 9761 * here with a zero breakFlag because we always refresh rIBASE on 9762 * return. 9763 */ 9764 .extern MterpCheckBefore 9765 REFRESH_IBASE 9766 movq rSELF, OUT_ARG0 9767 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9768 movq rPC, OUT_ARG2 9769 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9770 jmp .L_op_nop+(165*128) 9771 9772 /* ------------------------------ */ 9773 .balign 128 9774 .L_ALT_op_add_float: /* 0xa6 */ 9775 /* File: x86_64/alt_stub.S */ 9776 /* 9777 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9778 * any interesting requests and then jump to the real instruction 9779 * handler. Unlike the Arm handler, we can't do this as a tail call 9780 * because rIBASE is caller save and we need to reload it. 9781 * 9782 * Note that unlike in the Arm implementation, we should never arrive 9783 * here with a zero breakFlag because we always refresh rIBASE on 9784 * return. 9785 */ 9786 .extern MterpCheckBefore 9787 REFRESH_IBASE 9788 movq rSELF, OUT_ARG0 9789 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9790 movq rPC, OUT_ARG2 9791 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9792 jmp .L_op_nop+(166*128) 9793 9794 /* ------------------------------ */ 9795 .balign 128 9796 .L_ALT_op_sub_float: /* 0xa7 */ 9797 /* File: x86_64/alt_stub.S */ 9798 /* 9799 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9800 * any interesting requests and then jump to the real instruction 9801 * handler. Unlike the Arm handler, we can't do this as a tail call 9802 * because rIBASE is caller save and we need to reload it. 9803 * 9804 * Note that unlike in the Arm implementation, we should never arrive 9805 * here with a zero breakFlag because we always refresh rIBASE on 9806 * return. 9807 */ 9808 .extern MterpCheckBefore 9809 REFRESH_IBASE 9810 movq rSELF, OUT_ARG0 9811 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9812 movq rPC, OUT_ARG2 9813 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9814 jmp .L_op_nop+(167*128) 9815 9816 /* ------------------------------ */ 9817 .balign 128 9818 .L_ALT_op_mul_float: /* 0xa8 */ 9819 /* File: x86_64/alt_stub.S */ 9820 /* 9821 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9822 * any interesting requests and then jump to the real instruction 9823 * handler. Unlike the Arm handler, we can't do this as a tail call 9824 * because rIBASE is caller save and we need to reload it. 9825 * 9826 * Note that unlike in the Arm implementation, we should never arrive 9827 * here with a zero breakFlag because we always refresh rIBASE on 9828 * return. 9829 */ 9830 .extern MterpCheckBefore 9831 REFRESH_IBASE 9832 movq rSELF, OUT_ARG0 9833 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9834 movq rPC, OUT_ARG2 9835 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9836 jmp .L_op_nop+(168*128) 9837 9838 /* ------------------------------ */ 9839 .balign 128 9840 .L_ALT_op_div_float: /* 0xa9 */ 9841 /* File: x86_64/alt_stub.S */ 9842 /* 9843 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9844 * any interesting requests and then jump to the real instruction 9845 * handler. Unlike the Arm handler, we can't do this as a tail call 9846 * because rIBASE is caller save and we need to reload it. 9847 * 9848 * Note that unlike in the Arm implementation, we should never arrive 9849 * here with a zero breakFlag because we always refresh rIBASE on 9850 * return. 9851 */ 9852 .extern MterpCheckBefore 9853 REFRESH_IBASE 9854 movq rSELF, OUT_ARG0 9855 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9856 movq rPC, OUT_ARG2 9857 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9858 jmp .L_op_nop+(169*128) 9859 9860 /* ------------------------------ */ 9861 .balign 128 9862 .L_ALT_op_rem_float: /* 0xaa */ 9863 /* File: x86_64/alt_stub.S */ 9864 /* 9865 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9866 * any interesting requests and then jump to the real instruction 9867 * handler. Unlike the Arm handler, we can't do this as a tail call 9868 * because rIBASE is caller save and we need to reload it. 9869 * 9870 * Note that unlike in the Arm implementation, we should never arrive 9871 * here with a zero breakFlag because we always refresh rIBASE on 9872 * return. 9873 */ 9874 .extern MterpCheckBefore 9875 REFRESH_IBASE 9876 movq rSELF, OUT_ARG0 9877 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9878 movq rPC, OUT_ARG2 9879 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9880 jmp .L_op_nop+(170*128) 9881 9882 /* ------------------------------ */ 9883 .balign 128 9884 .L_ALT_op_add_double: /* 0xab */ 9885 /* File: x86_64/alt_stub.S */ 9886 /* 9887 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9888 * any interesting requests and then jump to the real instruction 9889 * handler. Unlike the Arm handler, we can't do this as a tail call 9890 * because rIBASE is caller save and we need to reload it. 9891 * 9892 * Note that unlike in the Arm implementation, we should never arrive 9893 * here with a zero breakFlag because we always refresh rIBASE on 9894 * return. 9895 */ 9896 .extern MterpCheckBefore 9897 REFRESH_IBASE 9898 movq rSELF, OUT_ARG0 9899 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9900 movq rPC, OUT_ARG2 9901 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9902 jmp .L_op_nop+(171*128) 9903 9904 /* ------------------------------ */ 9905 .balign 128 9906 .L_ALT_op_sub_double: /* 0xac */ 9907 /* File: x86_64/alt_stub.S */ 9908 /* 9909 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9910 * any interesting requests and then jump to the real instruction 9911 * handler. Unlike the Arm handler, we can't do this as a tail call 9912 * because rIBASE is caller save and we need to reload it. 9913 * 9914 * Note that unlike in the Arm implementation, we should never arrive 9915 * here with a zero breakFlag because we always refresh rIBASE on 9916 * return. 9917 */ 9918 .extern MterpCheckBefore 9919 REFRESH_IBASE 9920 movq rSELF, OUT_ARG0 9921 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9922 movq rPC, OUT_ARG2 9923 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9924 jmp .L_op_nop+(172*128) 9925 9926 /* ------------------------------ */ 9927 .balign 128 9928 .L_ALT_op_mul_double: /* 0xad */ 9929 /* File: x86_64/alt_stub.S */ 9930 /* 9931 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9932 * any interesting requests and then jump to the real instruction 9933 * handler. Unlike the Arm handler, we can't do this as a tail call 9934 * because rIBASE is caller save and we need to reload it. 9935 * 9936 * Note that unlike in the Arm implementation, we should never arrive 9937 * here with a zero breakFlag because we always refresh rIBASE on 9938 * return. 9939 */ 9940 .extern MterpCheckBefore 9941 REFRESH_IBASE 9942 movq rSELF, OUT_ARG0 9943 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9944 movq rPC, OUT_ARG2 9945 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9946 jmp .L_op_nop+(173*128) 9947 9948 /* ------------------------------ */ 9949 .balign 128 9950 .L_ALT_op_div_double: /* 0xae */ 9951 /* File: x86_64/alt_stub.S */ 9952 /* 9953 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9954 * any interesting requests and then jump to the real instruction 9955 * handler. Unlike the Arm handler, we can't do this as a tail call 9956 * because rIBASE is caller save and we need to reload it. 9957 * 9958 * Note that unlike in the Arm implementation, we should never arrive 9959 * here with a zero breakFlag because we always refresh rIBASE on 9960 * return. 9961 */ 9962 .extern MterpCheckBefore 9963 REFRESH_IBASE 9964 movq rSELF, OUT_ARG0 9965 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9966 movq rPC, OUT_ARG2 9967 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9968 jmp .L_op_nop+(174*128) 9969 9970 /* ------------------------------ */ 9971 .balign 128 9972 .L_ALT_op_rem_double: /* 0xaf */ 9973 /* File: x86_64/alt_stub.S */ 9974 /* 9975 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9976 * any interesting requests and then jump to the real instruction 9977 * handler. Unlike the Arm handler, we can't do this as a tail call 9978 * because rIBASE is caller save and we need to reload it. 9979 * 9980 * Note that unlike in the Arm implementation, we should never arrive 9981 * here with a zero breakFlag because we always refresh rIBASE on 9982 * return. 9983 */ 9984 .extern MterpCheckBefore 9985 REFRESH_IBASE 9986 movq rSELF, OUT_ARG0 9987 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 9988 movq rPC, OUT_ARG2 9989 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 9990 jmp .L_op_nop+(175*128) 9991 9992 /* ------------------------------ */ 9993 .balign 128 9994 .L_ALT_op_add_int_2addr: /* 0xb0 */ 9995 /* File: x86_64/alt_stub.S */ 9996 /* 9997 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9998 * any interesting requests and then jump to the real instruction 9999 * handler. Unlike the Arm handler, we can't do this as a tail call 10000 * because rIBASE is caller save and we need to reload it. 10001 * 10002 * Note that unlike in the Arm implementation, we should never arrive 10003 * here with a zero breakFlag because we always refresh rIBASE on 10004 * return. 10005 */ 10006 .extern MterpCheckBefore 10007 REFRESH_IBASE 10008 movq rSELF, OUT_ARG0 10009 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10010 movq rPC, OUT_ARG2 10011 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10012 jmp .L_op_nop+(176*128) 10013 10014 /* ------------------------------ */ 10015 .balign 128 10016 .L_ALT_op_sub_int_2addr: /* 0xb1 */ 10017 /* File: x86_64/alt_stub.S */ 10018 /* 10019 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10020 * any interesting requests and then jump to the real instruction 10021 * handler. Unlike the Arm handler, we can't do this as a tail call 10022 * because rIBASE is caller save and we need to reload it. 10023 * 10024 * Note that unlike in the Arm implementation, we should never arrive 10025 * here with a zero breakFlag because we always refresh rIBASE on 10026 * return. 10027 */ 10028 .extern MterpCheckBefore 10029 REFRESH_IBASE 10030 movq rSELF, OUT_ARG0 10031 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10032 movq rPC, OUT_ARG2 10033 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10034 jmp .L_op_nop+(177*128) 10035 10036 /* ------------------------------ */ 10037 .balign 128 10038 .L_ALT_op_mul_int_2addr: /* 0xb2 */ 10039 /* File: x86_64/alt_stub.S */ 10040 /* 10041 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10042 * any interesting requests and then jump to the real instruction 10043 * handler. Unlike the Arm handler, we can't do this as a tail call 10044 * because rIBASE is caller save and we need to reload it. 10045 * 10046 * Note that unlike in the Arm implementation, we should never arrive 10047 * here with a zero breakFlag because we always refresh rIBASE on 10048 * return. 10049 */ 10050 .extern MterpCheckBefore 10051 REFRESH_IBASE 10052 movq rSELF, OUT_ARG0 10053 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10054 movq rPC, OUT_ARG2 10055 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10056 jmp .L_op_nop+(178*128) 10057 10058 /* ------------------------------ */ 10059 .balign 128 10060 .L_ALT_op_div_int_2addr: /* 0xb3 */ 10061 /* File: x86_64/alt_stub.S */ 10062 /* 10063 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10064 * any interesting requests and then jump to the real instruction 10065 * handler. Unlike the Arm handler, we can't do this as a tail call 10066 * because rIBASE is caller save and we need to reload it. 10067 * 10068 * Note that unlike in the Arm implementation, we should never arrive 10069 * here with a zero breakFlag because we always refresh rIBASE on 10070 * return. 10071 */ 10072 .extern MterpCheckBefore 10073 REFRESH_IBASE 10074 movq rSELF, OUT_ARG0 10075 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10076 movq rPC, OUT_ARG2 10077 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10078 jmp .L_op_nop+(179*128) 10079 10080 /* ------------------------------ */ 10081 .balign 128 10082 .L_ALT_op_rem_int_2addr: /* 0xb4 */ 10083 /* File: x86_64/alt_stub.S */ 10084 /* 10085 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10086 * any interesting requests and then jump to the real instruction 10087 * handler. Unlike the Arm handler, we can't do this as a tail call 10088 * because rIBASE is caller save and we need to reload it. 10089 * 10090 * Note that unlike in the Arm implementation, we should never arrive 10091 * here with a zero breakFlag because we always refresh rIBASE on 10092 * return. 10093 */ 10094 .extern MterpCheckBefore 10095 REFRESH_IBASE 10096 movq rSELF, OUT_ARG0 10097 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10098 movq rPC, OUT_ARG2 10099 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10100 jmp .L_op_nop+(180*128) 10101 10102 /* ------------------------------ */ 10103 .balign 128 10104 .L_ALT_op_and_int_2addr: /* 0xb5 */ 10105 /* File: x86_64/alt_stub.S */ 10106 /* 10107 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10108 * any interesting requests and then jump to the real instruction 10109 * handler. Unlike the Arm handler, we can't do this as a tail call 10110 * because rIBASE is caller save and we need to reload it. 10111 * 10112 * Note that unlike in the Arm implementation, we should never arrive 10113 * here with a zero breakFlag because we always refresh rIBASE on 10114 * return. 10115 */ 10116 .extern MterpCheckBefore 10117 REFRESH_IBASE 10118 movq rSELF, OUT_ARG0 10119 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10120 movq rPC, OUT_ARG2 10121 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10122 jmp .L_op_nop+(181*128) 10123 10124 /* ------------------------------ */ 10125 .balign 128 10126 .L_ALT_op_or_int_2addr: /* 0xb6 */ 10127 /* File: x86_64/alt_stub.S */ 10128 /* 10129 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10130 * any interesting requests and then jump to the real instruction 10131 * handler. Unlike the Arm handler, we can't do this as a tail call 10132 * because rIBASE is caller save and we need to reload it. 10133 * 10134 * Note that unlike in the Arm implementation, we should never arrive 10135 * here with a zero breakFlag because we always refresh rIBASE on 10136 * return. 10137 */ 10138 .extern MterpCheckBefore 10139 REFRESH_IBASE 10140 movq rSELF, OUT_ARG0 10141 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10142 movq rPC, OUT_ARG2 10143 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10144 jmp .L_op_nop+(182*128) 10145 10146 /* ------------------------------ */ 10147 .balign 128 10148 .L_ALT_op_xor_int_2addr: /* 0xb7 */ 10149 /* File: x86_64/alt_stub.S */ 10150 /* 10151 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10152 * any interesting requests and then jump to the real instruction 10153 * handler. Unlike the Arm handler, we can't do this as a tail call 10154 * because rIBASE is caller save and we need to reload it. 10155 * 10156 * Note that unlike in the Arm implementation, we should never arrive 10157 * here with a zero breakFlag because we always refresh rIBASE on 10158 * return. 10159 */ 10160 .extern MterpCheckBefore 10161 REFRESH_IBASE 10162 movq rSELF, OUT_ARG0 10163 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10164 movq rPC, OUT_ARG2 10165 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10166 jmp .L_op_nop+(183*128) 10167 10168 /* ------------------------------ */ 10169 .balign 128 10170 .L_ALT_op_shl_int_2addr: /* 0xb8 */ 10171 /* File: x86_64/alt_stub.S */ 10172 /* 10173 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10174 * any interesting requests and then jump to the real instruction 10175 * handler. Unlike the Arm handler, we can't do this as a tail call 10176 * because rIBASE is caller save and we need to reload it. 10177 * 10178 * Note that unlike in the Arm implementation, we should never arrive 10179 * here with a zero breakFlag because we always refresh rIBASE on 10180 * return. 10181 */ 10182 .extern MterpCheckBefore 10183 REFRESH_IBASE 10184 movq rSELF, OUT_ARG0 10185 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10186 movq rPC, OUT_ARG2 10187 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10188 jmp .L_op_nop+(184*128) 10189 10190 /* ------------------------------ */ 10191 .balign 128 10192 .L_ALT_op_shr_int_2addr: /* 0xb9 */ 10193 /* File: x86_64/alt_stub.S */ 10194 /* 10195 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10196 * any interesting requests and then jump to the real instruction 10197 * handler. Unlike the Arm handler, we can't do this as a tail call 10198 * because rIBASE is caller save and we need to reload it. 10199 * 10200 * Note that unlike in the Arm implementation, we should never arrive 10201 * here with a zero breakFlag because we always refresh rIBASE on 10202 * return. 10203 */ 10204 .extern MterpCheckBefore 10205 REFRESH_IBASE 10206 movq rSELF, OUT_ARG0 10207 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10208 movq rPC, OUT_ARG2 10209 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10210 jmp .L_op_nop+(185*128) 10211 10212 /* ------------------------------ */ 10213 .balign 128 10214 .L_ALT_op_ushr_int_2addr: /* 0xba */ 10215 /* File: x86_64/alt_stub.S */ 10216 /* 10217 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10218 * any interesting requests and then jump to the real instruction 10219 * handler. Unlike the Arm handler, we can't do this as a tail call 10220 * because rIBASE is caller save and we need to reload it. 10221 * 10222 * Note that unlike in the Arm implementation, we should never arrive 10223 * here with a zero breakFlag because we always refresh rIBASE on 10224 * return. 10225 */ 10226 .extern MterpCheckBefore 10227 REFRESH_IBASE 10228 movq rSELF, OUT_ARG0 10229 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10230 movq rPC, OUT_ARG2 10231 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10232 jmp .L_op_nop+(186*128) 10233 10234 /* ------------------------------ */ 10235 .balign 128 10236 .L_ALT_op_add_long_2addr: /* 0xbb */ 10237 /* File: x86_64/alt_stub.S */ 10238 /* 10239 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10240 * any interesting requests and then jump to the real instruction 10241 * handler. Unlike the Arm handler, we can't do this as a tail call 10242 * because rIBASE is caller save and we need to reload it. 10243 * 10244 * Note that unlike in the Arm implementation, we should never arrive 10245 * here with a zero breakFlag because we always refresh rIBASE on 10246 * return. 10247 */ 10248 .extern MterpCheckBefore 10249 REFRESH_IBASE 10250 movq rSELF, OUT_ARG0 10251 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10252 movq rPC, OUT_ARG2 10253 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10254 jmp .L_op_nop+(187*128) 10255 10256 /* ------------------------------ */ 10257 .balign 128 10258 .L_ALT_op_sub_long_2addr: /* 0xbc */ 10259 /* File: x86_64/alt_stub.S */ 10260 /* 10261 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10262 * any interesting requests and then jump to the real instruction 10263 * handler. Unlike the Arm handler, we can't do this as a tail call 10264 * because rIBASE is caller save and we need to reload it. 10265 * 10266 * Note that unlike in the Arm implementation, we should never arrive 10267 * here with a zero breakFlag because we always refresh rIBASE on 10268 * return. 10269 */ 10270 .extern MterpCheckBefore 10271 REFRESH_IBASE 10272 movq rSELF, OUT_ARG0 10273 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10274 movq rPC, OUT_ARG2 10275 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10276 jmp .L_op_nop+(188*128) 10277 10278 /* ------------------------------ */ 10279 .balign 128 10280 .L_ALT_op_mul_long_2addr: /* 0xbd */ 10281 /* File: x86_64/alt_stub.S */ 10282 /* 10283 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10284 * any interesting requests and then jump to the real instruction 10285 * handler. Unlike the Arm handler, we can't do this as a tail call 10286 * because rIBASE is caller save and we need to reload it. 10287 * 10288 * Note that unlike in the Arm implementation, we should never arrive 10289 * here with a zero breakFlag because we always refresh rIBASE on 10290 * return. 10291 */ 10292 .extern MterpCheckBefore 10293 REFRESH_IBASE 10294 movq rSELF, OUT_ARG0 10295 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10296 movq rPC, OUT_ARG2 10297 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10298 jmp .L_op_nop+(189*128) 10299 10300 /* ------------------------------ */ 10301 .balign 128 10302 .L_ALT_op_div_long_2addr: /* 0xbe */ 10303 /* File: x86_64/alt_stub.S */ 10304 /* 10305 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10306 * any interesting requests and then jump to the real instruction 10307 * handler. Unlike the Arm handler, we can't do this as a tail call 10308 * because rIBASE is caller save and we need to reload it. 10309 * 10310 * Note that unlike in the Arm implementation, we should never arrive 10311 * here with a zero breakFlag because we always refresh rIBASE on 10312 * return. 10313 */ 10314 .extern MterpCheckBefore 10315 REFRESH_IBASE 10316 movq rSELF, OUT_ARG0 10317 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10318 movq rPC, OUT_ARG2 10319 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10320 jmp .L_op_nop+(190*128) 10321 10322 /* ------------------------------ */ 10323 .balign 128 10324 .L_ALT_op_rem_long_2addr: /* 0xbf */ 10325 /* File: x86_64/alt_stub.S */ 10326 /* 10327 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10328 * any interesting requests and then jump to the real instruction 10329 * handler. Unlike the Arm handler, we can't do this as a tail call 10330 * because rIBASE is caller save and we need to reload it. 10331 * 10332 * Note that unlike in the Arm implementation, we should never arrive 10333 * here with a zero breakFlag because we always refresh rIBASE on 10334 * return. 10335 */ 10336 .extern MterpCheckBefore 10337 REFRESH_IBASE 10338 movq rSELF, OUT_ARG0 10339 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10340 movq rPC, OUT_ARG2 10341 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10342 jmp .L_op_nop+(191*128) 10343 10344 /* ------------------------------ */ 10345 .balign 128 10346 .L_ALT_op_and_long_2addr: /* 0xc0 */ 10347 /* File: x86_64/alt_stub.S */ 10348 /* 10349 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10350 * any interesting requests and then jump to the real instruction 10351 * handler. Unlike the Arm handler, we can't do this as a tail call 10352 * because rIBASE is caller save and we need to reload it. 10353 * 10354 * Note that unlike in the Arm implementation, we should never arrive 10355 * here with a zero breakFlag because we always refresh rIBASE on 10356 * return. 10357 */ 10358 .extern MterpCheckBefore 10359 REFRESH_IBASE 10360 movq rSELF, OUT_ARG0 10361 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10362 movq rPC, OUT_ARG2 10363 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10364 jmp .L_op_nop+(192*128) 10365 10366 /* ------------------------------ */ 10367 .balign 128 10368 .L_ALT_op_or_long_2addr: /* 0xc1 */ 10369 /* File: x86_64/alt_stub.S */ 10370 /* 10371 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10372 * any interesting requests and then jump to the real instruction 10373 * handler. Unlike the Arm handler, we can't do this as a tail call 10374 * because rIBASE is caller save and we need to reload it. 10375 * 10376 * Note that unlike in the Arm implementation, we should never arrive 10377 * here with a zero breakFlag because we always refresh rIBASE on 10378 * return. 10379 */ 10380 .extern MterpCheckBefore 10381 REFRESH_IBASE 10382 movq rSELF, OUT_ARG0 10383 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10384 movq rPC, OUT_ARG2 10385 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10386 jmp .L_op_nop+(193*128) 10387 10388 /* ------------------------------ */ 10389 .balign 128 10390 .L_ALT_op_xor_long_2addr: /* 0xc2 */ 10391 /* File: x86_64/alt_stub.S */ 10392 /* 10393 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10394 * any interesting requests and then jump to the real instruction 10395 * handler. Unlike the Arm handler, we can't do this as a tail call 10396 * because rIBASE is caller save and we need to reload it. 10397 * 10398 * Note that unlike in the Arm implementation, we should never arrive 10399 * here with a zero breakFlag because we always refresh rIBASE on 10400 * return. 10401 */ 10402 .extern MterpCheckBefore 10403 REFRESH_IBASE 10404 movq rSELF, OUT_ARG0 10405 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10406 movq rPC, OUT_ARG2 10407 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10408 jmp .L_op_nop+(194*128) 10409 10410 /* ------------------------------ */ 10411 .balign 128 10412 .L_ALT_op_shl_long_2addr: /* 0xc3 */ 10413 /* File: x86_64/alt_stub.S */ 10414 /* 10415 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10416 * any interesting requests and then jump to the real instruction 10417 * handler. Unlike the Arm handler, we can't do this as a tail call 10418 * because rIBASE is caller save and we need to reload it. 10419 * 10420 * Note that unlike in the Arm implementation, we should never arrive 10421 * here with a zero breakFlag because we always refresh rIBASE on 10422 * return. 10423 */ 10424 .extern MterpCheckBefore 10425 REFRESH_IBASE 10426 movq rSELF, OUT_ARG0 10427 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10428 movq rPC, OUT_ARG2 10429 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10430 jmp .L_op_nop+(195*128) 10431 10432 /* ------------------------------ */ 10433 .balign 128 10434 .L_ALT_op_shr_long_2addr: /* 0xc4 */ 10435 /* File: x86_64/alt_stub.S */ 10436 /* 10437 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10438 * any interesting requests and then jump to the real instruction 10439 * handler. Unlike the Arm handler, we can't do this as a tail call 10440 * because rIBASE is caller save and we need to reload it. 10441 * 10442 * Note that unlike in the Arm implementation, we should never arrive 10443 * here with a zero breakFlag because we always refresh rIBASE on 10444 * return. 10445 */ 10446 .extern MterpCheckBefore 10447 REFRESH_IBASE 10448 movq rSELF, OUT_ARG0 10449 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10450 movq rPC, OUT_ARG2 10451 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10452 jmp .L_op_nop+(196*128) 10453 10454 /* ------------------------------ */ 10455 .balign 128 10456 .L_ALT_op_ushr_long_2addr: /* 0xc5 */ 10457 /* File: x86_64/alt_stub.S */ 10458 /* 10459 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10460 * any interesting requests and then jump to the real instruction 10461 * handler. Unlike the Arm handler, we can't do this as a tail call 10462 * because rIBASE is caller save and we need to reload it. 10463 * 10464 * Note that unlike in the Arm implementation, we should never arrive 10465 * here with a zero breakFlag because we always refresh rIBASE on 10466 * return. 10467 */ 10468 .extern MterpCheckBefore 10469 REFRESH_IBASE 10470 movq rSELF, OUT_ARG0 10471 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10472 movq rPC, OUT_ARG2 10473 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10474 jmp .L_op_nop+(197*128) 10475 10476 /* ------------------------------ */ 10477 .balign 128 10478 .L_ALT_op_add_float_2addr: /* 0xc6 */ 10479 /* File: x86_64/alt_stub.S */ 10480 /* 10481 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10482 * any interesting requests and then jump to the real instruction 10483 * handler. Unlike the Arm handler, we can't do this as a tail call 10484 * because rIBASE is caller save and we need to reload it. 10485 * 10486 * Note that unlike in the Arm implementation, we should never arrive 10487 * here with a zero breakFlag because we always refresh rIBASE on 10488 * return. 10489 */ 10490 .extern MterpCheckBefore 10491 REFRESH_IBASE 10492 movq rSELF, OUT_ARG0 10493 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10494 movq rPC, OUT_ARG2 10495 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10496 jmp .L_op_nop+(198*128) 10497 10498 /* ------------------------------ */ 10499 .balign 128 10500 .L_ALT_op_sub_float_2addr: /* 0xc7 */ 10501 /* File: x86_64/alt_stub.S */ 10502 /* 10503 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10504 * any interesting requests and then jump to the real instruction 10505 * handler. Unlike the Arm handler, we can't do this as a tail call 10506 * because rIBASE is caller save and we need to reload it. 10507 * 10508 * Note that unlike in the Arm implementation, we should never arrive 10509 * here with a zero breakFlag because we always refresh rIBASE on 10510 * return. 10511 */ 10512 .extern MterpCheckBefore 10513 REFRESH_IBASE 10514 movq rSELF, OUT_ARG0 10515 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10516 movq rPC, OUT_ARG2 10517 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10518 jmp .L_op_nop+(199*128) 10519 10520 /* ------------------------------ */ 10521 .balign 128 10522 .L_ALT_op_mul_float_2addr: /* 0xc8 */ 10523 /* File: x86_64/alt_stub.S */ 10524 /* 10525 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10526 * any interesting requests and then jump to the real instruction 10527 * handler. Unlike the Arm handler, we can't do this as a tail call 10528 * because rIBASE is caller save and we need to reload it. 10529 * 10530 * Note that unlike in the Arm implementation, we should never arrive 10531 * here with a zero breakFlag because we always refresh rIBASE on 10532 * return. 10533 */ 10534 .extern MterpCheckBefore 10535 REFRESH_IBASE 10536 movq rSELF, OUT_ARG0 10537 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10538 movq rPC, OUT_ARG2 10539 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10540 jmp .L_op_nop+(200*128) 10541 10542 /* ------------------------------ */ 10543 .balign 128 10544 .L_ALT_op_div_float_2addr: /* 0xc9 */ 10545 /* File: x86_64/alt_stub.S */ 10546 /* 10547 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10548 * any interesting requests and then jump to the real instruction 10549 * handler. Unlike the Arm handler, we can't do this as a tail call 10550 * because rIBASE is caller save and we need to reload it. 10551 * 10552 * Note that unlike in the Arm implementation, we should never arrive 10553 * here with a zero breakFlag because we always refresh rIBASE on 10554 * return. 10555 */ 10556 .extern MterpCheckBefore 10557 REFRESH_IBASE 10558 movq rSELF, OUT_ARG0 10559 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10560 movq rPC, OUT_ARG2 10561 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10562 jmp .L_op_nop+(201*128) 10563 10564 /* ------------------------------ */ 10565 .balign 128 10566 .L_ALT_op_rem_float_2addr: /* 0xca */ 10567 /* File: x86_64/alt_stub.S */ 10568 /* 10569 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10570 * any interesting requests and then jump to the real instruction 10571 * handler. Unlike the Arm handler, we can't do this as a tail call 10572 * because rIBASE is caller save and we need to reload it. 10573 * 10574 * Note that unlike in the Arm implementation, we should never arrive 10575 * here with a zero breakFlag because we always refresh rIBASE on 10576 * return. 10577 */ 10578 .extern MterpCheckBefore 10579 REFRESH_IBASE 10580 movq rSELF, OUT_ARG0 10581 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10582 movq rPC, OUT_ARG2 10583 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10584 jmp .L_op_nop+(202*128) 10585 10586 /* ------------------------------ */ 10587 .balign 128 10588 .L_ALT_op_add_double_2addr: /* 0xcb */ 10589 /* File: x86_64/alt_stub.S */ 10590 /* 10591 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10592 * any interesting requests and then jump to the real instruction 10593 * handler. Unlike the Arm handler, we can't do this as a tail call 10594 * because rIBASE is caller save and we need to reload it. 10595 * 10596 * Note that unlike in the Arm implementation, we should never arrive 10597 * here with a zero breakFlag because we always refresh rIBASE on 10598 * return. 10599 */ 10600 .extern MterpCheckBefore 10601 REFRESH_IBASE 10602 movq rSELF, OUT_ARG0 10603 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10604 movq rPC, OUT_ARG2 10605 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10606 jmp .L_op_nop+(203*128) 10607 10608 /* ------------------------------ */ 10609 .balign 128 10610 .L_ALT_op_sub_double_2addr: /* 0xcc */ 10611 /* File: x86_64/alt_stub.S */ 10612 /* 10613 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10614 * any interesting requests and then jump to the real instruction 10615 * handler. Unlike the Arm handler, we can't do this as a tail call 10616 * because rIBASE is caller save and we need to reload it. 10617 * 10618 * Note that unlike in the Arm implementation, we should never arrive 10619 * here with a zero breakFlag because we always refresh rIBASE on 10620 * return. 10621 */ 10622 .extern MterpCheckBefore 10623 REFRESH_IBASE 10624 movq rSELF, OUT_ARG0 10625 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10626 movq rPC, OUT_ARG2 10627 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10628 jmp .L_op_nop+(204*128) 10629 10630 /* ------------------------------ */ 10631 .balign 128 10632 .L_ALT_op_mul_double_2addr: /* 0xcd */ 10633 /* File: x86_64/alt_stub.S */ 10634 /* 10635 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10636 * any interesting requests and then jump to the real instruction 10637 * handler. Unlike the Arm handler, we can't do this as a tail call 10638 * because rIBASE is caller save and we need to reload it. 10639 * 10640 * Note that unlike in the Arm implementation, we should never arrive 10641 * here with a zero breakFlag because we always refresh rIBASE on 10642 * return. 10643 */ 10644 .extern MterpCheckBefore 10645 REFRESH_IBASE 10646 movq rSELF, OUT_ARG0 10647 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10648 movq rPC, OUT_ARG2 10649 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10650 jmp .L_op_nop+(205*128) 10651 10652 /* ------------------------------ */ 10653 .balign 128 10654 .L_ALT_op_div_double_2addr: /* 0xce */ 10655 /* File: x86_64/alt_stub.S */ 10656 /* 10657 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10658 * any interesting requests and then jump to the real instruction 10659 * handler. Unlike the Arm handler, we can't do this as a tail call 10660 * because rIBASE is caller save and we need to reload it. 10661 * 10662 * Note that unlike in the Arm implementation, we should never arrive 10663 * here with a zero breakFlag because we always refresh rIBASE on 10664 * return. 10665 */ 10666 .extern MterpCheckBefore 10667 REFRESH_IBASE 10668 movq rSELF, OUT_ARG0 10669 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10670 movq rPC, OUT_ARG2 10671 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10672 jmp .L_op_nop+(206*128) 10673 10674 /* ------------------------------ */ 10675 .balign 128 10676 .L_ALT_op_rem_double_2addr: /* 0xcf */ 10677 /* File: x86_64/alt_stub.S */ 10678 /* 10679 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10680 * any interesting requests and then jump to the real instruction 10681 * handler. Unlike the Arm handler, we can't do this as a tail call 10682 * because rIBASE is caller save and we need to reload it. 10683 * 10684 * Note that unlike in the Arm implementation, we should never arrive 10685 * here with a zero breakFlag because we always refresh rIBASE on 10686 * return. 10687 */ 10688 .extern MterpCheckBefore 10689 REFRESH_IBASE 10690 movq rSELF, OUT_ARG0 10691 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10692 movq rPC, OUT_ARG2 10693 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10694 jmp .L_op_nop+(207*128) 10695 10696 /* ------------------------------ */ 10697 .balign 128 10698 .L_ALT_op_add_int_lit16: /* 0xd0 */ 10699 /* File: x86_64/alt_stub.S */ 10700 /* 10701 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10702 * any interesting requests and then jump to the real instruction 10703 * handler. Unlike the Arm handler, we can't do this as a tail call 10704 * because rIBASE is caller save and we need to reload it. 10705 * 10706 * Note that unlike in the Arm implementation, we should never arrive 10707 * here with a zero breakFlag because we always refresh rIBASE on 10708 * return. 10709 */ 10710 .extern MterpCheckBefore 10711 REFRESH_IBASE 10712 movq rSELF, OUT_ARG0 10713 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10714 movq rPC, OUT_ARG2 10715 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10716 jmp .L_op_nop+(208*128) 10717 10718 /* ------------------------------ */ 10719 .balign 128 10720 .L_ALT_op_rsub_int: /* 0xd1 */ 10721 /* File: x86_64/alt_stub.S */ 10722 /* 10723 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10724 * any interesting requests and then jump to the real instruction 10725 * handler. Unlike the Arm handler, we can't do this as a tail call 10726 * because rIBASE is caller save and we need to reload it. 10727 * 10728 * Note that unlike in the Arm implementation, we should never arrive 10729 * here with a zero breakFlag because we always refresh rIBASE on 10730 * return. 10731 */ 10732 .extern MterpCheckBefore 10733 REFRESH_IBASE 10734 movq rSELF, OUT_ARG0 10735 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10736 movq rPC, OUT_ARG2 10737 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10738 jmp .L_op_nop+(209*128) 10739 10740 /* ------------------------------ */ 10741 .balign 128 10742 .L_ALT_op_mul_int_lit16: /* 0xd2 */ 10743 /* File: x86_64/alt_stub.S */ 10744 /* 10745 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10746 * any interesting requests and then jump to the real instruction 10747 * handler. Unlike the Arm handler, we can't do this as a tail call 10748 * because rIBASE is caller save and we need to reload it. 10749 * 10750 * Note that unlike in the Arm implementation, we should never arrive 10751 * here with a zero breakFlag because we always refresh rIBASE on 10752 * return. 10753 */ 10754 .extern MterpCheckBefore 10755 REFRESH_IBASE 10756 movq rSELF, OUT_ARG0 10757 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10758 movq rPC, OUT_ARG2 10759 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10760 jmp .L_op_nop+(210*128) 10761 10762 /* ------------------------------ */ 10763 .balign 128 10764 .L_ALT_op_div_int_lit16: /* 0xd3 */ 10765 /* File: x86_64/alt_stub.S */ 10766 /* 10767 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10768 * any interesting requests and then jump to the real instruction 10769 * handler. Unlike the Arm handler, we can't do this as a tail call 10770 * because rIBASE is caller save and we need to reload it. 10771 * 10772 * Note that unlike in the Arm implementation, we should never arrive 10773 * here with a zero breakFlag because we always refresh rIBASE on 10774 * return. 10775 */ 10776 .extern MterpCheckBefore 10777 REFRESH_IBASE 10778 movq rSELF, OUT_ARG0 10779 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10780 movq rPC, OUT_ARG2 10781 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10782 jmp .L_op_nop+(211*128) 10783 10784 /* ------------------------------ */ 10785 .balign 128 10786 .L_ALT_op_rem_int_lit16: /* 0xd4 */ 10787 /* File: x86_64/alt_stub.S */ 10788 /* 10789 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10790 * any interesting requests and then jump to the real instruction 10791 * handler. Unlike the Arm handler, we can't do this as a tail call 10792 * because rIBASE is caller save and we need to reload it. 10793 * 10794 * Note that unlike in the Arm implementation, we should never arrive 10795 * here with a zero breakFlag because we always refresh rIBASE on 10796 * return. 10797 */ 10798 .extern MterpCheckBefore 10799 REFRESH_IBASE 10800 movq rSELF, OUT_ARG0 10801 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10802 movq rPC, OUT_ARG2 10803 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10804 jmp .L_op_nop+(212*128) 10805 10806 /* ------------------------------ */ 10807 .balign 128 10808 .L_ALT_op_and_int_lit16: /* 0xd5 */ 10809 /* File: x86_64/alt_stub.S */ 10810 /* 10811 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10812 * any interesting requests and then jump to the real instruction 10813 * handler. Unlike the Arm handler, we can't do this as a tail call 10814 * because rIBASE is caller save and we need to reload it. 10815 * 10816 * Note that unlike in the Arm implementation, we should never arrive 10817 * here with a zero breakFlag because we always refresh rIBASE on 10818 * return. 10819 */ 10820 .extern MterpCheckBefore 10821 REFRESH_IBASE 10822 movq rSELF, OUT_ARG0 10823 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10824 movq rPC, OUT_ARG2 10825 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10826 jmp .L_op_nop+(213*128) 10827 10828 /* ------------------------------ */ 10829 .balign 128 10830 .L_ALT_op_or_int_lit16: /* 0xd6 */ 10831 /* File: x86_64/alt_stub.S */ 10832 /* 10833 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10834 * any interesting requests and then jump to the real instruction 10835 * handler. Unlike the Arm handler, we can't do this as a tail call 10836 * because rIBASE is caller save and we need to reload it. 10837 * 10838 * Note that unlike in the Arm implementation, we should never arrive 10839 * here with a zero breakFlag because we always refresh rIBASE on 10840 * return. 10841 */ 10842 .extern MterpCheckBefore 10843 REFRESH_IBASE 10844 movq rSELF, OUT_ARG0 10845 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10846 movq rPC, OUT_ARG2 10847 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10848 jmp .L_op_nop+(214*128) 10849 10850 /* ------------------------------ */ 10851 .balign 128 10852 .L_ALT_op_xor_int_lit16: /* 0xd7 */ 10853 /* File: x86_64/alt_stub.S */ 10854 /* 10855 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10856 * any interesting requests and then jump to the real instruction 10857 * handler. Unlike the Arm handler, we can't do this as a tail call 10858 * because rIBASE is caller save and we need to reload it. 10859 * 10860 * Note that unlike in the Arm implementation, we should never arrive 10861 * here with a zero breakFlag because we always refresh rIBASE on 10862 * return. 10863 */ 10864 .extern MterpCheckBefore 10865 REFRESH_IBASE 10866 movq rSELF, OUT_ARG0 10867 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10868 movq rPC, OUT_ARG2 10869 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10870 jmp .L_op_nop+(215*128) 10871 10872 /* ------------------------------ */ 10873 .balign 128 10874 .L_ALT_op_add_int_lit8: /* 0xd8 */ 10875 /* File: x86_64/alt_stub.S */ 10876 /* 10877 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10878 * any interesting requests and then jump to the real instruction 10879 * handler. Unlike the Arm handler, we can't do this as a tail call 10880 * because rIBASE is caller save and we need to reload it. 10881 * 10882 * Note that unlike in the Arm implementation, we should never arrive 10883 * here with a zero breakFlag because we always refresh rIBASE on 10884 * return. 10885 */ 10886 .extern MterpCheckBefore 10887 REFRESH_IBASE 10888 movq rSELF, OUT_ARG0 10889 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10890 movq rPC, OUT_ARG2 10891 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10892 jmp .L_op_nop+(216*128) 10893 10894 /* ------------------------------ */ 10895 .balign 128 10896 .L_ALT_op_rsub_int_lit8: /* 0xd9 */ 10897 /* File: x86_64/alt_stub.S */ 10898 /* 10899 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10900 * any interesting requests and then jump to the real instruction 10901 * handler. Unlike the Arm handler, we can't do this as a tail call 10902 * because rIBASE is caller save and we need to reload it. 10903 * 10904 * Note that unlike in the Arm implementation, we should never arrive 10905 * here with a zero breakFlag because we always refresh rIBASE on 10906 * return. 10907 */ 10908 .extern MterpCheckBefore 10909 REFRESH_IBASE 10910 movq rSELF, OUT_ARG0 10911 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10912 movq rPC, OUT_ARG2 10913 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10914 jmp .L_op_nop+(217*128) 10915 10916 /* ------------------------------ */ 10917 .balign 128 10918 .L_ALT_op_mul_int_lit8: /* 0xda */ 10919 /* File: x86_64/alt_stub.S */ 10920 /* 10921 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10922 * any interesting requests and then jump to the real instruction 10923 * handler. Unlike the Arm handler, we can't do this as a tail call 10924 * because rIBASE is caller save and we need to reload it. 10925 * 10926 * Note that unlike in the Arm implementation, we should never arrive 10927 * here with a zero breakFlag because we always refresh rIBASE on 10928 * return. 10929 */ 10930 .extern MterpCheckBefore 10931 REFRESH_IBASE 10932 movq rSELF, OUT_ARG0 10933 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10934 movq rPC, OUT_ARG2 10935 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10936 jmp .L_op_nop+(218*128) 10937 10938 /* ------------------------------ */ 10939 .balign 128 10940 .L_ALT_op_div_int_lit8: /* 0xdb */ 10941 /* File: x86_64/alt_stub.S */ 10942 /* 10943 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10944 * any interesting requests and then jump to the real instruction 10945 * handler. Unlike the Arm handler, we can't do this as a tail call 10946 * because rIBASE is caller save and we need to reload it. 10947 * 10948 * Note that unlike in the Arm implementation, we should never arrive 10949 * here with a zero breakFlag because we always refresh rIBASE on 10950 * return. 10951 */ 10952 .extern MterpCheckBefore 10953 REFRESH_IBASE 10954 movq rSELF, OUT_ARG0 10955 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10956 movq rPC, OUT_ARG2 10957 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10958 jmp .L_op_nop+(219*128) 10959 10960 /* ------------------------------ */ 10961 .balign 128 10962 .L_ALT_op_rem_int_lit8: /* 0xdc */ 10963 /* File: x86_64/alt_stub.S */ 10964 /* 10965 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10966 * any interesting requests and then jump to the real instruction 10967 * handler. Unlike the Arm handler, we can't do this as a tail call 10968 * because rIBASE is caller save and we need to reload it. 10969 * 10970 * Note that unlike in the Arm implementation, we should never arrive 10971 * here with a zero breakFlag because we always refresh rIBASE on 10972 * return. 10973 */ 10974 .extern MterpCheckBefore 10975 REFRESH_IBASE 10976 movq rSELF, OUT_ARG0 10977 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 10978 movq rPC, OUT_ARG2 10979 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 10980 jmp .L_op_nop+(220*128) 10981 10982 /* ------------------------------ */ 10983 .balign 128 10984 .L_ALT_op_and_int_lit8: /* 0xdd */ 10985 /* File: x86_64/alt_stub.S */ 10986 /* 10987 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10988 * any interesting requests and then jump to the real instruction 10989 * handler. Unlike the Arm handler, we can't do this as a tail call 10990 * because rIBASE is caller save and we need to reload it. 10991 * 10992 * Note that unlike in the Arm implementation, we should never arrive 10993 * here with a zero breakFlag because we always refresh rIBASE on 10994 * return. 10995 */ 10996 .extern MterpCheckBefore 10997 REFRESH_IBASE 10998 movq rSELF, OUT_ARG0 10999 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11000 movq rPC, OUT_ARG2 11001 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11002 jmp .L_op_nop+(221*128) 11003 11004 /* ------------------------------ */ 11005 .balign 128 11006 .L_ALT_op_or_int_lit8: /* 0xde */ 11007 /* File: x86_64/alt_stub.S */ 11008 /* 11009 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11010 * any interesting requests and then jump to the real instruction 11011 * handler. Unlike the Arm handler, we can't do this as a tail call 11012 * because rIBASE is caller save and we need to reload it. 11013 * 11014 * Note that unlike in the Arm implementation, we should never arrive 11015 * here with a zero breakFlag because we always refresh rIBASE on 11016 * return. 11017 */ 11018 .extern MterpCheckBefore 11019 REFRESH_IBASE 11020 movq rSELF, OUT_ARG0 11021 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11022 movq rPC, OUT_ARG2 11023 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11024 jmp .L_op_nop+(222*128) 11025 11026 /* ------------------------------ */ 11027 .balign 128 11028 .L_ALT_op_xor_int_lit8: /* 0xdf */ 11029 /* File: x86_64/alt_stub.S */ 11030 /* 11031 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11032 * any interesting requests and then jump to the real instruction 11033 * handler. Unlike the Arm handler, we can't do this as a tail call 11034 * because rIBASE is caller save and we need to reload it. 11035 * 11036 * Note that unlike in the Arm implementation, we should never arrive 11037 * here with a zero breakFlag because we always refresh rIBASE on 11038 * return. 11039 */ 11040 .extern MterpCheckBefore 11041 REFRESH_IBASE 11042 movq rSELF, OUT_ARG0 11043 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11044 movq rPC, OUT_ARG2 11045 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11046 jmp .L_op_nop+(223*128) 11047 11048 /* ------------------------------ */ 11049 .balign 128 11050 .L_ALT_op_shl_int_lit8: /* 0xe0 */ 11051 /* File: x86_64/alt_stub.S */ 11052 /* 11053 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11054 * any interesting requests and then jump to the real instruction 11055 * handler. Unlike the Arm handler, we can't do this as a tail call 11056 * because rIBASE is caller save and we need to reload it. 11057 * 11058 * Note that unlike in the Arm implementation, we should never arrive 11059 * here with a zero breakFlag because we always refresh rIBASE on 11060 * return. 11061 */ 11062 .extern MterpCheckBefore 11063 REFRESH_IBASE 11064 movq rSELF, OUT_ARG0 11065 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11066 movq rPC, OUT_ARG2 11067 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11068 jmp .L_op_nop+(224*128) 11069 11070 /* ------------------------------ */ 11071 .balign 128 11072 .L_ALT_op_shr_int_lit8: /* 0xe1 */ 11073 /* File: x86_64/alt_stub.S */ 11074 /* 11075 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11076 * any interesting requests and then jump to the real instruction 11077 * handler. Unlike the Arm handler, we can't do this as a tail call 11078 * because rIBASE is caller save and we need to reload it. 11079 * 11080 * Note that unlike in the Arm implementation, we should never arrive 11081 * here with a zero breakFlag because we always refresh rIBASE on 11082 * return. 11083 */ 11084 .extern MterpCheckBefore 11085 REFRESH_IBASE 11086 movq rSELF, OUT_ARG0 11087 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11088 movq rPC, OUT_ARG2 11089 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11090 jmp .L_op_nop+(225*128) 11091 11092 /* ------------------------------ */ 11093 .balign 128 11094 .L_ALT_op_ushr_int_lit8: /* 0xe2 */ 11095 /* File: x86_64/alt_stub.S */ 11096 /* 11097 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11098 * any interesting requests and then jump to the real instruction 11099 * handler. Unlike the Arm handler, we can't do this as a tail call 11100 * because rIBASE is caller save and we need to reload it. 11101 * 11102 * Note that unlike in the Arm implementation, we should never arrive 11103 * here with a zero breakFlag because we always refresh rIBASE on 11104 * return. 11105 */ 11106 .extern MterpCheckBefore 11107 REFRESH_IBASE 11108 movq rSELF, OUT_ARG0 11109 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11110 movq rPC, OUT_ARG2 11111 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11112 jmp .L_op_nop+(226*128) 11113 11114 /* ------------------------------ */ 11115 .balign 128 11116 .L_ALT_op_iget_quick: /* 0xe3 */ 11117 /* File: x86_64/alt_stub.S */ 11118 /* 11119 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11120 * any interesting requests and then jump to the real instruction 11121 * handler. Unlike the Arm handler, we can't do this as a tail call 11122 * because rIBASE is caller save and we need to reload it. 11123 * 11124 * Note that unlike in the Arm implementation, we should never arrive 11125 * here with a zero breakFlag because we always refresh rIBASE on 11126 * return. 11127 */ 11128 .extern MterpCheckBefore 11129 REFRESH_IBASE 11130 movq rSELF, OUT_ARG0 11131 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11132 movq rPC, OUT_ARG2 11133 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11134 jmp .L_op_nop+(227*128) 11135 11136 /* ------------------------------ */ 11137 .balign 128 11138 .L_ALT_op_iget_wide_quick: /* 0xe4 */ 11139 /* File: x86_64/alt_stub.S */ 11140 /* 11141 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11142 * any interesting requests and then jump to the real instruction 11143 * handler. Unlike the Arm handler, we can't do this as a tail call 11144 * because rIBASE is caller save and we need to reload it. 11145 * 11146 * Note that unlike in the Arm implementation, we should never arrive 11147 * here with a zero breakFlag because we always refresh rIBASE on 11148 * return. 11149 */ 11150 .extern MterpCheckBefore 11151 REFRESH_IBASE 11152 movq rSELF, OUT_ARG0 11153 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11154 movq rPC, OUT_ARG2 11155 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11156 jmp .L_op_nop+(228*128) 11157 11158 /* ------------------------------ */ 11159 .balign 128 11160 .L_ALT_op_iget_object_quick: /* 0xe5 */ 11161 /* File: x86_64/alt_stub.S */ 11162 /* 11163 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11164 * any interesting requests and then jump to the real instruction 11165 * handler. Unlike the Arm handler, we can't do this as a tail call 11166 * because rIBASE is caller save and we need to reload it. 11167 * 11168 * Note that unlike in the Arm implementation, we should never arrive 11169 * here with a zero breakFlag because we always refresh rIBASE on 11170 * return. 11171 */ 11172 .extern MterpCheckBefore 11173 REFRESH_IBASE 11174 movq rSELF, OUT_ARG0 11175 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11176 movq rPC, OUT_ARG2 11177 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11178 jmp .L_op_nop+(229*128) 11179 11180 /* ------------------------------ */ 11181 .balign 128 11182 .L_ALT_op_iput_quick: /* 0xe6 */ 11183 /* File: x86_64/alt_stub.S */ 11184 /* 11185 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11186 * any interesting requests and then jump to the real instruction 11187 * handler. Unlike the Arm handler, we can't do this as a tail call 11188 * because rIBASE is caller save and we need to reload it. 11189 * 11190 * Note that unlike in the Arm implementation, we should never arrive 11191 * here with a zero breakFlag because we always refresh rIBASE on 11192 * return. 11193 */ 11194 .extern MterpCheckBefore 11195 REFRESH_IBASE 11196 movq rSELF, OUT_ARG0 11197 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11198 movq rPC, OUT_ARG2 11199 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11200 jmp .L_op_nop+(230*128) 11201 11202 /* ------------------------------ */ 11203 .balign 128 11204 .L_ALT_op_iput_wide_quick: /* 0xe7 */ 11205 /* File: x86_64/alt_stub.S */ 11206 /* 11207 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11208 * any interesting requests and then jump to the real instruction 11209 * handler. Unlike the Arm handler, we can't do this as a tail call 11210 * because rIBASE is caller save and we need to reload it. 11211 * 11212 * Note that unlike in the Arm implementation, we should never arrive 11213 * here with a zero breakFlag because we always refresh rIBASE on 11214 * return. 11215 */ 11216 .extern MterpCheckBefore 11217 REFRESH_IBASE 11218 movq rSELF, OUT_ARG0 11219 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11220 movq rPC, OUT_ARG2 11221 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11222 jmp .L_op_nop+(231*128) 11223 11224 /* ------------------------------ */ 11225 .balign 128 11226 .L_ALT_op_iput_object_quick: /* 0xe8 */ 11227 /* File: x86_64/alt_stub.S */ 11228 /* 11229 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11230 * any interesting requests and then jump to the real instruction 11231 * handler. Unlike the Arm handler, we can't do this as a tail call 11232 * because rIBASE is caller save and we need to reload it. 11233 * 11234 * Note that unlike in the Arm implementation, we should never arrive 11235 * here with a zero breakFlag because we always refresh rIBASE on 11236 * return. 11237 */ 11238 .extern MterpCheckBefore 11239 REFRESH_IBASE 11240 movq rSELF, OUT_ARG0 11241 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11242 movq rPC, OUT_ARG2 11243 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11244 jmp .L_op_nop+(232*128) 11245 11246 /* ------------------------------ */ 11247 .balign 128 11248 .L_ALT_op_invoke_virtual_quick: /* 0xe9 */ 11249 /* File: x86_64/alt_stub.S */ 11250 /* 11251 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11252 * any interesting requests and then jump to the real instruction 11253 * handler. Unlike the Arm handler, we can't do this as a tail call 11254 * because rIBASE is caller save and we need to reload it. 11255 * 11256 * Note that unlike in the Arm implementation, we should never arrive 11257 * here with a zero breakFlag because we always refresh rIBASE on 11258 * return. 11259 */ 11260 .extern MterpCheckBefore 11261 REFRESH_IBASE 11262 movq rSELF, OUT_ARG0 11263 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11264 movq rPC, OUT_ARG2 11265 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11266 jmp .L_op_nop+(233*128) 11267 11268 /* ------------------------------ */ 11269 .balign 128 11270 .L_ALT_op_invoke_virtual_range_quick: /* 0xea */ 11271 /* File: x86_64/alt_stub.S */ 11272 /* 11273 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11274 * any interesting requests and then jump to the real instruction 11275 * handler. Unlike the Arm handler, we can't do this as a tail call 11276 * because rIBASE is caller save and we need to reload it. 11277 * 11278 * Note that unlike in the Arm implementation, we should never arrive 11279 * here with a zero breakFlag because we always refresh rIBASE on 11280 * return. 11281 */ 11282 .extern MterpCheckBefore 11283 REFRESH_IBASE 11284 movq rSELF, OUT_ARG0 11285 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11286 movq rPC, OUT_ARG2 11287 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11288 jmp .L_op_nop+(234*128) 11289 11290 /* ------------------------------ */ 11291 .balign 128 11292 .L_ALT_op_iput_boolean_quick: /* 0xeb */ 11293 /* File: x86_64/alt_stub.S */ 11294 /* 11295 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11296 * any interesting requests and then jump to the real instruction 11297 * handler. Unlike the Arm handler, we can't do this as a tail call 11298 * because rIBASE is caller save and we need to reload it. 11299 * 11300 * Note that unlike in the Arm implementation, we should never arrive 11301 * here with a zero breakFlag because we always refresh rIBASE on 11302 * return. 11303 */ 11304 .extern MterpCheckBefore 11305 REFRESH_IBASE 11306 movq rSELF, OUT_ARG0 11307 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11308 movq rPC, OUT_ARG2 11309 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11310 jmp .L_op_nop+(235*128) 11311 11312 /* ------------------------------ */ 11313 .balign 128 11314 .L_ALT_op_iput_byte_quick: /* 0xec */ 11315 /* File: x86_64/alt_stub.S */ 11316 /* 11317 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11318 * any interesting requests and then jump to the real instruction 11319 * handler. Unlike the Arm handler, we can't do this as a tail call 11320 * because rIBASE is caller save and we need to reload it. 11321 * 11322 * Note that unlike in the Arm implementation, we should never arrive 11323 * here with a zero breakFlag because we always refresh rIBASE on 11324 * return. 11325 */ 11326 .extern MterpCheckBefore 11327 REFRESH_IBASE 11328 movq rSELF, OUT_ARG0 11329 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11330 movq rPC, OUT_ARG2 11331 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11332 jmp .L_op_nop+(236*128) 11333 11334 /* ------------------------------ */ 11335 .balign 128 11336 .L_ALT_op_iput_char_quick: /* 0xed */ 11337 /* File: x86_64/alt_stub.S */ 11338 /* 11339 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11340 * any interesting requests and then jump to the real instruction 11341 * handler. Unlike the Arm handler, we can't do this as a tail call 11342 * because rIBASE is caller save and we need to reload it. 11343 * 11344 * Note that unlike in the Arm implementation, we should never arrive 11345 * here with a zero breakFlag because we always refresh rIBASE on 11346 * return. 11347 */ 11348 .extern MterpCheckBefore 11349 REFRESH_IBASE 11350 movq rSELF, OUT_ARG0 11351 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11352 movq rPC, OUT_ARG2 11353 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11354 jmp .L_op_nop+(237*128) 11355 11356 /* ------------------------------ */ 11357 .balign 128 11358 .L_ALT_op_iput_short_quick: /* 0xee */ 11359 /* File: x86_64/alt_stub.S */ 11360 /* 11361 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11362 * any interesting requests and then jump to the real instruction 11363 * handler. Unlike the Arm handler, we can't do this as a tail call 11364 * because rIBASE is caller save and we need to reload it. 11365 * 11366 * Note that unlike in the Arm implementation, we should never arrive 11367 * here with a zero breakFlag because we always refresh rIBASE on 11368 * return. 11369 */ 11370 .extern MterpCheckBefore 11371 REFRESH_IBASE 11372 movq rSELF, OUT_ARG0 11373 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11374 movq rPC, OUT_ARG2 11375 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11376 jmp .L_op_nop+(238*128) 11377 11378 /* ------------------------------ */ 11379 .balign 128 11380 .L_ALT_op_iget_boolean_quick: /* 0xef */ 11381 /* File: x86_64/alt_stub.S */ 11382 /* 11383 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11384 * any interesting requests and then jump to the real instruction 11385 * handler. Unlike the Arm handler, we can't do this as a tail call 11386 * because rIBASE is caller save and we need to reload it. 11387 * 11388 * Note that unlike in the Arm implementation, we should never arrive 11389 * here with a zero breakFlag because we always refresh rIBASE on 11390 * return. 11391 */ 11392 .extern MterpCheckBefore 11393 REFRESH_IBASE 11394 movq rSELF, OUT_ARG0 11395 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11396 movq rPC, OUT_ARG2 11397 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11398 jmp .L_op_nop+(239*128) 11399 11400 /* ------------------------------ */ 11401 .balign 128 11402 .L_ALT_op_iget_byte_quick: /* 0xf0 */ 11403 /* File: x86_64/alt_stub.S */ 11404 /* 11405 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11406 * any interesting requests and then jump to the real instruction 11407 * handler. Unlike the Arm handler, we can't do this as a tail call 11408 * because rIBASE is caller save and we need to reload it. 11409 * 11410 * Note that unlike in the Arm implementation, we should never arrive 11411 * here with a zero breakFlag because we always refresh rIBASE on 11412 * return. 11413 */ 11414 .extern MterpCheckBefore 11415 REFRESH_IBASE 11416 movq rSELF, OUT_ARG0 11417 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11418 movq rPC, OUT_ARG2 11419 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11420 jmp .L_op_nop+(240*128) 11421 11422 /* ------------------------------ */ 11423 .balign 128 11424 .L_ALT_op_iget_char_quick: /* 0xf1 */ 11425 /* File: x86_64/alt_stub.S */ 11426 /* 11427 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11428 * any interesting requests and then jump to the real instruction 11429 * handler. Unlike the Arm handler, we can't do this as a tail call 11430 * because rIBASE is caller save and we need to reload it. 11431 * 11432 * Note that unlike in the Arm implementation, we should never arrive 11433 * here with a zero breakFlag because we always refresh rIBASE on 11434 * return. 11435 */ 11436 .extern MterpCheckBefore 11437 REFRESH_IBASE 11438 movq rSELF, OUT_ARG0 11439 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11440 movq rPC, OUT_ARG2 11441 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11442 jmp .L_op_nop+(241*128) 11443 11444 /* ------------------------------ */ 11445 .balign 128 11446 .L_ALT_op_iget_short_quick: /* 0xf2 */ 11447 /* File: x86_64/alt_stub.S */ 11448 /* 11449 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11450 * any interesting requests and then jump to the real instruction 11451 * handler. Unlike the Arm handler, we can't do this as a tail call 11452 * because rIBASE is caller save and we need to reload it. 11453 * 11454 * Note that unlike in the Arm implementation, we should never arrive 11455 * here with a zero breakFlag because we always refresh rIBASE on 11456 * return. 11457 */ 11458 .extern MterpCheckBefore 11459 REFRESH_IBASE 11460 movq rSELF, OUT_ARG0 11461 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11462 movq rPC, OUT_ARG2 11463 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11464 jmp .L_op_nop+(242*128) 11465 11466 /* ------------------------------ */ 11467 .balign 128 11468 .L_ALT_op_unused_f3: /* 0xf3 */ 11469 /* File: x86_64/alt_stub.S */ 11470 /* 11471 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11472 * any interesting requests and then jump to the real instruction 11473 * handler. Unlike the Arm handler, we can't do this as a tail call 11474 * because rIBASE is caller save and we need to reload it. 11475 * 11476 * Note that unlike in the Arm implementation, we should never arrive 11477 * here with a zero breakFlag because we always refresh rIBASE on 11478 * return. 11479 */ 11480 .extern MterpCheckBefore 11481 REFRESH_IBASE 11482 movq rSELF, OUT_ARG0 11483 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11484 movq rPC, OUT_ARG2 11485 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11486 jmp .L_op_nop+(243*128) 11487 11488 /* ------------------------------ */ 11489 .balign 128 11490 .L_ALT_op_unused_f4: /* 0xf4 */ 11491 /* File: x86_64/alt_stub.S */ 11492 /* 11493 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11494 * any interesting requests and then jump to the real instruction 11495 * handler. Unlike the Arm handler, we can't do this as a tail call 11496 * because rIBASE is caller save and we need to reload it. 11497 * 11498 * Note that unlike in the Arm implementation, we should never arrive 11499 * here with a zero breakFlag because we always refresh rIBASE on 11500 * return. 11501 */ 11502 .extern MterpCheckBefore 11503 REFRESH_IBASE 11504 movq rSELF, OUT_ARG0 11505 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11506 movq rPC, OUT_ARG2 11507 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11508 jmp .L_op_nop+(244*128) 11509 11510 /* ------------------------------ */ 11511 .balign 128 11512 .L_ALT_op_unused_f5: /* 0xf5 */ 11513 /* File: x86_64/alt_stub.S */ 11514 /* 11515 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11516 * any interesting requests and then jump to the real instruction 11517 * handler. Unlike the Arm handler, we can't do this as a tail call 11518 * because rIBASE is caller save and we need to reload it. 11519 * 11520 * Note that unlike in the Arm implementation, we should never arrive 11521 * here with a zero breakFlag because we always refresh rIBASE on 11522 * return. 11523 */ 11524 .extern MterpCheckBefore 11525 REFRESH_IBASE 11526 movq rSELF, OUT_ARG0 11527 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11528 movq rPC, OUT_ARG2 11529 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11530 jmp .L_op_nop+(245*128) 11531 11532 /* ------------------------------ */ 11533 .balign 128 11534 .L_ALT_op_unused_f6: /* 0xf6 */ 11535 /* File: x86_64/alt_stub.S */ 11536 /* 11537 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11538 * any interesting requests and then jump to the real instruction 11539 * handler. Unlike the Arm handler, we can't do this as a tail call 11540 * because rIBASE is caller save and we need to reload it. 11541 * 11542 * Note that unlike in the Arm implementation, we should never arrive 11543 * here with a zero breakFlag because we always refresh rIBASE on 11544 * return. 11545 */ 11546 .extern MterpCheckBefore 11547 REFRESH_IBASE 11548 movq rSELF, OUT_ARG0 11549 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11550 movq rPC, OUT_ARG2 11551 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11552 jmp .L_op_nop+(246*128) 11553 11554 /* ------------------------------ */ 11555 .balign 128 11556 .L_ALT_op_unused_f7: /* 0xf7 */ 11557 /* File: x86_64/alt_stub.S */ 11558 /* 11559 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11560 * any interesting requests and then jump to the real instruction 11561 * handler. Unlike the Arm handler, we can't do this as a tail call 11562 * because rIBASE is caller save and we need to reload it. 11563 * 11564 * Note that unlike in the Arm implementation, we should never arrive 11565 * here with a zero breakFlag because we always refresh rIBASE on 11566 * return. 11567 */ 11568 .extern MterpCheckBefore 11569 REFRESH_IBASE 11570 movq rSELF, OUT_ARG0 11571 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11572 movq rPC, OUT_ARG2 11573 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11574 jmp .L_op_nop+(247*128) 11575 11576 /* ------------------------------ */ 11577 .balign 128 11578 .L_ALT_op_unused_f8: /* 0xf8 */ 11579 /* File: x86_64/alt_stub.S */ 11580 /* 11581 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11582 * any interesting requests and then jump to the real instruction 11583 * handler. Unlike the Arm handler, we can't do this as a tail call 11584 * because rIBASE is caller save and we need to reload it. 11585 * 11586 * Note that unlike in the Arm implementation, we should never arrive 11587 * here with a zero breakFlag because we always refresh rIBASE on 11588 * return. 11589 */ 11590 .extern MterpCheckBefore 11591 REFRESH_IBASE 11592 movq rSELF, OUT_ARG0 11593 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11594 movq rPC, OUT_ARG2 11595 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11596 jmp .L_op_nop+(248*128) 11597 11598 /* ------------------------------ */ 11599 .balign 128 11600 .L_ALT_op_unused_f9: /* 0xf9 */ 11601 /* File: x86_64/alt_stub.S */ 11602 /* 11603 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11604 * any interesting requests and then jump to the real instruction 11605 * handler. Unlike the Arm handler, we can't do this as a tail call 11606 * because rIBASE is caller save and we need to reload it. 11607 * 11608 * Note that unlike in the Arm implementation, we should never arrive 11609 * here with a zero breakFlag because we always refresh rIBASE on 11610 * return. 11611 */ 11612 .extern MterpCheckBefore 11613 REFRESH_IBASE 11614 movq rSELF, OUT_ARG0 11615 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11616 movq rPC, OUT_ARG2 11617 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11618 jmp .L_op_nop+(249*128) 11619 11620 /* ------------------------------ */ 11621 .balign 128 11622 .L_ALT_op_invoke_polymorphic: /* 0xfa */ 11623 /* File: x86_64/alt_stub.S */ 11624 /* 11625 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11626 * any interesting requests and then jump to the real instruction 11627 * handler. Unlike the Arm handler, we can't do this as a tail call 11628 * because rIBASE is caller save and we need to reload it. 11629 * 11630 * Note that unlike in the Arm implementation, we should never arrive 11631 * here with a zero breakFlag because we always refresh rIBASE on 11632 * return. 11633 */ 11634 .extern MterpCheckBefore 11635 REFRESH_IBASE 11636 movq rSELF, OUT_ARG0 11637 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11638 movq rPC, OUT_ARG2 11639 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11640 jmp .L_op_nop+(250*128) 11641 11642 /* ------------------------------ */ 11643 .balign 128 11644 .L_ALT_op_invoke_polymorphic_range: /* 0xfb */ 11645 /* File: x86_64/alt_stub.S */ 11646 /* 11647 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11648 * any interesting requests and then jump to the real instruction 11649 * handler. Unlike the Arm handler, we can't do this as a tail call 11650 * because rIBASE is caller save and we need to reload it. 11651 * 11652 * Note that unlike in the Arm implementation, we should never arrive 11653 * here with a zero breakFlag because we always refresh rIBASE on 11654 * return. 11655 */ 11656 .extern MterpCheckBefore 11657 REFRESH_IBASE 11658 movq rSELF, OUT_ARG0 11659 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11660 movq rPC, OUT_ARG2 11661 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11662 jmp .L_op_nop+(251*128) 11663 11664 /* ------------------------------ */ 11665 .balign 128 11666 .L_ALT_op_invoke_custom: /* 0xfc */ 11667 /* File: x86_64/alt_stub.S */ 11668 /* 11669 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11670 * any interesting requests and then jump to the real instruction 11671 * handler. Unlike the Arm handler, we can't do this as a tail call 11672 * because rIBASE is caller save and we need to reload it. 11673 * 11674 * Note that unlike in the Arm implementation, we should never arrive 11675 * here with a zero breakFlag because we always refresh rIBASE on 11676 * return. 11677 */ 11678 .extern MterpCheckBefore 11679 REFRESH_IBASE 11680 movq rSELF, OUT_ARG0 11681 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11682 movq rPC, OUT_ARG2 11683 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11684 jmp .L_op_nop+(252*128) 11685 11686 /* ------------------------------ */ 11687 .balign 128 11688 .L_ALT_op_invoke_custom_range: /* 0xfd */ 11689 /* File: x86_64/alt_stub.S */ 11690 /* 11691 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11692 * any interesting requests and then jump to the real instruction 11693 * handler. Unlike the Arm handler, we can't do this as a tail call 11694 * because rIBASE is caller save and we need to reload it. 11695 * 11696 * Note that unlike in the Arm implementation, we should never arrive 11697 * here with a zero breakFlag because we always refresh rIBASE on 11698 * return. 11699 */ 11700 .extern MterpCheckBefore 11701 REFRESH_IBASE 11702 movq rSELF, OUT_ARG0 11703 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11704 movq rPC, OUT_ARG2 11705 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11706 jmp .L_op_nop+(253*128) 11707 11708 /* ------------------------------ */ 11709 .balign 128 11710 .L_ALT_op_unused_fe: /* 0xfe */ 11711 /* File: x86_64/alt_stub.S */ 11712 /* 11713 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11714 * any interesting requests and then jump to the real instruction 11715 * handler. Unlike the Arm handler, we can't do this as a tail call 11716 * because rIBASE is caller save and we need to reload it. 11717 * 11718 * Note that unlike in the Arm implementation, we should never arrive 11719 * here with a zero breakFlag because we always refresh rIBASE on 11720 * return. 11721 */ 11722 .extern MterpCheckBefore 11723 REFRESH_IBASE 11724 movq rSELF, OUT_ARG0 11725 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11726 movq rPC, OUT_ARG2 11727 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11728 jmp .L_op_nop+(254*128) 11729 11730 /* ------------------------------ */ 11731 .balign 128 11732 .L_ALT_op_unused_ff: /* 0xff */ 11733 /* File: x86_64/alt_stub.S */ 11734 /* 11735 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11736 * any interesting requests and then jump to the real instruction 11737 * handler. Unlike the Arm handler, we can't do this as a tail call 11738 * because rIBASE is caller save and we need to reload it. 11739 * 11740 * Note that unlike in the Arm implementation, we should never arrive 11741 * here with a zero breakFlag because we always refresh rIBASE on 11742 * return. 11743 */ 11744 .extern MterpCheckBefore 11745 REFRESH_IBASE 11746 movq rSELF, OUT_ARG0 11747 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11748 movq rPC, OUT_ARG2 11749 call SYMBOL(MterpCheckBefore) # (self, shadow_frame, dex_pc_ptr) 11750 jmp .L_op_nop+(255*128) 11751 11752 .balign 128 11753 SIZE(SYMBOL(artMterpAsmAltInstructionStart),SYMBOL(artMterpAsmAltInstructionStart)) 11754 .global SYMBOL(artMterpAsmAltInstructionEnd) 11755 SYMBOL(artMterpAsmAltInstructionEnd): 11756 /* File: x86_64/footer.S */ 11757 /* 11758 * =========================================================================== 11759 * Common subroutines and data 11760 * =========================================================================== 11761 */ 11762 11763 .text 11764 .align 2 11765 11766 /* 11767 * We've detected a condition that will result in an exception, but the exception 11768 * has not yet been thrown. Just bail out to the reference interpreter to deal with it. 11769 * TUNING: for consistency, we may want to just go ahead and handle these here. 11770 */ 11771 common_errDivideByZero: 11772 EXPORT_PC 11773 #if MTERP_LOGGING 11774 movq rSELF, OUT_ARG0 11775 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11776 call SYMBOL(MterpLogDivideByZeroException) 11777 #endif 11778 jmp MterpCommonFallback 11779 11780 common_errArrayIndex: 11781 EXPORT_PC 11782 #if MTERP_LOGGING 11783 movq rSELF, OUT_ARG0 11784 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11785 call SYMBOL(MterpLogArrayIndexException) 11786 #endif 11787 jmp MterpCommonFallback 11788 11789 common_errNegativeArraySize: 11790 EXPORT_PC 11791 #if MTERP_LOGGING 11792 movq rSELF, OUT_ARG0 11793 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11794 call SYMBOL(MterpLogNegativeArraySizeException) 11795 #endif 11796 jmp MterpCommonFallback 11797 11798 common_errNoSuchMethod: 11799 EXPORT_PC 11800 #if MTERP_LOGGING 11801 movq rSELF, OUT_ARG0 11802 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11803 call SYMBOL(MterpLogNoSuchMethodException) 11804 #endif 11805 jmp MterpCommonFallback 11806 11807 common_errNullObject: 11808 EXPORT_PC 11809 #if MTERP_LOGGING 11810 movq rSELF, OUT_ARG0 11811 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11812 call SYMBOL(MterpLogNullObjectException) 11813 #endif 11814 jmp MterpCommonFallback 11815 11816 common_exceptionThrown: 11817 EXPORT_PC 11818 #if MTERP_LOGGING 11819 movq rSELF, OUT_ARG0 11820 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11821 call SYMBOL(MterpLogExceptionThrownException) 11822 #endif 11823 jmp MterpCommonFallback 11824 11825 MterpSuspendFallback: 11826 EXPORT_PC 11827 #if MTERP_LOGGING 11828 movq rSELF, OUT_ARG0 11829 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11830 movl THREAD_FLAGS_OFFSET(OUT_ARG0), OUT_32_ARG2 11831 call SYMBOL(MterpLogSuspendFallback) 11832 #endif 11833 jmp MterpCommonFallback 11834 11835 /* 11836 * If we're here, something is out of the ordinary. If there is a pending 11837 * exception, handle it. Otherwise, roll back and retry with the reference 11838 * interpreter. 11839 */ 11840 MterpPossibleException: 11841 movq rSELF, %rcx 11842 cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) 11843 jz MterpFallback 11844 /* intentional fallthrough - handle pending exception. */ 11845 11846 /* 11847 * On return from a runtime helper routine, we've found a pending exception. 11848 * Can we handle it here - or need to bail out to caller? 11849 * 11850 */ 11851 MterpException: 11852 movq rSELF, OUT_ARG0 11853 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11854 call SYMBOL(MterpHandleException) 11855 testb %al, %al 11856 jz MterpExceptionReturn 11857 movq OFF_FP_CODE_ITEM(rFP), %rax 11858 mov OFF_FP_DEX_PC(rFP), %ecx 11859 leaq CODEITEM_INSNS_OFFSET(%rax), rPC 11860 leaq (rPC, %rcx, 2), rPC 11861 movq rPC, OFF_FP_DEX_PC_PTR(rFP) 11862 /* Do we need to switch interpreters? */ 11863 call SYMBOL(MterpShouldSwitchInterpreters) 11864 testb %al, %al 11865 jnz MterpFallback 11866 /* resume execution at catch block */ 11867 REFRESH_IBASE 11868 FETCH_INST 11869 GOTO_NEXT 11870 /* NOTE: no fallthrough */ 11871 11872 /* 11873 * Common handling for branches with support for Jit profiling. 11874 * On entry: 11875 * rINST <= signed offset 11876 * rPROFILE <= signed hotness countdown (expanded to 32 bits) 11877 * condition bits <= set to establish sign of offset (use "NoFlags" entry if not) 11878 * 11879 * We have quite a few different cases for branch profiling, OSR detection and 11880 * suspend check support here. 11881 * 11882 * Taken backward branches: 11883 * If profiling active, do hotness countdown and report if we hit zero. 11884 * If in osr check mode, see if our target is a compiled loop header entry and do OSR if so. 11885 * Is there a pending suspend request? If so, suspend. 11886 * 11887 * Taken forward branches and not-taken backward branches: 11888 * If in osr check mode, see if our target is a compiled loop header entry and do OSR if so. 11889 * 11890 * Our most common case is expected to be a taken backward branch with active jit profiling, 11891 * but no full OSR check and no pending suspend request. 11892 * Next most common case is not-taken branch with no full OSR check. 11893 * 11894 */ 11895 MterpCommonTakenBranch: 11896 jg .L_forward_branch # don't add forward branches to hotness 11897 /* 11898 * We need to subtract 1 from positive values and we should not see 0 here, 11899 * so we may use the result of the comparison with -1. 11900 */ 11901 #if JIT_CHECK_OSR != -1 11902 # error "JIT_CHECK_OSR must be -1." 11903 #endif 11904 cmpl $JIT_CHECK_OSR, rPROFILE 11905 je .L_osr_check 11906 decl rPROFILE 11907 je .L_add_batch # counted down to zero - report 11908 .L_resume_backward_branch: 11909 movq rSELF, %rax 11910 testl $(THREAD_SUSPEND_OR_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(%rax) 11911 REFRESH_IBASE 11912 leaq (rPC, rINSTq, 2), rPC 11913 FETCH_INST 11914 jnz .L_suspend_request_pending 11915 GOTO_NEXT 11916 11917 .L_suspend_request_pending: 11918 EXPORT_PC 11919 movq rSELF, OUT_ARG0 11920 call SYMBOL(MterpSuspendCheck) # (self) 11921 testb %al, %al 11922 jnz MterpFallback 11923 REFRESH_IBASE # might have changed during suspend 11924 GOTO_NEXT 11925 11926 .L_no_count_backwards: 11927 cmpl $JIT_CHECK_OSR, rPROFILE # possible OSR re-entry? 11928 jne .L_resume_backward_branch 11929 .L_osr_check: 11930 EXPORT_PC 11931 movq rSELF, OUT_ARG0 11932 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11933 movq rINSTq, OUT_ARG2 11934 call SYMBOL(MterpMaybeDoOnStackReplacement) # (self, shadow_frame, offset) 11935 testb %al, %al 11936 jz .L_resume_backward_branch 11937 jmp MterpOnStackReplacement 11938 11939 .L_forward_branch: 11940 cmpl $JIT_CHECK_OSR, rPROFILE # possible OSR re-entry? 11941 je .L_check_osr_forward 11942 .L_resume_forward_branch: 11943 leaq (rPC, rINSTq, 2), rPC 11944 FETCH_INST 11945 GOTO_NEXT 11946 11947 .L_check_osr_forward: 11948 EXPORT_PC 11949 movq rSELF, OUT_ARG0 11950 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11951 movq rINSTq, OUT_ARG2 11952 call SYMBOL(MterpMaybeDoOnStackReplacement) # (self, shadow_frame, offset) 11953 testb %al, %al 11954 jz .L_resume_forward_branch 11955 jmp MterpOnStackReplacement 11956 11957 .L_add_batch: 11958 movl rPROFILE, %eax 11959 movq OFF_FP_METHOD(rFP), OUT_ARG0 11960 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11961 movw %ax, OFF_FP_COUNTDOWN_OFFSET(rFP) 11962 movq rSELF, OUT_ARG2 11963 call SYMBOL(MterpAddHotnessBatch) # (method, shadow_frame, self) 11964 movswl %ax, rPROFILE 11965 jmp .L_no_count_backwards 11966 11967 /* 11968 * Entered from the conditional branch handlers when OSR check request active on 11969 * not-taken path. All Dalvik not-taken conditional branch offsets are 2. 11970 */ 11971 .L_check_not_taken_osr: 11972 EXPORT_PC 11973 movq rSELF, OUT_ARG0 11974 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11975 movl $2, OUT_32_ARG2 11976 call SYMBOL(MterpMaybeDoOnStackReplacement) # (self, shadow_frame, offset) 11977 testb %al, %al 11978 jnz MterpOnStackReplacement 11979 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 11980 11981 /* 11982 * On-stack replacement has happened, and now we've returned from the compiled method. 11983 */ 11984 MterpOnStackReplacement: 11985 #if MTERP_LOGGING 11986 movq rSELF, OUT_ARG0 11987 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 11988 movl rINST, OUT_32_ARG2 11989 call SYMBOL(MterpLogOSR) 11990 #endif 11991 movl $1, %eax 11992 jmp MterpDone 11993 11994 /* 11995 * Bail out to reference interpreter. 11996 */ 11997 MterpFallback: 11998 EXPORT_PC 11999 #if MTERP_LOGGING 12000 movq rSELF, OUT_ARG0 12001 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 12002 call SYMBOL(MterpLogFallback) 12003 #endif 12004 MterpCommonFallback: 12005 xorl %eax, %eax 12006 jmp MterpDone 12007 12008 /* 12009 * On entry: 12010 * uint32_t* rFP (should still be live, pointer to base of vregs) 12011 */ 12012 MterpExceptionReturn: 12013 movl $1, %eax 12014 jmp MterpDone 12015 MterpReturn: 12016 movq OFF_FP_RESULT_REGISTER(rFP), %rdx 12017 movq %rax, (%rdx) 12018 movl $1, %eax 12019 MterpDone: 12020 /* 12021 * At this point, we expect rPROFILE to be non-zero. If negative, hotness is disabled or we're 12022 * checking for OSR. If greater than zero, we might have unreported hotness to register 12023 * (the difference between the ending rPROFILE and the cached hotness counter). rPROFILE 12024 * should only reach zero immediately after a hotness decrement, and is then reset to either 12025 * a negative special state or the new non-zero countdown value. 12026 */ 12027 testl rPROFILE, rPROFILE 12028 jle MRestoreFrame # if > 0, we may have some counts to report. 12029 12030 movl %eax, rINST # stash return value 12031 /* Report cached hotness counts */ 12032 movl rPROFILE, %eax 12033 movq OFF_FP_METHOD(rFP), OUT_ARG0 12034 leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 12035 movw %ax, OFF_FP_COUNTDOWN_OFFSET(rFP) 12036 movq rSELF, OUT_ARG2 12037 call SYMBOL(MterpAddHotnessBatch) # (method, shadow_frame, self) 12038 movl rINST, %eax # restore return value 12039 12040 /* pop up frame */ 12041 MRestoreFrame: 12042 addq $FRAME_SIZE, %rsp 12043 .cfi_adjust_cfa_offset -FRAME_SIZE 12044 12045 /* Restore callee save register */ 12046 POP %r15 12047 POP %r14 12048 POP %r13 12049 POP %r12 12050 POP %rbp 12051 POP %rbx 12052 ret 12053 .cfi_endproc 12054 SIZE(ExecuteMterpImpl,ExecuteMterpImpl) 12055 12056
