1 /* 2 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include <asm_macros.S> 32 #include <runtime_svc.h> 33 34 .globl early_exceptions 35 36 .section .vectors, "ax"; .align 11 37 38 /* ----------------------------------------------------- 39 * Very simple stackless exception handlers used by BL2 40 * and BL3-1 bootloader stages. BL3-1 uses them before 41 * stacks are setup. BL2 uses them throughout. 42 * ----------------------------------------------------- 43 */ 44 .align 7 45 early_exceptions: 46 /* ----------------------------------------------------- 47 * Current EL with SP0 : 0x0 - 0x180 48 * ----------------------------------------------------- 49 */ 50 SynchronousExceptionSP0: 51 mov x0, #SYNC_EXCEPTION_SP_EL0 52 bl plat_report_exception 53 b SynchronousExceptionSP0 54 check_vector_size SynchronousExceptionSP0 55 56 .align 7 57 IrqSP0: 58 mov x0, #IRQ_SP_EL0 59 bl plat_report_exception 60 b IrqSP0 61 check_vector_size IrqSP0 62 63 .align 7 64 FiqSP0: 65 mov x0, #FIQ_SP_EL0 66 bl plat_report_exception 67 b FiqSP0 68 check_vector_size FiqSP0 69 70 .align 7 71 SErrorSP0: 72 mov x0, #SERROR_SP_EL0 73 bl plat_report_exception 74 b SErrorSP0 75 check_vector_size SErrorSP0 76 77 /* ----------------------------------------------------- 78 * Current EL with SPx: 0x200 - 0x380 79 * ----------------------------------------------------- 80 */ 81 .align 7 82 SynchronousExceptionSPx: 83 mov x0, #SYNC_EXCEPTION_SP_ELX 84 bl plat_report_exception 85 b SynchronousExceptionSPx 86 check_vector_size SynchronousExceptionSPx 87 88 .align 7 89 IrqSPx: 90 mov x0, #IRQ_SP_ELX 91 bl plat_report_exception 92 b IrqSPx 93 check_vector_size IrqSPx 94 95 .align 7 96 FiqSPx: 97 mov x0, #FIQ_SP_ELX 98 bl plat_report_exception 99 b FiqSPx 100 check_vector_size FiqSPx 101 102 .align 7 103 SErrorSPx: 104 mov x0, #SERROR_SP_ELX 105 bl plat_report_exception 106 b SErrorSPx 107 check_vector_size SErrorSPx 108 109 /* ----------------------------------------------------- 110 * Lower EL using AArch64 : 0x400 - 0x580 111 * ----------------------------------------------------- 112 */ 113 .align 7 114 SynchronousExceptionA64: 115 mov x0, #SYNC_EXCEPTION_AARCH64 116 bl plat_report_exception 117 b SynchronousExceptionA64 118 check_vector_size SynchronousExceptionA64 119 120 .align 7 121 IrqA64: 122 mov x0, #IRQ_AARCH64 123 bl plat_report_exception 124 b IrqA64 125 check_vector_size IrqA64 126 127 .align 7 128 FiqA64: 129 mov x0, #FIQ_AARCH64 130 bl plat_report_exception 131 b FiqA64 132 check_vector_size FiqA64 133 134 .align 7 135 SErrorA64: 136 mov x0, #SERROR_AARCH64 137 bl plat_report_exception 138 b SErrorA64 139 check_vector_size SErrorA64 140 141 /* ----------------------------------------------------- 142 * Lower EL using AArch32 : 0x0 - 0x180 143 * ----------------------------------------------------- 144 */ 145 .align 7 146 SynchronousExceptionA32: 147 mov x0, #SYNC_EXCEPTION_AARCH32 148 bl plat_report_exception 149 b SynchronousExceptionA32 150 check_vector_size SynchronousExceptionA32 151 152 .align 7 153 IrqA32: 154 mov x0, #IRQ_AARCH32 155 bl plat_report_exception 156 b IrqA32 157 check_vector_size IrqA32 158 159 .align 7 160 FiqA32: 161 mov x0, #FIQ_AARCH32 162 bl plat_report_exception 163 b FiqA32 164 check_vector_size FiqA32 165 166 .align 7 167 SErrorA32: 168 mov x0, #SERROR_AARCH32 169 bl plat_report_exception 170 b SErrorA32 171 check_vector_size SErrorA32 172
