1 /* 2 Copyright 2003 VMware, Inc. 3 Copyright (C) Intel Corp. 2006. All Rights Reserved. 4 Intel funded Tungsten Graphics to 5 develop this 3D driver. 6 7 Permission is hereby granted, free of charge, to any person obtaining 8 a copy of this software and associated documentation files (the 9 "Software"), to deal in the Software without restriction, including 10 without limitation the rights to use, copy, modify, merge, publish, 11 distribute, sublicense, and/or sell copies of the Software, and to 12 permit persons to whom the Software is furnished to do so, subject to 13 the following conditions: 14 15 The above copyright notice and this permission notice (including the 16 next paragraph) shall be included in all copies or substantial 17 portions of the Software. 18 19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 22 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 26 27 **********************************************************************/ 28 /* 29 * Authors: 30 * Keith Whitwell <keithw (at) vmware.com> 31 */ 32 33 34 #include "compiler/nir/nir.h" 35 #include "main/api_exec.h" 36 #include "main/context.h" 37 #include "main/fbobject.h" 38 #include "main/extensions.h" 39 #include "main/imports.h" 40 #include "main/macros.h" 41 #include "main/points.h" 42 #include "main/version.h" 43 #include "main/vtxfmt.h" 44 #include "main/texobj.h" 45 #include "main/framebuffer.h" 46 47 #include "vbo/vbo_context.h" 48 49 #include "drivers/common/driverfuncs.h" 50 #include "drivers/common/meta.h" 51 #include "utils.h" 52 53 #include "brw_context.h" 54 #include "brw_defines.h" 55 #include "brw_blorp.h" 56 #include "brw_compiler.h" 57 #include "brw_draw.h" 58 #include "brw_state.h" 59 60 #include "intel_batchbuffer.h" 61 #include "intel_buffer_objects.h" 62 #include "intel_buffers.h" 63 #include "intel_fbo.h" 64 #include "intel_mipmap_tree.h" 65 #include "intel_pixel.h" 66 #include "intel_image.h" 67 #include "intel_tex.h" 68 #include "intel_tex_obj.h" 69 70 #include "swrast_setup/swrast_setup.h" 71 #include "tnl/tnl.h" 72 #include "tnl/t_pipeline.h" 73 #include "util/ralloc.h" 74 #include "util/debug.h" 75 #include "isl/isl.h" 76 77 /*************************************** 78 * Mesa's Driver Functions 79 ***************************************/ 80 81 const char *const brw_vendor_string = "Intel Open Source Technology Center"; 82 83 static const char * 84 get_bsw_model(const struct intel_screen *screen) 85 { 86 switch (screen->eu_total) { 87 case 16: 88 return "405"; 89 case 12: 90 return "400"; 91 default: 92 return " "; 93 } 94 } 95 96 const char * 97 brw_get_renderer_string(const struct intel_screen *screen) 98 { 99 const char *chipset; 100 static char buffer[128]; 101 char *bsw = NULL; 102 103 switch (screen->deviceID) { 104 #undef CHIPSET 105 #define CHIPSET(id, symbol, str) case id: chipset = str; break; 106 #include "pci_ids/i965_pci_ids.h" 107 default: 108 chipset = "Unknown Intel Chipset"; 109 break; 110 } 111 112 /* Braswell branding is funny, so we have to fix it up here */ 113 if (screen->deviceID == 0x22B1) { 114 bsw = strdup(chipset); 115 char *needle = strstr(bsw, "XXX"); 116 if (needle) { 117 memcpy(needle, get_bsw_model(screen), 3); 118 chipset = bsw; 119 } 120 } 121 122 (void) driGetRendererString(buffer, chipset, 0); 123 free(bsw); 124 return buffer; 125 } 126 127 static const GLubyte * 128 intel_get_string(struct gl_context * ctx, GLenum name) 129 { 130 const struct brw_context *const brw = brw_context(ctx); 131 132 switch (name) { 133 case GL_VENDOR: 134 return (GLubyte *) brw_vendor_string; 135 136 case GL_RENDERER: 137 return 138 (GLubyte *) brw_get_renderer_string(brw->screen); 139 140 default: 141 return NULL; 142 } 143 } 144 145 static void 146 intel_viewport(struct gl_context *ctx) 147 { 148 struct brw_context *brw = brw_context(ctx); 149 __DRIcontext *driContext = brw->driContext; 150 151 if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) { 152 if (driContext->driDrawablePriv) 153 dri2InvalidateDrawable(driContext->driDrawablePriv); 154 if (driContext->driReadablePriv) 155 dri2InvalidateDrawable(driContext->driReadablePriv); 156 } 157 } 158 159 static void 160 intel_update_framebuffer(struct gl_context *ctx, 161 struct gl_framebuffer *fb) 162 { 163 struct brw_context *brw = brw_context(ctx); 164 165 /* Quantize the derived default number of samples 166 */ 167 fb->DefaultGeometry._NumSamples = 168 intel_quantize_num_samples(brw->screen, 169 fb->DefaultGeometry.NumSamples); 170 } 171 172 static bool 173 intel_disable_rb_aux_buffer(struct brw_context *brw, const drm_intel_bo *bo) 174 { 175 const struct gl_framebuffer *fb = brw->ctx.DrawBuffer; 176 bool found = false; 177 178 for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) { 179 const struct intel_renderbuffer *irb = 180 intel_renderbuffer(fb->_ColorDrawBuffers[i]); 181 182 if (irb && irb->mt->bo == bo) { 183 found = brw->draw_aux_buffer_disabled[i] = true; 184 } 185 } 186 187 return found; 188 } 189 190 /* On Gen9 color buffers may be compressed by the hardware (lossless 191 * compression). There are, however, format restrictions and care needs to be 192 * taken that the sampler engine is capable for re-interpreting a buffer with 193 * format different the buffer was originally written with. 194 * 195 * For example, SRGB formats are not compressible and the sampler engine isn't 196 * capable of treating RGBA_UNORM as SRGB_ALPHA. In such a case the underlying 197 * color buffer needs to be resolved so that the sampling surface can be 198 * sampled as non-compressed (i.e., without the auxiliary MCS buffer being 199 * set). 200 */ 201 static bool 202 intel_texture_view_requires_resolve(struct brw_context *brw, 203 struct intel_texture_object *intel_tex) 204 { 205 if (brw->gen < 9 || 206 !intel_miptree_is_lossless_compressed(brw, intel_tex->mt)) 207 return false; 208 209 const uint32_t brw_format = brw_format_for_mesa_format(intel_tex->_Format); 210 211 if (isl_format_supports_lossless_compression(&brw->screen->devinfo, 212 brw_format)) 213 return false; 214 215 perf_debug("Incompatible sampling format (%s) for rbc (%s)\n", 216 _mesa_get_format_name(intel_tex->_Format), 217 _mesa_get_format_name(intel_tex->mt->format)); 218 219 if (intel_disable_rb_aux_buffer(brw, intel_tex->mt->bo)) 220 perf_debug("Sampling renderbuffer with non-compressible format - " 221 "turning off compression"); 222 223 return true; 224 } 225 226 static void 227 intel_update_state(struct gl_context * ctx, GLuint new_state) 228 { 229 struct brw_context *brw = brw_context(ctx); 230 struct intel_texture_object *tex_obj; 231 struct intel_renderbuffer *depth_irb; 232 233 if (ctx->swrast_context) 234 _swrast_InvalidateState(ctx, new_state); 235 _vbo_InvalidateState(ctx, new_state); 236 237 brw->NewGLState |= new_state; 238 239 _mesa_unlock_context_textures(ctx); 240 241 /* Resolve the depth buffer's HiZ buffer. */ 242 depth_irb = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH); 243 if (depth_irb) 244 intel_renderbuffer_resolve_hiz(brw, depth_irb); 245 246 memset(brw->draw_aux_buffer_disabled, 0, 247 sizeof(brw->draw_aux_buffer_disabled)); 248 249 /* Resolve depth buffer and render cache of each enabled texture. */ 250 int maxEnabledUnit = ctx->Texture._MaxEnabledTexImageUnit; 251 for (int i = 0; i <= maxEnabledUnit; i++) { 252 if (!ctx->Texture.Unit[i]._Current) 253 continue; 254 tex_obj = intel_texture_object(ctx->Texture.Unit[i]._Current); 255 if (!tex_obj || !tex_obj->mt) 256 continue; 257 if (intel_miptree_sample_with_hiz(brw, tex_obj->mt)) 258 intel_miptree_all_slices_resolve_hiz(brw, tex_obj->mt); 259 else 260 intel_miptree_all_slices_resolve_depth(brw, tex_obj->mt); 261 /* Sampling engine understands lossless compression and resolving 262 * those surfaces should be skipped for performance reasons. 263 */ 264 const int flags = intel_texture_view_requires_resolve(brw, tex_obj) ? 265 0 : INTEL_MIPTREE_IGNORE_CCS_E; 266 intel_miptree_all_slices_resolve_color(brw, tex_obj->mt, flags); 267 brw_render_cache_set_check_flush(brw, tex_obj->mt->bo); 268 269 if (tex_obj->base.StencilSampling || 270 tex_obj->mt->format == MESA_FORMAT_S_UINT8) { 271 intel_update_r8stencil(brw, tex_obj->mt); 272 } 273 } 274 275 /* Resolve color for each active shader image. */ 276 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { 277 const struct gl_linked_shader *shader = 278 ctx->_Shader->CurrentProgram[i] ? 279 ctx->_Shader->CurrentProgram[i]->_LinkedShaders[i] : NULL; 280 281 if (unlikely(shader && shader->Program->info.num_images)) { 282 for (unsigned j = 0; j < shader->Program->info.num_images; j++) { 283 struct gl_image_unit *u = 284 &ctx->ImageUnits[shader->Program->sh.ImageUnits[j]]; 285 tex_obj = intel_texture_object(u->TexObj); 286 287 if (tex_obj && tex_obj->mt) { 288 /* Access to images is implemented using indirect messages 289 * against data port. Normal render target write understands 290 * lossless compression but unfortunately the typed/untyped 291 * read/write interface doesn't. Therefore even lossless 292 * compressed surfaces need to be resolved prior to accessing 293 * them. Hence skip setting INTEL_MIPTREE_IGNORE_CCS_E. 294 */ 295 intel_miptree_all_slices_resolve_color(brw, tex_obj->mt, 0); 296 297 if (intel_miptree_is_lossless_compressed(brw, tex_obj->mt) && 298 intel_disable_rb_aux_buffer(brw, tex_obj->mt->bo)) { 299 perf_debug("Using renderbuffer as shader image - turning " 300 "off lossless compression"); 301 } 302 303 brw_render_cache_set_check_flush(brw, tex_obj->mt->bo); 304 } 305 } 306 } 307 } 308 309 /* Resolve color buffers for non-coherent framebuffer fetch. */ 310 if (!ctx->Extensions.MESA_shader_framebuffer_fetch && 311 ctx->FragmentProgram._Current && 312 ctx->FragmentProgram._Current->info.outputs_read) { 313 const struct gl_framebuffer *fb = ctx->DrawBuffer; 314 315 for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) { 316 const struct intel_renderbuffer *irb = 317 intel_renderbuffer(fb->_ColorDrawBuffers[i]); 318 319 if (irb && 320 intel_miptree_resolve_color( 321 brw, irb->mt, irb->mt_level, irb->mt_layer, irb->layer_count, 322 INTEL_MIPTREE_IGNORE_CCS_E)) 323 brw_render_cache_set_check_flush(brw, irb->mt->bo); 324 } 325 } 326 327 /* If FRAMEBUFFER_SRGB is used on Gen9+ then we need to resolve any of the 328 * single-sampled color renderbuffers because the CCS buffer isn't 329 * supported for SRGB formats. This only matters if FRAMEBUFFER_SRGB is 330 * enabled because otherwise the surface state will be programmed with the 331 * linear equivalent format anyway. 332 */ 333 if (brw->gen >= 9 && ctx->Color.sRGBEnabled) { 334 struct gl_framebuffer *fb = ctx->DrawBuffer; 335 for (int i = 0; i < fb->_NumColorDrawBuffers; i++) { 336 struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[i]; 337 338 if (rb == NULL) 339 continue; 340 341 struct intel_renderbuffer *irb = intel_renderbuffer(rb); 342 struct intel_mipmap_tree *mt = irb->mt; 343 344 if (mt == NULL || 345 mt->num_samples > 1 || 346 _mesa_get_srgb_format_linear(mt->format) == mt->format) 347 continue; 348 349 /* Lossless compression is not supported for SRGB formats, it 350 * should be impossible to get here with such surfaces. 351 */ 352 assert(!intel_miptree_is_lossless_compressed(brw, mt)); 353 intel_miptree_all_slices_resolve_color(brw, mt, 0); 354 brw_render_cache_set_check_flush(brw, mt->bo); 355 } 356 } 357 358 _mesa_lock_context_textures(ctx); 359 360 if (new_state & _NEW_BUFFERS) { 361 intel_update_framebuffer(ctx, ctx->DrawBuffer); 362 if (ctx->DrawBuffer != ctx->ReadBuffer) 363 intel_update_framebuffer(ctx, ctx->ReadBuffer); 364 } 365 } 366 367 #define flushFront(screen) ((screen)->image.loader ? (screen)->image.loader->flushFrontBuffer : (screen)->dri2.loader->flushFrontBuffer) 368 369 static void 370 intel_flush_front(struct gl_context *ctx) 371 { 372 struct brw_context *brw = brw_context(ctx); 373 __DRIcontext *driContext = brw->driContext; 374 __DRIdrawable *driDrawable = driContext->driDrawablePriv; 375 __DRIscreen *const dri_screen = brw->screen->driScrnPriv; 376 377 if (brw->front_buffer_dirty && _mesa_is_winsys_fbo(ctx->DrawBuffer)) { 378 if (flushFront(dri_screen) && driDrawable && 379 driDrawable->loaderPrivate) { 380 381 /* Resolve before flushing FAKE_FRONT_LEFT to FRONT_LEFT. 382 * 383 * This potentially resolves both front and back buffer. It 384 * is unnecessary to resolve the back, but harms nothing except 385 * performance. And no one cares about front-buffer render 386 * performance. 387 */ 388 intel_resolve_for_dri2_flush(brw, driDrawable); 389 intel_batchbuffer_flush(brw); 390 391 flushFront(dri_screen)(driDrawable, driDrawable->loaderPrivate); 392 393 /* We set the dirty bit in intel_prepare_render() if we're 394 * front buffer rendering once we get there. 395 */ 396 brw->front_buffer_dirty = false; 397 } 398 } 399 } 400 401 static void 402 intel_glFlush(struct gl_context *ctx) 403 { 404 struct brw_context *brw = brw_context(ctx); 405 406 intel_batchbuffer_flush(brw); 407 intel_flush_front(ctx); 408 409 brw->need_flush_throttle = true; 410 } 411 412 static void 413 intel_finish(struct gl_context * ctx) 414 { 415 struct brw_context *brw = brw_context(ctx); 416 417 intel_glFlush(ctx); 418 419 if (brw->batch.last_bo) 420 drm_intel_bo_wait_rendering(brw->batch.last_bo); 421 } 422 423 static void 424 brw_init_driver_functions(struct brw_context *brw, 425 struct dd_function_table *functions) 426 { 427 _mesa_init_driver_functions(functions); 428 429 /* GLX uses DRI2 invalidate events to handle window resizing. 430 * Unfortunately, EGL does not - libEGL is written in XCB (not Xlib), 431 * which doesn't provide a mechanism for snooping the event queues. 432 * 433 * So EGL still relies on viewport hacks to handle window resizing. 434 * This should go away with DRI3000. 435 */ 436 if (!brw->driContext->driScreenPriv->dri2.useInvalidate) 437 functions->Viewport = intel_viewport; 438 439 functions->Flush = intel_glFlush; 440 functions->Finish = intel_finish; 441 functions->GetString = intel_get_string; 442 functions->UpdateState = intel_update_state; 443 444 intelInitTextureFuncs(functions); 445 intelInitTextureImageFuncs(functions); 446 intelInitTextureSubImageFuncs(functions); 447 intelInitTextureCopyImageFuncs(functions); 448 intelInitCopyImageFuncs(functions); 449 intelInitClearFuncs(functions); 450 intelInitBufferFuncs(functions); 451 intelInitPixelFuncs(functions); 452 intelInitBufferObjectFuncs(functions); 453 brw_init_syncobj_functions(functions); 454 brw_init_object_purgeable_functions(functions); 455 456 brwInitFragProgFuncs( functions ); 457 brw_init_common_queryobj_functions(functions); 458 if (brw->gen >= 8 || brw->is_haswell) 459 hsw_init_queryobj_functions(functions); 460 else if (brw->gen >= 6) 461 gen6_init_queryobj_functions(functions); 462 else 463 gen4_init_queryobj_functions(functions); 464 brw_init_compute_functions(functions); 465 if (brw->gen >= 7) 466 brw_init_conditional_render_functions(functions); 467 468 functions->QueryInternalFormat = brw_query_internal_format; 469 470 functions->NewTransformFeedback = brw_new_transform_feedback; 471 functions->DeleteTransformFeedback = brw_delete_transform_feedback; 472 if (can_do_mi_math_and_lrr(brw->screen)) { 473 functions->BeginTransformFeedback = hsw_begin_transform_feedback; 474 functions->EndTransformFeedback = hsw_end_transform_feedback; 475 functions->PauseTransformFeedback = hsw_pause_transform_feedback; 476 functions->ResumeTransformFeedback = hsw_resume_transform_feedback; 477 } else if (brw->gen >= 7) { 478 functions->BeginTransformFeedback = gen7_begin_transform_feedback; 479 functions->EndTransformFeedback = gen7_end_transform_feedback; 480 functions->PauseTransformFeedback = gen7_pause_transform_feedback; 481 functions->ResumeTransformFeedback = gen7_resume_transform_feedback; 482 functions->GetTransformFeedbackVertexCount = 483 brw_get_transform_feedback_vertex_count; 484 } else { 485 functions->BeginTransformFeedback = brw_begin_transform_feedback; 486 functions->EndTransformFeedback = brw_end_transform_feedback; 487 } 488 489 if (brw->gen >= 6) 490 functions->GetSamplePosition = gen6_get_sample_position; 491 } 492 493 static void 494 brw_initialize_context_constants(struct brw_context *brw) 495 { 496 struct gl_context *ctx = &brw->ctx; 497 const struct brw_compiler *compiler = brw->screen->compiler; 498 499 const bool stage_exists[MESA_SHADER_STAGES] = { 500 [MESA_SHADER_VERTEX] = true, 501 [MESA_SHADER_TESS_CTRL] = brw->gen >= 7, 502 [MESA_SHADER_TESS_EVAL] = brw->gen >= 7, 503 [MESA_SHADER_GEOMETRY] = brw->gen >= 6, 504 [MESA_SHADER_FRAGMENT] = true, 505 [MESA_SHADER_COMPUTE] = 506 ((ctx->API == API_OPENGL_COMPAT || ctx->API == API_OPENGL_CORE) && 507 ctx->Const.MaxComputeWorkGroupSize[0] >= 1024) || 508 (ctx->API == API_OPENGLES2 && 509 ctx->Const.MaxComputeWorkGroupSize[0] >= 128) || 510 _mesa_extension_override_enables.ARB_compute_shader, 511 }; 512 513 unsigned num_stages = 0; 514 for (int i = 0; i < MESA_SHADER_STAGES; i++) { 515 if (stage_exists[i]) 516 num_stages++; 517 } 518 519 unsigned max_samplers = 520 brw->gen >= 8 || brw->is_haswell ? BRW_MAX_TEX_UNIT : 16; 521 522 ctx->Const.MaxDualSourceDrawBuffers = 1; 523 ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS; 524 ctx->Const.MaxCombinedShaderOutputResources = 525 MAX_IMAGE_UNITS + BRW_MAX_DRAW_BUFFERS; 526 527 ctx->Const.QueryCounterBits.Timestamp = 36; 528 529 ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */ 530 ctx->Const.MaxImageUnits = MAX_IMAGE_UNITS; 531 if (brw->gen >= 7) { 532 ctx->Const.MaxRenderbufferSize = 16384; 533 ctx->Const.MaxTextureLevels = MIN2(15 /* 16384 */, MAX_TEXTURE_LEVELS); 534 ctx->Const.MaxCubeTextureLevels = 15; /* 16384 */ 535 } else { 536 ctx->Const.MaxRenderbufferSize = 8192; 537 ctx->Const.MaxTextureLevels = MIN2(14 /* 8192 */, MAX_TEXTURE_LEVELS); 538 ctx->Const.MaxCubeTextureLevels = 14; /* 8192 */ 539 } 540 ctx->Const.Max3DTextureLevels = 12; /* 2048 */ 541 ctx->Const.MaxArrayTextureLayers = brw->gen >= 7 ? 2048 : 512; 542 ctx->Const.MaxTextureMbytes = 1536; 543 ctx->Const.MaxTextureRectSize = 1 << 12; 544 ctx->Const.MaxTextureMaxAnisotropy = 16.0; 545 ctx->Const.MaxTextureLodBias = 15.0; 546 ctx->Const.StripTextureBorder = true; 547 if (brw->gen >= 7) { 548 ctx->Const.MaxProgramTextureGatherComponents = 4; 549 ctx->Const.MinProgramTextureGatherOffset = -32; 550 ctx->Const.MaxProgramTextureGatherOffset = 31; 551 } else if (brw->gen == 6) { 552 ctx->Const.MaxProgramTextureGatherComponents = 1; 553 ctx->Const.MinProgramTextureGatherOffset = -8; 554 ctx->Const.MaxProgramTextureGatherOffset = 7; 555 } 556 557 ctx->Const.MaxUniformBlockSize = 65536; 558 559 for (int i = 0; i < MESA_SHADER_STAGES; i++) { 560 struct gl_program_constants *prog = &ctx->Const.Program[i]; 561 562 if (!stage_exists[i]) 563 continue; 564 565 prog->MaxTextureImageUnits = max_samplers; 566 567 prog->MaxUniformBlocks = BRW_MAX_UBO; 568 prog->MaxCombinedUniformComponents = 569 prog->MaxUniformComponents + 570 ctx->Const.MaxUniformBlockSize / 4 * prog->MaxUniformBlocks; 571 572 prog->MaxAtomicCounters = MAX_ATOMIC_COUNTERS; 573 prog->MaxAtomicBuffers = BRW_MAX_ABO; 574 prog->MaxImageUniforms = compiler->scalar_stage[i] ? BRW_MAX_IMAGES : 0; 575 prog->MaxShaderStorageBlocks = BRW_MAX_SSBO; 576 } 577 578 ctx->Const.MaxTextureUnits = 579 MIN2(ctx->Const.MaxTextureCoordUnits, 580 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits); 581 582 ctx->Const.MaxUniformBufferBindings = num_stages * BRW_MAX_UBO; 583 ctx->Const.MaxCombinedUniformBlocks = num_stages * BRW_MAX_UBO; 584 ctx->Const.MaxCombinedAtomicBuffers = num_stages * BRW_MAX_ABO; 585 ctx->Const.MaxCombinedShaderStorageBlocks = num_stages * BRW_MAX_SSBO; 586 ctx->Const.MaxShaderStorageBufferBindings = num_stages * BRW_MAX_SSBO; 587 ctx->Const.MaxCombinedTextureImageUnits = num_stages * max_samplers; 588 ctx->Const.MaxCombinedImageUniforms = num_stages * BRW_MAX_IMAGES; 589 590 591 /* Hardware only supports a limited number of transform feedback buffers. 592 * So we need to override the Mesa default (which is based only on software 593 * limits). 594 */ 595 ctx->Const.MaxTransformFeedbackBuffers = BRW_MAX_SOL_BUFFERS; 596 597 /* On Gen6, in the worst case, we use up one binding table entry per 598 * transform feedback component (see comments above the definition of 599 * BRW_MAX_SOL_BINDINGS, in brw_context.h), so we need to advertise a value 600 * for MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS equal to 601 * BRW_MAX_SOL_BINDINGS. 602 * 603 * In "separate components" mode, we need to divide this value by 604 * BRW_MAX_SOL_BUFFERS, so that the total number of binding table entries 605 * used up by all buffers will not exceed BRW_MAX_SOL_BINDINGS. 606 */ 607 ctx->Const.MaxTransformFeedbackInterleavedComponents = BRW_MAX_SOL_BINDINGS; 608 ctx->Const.MaxTransformFeedbackSeparateComponents = 609 BRW_MAX_SOL_BINDINGS / BRW_MAX_SOL_BUFFERS; 610 611 ctx->Const.AlwaysUseGetTransformFeedbackVertexCount = 612 !can_do_mi_math_and_lrr(brw->screen); 613 614 int max_samples; 615 const int *msaa_modes = intel_supported_msaa_modes(brw->screen); 616 const int clamp_max_samples = 617 driQueryOptioni(&brw->optionCache, "clamp_max_samples"); 618 619 if (clamp_max_samples < 0) { 620 max_samples = msaa_modes[0]; 621 } else { 622 /* Select the largest supported MSAA mode that does not exceed 623 * clamp_max_samples. 624 */ 625 max_samples = 0; 626 for (int i = 0; msaa_modes[i] != 0; ++i) { 627 if (msaa_modes[i] <= clamp_max_samples) { 628 max_samples = msaa_modes[i]; 629 break; 630 } 631 } 632 } 633 634 ctx->Const.MaxSamples = max_samples; 635 ctx->Const.MaxColorTextureSamples = max_samples; 636 ctx->Const.MaxDepthTextureSamples = max_samples; 637 ctx->Const.MaxIntegerSamples = max_samples; 638 ctx->Const.MaxImageSamples = 0; 639 640 /* gen6_set_sample_maps() sets SampleMap{2,4,8}x variables which are used 641 * to map indices of rectangular grid to sample numbers within a pixel. 642 * These variables are used by GL_EXT_framebuffer_multisample_blit_scaled 643 * extension implementation. For more details see the comment above 644 * gen6_set_sample_maps() definition. 645 */ 646 gen6_set_sample_maps(ctx); 647 648 ctx->Const.MinLineWidth = 1.0; 649 ctx->Const.MinLineWidthAA = 1.0; 650 if (brw->gen >= 6) { 651 ctx->Const.MaxLineWidth = 7.375; 652 ctx->Const.MaxLineWidthAA = 7.375; 653 ctx->Const.LineWidthGranularity = 0.125; 654 } else { 655 ctx->Const.MaxLineWidth = 7.0; 656 ctx->Const.MaxLineWidthAA = 7.0; 657 ctx->Const.LineWidthGranularity = 0.5; 658 } 659 660 /* For non-antialiased lines, we have to round the line width to the 661 * nearest whole number. Make sure that we don't advertise a line 662 * width that, when rounded, will be beyond the actual hardware 663 * maximum. 664 */ 665 assert(roundf(ctx->Const.MaxLineWidth) <= ctx->Const.MaxLineWidth); 666 667 ctx->Const.MinPointSize = 1.0; 668 ctx->Const.MinPointSizeAA = 1.0; 669 ctx->Const.MaxPointSize = 255.0; 670 ctx->Const.MaxPointSizeAA = 255.0; 671 ctx->Const.PointSizeGranularity = 1.0; 672 673 if (brw->gen >= 5 || brw->is_g4x) 674 ctx->Const.MaxClipPlanes = 8; 675 676 ctx->Const.GLSLTessLevelsAsInputs = true; 677 ctx->Const.LowerTCSPatchVerticesIn = brw->gen >= 8; 678 ctx->Const.LowerTESPatchVerticesIn = true; 679 ctx->Const.PrimitiveRestartForPatches = true; 680 681 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeInstructions = 16 * 1024; 682 ctx->Const.Program[MESA_SHADER_VERTEX].MaxAluInstructions = 0; 683 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexInstructions = 0; 684 ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexIndirections = 0; 685 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAluInstructions = 0; 686 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexInstructions = 0; 687 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTexIndirections = 0; 688 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAttribs = 16; 689 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTemps = 256; 690 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAddressRegs = 1; 691 ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters = 1024; 692 ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams = 693 MIN2(ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters, 694 ctx->Const.Program[MESA_SHADER_VERTEX].MaxEnvParams); 695 696 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeInstructions = 1024; 697 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAluInstructions = 1024; 698 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexInstructions = 1024; 699 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTexIndirections = 1024; 700 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAttribs = 12; 701 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeTemps = 256; 702 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeAddressRegs = 0; 703 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters = 1024; 704 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams = 705 MIN2(ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxNativeParameters, 706 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxEnvParams); 707 708 /* Fragment shaders use real, 32-bit twos-complement integers for all 709 * integer types. 710 */ 711 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMin = 31; 712 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.RangeMax = 30; 713 ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt.Precision = 0; 714 ctx->Const.Program[MESA_SHADER_FRAGMENT].HighInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt; 715 ctx->Const.Program[MESA_SHADER_FRAGMENT].MediumInt = ctx->Const.Program[MESA_SHADER_FRAGMENT].LowInt; 716 717 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMin = 31; 718 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.RangeMax = 30; 719 ctx->Const.Program[MESA_SHADER_VERTEX].LowInt.Precision = 0; 720 ctx->Const.Program[MESA_SHADER_VERTEX].HighInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt; 721 ctx->Const.Program[MESA_SHADER_VERTEX].MediumInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt; 722 723 /* Gen6 converts quads to polygon in beginning of 3D pipeline, 724 * but we're not sure how it's actually done for vertex order, 725 * that affect provoking vertex decision. Always use last vertex 726 * convention for quad primitive which works as expected for now. 727 */ 728 if (brw->gen >= 6) 729 ctx->Const.QuadsFollowProvokingVertexConvention = false; 730 731 ctx->Const.NativeIntegers = true; 732 ctx->Const.VertexID_is_zero_based = true; 733 734 /* Regarding the CMP instruction, the Ivybridge PRM says: 735 * 736 * "For each enabled channel 0b or 1b is assigned to the appropriate flag 737 * bit and 0/all zeros or all ones (e.g, byte 0xFF, word 0xFFFF, DWord 738 * 0xFFFFFFFF) is assigned to dst." 739 * 740 * but PRMs for earlier generations say 741 * 742 * "In dword format, one GRF may store up to 8 results. When the register 743 * is used later as a vector of Booleans, as only LSB at each channel 744 * contains meaning [sic] data, software should make sure all higher bits 745 * are masked out (e.g. by 'and-ing' an [sic] 0x01 constant)." 746 * 747 * We select the representation of a true boolean uniform to be ~0, and fix 748 * the results of Gen <= 5 CMP instruction's with -(result & 1). 749 */ 750 ctx->Const.UniformBooleanTrue = ~0; 751 752 /* From the gen4 PRM, volume 4 page 127: 753 * 754 * "For SURFTYPE_BUFFER non-rendertarget surfaces, this field specifies 755 * the base address of the first element of the surface, computed in 756 * software by adding the surface base address to the byte offset of 757 * the element in the buffer." 758 * 759 * However, unaligned accesses are slower, so enforce buffer alignment. 760 */ 761 ctx->Const.UniformBufferOffsetAlignment = 16; 762 763 /* ShaderStorageBufferOffsetAlignment should be a cacheline (64 bytes) so 764 * that we can safely have the CPU and GPU writing the same SSBO on 765 * non-cachecoherent systems (our Atom CPUs). With UBOs, the GPU never 766 * writes, so there's no problem. For an SSBO, the GPU and the CPU can 767 * be updating disjoint regions of the buffer simultaneously and that will 768 * break if the regions overlap the same cacheline. 769 */ 770 ctx->Const.ShaderStorageBufferOffsetAlignment = 64; 771 ctx->Const.TextureBufferOffsetAlignment = 16; 772 ctx->Const.MaxTextureBufferSize = 128 * 1024 * 1024; 773 774 if (brw->gen >= 6) { 775 ctx->Const.MaxVarying = 32; 776 ctx->Const.Program[MESA_SHADER_VERTEX].MaxOutputComponents = 128; 777 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxInputComponents = 64; 778 ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxOutputComponents = 128; 779 ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxInputComponents = 128; 780 ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxInputComponents = 128; 781 ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxOutputComponents = 128; 782 ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxInputComponents = 128; 783 ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxOutputComponents = 128; 784 } 785 786 /* We want the GLSL compiler to emit code that uses condition codes */ 787 for (int i = 0; i < MESA_SHADER_STAGES; i++) { 788 ctx->Const.ShaderCompilerOptions[i] = 789 brw->screen->compiler->glsl_compiler_options[i]; 790 } 791 792 if (brw->gen >= 7) { 793 ctx->Const.MaxViewportWidth = 32768; 794 ctx->Const.MaxViewportHeight = 32768; 795 } 796 797 /* ARB_viewport_array, OES_viewport_array */ 798 if (brw->gen >= 6) { 799 ctx->Const.MaxViewports = GEN6_NUM_VIEWPORTS; 800 ctx->Const.ViewportSubpixelBits = 0; 801 802 /* Cast to float before negating because MaxViewportWidth is unsigned. 803 */ 804 ctx->Const.ViewportBounds.Min = -(float)ctx->Const.MaxViewportWidth; 805 ctx->Const.ViewportBounds.Max = ctx->Const.MaxViewportWidth; 806 } 807 808 /* ARB_gpu_shader5 */ 809 if (brw->gen >= 7) 810 ctx->Const.MaxVertexStreams = MIN2(4, MAX_VERTEX_STREAMS); 811 812 /* ARB_framebuffer_no_attachments */ 813 ctx->Const.MaxFramebufferWidth = 16384; 814 ctx->Const.MaxFramebufferHeight = 16384; 815 ctx->Const.MaxFramebufferLayers = ctx->Const.MaxArrayTextureLayers; 816 ctx->Const.MaxFramebufferSamples = max_samples; 817 818 /* OES_primitive_bounding_box */ 819 ctx->Const.NoPrimitiveBoundingBoxOutput = true; 820 } 821 822 static void 823 brw_initialize_cs_context_constants(struct brw_context *brw) 824 { 825 struct gl_context *ctx = &brw->ctx; 826 const struct intel_screen *screen = brw->screen; 827 struct gen_device_info *devinfo = &brw->screen->devinfo; 828 829 /* FINISHME: Do this for all platforms that the kernel supports */ 830 if (brw->is_cherryview && 831 screen->subslice_total > 0 && screen->eu_total > 0) { 832 /* Logical CS threads = EUs per subslice * 7 threads per EU */ 833 uint32_t max_cs_threads = screen->eu_total / screen->subslice_total * 7; 834 835 /* Fuse configurations may give more threads than expected, never less. */ 836 if (max_cs_threads > devinfo->max_cs_threads) 837 devinfo->max_cs_threads = max_cs_threads; 838 } 839 840 /* Maximum number of scalar compute shader invocations that can be run in 841 * parallel in the same subslice assuming SIMD32 dispatch. 842 * 843 * We don't advertise more than 64 threads, because we are limited to 64 by 844 * our usage of thread_width_max in the gpgpu walker command. This only 845 * currently impacts Haswell, which otherwise might be able to advertise 70 846 * threads. With SIMD32 and 64 threads, Haswell still provides twice the 847 * required the number of invocation needed for ARB_compute_shader. 848 */ 849 const unsigned max_threads = MIN2(64, devinfo->max_cs_threads); 850 const uint32_t max_invocations = 32 * max_threads; 851 ctx->Const.MaxComputeWorkGroupSize[0] = max_invocations; 852 ctx->Const.MaxComputeWorkGroupSize[1] = max_invocations; 853 ctx->Const.MaxComputeWorkGroupSize[2] = max_invocations; 854 ctx->Const.MaxComputeWorkGroupInvocations = max_invocations; 855 ctx->Const.MaxComputeSharedMemorySize = 64 * 1024; 856 } 857 858 /** 859 * Process driconf (drirc) options, setting appropriate context flags. 860 * 861 * intelInitExtensions still pokes at optionCache directly, in order to 862 * avoid advertising various extensions. No flags are set, so it makes 863 * sense to continue doing that there. 864 */ 865 static void 866 brw_process_driconf_options(struct brw_context *brw) 867 { 868 struct gl_context *ctx = &brw->ctx; 869 870 driOptionCache *options = &brw->optionCache; 871 driParseConfigFiles(options, &brw->screen->optionCache, 872 brw->driContext->driScreenPriv->myNum, "i965"); 873 874 int bo_reuse_mode = driQueryOptioni(options, "bo_reuse"); 875 switch (bo_reuse_mode) { 876 case DRI_CONF_BO_REUSE_DISABLED: 877 break; 878 case DRI_CONF_BO_REUSE_ALL: 879 intel_bufmgr_gem_enable_reuse(brw->bufmgr); 880 break; 881 } 882 883 if (!driQueryOptionb(options, "hiz")) { 884 brw->has_hiz = false; 885 /* On gen6, you can only do separate stencil with HIZ. */ 886 if (brw->gen == 6) 887 brw->has_separate_stencil = false; 888 } 889 890 if (driQueryOptionb(options, "always_flush_batch")) { 891 fprintf(stderr, "flushing batchbuffer before/after each draw call\n"); 892 brw->always_flush_batch = true; 893 } 894 895 if (driQueryOptionb(options, "always_flush_cache")) { 896 fprintf(stderr, "flushing GPU caches before/after each draw call\n"); 897 brw->always_flush_cache = true; 898 } 899 900 if (driQueryOptionb(options, "disable_throttling")) { 901 fprintf(stderr, "disabling flush throttling\n"); 902 brw->disable_throttling = true; 903 } 904 905 brw->precompile = driQueryOptionb(&brw->optionCache, "shader_precompile"); 906 907 if (driQueryOptionb(&brw->optionCache, "precise_trig")) 908 brw->screen->compiler->precise_trig = true; 909 910 ctx->Const.ForceGLSLExtensionsWarn = 911 driQueryOptionb(options, "force_glsl_extensions_warn"); 912 913 ctx->Const.ForceGLSLVersion = 914 driQueryOptioni(options, "force_glsl_version"); 915 916 ctx->Const.DisableGLSLLineContinuations = 917 driQueryOptionb(options, "disable_glsl_line_continuations"); 918 919 ctx->Const.AllowGLSLExtensionDirectiveMidShader = 920 driQueryOptionb(options, "allow_glsl_extension_directive_midshader"); 921 922 ctx->Const.GLSLZeroInit = driQueryOptionb(options, "glsl_zero_init"); 923 924 brw->dual_color_blend_by_location = 925 driQueryOptionb(options, "dual_color_blend_by_location"); 926 } 927 928 GLboolean 929 brwCreateContext(gl_api api, 930 const struct gl_config *mesaVis, 931 __DRIcontext *driContextPriv, 932 unsigned major_version, 933 unsigned minor_version, 934 uint32_t flags, 935 bool notify_reset, 936 unsigned *dri_ctx_error, 937 void *sharedContextPrivate) 938 { 939 struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate; 940 struct intel_screen *screen = driContextPriv->driScreenPriv->driverPrivate; 941 const struct gen_device_info *devinfo = &screen->devinfo; 942 struct dd_function_table functions; 943 944 /* Only allow the __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flag if the kernel 945 * provides us with context reset notifications. 946 */ 947 uint32_t allowed_flags = __DRI_CTX_FLAG_DEBUG 948 | __DRI_CTX_FLAG_FORWARD_COMPATIBLE; 949 950 if (screen->has_context_reset_notification) 951 allowed_flags |= __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS; 952 953 if (flags & ~allowed_flags) { 954 *dri_ctx_error = __DRI_CTX_ERROR_UNKNOWN_FLAG; 955 return false; 956 } 957 958 struct brw_context *brw = rzalloc(NULL, struct brw_context); 959 if (!brw) { 960 fprintf(stderr, "%s: failed to alloc context\n", __func__); 961 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY; 962 return false; 963 } 964 965 driContextPriv->driverPrivate = brw; 966 brw->driContext = driContextPriv; 967 brw->screen = screen; 968 brw->bufmgr = screen->bufmgr; 969 970 brw->gen = devinfo->gen; 971 brw->gt = devinfo->gt; 972 brw->is_g4x = devinfo->is_g4x; 973 brw->is_baytrail = devinfo->is_baytrail; 974 brw->is_haswell = devinfo->is_haswell; 975 brw->is_cherryview = devinfo->is_cherryview; 976 brw->is_broxton = devinfo->is_broxton; 977 brw->has_llc = devinfo->has_llc; 978 brw->has_hiz = devinfo->has_hiz_and_separate_stencil; 979 brw->has_separate_stencil = devinfo->has_hiz_and_separate_stencil; 980 brw->has_pln = devinfo->has_pln; 981 brw->has_compr4 = devinfo->has_compr4; 982 brw->has_surface_tile_offset = devinfo->has_surface_tile_offset; 983 brw->has_negative_rhw_bug = devinfo->has_negative_rhw_bug; 984 brw->needs_unlit_centroid_workaround = 985 devinfo->needs_unlit_centroid_workaround; 986 987 brw->must_use_separate_stencil = devinfo->must_use_separate_stencil; 988 brw->has_swizzling = screen->hw_has_swizzling; 989 990 isl_device_init(&brw->isl_dev, devinfo, screen->hw_has_swizzling); 991 992 brw->vs.base.stage = MESA_SHADER_VERTEX; 993 brw->tcs.base.stage = MESA_SHADER_TESS_CTRL; 994 brw->tes.base.stage = MESA_SHADER_TESS_EVAL; 995 brw->gs.base.stage = MESA_SHADER_GEOMETRY; 996 brw->wm.base.stage = MESA_SHADER_FRAGMENT; 997 if (brw->gen >= 8) { 998 gen8_init_vtable_surface_functions(brw); 999 brw->vtbl.emit_depth_stencil_hiz = gen8_emit_depth_stencil_hiz; 1000 } else if (brw->gen >= 7) { 1001 gen7_init_vtable_surface_functions(brw); 1002 brw->vtbl.emit_depth_stencil_hiz = gen7_emit_depth_stencil_hiz; 1003 } else if (brw->gen >= 6) { 1004 gen6_init_vtable_surface_functions(brw); 1005 brw->vtbl.emit_depth_stencil_hiz = gen6_emit_depth_stencil_hiz; 1006 } else { 1007 gen4_init_vtable_surface_functions(brw); 1008 brw->vtbl.emit_depth_stencil_hiz = brw_emit_depth_stencil_hiz; 1009 } 1010 1011 brw_init_driver_functions(brw, &functions); 1012 1013 if (notify_reset) 1014 functions.GetGraphicsResetStatus = brw_get_graphics_reset_status; 1015 1016 struct gl_context *ctx = &brw->ctx; 1017 1018 if (!_mesa_initialize_context(ctx, api, mesaVis, shareCtx, &functions)) { 1019 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY; 1020 fprintf(stderr, "%s: failed to init mesa context\n", __func__); 1021 intelDestroyContext(driContextPriv); 1022 return false; 1023 } 1024 1025 driContextSetFlags(ctx, flags); 1026 1027 /* Initialize the software rasterizer and helper modules. 1028 * 1029 * As of GL 3.1 core, the gen4+ driver doesn't need the swrast context for 1030 * software fallbacks (which we have to support on legacy GL to do weird 1031 * glDrawPixels(), glBitmap(), and other functions). 1032 */ 1033 if (api != API_OPENGL_CORE && api != API_OPENGLES2) { 1034 _swrast_CreateContext(ctx); 1035 } 1036 1037 _vbo_CreateContext(ctx); 1038 if (ctx->swrast_context) { 1039 _tnl_CreateContext(ctx); 1040 TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline; 1041 _swsetup_CreateContext(ctx); 1042 1043 /* Configure swrast to match hardware characteristics: */ 1044 _swrast_allow_pixel_fog(ctx, false); 1045 _swrast_allow_vertex_fog(ctx, true); 1046 } 1047 1048 _mesa_meta_init(ctx); 1049 1050 brw_process_driconf_options(brw); 1051 1052 if (INTEL_DEBUG & DEBUG_PERF) 1053 brw->perf_debug = true; 1054 1055 brw_initialize_cs_context_constants(brw); 1056 brw_initialize_context_constants(brw); 1057 1058 ctx->Const.ResetStrategy = notify_reset 1059 ? GL_LOSE_CONTEXT_ON_RESET_ARB : GL_NO_RESET_NOTIFICATION_ARB; 1060 1061 /* Reinitialize the context point state. It depends on ctx->Const values. */ 1062 _mesa_init_point(ctx); 1063 1064 intel_fbo_init(brw); 1065 1066 intel_batchbuffer_init(&brw->batch, brw->bufmgr, brw->has_llc); 1067 1068 if (brw->gen >= 6) { 1069 /* Create a new hardware context. Using a hardware context means that 1070 * our GPU state will be saved/restored on context switch, allowing us 1071 * to assume that the GPU is in the same state we left it in. 1072 * 1073 * This is required for transform feedback buffer offsets, query objects, 1074 * and also allows us to reduce how much state we have to emit. 1075 */ 1076 brw->hw_ctx = drm_intel_gem_context_create(brw->bufmgr); 1077 1078 if (!brw->hw_ctx) { 1079 fprintf(stderr, "Gen6+ requires Kernel 3.6 or later.\n"); 1080 intelDestroyContext(driContextPriv); 1081 return false; 1082 } 1083 } 1084 1085 if (brw_init_pipe_control(brw, devinfo)) { 1086 *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY; 1087 intelDestroyContext(driContextPriv); 1088 return false; 1089 } 1090 1091 brw_init_state(brw); 1092 1093 intelInitExtensions(ctx); 1094 1095 brw_init_surface_formats(brw); 1096 1097 if (brw->gen >= 6) 1098 brw_blorp_init(brw); 1099 1100 brw->urb.size = devinfo->urb.size; 1101 1102 if (brw->gen == 6) 1103 brw->urb.gs_present = false; 1104 1105 brw->prim_restart.in_progress = false; 1106 brw->prim_restart.enable_cut_index = false; 1107 brw->gs.enabled = false; 1108 brw->sf.viewport_transform_enable = true; 1109 brw->clip.viewport_count = 1; 1110 1111 brw->predicate.state = BRW_PREDICATE_STATE_RENDER; 1112 1113 brw->max_gtt_map_object_size = screen->max_gtt_map_object_size; 1114 1115 brw->use_resource_streamer = screen->has_resource_streamer && 1116 (env_var_as_boolean("INTEL_USE_HW_BT", false) || 1117 env_var_as_boolean("INTEL_USE_GATHER", false)); 1118 1119 ctx->VertexProgram._MaintainTnlProgram = true; 1120 ctx->FragmentProgram._MaintainTexEnvProgram = true; 1121 1122 brw_draw_init( brw ); 1123 1124 if ((flags & __DRI_CTX_FLAG_DEBUG) != 0) { 1125 /* Turn on some extra GL_ARB_debug_output generation. */ 1126 brw->perf_debug = true; 1127 } 1128 1129 if ((flags & __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS) != 0) { 1130 ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_ROBUST_ACCESS_BIT_ARB; 1131 ctx->Const.RobustAccess = GL_TRUE; 1132 } 1133 1134 if (INTEL_DEBUG & DEBUG_SHADER_TIME) 1135 brw_init_shader_time(brw); 1136 1137 _mesa_compute_version(ctx); 1138 1139 _mesa_initialize_dispatch_tables(ctx); 1140 _mesa_initialize_vbo_vtxfmt(ctx); 1141 1142 vbo_use_buffer_objects(ctx); 1143 vbo_always_unmap_buffers(ctx); 1144 1145 return true; 1146 } 1147 1148 void 1149 intelDestroyContext(__DRIcontext * driContextPriv) 1150 { 1151 struct brw_context *brw = 1152 (struct brw_context *) driContextPriv->driverPrivate; 1153 struct gl_context *ctx = &brw->ctx; 1154 1155 /* Dump a final BMP in case the application doesn't call SwapBuffers */ 1156 if (INTEL_DEBUG & DEBUG_AUB) { 1157 intel_batchbuffer_flush(brw); 1158 aub_dump_bmp(&brw->ctx); 1159 } 1160 1161 _mesa_meta_free(&brw->ctx); 1162 1163 if (INTEL_DEBUG & DEBUG_SHADER_TIME) { 1164 /* Force a report. */ 1165 brw->shader_time.report_time = 0; 1166 1167 brw_collect_and_report_shader_time(brw); 1168 brw_destroy_shader_time(brw); 1169 } 1170 1171 if (brw->gen >= 6) 1172 blorp_finish(&brw->blorp); 1173 1174 brw_destroy_state(brw); 1175 brw_draw_destroy(brw); 1176 1177 drm_intel_bo_unreference(brw->curbe.curbe_bo); 1178 if (brw->vs.base.scratch_bo) 1179 drm_intel_bo_unreference(brw->vs.base.scratch_bo); 1180 if (brw->tcs.base.scratch_bo) 1181 drm_intel_bo_unreference(brw->tcs.base.scratch_bo); 1182 if (brw->tes.base.scratch_bo) 1183 drm_intel_bo_unreference(brw->tes.base.scratch_bo); 1184 if (brw->gs.base.scratch_bo) 1185 drm_intel_bo_unreference(brw->gs.base.scratch_bo); 1186 if (brw->wm.base.scratch_bo) 1187 drm_intel_bo_unreference(brw->wm.base.scratch_bo); 1188 1189 gen7_reset_hw_bt_pool_offsets(brw); 1190 drm_intel_bo_unreference(brw->hw_bt_pool.bo); 1191 brw->hw_bt_pool.bo = NULL; 1192 1193 drm_intel_gem_context_destroy(brw->hw_ctx); 1194 1195 if (ctx->swrast_context) { 1196 _swsetup_DestroyContext(&brw->ctx); 1197 _tnl_DestroyContext(&brw->ctx); 1198 } 1199 _vbo_DestroyContext(&brw->ctx); 1200 1201 if (ctx->swrast_context) 1202 _swrast_DestroyContext(&brw->ctx); 1203 1204 brw_fini_pipe_control(brw); 1205 intel_batchbuffer_free(&brw->batch); 1206 1207 drm_intel_bo_unreference(brw->throttle_batch[1]); 1208 drm_intel_bo_unreference(brw->throttle_batch[0]); 1209 brw->throttle_batch[1] = NULL; 1210 brw->throttle_batch[0] = NULL; 1211 1212 driDestroyOptionCache(&brw->optionCache); 1213 1214 /* free the Mesa context */ 1215 _mesa_free_context_data(&brw->ctx); 1216 1217 ralloc_free(brw); 1218 driContextPriv->driverPrivate = NULL; 1219 } 1220 1221 GLboolean 1222 intelUnbindContext(__DRIcontext * driContextPriv) 1223 { 1224 /* Unset current context and dispath table */ 1225 _mesa_make_current(NULL, NULL, NULL); 1226 1227 return true; 1228 } 1229 1230 /** 1231 * Fixes up the context for GLES23 with our default-to-sRGB-capable behavior 1232 * on window system framebuffers. 1233 * 1234 * Desktop GL is fairly reasonable in its handling of sRGB: You can ask if 1235 * your renderbuffer can do sRGB encode, and you can flip a switch that does 1236 * sRGB encode if the renderbuffer can handle it. You can ask specifically 1237 * for a visual where you're guaranteed to be capable, but it turns out that 1238 * everyone just makes all their ARGB8888 visuals capable and doesn't offer 1239 * incapable ones, because there's no difference between the two in resources 1240 * used. Applications thus get built that accidentally rely on the default 1241 * visual choice being sRGB, so we make ours sRGB capable. Everything sounds 1242 * great... 1243 * 1244 * But for GLES2/3, they decided that it was silly to not turn on sRGB encode 1245 * for sRGB renderbuffers you made with the GL_EXT_texture_sRGB equivalent. 1246 * So they removed the enable knob and made it "if the renderbuffer is sRGB 1247 * capable, do sRGB encode". Then, for your window system renderbuffers, you 1248 * can ask for sRGB visuals and get sRGB encode, or not ask for sRGB visuals 1249 * and get no sRGB encode (assuming that both kinds of visual are available). 1250 * Thus our choice to support sRGB by default on our visuals for desktop would 1251 * result in broken rendering of GLES apps that aren't expecting sRGB encode. 1252 * 1253 * Unfortunately, renderbuffer setup happens before a context is created. So 1254 * in intel_screen.c we always set up sRGB, and here, if you're a GLES2/3 1255 * context (without an sRGB visual, though we don't have sRGB visuals exposed 1256 * yet), we go turn that back off before anyone finds out. 1257 */ 1258 static void 1259 intel_gles3_srgb_workaround(struct brw_context *brw, 1260 struct gl_framebuffer *fb) 1261 { 1262 struct gl_context *ctx = &brw->ctx; 1263 1264 if (_mesa_is_desktop_gl(ctx) || !fb->Visual.sRGBCapable) 1265 return; 1266 1267 /* Some day when we support the sRGB capable bit on visuals available for 1268 * GLES, we'll need to respect that and not disable things here. 1269 */ 1270 fb->Visual.sRGBCapable = false; 1271 for (int i = 0; i < BUFFER_COUNT; i++) { 1272 struct gl_renderbuffer *rb = fb->Attachment[i].Renderbuffer; 1273 if (rb) 1274 rb->Format = _mesa_get_srgb_format_linear(rb->Format); 1275 } 1276 } 1277 1278 GLboolean 1279 intelMakeCurrent(__DRIcontext * driContextPriv, 1280 __DRIdrawable * driDrawPriv, 1281 __DRIdrawable * driReadPriv) 1282 { 1283 struct brw_context *brw; 1284 GET_CURRENT_CONTEXT(curCtx); 1285 1286 if (driContextPriv) 1287 brw = (struct brw_context *) driContextPriv->driverPrivate; 1288 else 1289 brw = NULL; 1290 1291 /* According to the glXMakeCurrent() man page: "Pending commands to 1292 * the previous context, if any, are flushed before it is released." 1293 * But only flush if we're actually changing contexts. 1294 */ 1295 if (brw_context(curCtx) && brw_context(curCtx) != brw) { 1296 _mesa_flush(curCtx); 1297 } 1298 1299 if (driContextPriv) { 1300 struct gl_context *ctx = &brw->ctx; 1301 struct gl_framebuffer *fb, *readFb; 1302 1303 if (driDrawPriv == NULL) { 1304 fb = _mesa_get_incomplete_framebuffer(); 1305 } else { 1306 fb = driDrawPriv->driverPrivate; 1307 driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1; 1308 } 1309 1310 if (driReadPriv == NULL) { 1311 readFb = _mesa_get_incomplete_framebuffer(); 1312 } else { 1313 readFb = driReadPriv->driverPrivate; 1314 driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1; 1315 } 1316 1317 /* The sRGB workaround changes the renderbuffer's format. We must change 1318 * the format before the renderbuffer's miptree get's allocated, otherwise 1319 * the formats of the renderbuffer and its miptree will differ. 1320 */ 1321 intel_gles3_srgb_workaround(brw, fb); 1322 intel_gles3_srgb_workaround(brw, readFb); 1323 1324 /* If the context viewport hasn't been initialized, force a call out to 1325 * the loader to get buffers so we have a drawable size for the initial 1326 * viewport. */ 1327 if (!brw->ctx.ViewportInitialized) 1328 intel_prepare_render(brw); 1329 1330 _mesa_make_current(ctx, fb, readFb); 1331 } else { 1332 _mesa_make_current(NULL, NULL, NULL); 1333 } 1334 1335 return true; 1336 } 1337 1338 void 1339 intel_resolve_for_dri2_flush(struct brw_context *brw, 1340 __DRIdrawable *drawable) 1341 { 1342 if (brw->gen < 6) { 1343 /* MSAA and fast color clear are not supported, so don't waste time 1344 * checking whether a resolve is needed. 1345 */ 1346 return; 1347 } 1348 1349 struct gl_framebuffer *fb = drawable->driverPrivate; 1350 struct intel_renderbuffer *rb; 1351 1352 /* Usually, only the back buffer will need to be downsampled. However, 1353 * the front buffer will also need it if the user has rendered into it. 1354 */ 1355 static const gl_buffer_index buffers[2] = { 1356 BUFFER_BACK_LEFT, 1357 BUFFER_FRONT_LEFT, 1358 }; 1359 1360 for (int i = 0; i < 2; ++i) { 1361 rb = intel_get_renderbuffer(fb, buffers[i]); 1362 if (rb == NULL || rb->mt == NULL) 1363 continue; 1364 if (rb->mt->num_samples <= 1) { 1365 assert(rb->mt_layer == 0 && rb->mt_level == 0 && 1366 rb->layer_count == 1); 1367 intel_miptree_resolve_color(brw, rb->mt, 0, 0, 1, 0); 1368 } else { 1369 intel_renderbuffer_downsample(brw, rb); 1370 } 1371 } 1372 } 1373 1374 static unsigned 1375 intel_bits_per_pixel(const struct intel_renderbuffer *rb) 1376 { 1377 return _mesa_get_format_bytes(intel_rb_format(rb)) * 8; 1378 } 1379 1380 static void 1381 intel_query_dri2_buffers(struct brw_context *brw, 1382 __DRIdrawable *drawable, 1383 __DRIbuffer **buffers, 1384 int *count); 1385 1386 static void 1387 intel_process_dri2_buffer(struct brw_context *brw, 1388 __DRIdrawable *drawable, 1389 __DRIbuffer *buffer, 1390 struct intel_renderbuffer *rb, 1391 const char *buffer_name); 1392 1393 static void 1394 intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable); 1395 1396 static void 1397 intel_update_dri2_buffers(struct brw_context *brw, __DRIdrawable *drawable) 1398 { 1399 struct gl_framebuffer *fb = drawable->driverPrivate; 1400 struct intel_renderbuffer *rb; 1401 __DRIbuffer *buffers = NULL; 1402 int i, count; 1403 const char *region_name; 1404 1405 /* Set this up front, so that in case our buffers get invalidated 1406 * while we're getting new buffers, we don't clobber the stamp and 1407 * thus ignore the invalidate. */ 1408 drawable->lastStamp = drawable->dri2.stamp; 1409 1410 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) 1411 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable); 1412 1413 intel_query_dri2_buffers(brw, drawable, &buffers, &count); 1414 1415 if (buffers == NULL) 1416 return; 1417 1418 for (i = 0; i < count; i++) { 1419 switch (buffers[i].attachment) { 1420 case __DRI_BUFFER_FRONT_LEFT: 1421 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT); 1422 region_name = "dri2 front buffer"; 1423 break; 1424 1425 case __DRI_BUFFER_FAKE_FRONT_LEFT: 1426 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT); 1427 region_name = "dri2 fake front buffer"; 1428 break; 1429 1430 case __DRI_BUFFER_BACK_LEFT: 1431 rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT); 1432 region_name = "dri2 back buffer"; 1433 break; 1434 1435 case __DRI_BUFFER_DEPTH: 1436 case __DRI_BUFFER_HIZ: 1437 case __DRI_BUFFER_DEPTH_STENCIL: 1438 case __DRI_BUFFER_STENCIL: 1439 case __DRI_BUFFER_ACCUM: 1440 default: 1441 fprintf(stderr, 1442 "unhandled buffer attach event, attachment type %d\n", 1443 buffers[i].attachment); 1444 return; 1445 } 1446 1447 intel_process_dri2_buffer(brw, drawable, &buffers[i], rb, region_name); 1448 } 1449 1450 } 1451 1452 void 1453 intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) 1454 { 1455 struct brw_context *brw = context->driverPrivate; 1456 __DRIscreen *dri_screen = brw->screen->driScrnPriv; 1457 1458 /* Set this up front, so that in case our buffers get invalidated 1459 * while we're getting new buffers, we don't clobber the stamp and 1460 * thus ignore the invalidate. */ 1461 drawable->lastStamp = drawable->dri2.stamp; 1462 1463 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) 1464 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable); 1465 1466 if (dri_screen->image.loader) 1467 intel_update_image_buffers(brw, drawable); 1468 else 1469 intel_update_dri2_buffers(brw, drawable); 1470 1471 driUpdateFramebufferSize(&brw->ctx, drawable); 1472 } 1473 1474 /** 1475 * intel_prepare_render should be called anywhere that curent read/drawbuffer 1476 * state is required. 1477 */ 1478 void 1479 intel_prepare_render(struct brw_context *brw) 1480 { 1481 struct gl_context *ctx = &brw->ctx; 1482 __DRIcontext *driContext = brw->driContext; 1483 __DRIdrawable *drawable; 1484 1485 drawable = driContext->driDrawablePriv; 1486 if (drawable && drawable->dri2.stamp != driContext->dri2.draw_stamp) { 1487 if (drawable->lastStamp != drawable->dri2.stamp) 1488 intel_update_renderbuffers(driContext, drawable); 1489 driContext->dri2.draw_stamp = drawable->dri2.stamp; 1490 } 1491 1492 drawable = driContext->driReadablePriv; 1493 if (drawable && drawable->dri2.stamp != driContext->dri2.read_stamp) { 1494 if (drawable->lastStamp != drawable->dri2.stamp) 1495 intel_update_renderbuffers(driContext, drawable); 1496 driContext->dri2.read_stamp = drawable->dri2.stamp; 1497 } 1498 1499 /* If we're currently rendering to the front buffer, the rendering 1500 * that will happen next will probably dirty the front buffer. So 1501 * mark it as dirty here. 1502 */ 1503 if (_mesa_is_front_buffer_drawing(ctx->DrawBuffer)) 1504 brw->front_buffer_dirty = true; 1505 } 1506 1507 /** 1508 * \brief Query DRI2 to obtain a DRIdrawable's buffers. 1509 * 1510 * To determine which DRI buffers to request, examine the renderbuffers 1511 * attached to the drawable's framebuffer. Then request the buffers with 1512 * DRI2GetBuffers() or DRI2GetBuffersWithFormat(). 1513 * 1514 * This is called from intel_update_renderbuffers(). 1515 * 1516 * \param drawable Drawable whose buffers are queried. 1517 * \param buffers [out] List of buffers returned by DRI2 query. 1518 * \param buffer_count [out] Number of buffers returned. 1519 * 1520 * \see intel_update_renderbuffers() 1521 * \see DRI2GetBuffers() 1522 * \see DRI2GetBuffersWithFormat() 1523 */ 1524 static void 1525 intel_query_dri2_buffers(struct brw_context *brw, 1526 __DRIdrawable *drawable, 1527 __DRIbuffer **buffers, 1528 int *buffer_count) 1529 { 1530 __DRIscreen *dri_screen = brw->screen->driScrnPriv; 1531 struct gl_framebuffer *fb = drawable->driverPrivate; 1532 int i = 0; 1533 unsigned attachments[8]; 1534 1535 struct intel_renderbuffer *front_rb; 1536 struct intel_renderbuffer *back_rb; 1537 1538 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT); 1539 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT); 1540 1541 memset(attachments, 0, sizeof(attachments)); 1542 if ((_mesa_is_front_buffer_drawing(fb) || 1543 _mesa_is_front_buffer_reading(fb) || 1544 !back_rb) && front_rb) { 1545 /* If a fake front buffer is in use, then querying for 1546 * __DRI_BUFFER_FRONT_LEFT will cause the server to copy the image from 1547 * the real front buffer to the fake front buffer. So before doing the 1548 * query, we need to make sure all the pending drawing has landed in the 1549 * real front buffer. 1550 */ 1551 intel_batchbuffer_flush(brw); 1552 intel_flush_front(&brw->ctx); 1553 1554 attachments[i++] = __DRI_BUFFER_FRONT_LEFT; 1555 attachments[i++] = intel_bits_per_pixel(front_rb); 1556 } else if (front_rb && brw->front_buffer_dirty) { 1557 /* We have pending front buffer rendering, but we aren't querying for a 1558 * front buffer. If the front buffer we have is a fake front buffer, 1559 * the X server is going to throw it away when it processes the query. 1560 * So before doing the query, make sure all the pending drawing has 1561 * landed in the real front buffer. 1562 */ 1563 intel_batchbuffer_flush(brw); 1564 intel_flush_front(&brw->ctx); 1565 } 1566 1567 if (back_rb) { 1568 attachments[i++] = __DRI_BUFFER_BACK_LEFT; 1569 attachments[i++] = intel_bits_per_pixel(back_rb); 1570 } 1571 1572 assert(i <= ARRAY_SIZE(attachments)); 1573 1574 *buffers = 1575 dri_screen->dri2.loader->getBuffersWithFormat(drawable, 1576 &drawable->w, 1577 &drawable->h, 1578 attachments, i / 2, 1579 buffer_count, 1580 drawable->loaderPrivate); 1581 } 1582 1583 /** 1584 * \brief Assign a DRI buffer's DRM region to a renderbuffer. 1585 * 1586 * This is called from intel_update_renderbuffers(). 1587 * 1588 * \par Note: 1589 * DRI buffers whose attachment point is DRI2BufferStencil or 1590 * DRI2BufferDepthStencil are handled as special cases. 1591 * 1592 * \param buffer_name is a human readable name, such as "dri2 front buffer", 1593 * that is passed to drm_intel_bo_gem_create_from_name(). 1594 * 1595 * \see intel_update_renderbuffers() 1596 */ 1597 static void 1598 intel_process_dri2_buffer(struct brw_context *brw, 1599 __DRIdrawable *drawable, 1600 __DRIbuffer *buffer, 1601 struct intel_renderbuffer *rb, 1602 const char *buffer_name) 1603 { 1604 struct gl_framebuffer *fb = drawable->driverPrivate; 1605 drm_intel_bo *bo; 1606 1607 if (!rb) 1608 return; 1609 1610 unsigned num_samples = rb->Base.Base.NumSamples; 1611 1612 /* We try to avoid closing and reopening the same BO name, because the first 1613 * use of a mapping of the buffer involves a bunch of page faulting which is 1614 * moderately expensive. 1615 */ 1616 struct intel_mipmap_tree *last_mt; 1617 if (num_samples == 0) 1618 last_mt = rb->mt; 1619 else 1620 last_mt = rb->singlesample_mt; 1621 1622 uint32_t old_name = 0; 1623 if (last_mt) { 1624 /* The bo already has a name because the miptree was created by a 1625 * previous call to intel_process_dri2_buffer(). If a bo already has a 1626 * name, then drm_intel_bo_flink() is a low-cost getter. It does not 1627 * create a new name. 1628 */ 1629 drm_intel_bo_flink(last_mt->bo, &old_name); 1630 } 1631 1632 if (old_name == buffer->name) 1633 return; 1634 1635 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) { 1636 fprintf(stderr, 1637 "attaching buffer %d, at %d, cpp %d, pitch %d\n", 1638 buffer->name, buffer->attachment, 1639 buffer->cpp, buffer->pitch); 1640 } 1641 1642 bo = drm_intel_bo_gem_create_from_name(brw->bufmgr, buffer_name, 1643 buffer->name); 1644 if (!bo) { 1645 fprintf(stderr, 1646 "Failed to open BO for returned DRI2 buffer " 1647 "(%dx%d, %s, named %d).\n" 1648 "This is likely a bug in the X Server that will lead to a " 1649 "crash soon.\n", 1650 drawable->w, drawable->h, buffer_name, buffer->name); 1651 return; 1652 } 1653 1654 intel_update_winsys_renderbuffer_miptree(brw, rb, bo, 1655 drawable->w, drawable->h, 1656 buffer->pitch); 1657 1658 if (_mesa_is_front_buffer_drawing(fb) && 1659 (buffer->attachment == __DRI_BUFFER_FRONT_LEFT || 1660 buffer->attachment == __DRI_BUFFER_FAKE_FRONT_LEFT) && 1661 rb->Base.Base.NumSamples > 1) { 1662 intel_renderbuffer_upsample(brw, rb); 1663 } 1664 1665 assert(rb->mt); 1666 1667 drm_intel_bo_unreference(bo); 1668 } 1669 1670 /** 1671 * \brief Query DRI image loader to obtain a DRIdrawable's buffers. 1672 * 1673 * To determine which DRI buffers to request, examine the renderbuffers 1674 * attached to the drawable's framebuffer. Then request the buffers from 1675 * the image loader 1676 * 1677 * This is called from intel_update_renderbuffers(). 1678 * 1679 * \param drawable Drawable whose buffers are queried. 1680 * \param buffers [out] List of buffers returned by DRI2 query. 1681 * \param buffer_count [out] Number of buffers returned. 1682 * 1683 * \see intel_update_renderbuffers() 1684 */ 1685 1686 static void 1687 intel_update_image_buffer(struct brw_context *intel, 1688 __DRIdrawable *drawable, 1689 struct intel_renderbuffer *rb, 1690 __DRIimage *buffer, 1691 enum __DRIimageBufferMask buffer_type) 1692 { 1693 struct gl_framebuffer *fb = drawable->driverPrivate; 1694 1695 if (!rb || !buffer->bo) 1696 return; 1697 1698 unsigned num_samples = rb->Base.Base.NumSamples; 1699 1700 /* Check and see if we're already bound to the right 1701 * buffer object 1702 */ 1703 struct intel_mipmap_tree *last_mt; 1704 if (num_samples == 0) 1705 last_mt = rb->mt; 1706 else 1707 last_mt = rb->singlesample_mt; 1708 1709 if (last_mt && last_mt->bo == buffer->bo) 1710 return; 1711 1712 intel_update_winsys_renderbuffer_miptree(intel, rb, buffer->bo, 1713 buffer->width, buffer->height, 1714 buffer->pitch); 1715 1716 if (_mesa_is_front_buffer_drawing(fb) && 1717 buffer_type == __DRI_IMAGE_BUFFER_FRONT && 1718 rb->Base.Base.NumSamples > 1) { 1719 intel_renderbuffer_upsample(intel, rb); 1720 } 1721 } 1722 1723 static void 1724 intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable) 1725 { 1726 struct gl_framebuffer *fb = drawable->driverPrivate; 1727 __DRIscreen *dri_screen = brw->screen->driScrnPriv; 1728 struct intel_renderbuffer *front_rb; 1729 struct intel_renderbuffer *back_rb; 1730 struct __DRIimageList images; 1731 unsigned int format; 1732 uint32_t buffer_mask = 0; 1733 int ret; 1734 1735 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT); 1736 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT); 1737 1738 if (back_rb) 1739 format = intel_rb_format(back_rb); 1740 else if (front_rb) 1741 format = intel_rb_format(front_rb); 1742 else 1743 return; 1744 1745 if (front_rb && (_mesa_is_front_buffer_drawing(fb) || 1746 _mesa_is_front_buffer_reading(fb) || !back_rb)) { 1747 buffer_mask |= __DRI_IMAGE_BUFFER_FRONT; 1748 } 1749 1750 if (back_rb) 1751 buffer_mask |= __DRI_IMAGE_BUFFER_BACK; 1752 1753 ret = dri_screen->image.loader->getBuffers(drawable, 1754 driGLFormatToImageFormat(format), 1755 &drawable->dri2.stamp, 1756 drawable->loaderPrivate, 1757 buffer_mask, 1758 &images); 1759 if (!ret) 1760 return; 1761 1762 if (images.image_mask & __DRI_IMAGE_BUFFER_FRONT) { 1763 drawable->w = images.front->width; 1764 drawable->h = images.front->height; 1765 intel_update_image_buffer(brw, 1766 drawable, 1767 front_rb, 1768 images.front, 1769 __DRI_IMAGE_BUFFER_FRONT); 1770 } 1771 if (images.image_mask & __DRI_IMAGE_BUFFER_BACK) { 1772 drawable->w = images.back->width; 1773 drawable->h = images.back->height; 1774 intel_update_image_buffer(brw, 1775 drawable, 1776 back_rb, 1777 images.back, 1778 __DRI_IMAGE_BUFFER_BACK); 1779 } 1780 } 1781
