Lines Matching full:strt
936 unsigned StRt = getLdStRegOp(*StoreI).getReg();
937 bool IsStoreXReg = TRI->getRegClass(AArch64::GPR64RegClassID)->contains(StRt);
940 TRI->getRegClass(AArch64::GPR32RegClassID)->contains(StRt)) &&
947 if (StRt == LdRt && LoadSize == 8) {
959 .addReg(StRt)
1000 .addReg(StRt)
1007 .addReg(StRt)
