Lines Matching refs:W0
241 uint16_t W0 = (Reg[0].Reg != 0) ? getRegBitWidth(Reg[0]) : 0;
253 return rr0(eIMM(im(1), W0), Outputs);
255 return rr0(RegisterCell(W0).fill(0, W0, BT::BitValue::Zero), Outputs);
257 return rr0(RegisterCell(W0).fill(0, W0, BT::BitValue::One), Outputs);
263 RegisterCell RC = RegisterCell::self(Reg[0].Reg, W0);
275 uint16_t RW = W0;
284 RegisterCell RC = RegisterCell::self(Reg[0].Reg, W0);
285 W0 = 8; // XXX Pred size
286 return rr0(eINS(RC, eXTR(rc(1), 0, W0), 0), Outputs);
298 assert(W0 == 64 && W1 == 32);
299 RegisterCell CW = RegisterCell(W0).insert(rc(1), BT::BitMask(0, W1-1));
307 return rr0(eADD(rc(1), eIMM(im(2), W0)), Outputs);
309 RegisterCell RC = eADD(eIMM(im(1), W0), eASL(rc(2), im(3)));
313 RegisterCell RC = eADD(eIMM(im(1), W0), eLSR(rc(2), im(3)));
317 RegisterCell RC = eADD(rc(1), eADD(rc(2), eIMM(im(3), W0)));
321 RegisterCell M = eMLS(rc(2), eIMM(im(3), W0));
322 RegisterCell RC = eADD(eIMM(im(1), W0), lo(M, W0));
327 RegisterCell RC = eADD(eIMM(im(1), W0), lo(M, W0));
331 RegisterCell M = eMLS(eIMM(im(2), W0), rc(3));
332 RegisterCell RC = eADD(rc(1), lo(M, W0));
336 RegisterCell M = eMLS(rc(2), eIMM(im(3), W0));
337 RegisterCell RC = eADD(rc(1), lo(M, W0));
342 RegisterCell RC = eADD(rc(1), lo(M, W0));
346 RegisterCell RC = eADD(rc(1), eSUB(eIMM(im(2), W0), rc(3)));
350 RegisterCell RC = eADD(rc(1), eADD(rc(2), eIMM(im(3), W0)));
366 RegisterCell RPC = RegisterCell::self(Reg[0].Reg, W0);
368 return rr0(eADD(RPC, eIMM(im(2), W0)), Outputs);
374 return rr0(eSUB(eIMM(im(1), W0), rc(2)), Outputs);
376 RegisterCell RC = eSUB(eIMM(im(1), W0), eASL(rc(2), im(3)));
380 RegisterCell RC = eSUB(eIMM(im(1), W0), eLSR(rc(2), im(3)));
384 RegisterCell RC = eSUB(rc(1), eADD(rc(2), eIMM(im(3), W0)));
393 return rr0(eSUB(eIMM(0, W0), rc(1)), Outputs);
397 return rr0(hi(M, W0), Outputs);
407 return rr0(lo(M, W0), Outputs);
410 RegisterCell M = eMLS(rc(2), eIMM(im(3), W0));
411 RegisterCell RC = eADD(rc(1), lo(M, W0));
415 RegisterCell M = eMLS(rc(2), eIMM(im(3), W0));
416 RegisterCell RC = eSUB(rc(1), lo(M, W0));
421 RegisterCell RC = eADD(rc(1), lo(M, W0));
425 RegisterCell M = eMLS(rc(1), eIMM(im(2), W0));
429 RegisterCell M = eMLS(rc(1), eIMM(-im(2), W0));
433 RegisterCell M = eMLS(rc(1), eIMM(im(2), W0));
438 return rr0(hi(M, W0), Outputs);
451 return rr0(eAND(rc(1), eIMM(im(2), W0)), Outputs);
459 RegisterCell RC = eAND(eIMM(im(1), W0), eASL(rc(2), im(3)));
463 RegisterCell RC = eAND(eIMM(im(1), W0), eLSR(rc(2), im(3)));
475 return rr0(eORL(rc(1), eIMM(im(2), W0)), Outputs);
483 RegisterCell RC = eORL(eIMM(im(1), W0), eASL(rc(2), im(3)));
487 RegisterCell RC = eORL(eIMM(im(1), W0), eLSR(rc(2), im(3)));
496 RegisterCell RC = eORL(rc(1), eAND(rc(2), eIMM(im(3), W0)));
500 RegisterCell RC = eORL(rc(1), eORL(rc(2), eIMM(im(3), W0)));
567 assert(W0 == 32);
568 RegisterCell XC = eSXT(rc(1).cat(eIMM(0, W0)), W0);
569 RegisterCell RC = eASR(eADD(eASR(XC, im(2)), eIMM(1, 2*W0)), 1);
570 return rr0(eXTR(RC, 0, W0), Outputs);
577 RegisterCell XC = eSXT(rc(1).cat(eIMM(0, W0)), W0);
578 RegisterCell RC = eLSR(eADD(eASR(XC, S-1), eIMM(1, 2*W0)), 1);
579 return rr0(eXTR(RC, 0, W0), Outputs);
630 RegisterCell RZ = RegisterCell(W0).fill(BX, W1, Zero)
631 .fill(W1+(W1-BX), W0, Zero);
641 assert(Wd <= W0);
643 return rr0(eIMM(0, W0), Outputs);
646 RegisterCell Pad = (Wd+Of > W0) ? rc(1).cat(eIMM(0, Wd+Of-W0)) : rc(1);
649 RegisterCell RC = RegisterCell(W0).insert(Ext, BT::BitMask(0, Wd-1));
657 assert(Wd < W0 && Of < W0);
658 // If Wd+Of exceeds W0, the inserted bits are truncated.
659 if (Wd+Of > W0)
660 Wd = W0-Of;
673 assert(W0 % 2 == 0);
674 return rr0(cop(2, W0/2).cat(cop(1, W0/2)), Outputs);
679 assert(W0 == 32);
691 assert(W0 == 64);
716 uint16_t WR = W0;
736 RegisterCell R2 = cop(2, W0);
737 RegisterCell R3 = cop(3, W0);
755 assert(W0 == 64 && W1 == 32);
805 RegisterCell RC(W0);
806 RC.fill(0, W0, (All1 ? BT::BitValue::One : BT::BitValue::Zero));
822 RegisterCell RC(W0);
823 RC.fill(0, W0, (Has1 ? BT::BitValue::One : BT::BitValue::Zero));
869 return rr0(RegisterCell(W0).fill(0, W0, F), Outputs);
