Lines Matching refs:Decoder
74 const void *Decoder);
79 const void *Decoder);
84 const void *Decoder);
89 const void *Decoder);
94 const void *Decoder);
99 const void *Decoder);
104 const void *Decoder);
109 const void *Decoder);
114 const void *Decoder);
119 const void *Decoder);
124 const void *Decoder);
129 const void *Decoder);
133 const void *Decoder);
138 const void *Decoder);
143 const void *Decoder);
148 const void *Decoder);
153 const void *Decoder);
158 const void *Decoder);
163 const void *Decoder);
168 const void *Decoder);
173 const void *Decoder);
178 const void *Decoder);
183 const void *Decoder);
188 const void *Decoder);
193 const void *Decoder);
198 const void *Decoder);
203 const void *Decoder);
208 const void *Decoder);
213 const void *Decoder);
218 const void *Decoder);
223 const void *Decoder);
230 const void *Decoder);
237 const void *Decoder);
244 const void *Decoder);
251 const void *Decoder);
258 const void *Decoder);
263 const void *Decoder);
268 const void *Decoder);
273 const void *Decoder);
278 const void *Decoder);
283 const void *Decoder);
288 const void *Decoder);
293 const void *Decoder);
298 const void *Decoder);
303 const void *Decoder);
308 const void *Decoder);
313 const void *Decoder);
316 uint64_t Address, const void *Decoder);
321 const void *Decoder);
326 const void *Decoder);
331 const void *Decoder);
336 const void *Decoder);
341 const void *Decoder);
346 const void *Decoder);
351 const void *Decoder);
355 const void *Decoder);
359 const void *Decoder);
363 Decoder);
367 const void *Decoder);
371 const void *Decoder);
375 const void *Decoder);
380 const void *Decoder);
385 const void *Decoder);
390 const void *Decoder);
395 const void *Decoder);
400 const void *Decoder);
405 const void *Decoder) {
407 Decoder);
413 const void *Decoder);
418 const void *Decoder);
421 uint64_t Address, const void *Decoder);
424 uint64_t Address, const void *Decoder);
427 uint64_t Address, const void *Decoder);
430 uint64_t Address, const void *Decoder);
433 uint64_t Address, const void *Decoder);
435 /// INSVE_[BHWD] have an implicit operand that the generated decoder doesn't
439 const void *Decoder);
444 const void *Decoder);
449 const void *Decoder);
454 const void *Decoder);
459 const void *Decoder);
464 const void *Decoder);
469 const void *Decoder);
474 const void *Decoder);
479 const void *Decoder);
484 const void *Decoder);
489 const void *Decoder);
493 const void *Decoder);
497 const void *Decoder);
501 const void *Decoder);
544 const void *Decoder) {
570 if (RegDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail)
573 if (RegDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail)
580 if (RegDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail)
591 const void *Decoder) {
617 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
620 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
630 const void *Decoder) {
637 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
639 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
643 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
645 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
649 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
661 const void *Decoder) {
687 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
690 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
700 const void *Decoder) {
707 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
709 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
713 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
715 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
719 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
731 const void *Decoder) {
760 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
763 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
774 const void *Decoder) {
804 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
807 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
818 const void *Decoder) {
852 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
856 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
867 const void *Decoder) {
896 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
898 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
977 // Calling the auto-generated decoder function for microMIPS32R6
988 // Calling the auto-generated decoder function for microMIPS 16-bit
1003 // Calling the auto-generated decoder function.
1013 // Calling the auto-generated decoder function.
1114 // Calling the auto-generated decoder function.
1129 const void *Decoder) {
1138 const void *Decoder) {
1143 unsigned Reg = getReg(Decoder, Mips::GPR64RegClassID, RegNo);
1151 const void *Decoder) {
1154 unsigned Reg = getReg(Decoder, Mips::GPRMM16RegClassID, RegNo);
1162 const void *Decoder) {
1165 unsigned Reg = getReg(Decoder, Mips::GPRMM16ZeroRegClassID, RegNo);
1173 const void *Decoder) {
1176 unsigned Reg = getReg(Decoder, Mips::GPRMM16MovePRegClassID, RegNo);
1184 const void *Decoder) {
1187 unsigned Reg = getReg(Decoder, Mips::GPR32RegClassID, RegNo);
1195 const void *Decoder) {
1196 if (static_cast<const MipsDisassembler *>(Decoder)->isGP64())
1197 return DecodeGPR64RegisterClass(Inst, RegNo, Address, Decoder);
1199 return DecodeGPR32RegisterClass(Inst, RegNo, Address, Decoder);
1205 const void *Decoder) {
1206 return DecodeGPR32RegisterClass(Inst, RegNo, Address, Decoder);
1212 const void *Decoder) {
1216 unsigned Reg = getReg(Decoder, Mips::FGR64RegClassID, RegNo);
1224 const void *Decoder) {
1228 unsigned Reg = getReg(Decoder, Mips::FGR32RegClassID, RegNo);
1236 const void *Decoder) {
1239 unsigned Reg = getReg(Decoder, Mips::CCRRegClassID, RegNo);
1247 const void *Decoder) {
1250 unsigned Reg = getReg(Decoder, Mips::FCCRegClassID, RegNo);
1257 const void *Decoder) {
1261 unsigned Reg = getReg(Decoder, Mips::FGRCCRegClassID, RegNo);
1269 const void *Decoder) {
1274 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
1275 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1291 const void *Decoder) {
1296 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
1297 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1312 const void *Decoder) {
1317 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1318 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
1330 const void *Decoder) {
1335 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1336 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
1348 const void *Decoder) {
1353 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1365 const void *Decoder) {
1370 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1382 const void *Decoder) {
1387 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1399 const void *Decoder) {
1404 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1416 const void *Decoder) {
1421 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
1422 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1434 const void *Decoder) {
1438 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1449 const void *Decoder) {
1453 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1462 uint64_t Address, const void *Decoder) {
1467 Reg = getReg(Decoder, Mips::MSA128BRegClassID, Reg);
1468 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1510 const void *Decoder) {
1519 if (DecodeGPRMM16RegisterClass(Inst, Reg, Address, Decoder)
1529 if (DecodeGPRMM16ZeroRegisterClass(Inst, Reg, Address, Decoder)
1535 if (DecodeGPRMM16RegisterClass(Inst, Base, Address, Decoder)
1568 const void *Decoder) {
1572 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
1584 const void *Decoder) {
1588 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
1600 const void *Decoder) {
1612 if (DecodeRegListOperand16(Inst, Insn, Address, Decoder)
1625 const void *Decoder) {
1630 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
1631 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1646 const void *Decoder) {
1651 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
1652 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1657 if (DecodeRegListOperand(Inst, Insn, Address, Decoder)
1682 const void *Decoder) {
1687 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
1688 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1700 const void *Decoder) {
1705 Reg = getReg(Decoder, Mips::FGR64RegClassID, Reg);
1706 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1716 uint64_t Address, const void *Decoder) {
1723 Reg = getReg(Decoder, Mips::FGR64RegClassID, Reg);
1724 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1736 const void *Decoder) {
1741 Reg = getReg(Decoder, Mips::COP2RegClassID, Reg);
1742 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1754 const void *Decoder) {
1759 Reg = getReg(Decoder, Mips::COP3RegClassID, Reg);
1760 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1772 const void *Decoder) {
1777 Reg = getReg(Decoder, Mips::COP2RegClassID, Reg);
1778 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1788 uint64_t Address, const void *Decoder) {
1793 Reg = getReg(Decoder, Mips::COP2RegClassID, Reg);
1794 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1806 const void *Decoder) {
1811 Rt = getReg(Decoder, Mips::GPR32RegClassID, Rt);
1812 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1828 const void *Decoder) {
1839 const void *Decoder) {
1844 unsigned Reg = getReg(Decoder, Mips::AFGR64RegClassID, RegNo /2);
1852 const void *Decoder) {
1856 unsigned Reg = getReg(Decoder, Mips::ACC64DSPRegClassID, RegNo);
1864 const void *Decoder) {
1868 unsigned Reg = getReg(Decoder, Mips::HI32DSPRegClassID, RegNo);
1876 const void *Decoder) {
1880 unsigned Reg = getReg(Decoder, Mips::LO32DSPRegClassID, RegNo);
1888 const void *Decoder) {
1892 unsigned Reg = getReg(Decoder, Mips::MSA128BRegClassID, RegNo);
1900 const void *Decoder) {
1904 unsigned Reg = getReg(Decoder, Mips::MSA128HRegClassID, RegNo);
1912 const void *Decoder) {
1916 unsigned Reg = getReg(Decoder, Mips::MSA128WRegClassID, RegNo);
1924 const void *Decoder) {
1928 unsigned Reg = getReg(Decoder, Mips::MSA128DRegClassID, RegNo);
1936 const void *Decoder) {
1940 unsigned Reg = getReg(Decoder, Mips::MSACtrlRegClassID, RegNo);
1948 const void *Decoder) {
1952 unsigned Reg = getReg(Decoder, Mips::COP0RegClassID, RegNo);
1960 const void *Decoder) {
1964 unsigned Reg = getReg(Decoder, Mips::COP2RegClassID, RegNo);
1972 const void *Decoder) {
1981 const void *Decoder) {
1990 const void *Decoder) {
2000 const void *Decoder) {
2010 const void *Decoder) {
2020 const void *Decoder) {
2030 const void *Decoder) {
2039 const void *Decoder) {
2048 const void *Decoder) {
2057 const void *Decoder) {
2067 const void *Decoder) {
2076 const void *Decoder) {
2089 const void *Decoder) {
2100 const void *Decoder) {
2108 const void *Decoder) {
2118 const void *Decoder) {
2127 const void *Decoder) {
2136 uint64_t Address, const void *Decoder) {
2142 uint64_t Address, const void *Decoder) {
2148 uint64_t Address, const void *Decoder) {
2162 uint64_t Address, const void *Decoder) {
2174 const void *Decoder) {
2202 const void *Decoder) {
2225 uint64_t Address, const void *Decoder) {
2270 uint64_t Address, const void *Decoder) {
2278 const void *Decoder) {
2310 MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, Rs)));
2314 MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, Rt)));
2324 const void *Decoder) {
2350 MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, Rs)));
2352 MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, Rt)));
