Lines Matching defs:LL
626 // We'll also ignore MVT::i64 operands as this optimizations proves
1114 unsigned LL, SC, AND, NOR, ZERO, BEQ;
1118 LL = Mips::LL_MM;
1121 LL = Subtarget.hasMips32r6()
1123 : (ArePtrs64bit ? Mips::LL64 : Mips::LL);
1134 LL = Subtarget.hasMips64r6() ? Mips::LLD_R6 : Mips::LLD;
1171 // ll oldval, 0(ptr)
1176 BuildMI(BB, DL, TII->get(LL), OldVal).addReg(Ptr).addImm(0);
1263 unsigned LL, SC;
1265 LL = Mips::LL_MM;
1268 LL = Subtarget.hasMips32r6() ? (ArePtrs64bit ? Mips::LL64_R6 : Mips::LL_R6)
1269 : (ArePtrs64bit ? Mips::LL64 : Mips::LL);
1328 // ll oldval,0(alignedaddr)
1338 // ll oldval,0(alignedaddr)
1346 BuildMI(BB, DL, TII->get(LL), OldVal).addReg(AlignedAddr).addImm(0);
1402 unsigned LL, SC, ZERO, BNE, BEQ;
1406 LL = Mips::LL_MM;
1409 LL = Subtarget.hasMips32r6()
1411 : (ArePtrs64bit ? Mips::LL64 : Mips::LL);
1421 LL = Subtarget.hasMips64r6() ? Mips::LLD_R6 : Mips::LLD;
1460 // ll dest, 0(ptr)
1463 BuildMI(BB, DL, TII->get(LL), Dest).addReg(Ptr).addImm(0);
1517 unsigned LL, SC;
1520 LL = Mips::LL_MM;
1523 LL = Subtarget.hasMips32r6() ? (ArePtrs64bit ? Mips::LL64_R6 : Mips::LL_R6)
1524 : (ArePtrs64bit ? Mips::LL64 : Mips::LL);
1597 // ll oldval,0(alginedaddr)
1601 BuildMI(BB, DL, TII->get(LL), OldVal).addReg(AlignedAddr).addImm(0);
