Lines Matching full:pseudo
10 // This file describes the various pseudo instructions used by the compiler,
30 // Random Pseudo Instructions.
36 def MOVPC32r : Ii32<0xE8, Pseudo, (outs GR32:$reg), (ins i32imm:$label),
46 def ADJCALLSTACKDOWN32 : I<0, Pseudo, (outs), (ins i32imm:$amt1, i32imm:$amt2),
50 def ADJCALLSTACKUP32 : I<0, Pseudo, (outs), (ins i32imm:$amt1, i32imm:$amt2),
65 def ADJCALLSTACKDOWN64 : I<0, Pseudo, (outs), (ins i32imm:$amt1, i32imm:$amt2),
69 def ADJCALLSTACKUP64 : I<0, Pseudo, (outs), (ins i32imm:$amt1, i32imm:$amt2),
80 def VASTART_SAVE_XMM_REGS : I<0, Pseudo,
91 // The VAARG_64 pseudo-instruction takes the address of the va_list,
94 def VAARG_64 : I<0, Pseudo,
109 def SEG_ALLOCA_32 : I<0, Pseudo, (outs GR32:$dst), (ins GR32:$size),
116 def SEG_ALLOCA_64 : I<0, Pseudo, (outs GR64:$dst), (ins GR64:$size),
132 def WIN_ALLOCA_32 : I<0, Pseudo, (outs), (ins GR32:$size),
138 def WIN_ALLOCA_64 : I<0, Pseudo, (outs), (ins GR64:$size),
145 // EH Pseudo Instructions
166 def CLEANUPRET : I<0, Pseudo, (outs), (ins), "# CLEANUPRET", [(cleanupret)]>;
170 def CATCHRET : I<0, Pseudo, (outs), (ins brtarget32:$dst, brtarget32:$from),
177 def CATCHPAD : I<0, Pseudo, (outs), (ins), "# CATCHPAD", [(catchpad)]>;
185 def EH_RESTORE : I<0, Pseudo, (outs), (ins), "# EH_RESTORE", []>;
189 def EH_SjLj_SetJmp32 : I<0, Pseudo, (outs GR32:$dst), (ins i32mem:$buf),
193 def EH_SjLj_SetJmp64 : I<0, Pseudo, (outs GR32:$dst), (ins i64mem:$buf),
198 def EH_SjLj_LongJmp32 : I<0, Pseudo, (outs), (ins i32mem:$buf),
202 def EH_SjLj_LongJmp64 : I<0, Pseudo, (outs), (ins i64mem:$buf),
211 def EH_SjLj_Setup : I<0, Pseudo, (outs), (ins brtarget:$dst),
216 // Pseudo instructions used by unwind info.
219 def SEH_PushReg : I<0, Pseudo, (outs), (ins i32imm:$reg),
221 def SEH_SaveReg : I<0, Pseudo, (outs), (ins i32imm:$reg, i32imm:$dst),
223 def SEH_SaveXMM : I<0, Pseudo, (outs), (ins i32imm:$reg, i32imm:$dst),
225 def SEH_StackAlloc : I<0, Pseudo, (outs), (ins i32imm:$size),
227 def SEH_SetFrame : I<0, Pseudo, (outs), (ins i32imm:$reg, i32imm:$offset),
229 def SEH_PushFrame : I<0, Pseudo, (outs), (ins i1imm:$mode),
231 def SEH_EndPrologue : I<0, Pseudo, (outs), (ins),
233 def SEH_Epilogue : I<0, Pseudo, (outs), (ins),
238 // Pseudo instructions used by segmented stacks.
245 def MORESTACK_RET: I<0, Pseudo, (outs), (ins),
251 def MORESTACK_RET_RESTORE_R10 : I<0, Pseudo, (outs), (ins),
263 def MOV32r0 : I<0, Pseudo, (outs GR32:$dst), (ins), "",
276 // Pseudo instructions for materializing 1 and -1 using XOR+INC/DEC,
279 def MOV32r1 : I<0, Pseudo, (outs GR32:$dst), (ins), "",
281 def MOV32r_1 : I<0, Pseudo, (outs GR32:$dst), (ins), "",
293 def MOV32ImmSExti8 : I<0, Pseudo, (outs GR32:$dst), (ins i32i8imm:$src), "",
296 def MOV64ImmSExti8 : I<0, Pseudo, (outs GR64:$dst), (ins i64i8imm:$src), "",
306 def MOV32ri64 : I<0, Pseudo, (outs GR32:$dst), (ins i64i32imm:$src), "", []>;
308 // This 64-bit pseudo-move can be used for both a 64-bit constant that is
319 // FIXME: These are pseudo ops that should be replaced with Pat<> patterns.
322 def SETB_C8r : I<0, Pseudo, (outs GR8:$dst), (ins), "",
324 def SETB_C16r : I<0, Pseudo, (outs GR16:$dst), (ins), "",
326 def SETB_C32r : I<0, Pseudo, (outs GR32:$dst), (ins), "",
328 def SETB_C64r : I<0, Pseudo, (outs GR64:$dst), (ins), "",
379 // String Pseudo Instructions
460 def TLS_addr32 : I<0, Pseudo, (outs), (ins i32mem:$sym),
464 def TLS_base_addr32 : I<0, Pseudo, (outs), (ins i32mem:$sym),
480 def TLS_addr64 : I<0, Pseudo, (outs), (ins i64mem:$sym),
484 def TLS_base_addr64 : I<0, Pseudo, (outs), (ins i64mem:$sym),
497 def TLSCall_32 : I<0, Pseudo, (outs), (ins i32mem:$sym),
503 // pseudo directly use the symbol, so do not add an implicit use of
510 def TLSCall_64 : I<0, Pseudo, (outs), (ins i64mem:$sym),
517 // Conditional Move Pseudo Instructions
522 def CMOV#NAME : I<0, Pseudo,
524 "#CMOV_"#NAME#" PSEUDO!",
570 // Normal-Instructions-With-Lock-Prefix Pseudo Instructions
585 def Int_MemBarrier : I<0, Pseudo, (outs), (ins),
763 // This pseudo must be used when the frame uses RBX as
772 // the pseudo. The argument feeding EBX is ebx_input.
786 I<0, Pseudo, (outs GR32:$dst),
808 I<0, Pseudo, (outs GR64:$dst),
866 * (see below the RELEASE_MOV* / ACQUIRE_MOV* pseudo-instructions)
869 def NAME#8mi : I<0, Pseudo, (outs), (ins i8mem:$dst, i8imm:$src),
870 "#BINOP "#NAME#"8mi PSEUDO!",
873 def NAME#8mr : I<0, Pseudo, (outs), (ins i8mem:$dst, GR8:$src),
874 "#BINOP "#NAME#"8mr PSEUDO!",
879 def NAME#32mi : I<0, Pseudo, (outs), (ins i32mem:$dst, i32imm:$src),
880 "#BINOP "#NAME#"32mi PSEUDO!",
883 def NAME#32mr : I<0, Pseudo, (outs), (ins i32mem:$dst, GR32:$src),
884 "#BINOP "#NAME#"32mr PSEUDO!",
887 def NAME#64mi32 : I<0, Pseudo, (outs), (ins i64mem:$dst, i64i32imm:$src),
888 "#BINOP "#NAME#"64mi32 PSEUDO!",
891 def NAME#64mr : I<0, Pseudo, (outs), (ins i64mem:$dst, GR64:$src),
892 "#BINOP "#NAME#"64mr PSEUDO!",
911 def NAME#32mr : I<0, Pseudo, (outs), (ins i32mem:$dst, FR32:$src),
912 "#BINOP "#NAME#"32mr PSEUDO!",
917 def NAME#64mr : I<0, Pseudo, (outs), (ins i64mem:$dst, FR64:$src),
918 "#BINOP "#NAME#"64mr PSEUDO!",
929 def NAME#8m : I<0, Pseudo, (outs), (ins i8mem:$dst),
930 "#UNOP "#NAME#"8m PSEUDO!",
932 def NAME#16m : I<0, Pseudo, (outs), (ins i16mem:$dst),
933 "#UNOP "#NAME#"16m PSEUDO!",
935 def NAME#32m : I<0, Pseudo, (outs), (ins i32mem:$dst),
936 "#UNOP "#NAME#"32m PSEUDO!",
938 def NAME#64m : I<0, Pseudo, (outs), (ins i64mem:$dst),
939 "#UNOP "#NAME#"64m PSEUDO!",
973 def RELEASE_MOV8mi : I<0, Pseudo, (outs), (ins i8mem:$dst, i8imm:$src),
974 "#RELEASE_MOV8mi PSEUDO!",
976 def RELEASE_MOV16mi : I<0, Pseudo, (outs), (ins i16mem:$dst, i16imm:$src),
977 "#RELEASE_MOV16mi PSEUDO!",
979 def RELEASE_MOV32mi : I<0, Pseudo, (outs), (ins i32mem:$dst, i32imm:$src),
980 "#RELEASE_MOV32mi PSEUDO!",
982 def RELEASE_MOV64mi32 : I<0, Pseudo, (outs), (ins i64mem:$dst, i64i32imm:$src),
983 "#RELEASE_MOV64mi32 PSEUDO!",
986 def RELEASE_MOV8mr : I<0, Pseudo, (outs), (ins i8mem :$dst, GR8 :$src),
987 "#RELEASE_MOV8mr PSEUDO!",
989 def RELEASE_MOV16mr : I<0, Pseudo, (outs), (ins i16mem:$dst, GR16:$src),
990 "#RELEASE_MOV16mr PSEUDO!",
992 def RELEASE_MOV32mr : I<0, Pseudo, (outs), (ins i32mem:$dst, GR32:$src),
993 "#RELEASE_MOV32mr PSEUDO!",
995 def RELEASE_MOV64mr : I<0, Pseudo, (outs), (ins i64mem:$dst, GR64:$src),
996 "#RELEASE_MOV64mr PSEUDO!",
999 def ACQUIRE_MOV8rm : I<0, Pseudo, (outs GR8 :$dst), (ins i8mem :$src),
1000 "#ACQUIRE_MOV8rm PSEUDO!",
1002 def ACQUIRE_MOV16rm : I<0, Pseudo, (outs GR16:$dst), (ins i16mem:$src),
1003 "#ACQUIRE_MOV16rm PSEUDO!",
1005 def ACQUIRE_MOV32rm : I<0, Pseudo, (outs GR32:$dst), (ins i32mem:$src),
1006 "#ACQUIRE_MOV32rm PSEUDO!",
1008 def ACQUIRE_MOV64rm : I<0, Pseudo, (outs GR64:$dst), (ins i64mem:$src),
1009 "#ACQUIRE_MOV64rm PSEUDO!",
1316 // into "disjoint bits" pseudo ops.
1338 def ADD16rr_DB : I<0, Pseudo, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2),
1341 def ADD32rr_DB : I<0, Pseudo, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
1344 def ADD64rr_DB : I<0, Pseudo, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
1352 def ADD16ri8_DB : I<0, Pseudo,
1356 def ADD16ri_DB : I<0, Pseudo, (outs GR16:$dst), (ins GR16:$src1, i16imm:$src2),
1360 def ADD32ri8_DB : I<0, Pseudo,
1364 def ADD32ri_DB : I<0, Pseudo, (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2),
1369 def ADD64ri8_DB : I<0, Pseudo,
1374 def ADD64ri32_DB : I<0, Pseudo,
