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  /device/linaro/bootloader/edk2/Omap35xxPkg/Include/Omap3530/
Omap3530MMCHS.h 170 #define CMD3 (INDX(3) | CICE_ENABLE | CCCE_ENABLE | RSP_TYPE_48BITS)
  /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkSouthCluster/Include/
MMC.h 28 #define CMD3 3
67 #define SET_RELATIVE_ADDR CMD3
  /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/IndustryStandard/
Mmc.h 40 #define CMD3 3
79 #define SET_RELATIVE_ADDR CMD3
  /external/syslinux/gpxe/src/drivers/net/
amd8111e.h 45 Registers CMD0, CMD2, CMD3,CMD7 and INTEN0 uses a write access technique called command style access. It allows the write to selected bits of this register without altering the bits that are not selected. Command style registers are divided into 4 bytes that can be written independently. Higher order bit of each byte is the value bit that specifies the value that will be written into the selected bits of register.
63 #define CMD3 0x54 /* Command3 resiter */

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