1 /** @file 2 Industry Standard Definitions of SMBIOS Table Specification v3.0.0. 3 4 Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR> 5 (C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR> 6 This program and the accompanying materials are licensed and made available under 7 the terms and conditions of the BSD License that accompanies this distribution. 8 The full text of the license may be found at 9 http://opensource.org/licenses/bsd-license.php. 10 11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 13 14 **/ 15 16 #ifndef __SMBIOS_STANDARD_H__ 17 #define __SMBIOS_STANDARD_H__ 18 19 /// 20 /// Reference SMBIOS 2.6, chapter 3.1.2. 21 /// For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for 22 /// use by this specification. 23 /// 24 #define SMBIOS_HANDLE_RESERVED_BEGIN 0xFF00 25 26 /// 27 /// Reference SMBIOS 2.7, chapter 6.1.2. 28 /// The UEFI Platform Initialization Specification reserves handle number FFFEh for its 29 /// EFI_SMBIOS_PROTOCOL.Add() function to mean "assign an unused handle number automatically." 30 /// This number is not used for any other purpose by the SMBIOS specification. 31 /// 32 #define SMBIOS_HANDLE_PI_RESERVED 0xFFFE 33 34 /// 35 /// Reference SMBIOS 2.6, chapter 3.1.3. 36 /// Each text string is limited to 64 significant characters due to system MIF limitations. 37 /// Reference SMBIOS 2.7, chapter 6.1.3. 38 /// It will have no limit on the length of each individual text string. 39 /// 40 #define SMBIOS_STRING_MAX_LENGTH 64 41 42 // 43 // The length of the entire structure table (including all strings) must be reported 44 // in the Structure Table Length field of the SMBIOS Structure Table Entry Point, 45 // which is a WORD field limited to 65,535 bytes. 46 // 47 #define SMBIOS_TABLE_MAX_LENGTH 0xFFFF 48 49 // 50 // For SMBIOS 3.0, Structure table maximum size in Entry Point structure is DWORD field limited to 0xFFFFFFFF bytes. 51 // 52 #define SMBIOS_3_0_TABLE_MAX_LENGTH 0xFFFFFFFF 53 54 // 55 // SMBIOS type macros which is according to SMBIOS 2.7 specification. 56 // 57 #define SMBIOS_TYPE_BIOS_INFORMATION 0 58 #define SMBIOS_TYPE_SYSTEM_INFORMATION 1 59 #define SMBIOS_TYPE_BASEBOARD_INFORMATION 2 60 #define SMBIOS_TYPE_SYSTEM_ENCLOSURE 3 61 #define SMBIOS_TYPE_PROCESSOR_INFORMATION 4 62 #define SMBIOS_TYPE_MEMORY_CONTROLLER_INFORMATION 5 63 #define SMBIOS_TYPE_MEMORY_MODULE_INFORMATON 6 64 #define SMBIOS_TYPE_CACHE_INFORMATION 7 65 #define SMBIOS_TYPE_PORT_CONNECTOR_INFORMATION 8 66 #define SMBIOS_TYPE_SYSTEM_SLOTS 9 67 #define SMBIOS_TYPE_ONBOARD_DEVICE_INFORMATION 10 68 #define SMBIOS_TYPE_OEM_STRINGS 11 69 #define SMBIOS_TYPE_SYSTEM_CONFIGURATION_OPTIONS 12 70 #define SMBIOS_TYPE_BIOS_LANGUAGE_INFORMATION 13 71 #define SMBIOS_TYPE_GROUP_ASSOCIATIONS 14 72 #define SMBIOS_TYPE_SYSTEM_EVENT_LOG 15 73 #define SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY 16 74 #define SMBIOS_TYPE_MEMORY_DEVICE 17 75 #define SMBIOS_TYPE_32BIT_MEMORY_ERROR_INFORMATION 18 76 #define SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS 19 77 #define SMBIOS_TYPE_MEMORY_DEVICE_MAPPED_ADDRESS 20 78 #define SMBIOS_TYPE_BUILT_IN_POINTING_DEVICE 21 79 #define SMBIOS_TYPE_PORTABLE_BATTERY 22 80 #define SMBIOS_TYPE_SYSTEM_RESET 23 81 #define SMBIOS_TYPE_HARDWARE_SECURITY 24 82 #define SMBIOS_TYPE_SYSTEM_POWER_CONTROLS 25 83 #define SMBIOS_TYPE_VOLTAGE_PROBE 26 84 #define SMBIOS_TYPE_COOLING_DEVICE 27 85 #define SMBIOS_TYPE_TEMPERATURE_PROBE 28 86 #define SMBIOS_TYPE_ELECTRICAL_CURRENT_PROBE 29 87 #define SMBIOS_TYPE_OUT_OF_BAND_REMOTE_ACCESS 30 88 #define SMBIOS_TYPE_BOOT_INTEGRITY_SERVICE 31 89 #define SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION 32 90 #define SMBIOS_TYPE_64BIT_MEMORY_ERROR_INFORMATION 33 91 #define SMBIOS_TYPE_MANAGEMENT_DEVICE 34 92 #define SMBIOS_TYPE_MANAGEMENT_DEVICE_COMPONENT 35 93 #define SMBIOS_TYPE_MANAGEMENT_DEVICE_THRESHOLD_DATA 36 94 #define SMBIOS_TYPE_MEMORY_CHANNEL 37 95 #define SMBIOS_TYPE_IPMI_DEVICE_INFORMATION 38 96 #define SMBIOS_TYPE_SYSTEM_POWER_SUPPLY 39 97 #define SMBIOS_TYPE_ADDITIONAL_INFORMATION 40 98 #define SMBIOS_TYPE_ONBOARD_DEVICES_EXTENDED_INFORMATION 41 99 #define SMBIOS_TYPE_MANAGEMENT_CONTROLLER_HOST_INTERFACE 42 100 101 /// 102 /// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43. 103 /// Upper-level software that interprets the SMBIOS structure-table should bypass an 104 /// Inactive structure just like a structure type that the software does not recognize. 105 /// 106 #define SMBIOS_TYPE_INACTIVE 0x007E 107 108 /// 109 /// End-of-table type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.44. 110 /// The end-of-table indicator is used in the last physical structure in a table 111 /// 112 #define SMBIOS_TYPE_END_OF_TABLE 0x007F 113 114 #define SMBIOS_OEM_BEGIN 128 115 #define SMBIOS_OEM_END 255 116 117 /// 118 /// Types 0 through 127 (7Fh) are reserved for and defined by this 119 /// specification. Types 128 through 256 (80h to FFh) are available for system- and OEM-specific information. 120 /// 121 typedef UINT8 SMBIOS_TYPE; 122 123 /// 124 /// Specifies the structure's handle, a unique 16-bit number in the range 0 to 0FFFEh (for version 125 /// 2.0) or 0 to 0FEFFh (for version 2.1 and later). The handle can be used with the Get SMBIOS 126 /// Structure function to retrieve a specific structure; the handle numbers are not required to be 127 /// contiguous. For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for 128 /// use by this specification. 129 /// If the system configuration changes, a previously assigned handle might no longer exist. 130 /// However once a handle has been assigned by the BIOS, the BIOS cannot re-assign that handle 131 /// number to another structure. 132 /// 133 typedef UINT16 SMBIOS_HANDLE; 134 135 /// 136 /// Smbios Table Entry Point Structure. 137 /// 138 #pragma pack(1) 139 typedef struct { 140 UINT8 AnchorString[4]; 141 UINT8 EntryPointStructureChecksum; 142 UINT8 EntryPointLength; 143 UINT8 MajorVersion; 144 UINT8 MinorVersion; 145 UINT16 MaxStructureSize; 146 UINT8 EntryPointRevision; 147 UINT8 FormattedArea[5]; 148 UINT8 IntermediateAnchorString[5]; 149 UINT8 IntermediateChecksum; 150 UINT16 TableLength; 151 UINT32 TableAddress; 152 UINT16 NumberOfSmbiosStructures; 153 UINT8 SmbiosBcdRevision; 154 } SMBIOS_TABLE_ENTRY_POINT; 155 156 typedef struct { 157 UINT8 AnchorString[5]; 158 UINT8 EntryPointStructureChecksum; 159 UINT8 EntryPointLength; 160 UINT8 MajorVersion; 161 UINT8 MinorVersion; 162 UINT8 DocRev; 163 UINT8 EntryPointRevision; 164 UINT8 Reserved; 165 UINT32 TableMaximumSize; 166 UINT64 TableAddress; 167 } SMBIOS_TABLE_3_0_ENTRY_POINT; 168 169 /// 170 /// The Smbios structure header. 171 /// 172 typedef struct { 173 SMBIOS_TYPE Type; 174 UINT8 Length; 175 SMBIOS_HANDLE Handle; 176 } SMBIOS_STRUCTURE; 177 178 /// 179 /// Text strings associated with a given SMBIOS structure are returned in the dmiStrucBuffer, appended directly after 180 /// the formatted portion of the structure. This method of returning string information eliminates the need for 181 /// application software to deal with pointers embedded in the SMBIOS structure. Each string is terminated with a null 182 /// (00h) BYTE and the set of strings is terminated with an additional null (00h) BYTE. When the formatted portion of 183 /// a SMBIOS structure references a string, it does so by specifying a non-zero string number within the structure's 184 /// string-set. For example, if a string field contains 02h, it references the second string following the formatted portion 185 /// of the SMBIOS structure. If a string field references no string, a null (0) is placed in that string field. If the 186 /// formatted portion of the structure contains string-reference fields and all the string fields are set to 0 (no string 187 /// references), the formatted section of the structure is followed by two null (00h) BYTES. 188 /// 189 typedef UINT8 SMBIOS_TABLE_STRING; 190 191 /// 192 /// BIOS Characteristics 193 /// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc. 194 /// 195 typedef struct { 196 UINT32 Reserved :2; ///< Bits 0-1. 197 UINT32 Unknown :1; 198 UINT32 BiosCharacteristicsNotSupported :1; 199 UINT32 IsaIsSupported :1; 200 UINT32 McaIsSupported :1; 201 UINT32 EisaIsSupported :1; 202 UINT32 PciIsSupported :1; 203 UINT32 PcmciaIsSupported :1; 204 UINT32 PlugAndPlayIsSupported :1; 205 UINT32 ApmIsSupported :1; 206 UINT32 BiosIsUpgradable :1; 207 UINT32 BiosShadowingAllowed :1; 208 UINT32 VlVesaIsSupported :1; 209 UINT32 EscdSupportIsAvailable :1; 210 UINT32 BootFromCdIsSupported :1; 211 UINT32 SelectableBootIsSupported :1; 212 UINT32 RomBiosIsSocketed :1; 213 UINT32 BootFromPcmciaIsSupported :1; 214 UINT32 EDDSpecificationIsSupported :1; 215 UINT32 JapaneseNecFloppyIsSupported :1; 216 UINT32 JapaneseToshibaFloppyIsSupported :1; 217 UINT32 Floppy525_360IsSupported :1; 218 UINT32 Floppy525_12IsSupported :1; 219 UINT32 Floppy35_720IsSupported :1; 220 UINT32 Floppy35_288IsSupported :1; 221 UINT32 PrintScreenIsSupported :1; 222 UINT32 Keyboard8042IsSupported :1; 223 UINT32 SerialIsSupported :1; 224 UINT32 PrinterIsSupported :1; 225 UINT32 CgaMonoIsSupported :1; 226 UINT32 NecPc98 :1; 227 UINT32 ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor 228 ///< and bits 48-63 reserved for System Vendor. 229 } MISC_BIOS_CHARACTERISTICS; 230 231 /// 232 /// BIOS Characteristics Extension Byte 1. 233 /// This information, available for SMBIOS version 2.1 and later, appears at offset 12h 234 /// within the BIOS Information structure. 235 /// 236 typedef struct { 237 UINT8 AcpiIsSupported :1; 238 UINT8 UsbLegacyIsSupported :1; 239 UINT8 AgpIsSupported :1; 240 UINT8 I2OBootIsSupported :1; 241 UINT8 Ls120BootIsSupported :1; 242 UINT8 AtapiZipDriveBootIsSupported :1; 243 UINT8 Boot1394IsSupported :1; 244 UINT8 SmartBatteryIsSupported :1; 245 } MBCE_BIOS_RESERVED; 246 247 /// 248 /// BIOS Characteristics Extension Byte 2. 249 /// This information, available for SMBIOS version 2.3 and later, appears at offset 13h 250 /// within the BIOS Information structure. 251 /// 252 typedef struct { 253 UINT8 BiosBootSpecIsSupported :1; 254 UINT8 FunctionKeyNetworkBootIsSupported :1; 255 UINT8 TargetContentDistributionEnabled :1; 256 UINT8 UefiSpecificationSupported :1; 257 UINT8 VirtualMachineSupported :1; 258 UINT8 ExtensionByte2Reserved :3; 259 } MBCE_SYSTEM_RESERVED; 260 261 /// 262 /// BIOS Characteristics Extension Bytes. 263 /// 264 typedef struct { 265 MBCE_BIOS_RESERVED BiosReserved; 266 MBCE_SYSTEM_RESERVED SystemReserved; 267 } MISC_BIOS_CHARACTERISTICS_EXTENSION; 268 269 /// 270 /// BIOS Information (Type 0). 271 /// 272 typedef struct { 273 SMBIOS_STRUCTURE Hdr; 274 SMBIOS_TABLE_STRING Vendor; 275 SMBIOS_TABLE_STRING BiosVersion; 276 UINT16 BiosSegment; 277 SMBIOS_TABLE_STRING BiosReleaseDate; 278 UINT8 BiosSize; 279 MISC_BIOS_CHARACTERISTICS BiosCharacteristics; 280 UINT8 BIOSCharacteristicsExtensionBytes[2]; 281 UINT8 SystemBiosMajorRelease; 282 UINT8 SystemBiosMinorRelease; 283 UINT8 EmbeddedControllerFirmwareMajorRelease; 284 UINT8 EmbeddedControllerFirmwareMinorRelease; 285 } SMBIOS_TABLE_TYPE0; 286 287 /// 288 /// System Wake-up Type. 289 /// 290 typedef enum { 291 SystemWakeupTypeReserved = 0x00, 292 SystemWakeupTypeOther = 0x01, 293 SystemWakeupTypeUnknown = 0x02, 294 SystemWakeupTypeApmTimer = 0x03, 295 SystemWakeupTypeModemRing = 0x04, 296 SystemWakeupTypeLanRemote = 0x05, 297 SystemWakeupTypePowerSwitch = 0x06, 298 SystemWakeupTypePciPme = 0x07, 299 SystemWakeupTypeAcPowerRestored = 0x08 300 } MISC_SYSTEM_WAKEUP_TYPE; 301 302 /// 303 /// System Information (Type 1). 304 /// 305 /// The information in this structure defines attributes of the overall system and is 306 /// intended to be associated with the Component ID group of the system's MIF. 307 /// An SMBIOS implementation is associated with a single system instance and contains 308 /// one and only one System Information (Type 1) structure. 309 /// 310 typedef struct { 311 SMBIOS_STRUCTURE Hdr; 312 SMBIOS_TABLE_STRING Manufacturer; 313 SMBIOS_TABLE_STRING ProductName; 314 SMBIOS_TABLE_STRING Version; 315 SMBIOS_TABLE_STRING SerialNumber; 316 GUID Uuid; 317 UINT8 WakeUpType; ///< The enumeration value from MISC_SYSTEM_WAKEUP_TYPE. 318 SMBIOS_TABLE_STRING SKUNumber; 319 SMBIOS_TABLE_STRING Family; 320 } SMBIOS_TABLE_TYPE1; 321 322 /// 323 /// Base Board - Feature Flags. 324 /// 325 typedef struct { 326 UINT8 Motherboard :1; 327 UINT8 RequiresDaughterCard :1; 328 UINT8 Removable :1; 329 UINT8 Replaceable :1; 330 UINT8 HotSwappable :1; 331 UINT8 Reserved :3; 332 } BASE_BOARD_FEATURE_FLAGS; 333 334 /// 335 /// Base Board - Board Type. 336 /// 337 typedef enum { 338 BaseBoardTypeUnknown = 0x1, 339 BaseBoardTypeOther = 0x2, 340 BaseBoardTypeServerBlade = 0x3, 341 BaseBoardTypeConnectivitySwitch = 0x4, 342 BaseBoardTypeSystemManagementModule = 0x5, 343 BaseBoardTypeProcessorModule = 0x6, 344 BaseBoardTypeIOModule = 0x7, 345 BaseBoardTypeMemoryModule = 0x8, 346 BaseBoardTypeDaughterBoard = 0x9, 347 BaseBoardTypeMotherBoard = 0xA, 348 BaseBoardTypeProcessorMemoryModule = 0xB, 349 BaseBoardTypeProcessorIOModule = 0xC, 350 BaseBoardTypeInterconnectBoard = 0xD 351 } BASE_BOARD_TYPE; 352 353 /// 354 /// Base Board (or Module) Information (Type 2). 355 /// 356 /// The information in this structure defines attributes of a system baseboard - 357 /// for example a motherboard, planar, or server blade or other standard system module. 358 /// 359 typedef struct { 360 SMBIOS_STRUCTURE Hdr; 361 SMBIOS_TABLE_STRING Manufacturer; 362 SMBIOS_TABLE_STRING ProductName; 363 SMBIOS_TABLE_STRING Version; 364 SMBIOS_TABLE_STRING SerialNumber; 365 SMBIOS_TABLE_STRING AssetTag; 366 BASE_BOARD_FEATURE_FLAGS FeatureFlag; 367 SMBIOS_TABLE_STRING LocationInChassis; 368 UINT16 ChassisHandle; 369 UINT8 BoardType; ///< The enumeration value from BASE_BOARD_TYPE. 370 UINT8 NumberOfContainedObjectHandles; 371 UINT16 ContainedObjectHandles[1]; 372 } SMBIOS_TABLE_TYPE2; 373 374 /// 375 /// System Enclosure or Chassis Types 376 /// 377 typedef enum { 378 MiscChassisTypeOther = 0x01, 379 MiscChassisTypeUnknown = 0x02, 380 MiscChassisTypeDeskTop = 0x03, 381 MiscChassisTypeLowProfileDesktop = 0x04, 382 MiscChassisTypePizzaBox = 0x05, 383 MiscChassisTypeMiniTower = 0x06, 384 MiscChassisTypeTower = 0x07, 385 MiscChassisTypePortable = 0x08, 386 MiscChassisTypeLapTop = 0x09, 387 MiscChassisTypeNotebook = 0x0A, 388 MiscChassisTypeHandHeld = 0x0B, 389 MiscChassisTypeDockingStation = 0x0C, 390 MiscChassisTypeAllInOne = 0x0D, 391 MiscChassisTypeSubNotebook = 0x0E, 392 MiscChassisTypeSpaceSaving = 0x0F, 393 MiscChassisTypeLunchBox = 0x10, 394 MiscChassisTypeMainServerChassis = 0x11, 395 MiscChassisTypeExpansionChassis = 0x12, 396 MiscChassisTypeSubChassis = 0x13, 397 MiscChassisTypeBusExpansionChassis = 0x14, 398 MiscChassisTypePeripheralChassis = 0x15, 399 MiscChassisTypeRaidChassis = 0x16, 400 MiscChassisTypeRackMountChassis = 0x17, 401 MiscChassisTypeSealedCasePc = 0x18, 402 MiscChassisMultiSystemChassis = 0x19, 403 MiscChassisCompactPCI = 0x1A, 404 MiscChassisAdvancedTCA = 0x1B, 405 MiscChassisBlade = 0x1C, 406 MiscChassisBladeEnclosure = 0x1D, 407 MiscChassisTablet = 0x1E, 408 MiscChassisConvertible = 0x1F, 409 MiscChassisDetachable = 0x20 410 } MISC_CHASSIS_TYPE; 411 412 /// 413 /// System Enclosure or Chassis States . 414 /// 415 typedef enum { 416 ChassisStateOther = 0x01, 417 ChassisStateUnknown = 0x02, 418 ChassisStateSafe = 0x03, 419 ChassisStateWarning = 0x04, 420 ChassisStateCritical = 0x05, 421 ChassisStateNonRecoverable = 0x06 422 } MISC_CHASSIS_STATE; 423 424 /// 425 /// System Enclosure or Chassis Security Status. 426 /// 427 typedef enum { 428 ChassisSecurityStatusOther = 0x01, 429 ChassisSecurityStatusUnknown = 0x02, 430 ChassisSecurityStatusNone = 0x03, 431 ChassisSecurityStatusExternalInterfaceLockedOut = 0x04, 432 ChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05 433 } MISC_CHASSIS_SECURITY_STATE; 434 435 /// 436 /// Contained Element record 437 /// 438 typedef struct { 439 UINT8 ContainedElementType; 440 UINT8 ContainedElementMinimum; 441 UINT8 ContainedElementMaximum; 442 } CONTAINED_ELEMENT; 443 444 445 /// 446 /// System Enclosure or Chassis (Type 3). 447 /// 448 /// The information in this structure defines attributes of the system's mechanical enclosure(s). 449 /// For example, if a system included a separate enclosure for its peripheral devices, 450 /// two structures would be returned: one for the main, system enclosure and the second for 451 /// the peripheral device enclosure. The additions to this structure in v2.1 of this specification 452 /// support the population of the CIM_Chassis class. 453 /// 454 typedef struct { 455 SMBIOS_STRUCTURE Hdr; 456 SMBIOS_TABLE_STRING Manufacturer; 457 UINT8 Type; 458 SMBIOS_TABLE_STRING Version; 459 SMBIOS_TABLE_STRING SerialNumber; 460 SMBIOS_TABLE_STRING AssetTag; 461 UINT8 BootupState; ///< The enumeration value from MISC_CHASSIS_STATE. 462 UINT8 PowerSupplyState; ///< The enumeration value from MISC_CHASSIS_STATE. 463 UINT8 ThermalState; ///< The enumeration value from MISC_CHASSIS_STATE. 464 UINT8 SecurityStatus; ///< The enumeration value from MISC_CHASSIS_SECURITY_STATE. 465 UINT8 OemDefined[4]; 466 UINT8 Height; 467 UINT8 NumberofPowerCords; 468 UINT8 ContainedElementCount; 469 UINT8 ContainedElementRecordLength; 470 CONTAINED_ELEMENT ContainedElements[1]; 471 } SMBIOS_TABLE_TYPE3; 472 473 /// 474 /// Processor Information - Processor Type. 475 /// 476 typedef enum { 477 ProcessorOther = 0x01, 478 ProcessorUnknown = 0x02, 479 CentralProcessor = 0x03, 480 MathProcessor = 0x04, 481 DspProcessor = 0x05, 482 VideoProcessor = 0x06 483 } PROCESSOR_TYPE_DATA; 484 485 /// 486 /// Processor Information - Processor Family. 487 /// 488 typedef enum { 489 ProcessorFamilyOther = 0x01, 490 ProcessorFamilyUnknown = 0x02, 491 ProcessorFamily8086 = 0x03, 492 ProcessorFamily80286 = 0x04, 493 ProcessorFamilyIntel386 = 0x05, 494 ProcessorFamilyIntel486 = 0x06, 495 ProcessorFamily8087 = 0x07, 496 ProcessorFamily80287 = 0x08, 497 ProcessorFamily80387 = 0x09, 498 ProcessorFamily80487 = 0x0A, 499 ProcessorFamilyPentium = 0x0B, 500 ProcessorFamilyPentiumPro = 0x0C, 501 ProcessorFamilyPentiumII = 0x0D, 502 ProcessorFamilyPentiumMMX = 0x0E, 503 ProcessorFamilyCeleron = 0x0F, 504 ProcessorFamilyPentiumIIXeon = 0x10, 505 ProcessorFamilyPentiumIII = 0x11, 506 ProcessorFamilyM1 = 0x12, 507 ProcessorFamilyM2 = 0x13, 508 ProcessorFamilyIntelCeleronM = 0x14, 509 ProcessorFamilyIntelPentium4Ht = 0x15, 510 ProcessorFamilyAmdDuron = 0x18, 511 ProcessorFamilyK5 = 0x19, 512 ProcessorFamilyK6 = 0x1A, 513 ProcessorFamilyK6_2 = 0x1B, 514 ProcessorFamilyK6_3 = 0x1C, 515 ProcessorFamilyAmdAthlon = 0x1D, 516 ProcessorFamilyAmd29000 = 0x1E, 517 ProcessorFamilyK6_2Plus = 0x1F, 518 ProcessorFamilyPowerPC = 0x20, 519 ProcessorFamilyPowerPC601 = 0x21, 520 ProcessorFamilyPowerPC603 = 0x22, 521 ProcessorFamilyPowerPC603Plus = 0x23, 522 ProcessorFamilyPowerPC604 = 0x24, 523 ProcessorFamilyPowerPC620 = 0x25, 524 ProcessorFamilyPowerPCx704 = 0x26, 525 ProcessorFamilyPowerPC750 = 0x27, 526 ProcessorFamilyIntelCoreDuo = 0x28, 527 ProcessorFamilyIntelCoreDuoMobile = 0x29, 528 ProcessorFamilyIntelCoreSoloMobile = 0x2A, 529 ProcessorFamilyIntelAtom = 0x2B, 530 ProcessorFamilyIntelCoreM = 0x2C, 531 ProcessorFamilyAlpha = 0x30, 532 ProcessorFamilyAlpha21064 = 0x31, 533 ProcessorFamilyAlpha21066 = 0x32, 534 ProcessorFamilyAlpha21164 = 0x33, 535 ProcessorFamilyAlpha21164PC = 0x34, 536 ProcessorFamilyAlpha21164a = 0x35, 537 ProcessorFamilyAlpha21264 = 0x36, 538 ProcessorFamilyAlpha21364 = 0x37, 539 ProcessorFamilyAmdTurionIIUltraDualCoreMobileM = 0x38, 540 ProcessorFamilyAmdTurionIIDualCoreMobileM = 0x39, 541 ProcessorFamilyAmdAthlonIIDualCoreM = 0x3A, 542 ProcessorFamilyAmdOpteron6100Series = 0x3B, 543 ProcessorFamilyAmdOpteron4100Series = 0x3C, 544 ProcessorFamilyAmdOpteron6200Series = 0x3D, 545 ProcessorFamilyAmdOpteron4200Series = 0x3E, 546 ProcessorFamilyAmdFxSeries = 0x3F, 547 ProcessorFamilyMips = 0x40, 548 ProcessorFamilyMIPSR4000 = 0x41, 549 ProcessorFamilyMIPSR4200 = 0x42, 550 ProcessorFamilyMIPSR4400 = 0x43, 551 ProcessorFamilyMIPSR4600 = 0x44, 552 ProcessorFamilyMIPSR10000 = 0x45, 553 ProcessorFamilyAmdCSeries = 0x46, 554 ProcessorFamilyAmdESeries = 0x47, 555 ProcessorFamilyAmdASeries = 0x48, ///< SMBIOS spec 2.8.0 updated the name 556 ProcessorFamilyAmdGSeries = 0x49, 557 ProcessorFamilyAmdZSeries = 0x4A, 558 ProcessorFamilyAmdRSeries = 0x4B, 559 ProcessorFamilyAmdOpteron4300 = 0x4C, 560 ProcessorFamilyAmdOpteron6300 = 0x4D, 561 ProcessorFamilyAmdOpteron3300 = 0x4E, 562 ProcessorFamilyAmdFireProSeries = 0x4F, 563 ProcessorFamilySparc = 0x50, 564 ProcessorFamilySuperSparc = 0x51, 565 ProcessorFamilymicroSparcII = 0x52, 566 ProcessorFamilymicroSparcIIep = 0x53, 567 ProcessorFamilyUltraSparc = 0x54, 568 ProcessorFamilyUltraSparcII = 0x55, 569 ProcessorFamilyUltraSparcIii = 0x56, 570 ProcessorFamilyUltraSparcIII = 0x57, 571 ProcessorFamilyUltraSparcIIIi = 0x58, 572 ProcessorFamily68040 = 0x60, 573 ProcessorFamily68xxx = 0x61, 574 ProcessorFamily68000 = 0x62, 575 ProcessorFamily68010 = 0x63, 576 ProcessorFamily68020 = 0x64, 577 ProcessorFamily68030 = 0x65, 578 ProcessorFamilyAmdAthlonX4QuadCore = 0x66, 579 ProcessorFamilyAmdOpteronX1000Series = 0x67, 580 ProcessorFamilyAmdOpteronX2000Series = 0x68, 581 ProcessorFamilyHobbit = 0x70, 582 ProcessorFamilyCrusoeTM5000 = 0x78, 583 ProcessorFamilyCrusoeTM3000 = 0x79, 584 ProcessorFamilyEfficeonTM8000 = 0x7A, 585 ProcessorFamilyWeitek = 0x80, 586 ProcessorFamilyItanium = 0x82, 587 ProcessorFamilyAmdAthlon64 = 0x83, 588 ProcessorFamilyAmdOpteron = 0x84, 589 ProcessorFamilyAmdSempron = 0x85, 590 ProcessorFamilyAmdTurion64Mobile = 0x86, 591 ProcessorFamilyDualCoreAmdOpteron = 0x87, 592 ProcessorFamilyAmdAthlon64X2DualCore = 0x88, 593 ProcessorFamilyAmdTurion64X2Mobile = 0x89, 594 ProcessorFamilyQuadCoreAmdOpteron = 0x8A, 595 ProcessorFamilyThirdGenerationAmdOpteron = 0x8B, 596 ProcessorFamilyAmdPhenomFxQuadCore = 0x8C, 597 ProcessorFamilyAmdPhenomX4QuadCore = 0x8D, 598 ProcessorFamilyAmdPhenomX2DualCore = 0x8E, 599 ProcessorFamilyAmdAthlonX2DualCore = 0x8F, 600 ProcessorFamilyPARISC = 0x90, 601 ProcessorFamilyPaRisc8500 = 0x91, 602 ProcessorFamilyPaRisc8000 = 0x92, 603 ProcessorFamilyPaRisc7300LC = 0x93, 604 ProcessorFamilyPaRisc7200 = 0x94, 605 ProcessorFamilyPaRisc7100LC = 0x95, 606 ProcessorFamilyPaRisc7100 = 0x96, 607 ProcessorFamilyV30 = 0xA0, 608 ProcessorFamilyQuadCoreIntelXeon3200Series = 0xA1, 609 ProcessorFamilyDualCoreIntelXeon3000Series = 0xA2, 610 ProcessorFamilyQuadCoreIntelXeon5300Series = 0xA3, 611 ProcessorFamilyDualCoreIntelXeon5100Series = 0xA4, 612 ProcessorFamilyDualCoreIntelXeon5000Series = 0xA5, 613 ProcessorFamilyDualCoreIntelXeonLV = 0xA6, 614 ProcessorFamilyDualCoreIntelXeonULV = 0xA7, 615 ProcessorFamilyDualCoreIntelXeon7100Series = 0xA8, 616 ProcessorFamilyQuadCoreIntelXeon5400Series = 0xA9, 617 ProcessorFamilyQuadCoreIntelXeon = 0xAA, 618 ProcessorFamilyDualCoreIntelXeon5200Series = 0xAB, 619 ProcessorFamilyDualCoreIntelXeon7200Series = 0xAC, 620 ProcessorFamilyQuadCoreIntelXeon7300Series = 0xAD, 621 ProcessorFamilyQuadCoreIntelXeon7400Series = 0xAE, 622 ProcessorFamilyMultiCoreIntelXeon7400Series = 0xAF, 623 ProcessorFamilyPentiumIIIXeon = 0xB0, 624 ProcessorFamilyPentiumIIISpeedStep = 0xB1, 625 ProcessorFamilyPentium4 = 0xB2, 626 ProcessorFamilyIntelXeon = 0xB3, 627 ProcessorFamilyAS400 = 0xB4, 628 ProcessorFamilyIntelXeonMP = 0xB5, 629 ProcessorFamilyAMDAthlonXP = 0xB6, 630 ProcessorFamilyAMDAthlonMP = 0xB7, 631 ProcessorFamilyIntelItanium2 = 0xB8, 632 ProcessorFamilyIntelPentiumM = 0xB9, 633 ProcessorFamilyIntelCeleronD = 0xBA, 634 ProcessorFamilyIntelPentiumD = 0xBB, 635 ProcessorFamilyIntelPentiumEx = 0xBC, 636 ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 updated this value 637 ProcessorFamilyReserved = 0xBE, 638 ProcessorFamilyIntelCore2 = 0xBF, 639 ProcessorFamilyIntelCore2Solo = 0xC0, 640 ProcessorFamilyIntelCore2Extreme = 0xC1, 641 ProcessorFamilyIntelCore2Quad = 0xC2, 642 ProcessorFamilyIntelCore2ExtremeMobile = 0xC3, 643 ProcessorFamilyIntelCore2DuoMobile = 0xC4, 644 ProcessorFamilyIntelCore2SoloMobile = 0xC5, 645 ProcessorFamilyIntelCoreI7 = 0xC6, 646 ProcessorFamilyDualCoreIntelCeleron = 0xC7, 647 ProcessorFamilyIBM390 = 0xC8, 648 ProcessorFamilyG4 = 0xC9, 649 ProcessorFamilyG5 = 0xCA, 650 ProcessorFamilyG6 = 0xCB, 651 ProcessorFamilyzArchitecture = 0xCC, 652 ProcessorFamilyIntelCoreI5 = 0xCD, 653 ProcessorFamilyIntelCoreI3 = 0xCE, 654 ProcessorFamilyViaC7M = 0xD2, 655 ProcessorFamilyViaC7D = 0xD3, 656 ProcessorFamilyViaC7 = 0xD4, 657 ProcessorFamilyViaEden = 0xD5, 658 ProcessorFamilyMultiCoreIntelXeon = 0xD6, 659 ProcessorFamilyDualCoreIntelXeon3Series = 0xD7, 660 ProcessorFamilyQuadCoreIntelXeon3Series = 0xD8, 661 ProcessorFamilyViaNano = 0xD9, 662 ProcessorFamilyDualCoreIntelXeon5Series = 0xDA, 663 ProcessorFamilyQuadCoreIntelXeon5Series = 0xDB, 664 ProcessorFamilyDualCoreIntelXeon7Series = 0xDD, 665 ProcessorFamilyQuadCoreIntelXeon7Series = 0xDE, 666 ProcessorFamilyMultiCoreIntelXeon7Series = 0xDF, 667 ProcessorFamilyMultiCoreIntelXeon3400Series = 0xE0, 668 ProcessorFamilyAmdOpteron3000Series = 0xE4, 669 ProcessorFamilyAmdSempronII = 0xE5, 670 ProcessorFamilyEmbeddedAmdOpteronQuadCore = 0xE6, 671 ProcessorFamilyAmdPhenomTripleCore = 0xE7, 672 ProcessorFamilyAmdTurionUltraDualCoreMobile = 0xE8, 673 ProcessorFamilyAmdTurionDualCoreMobile = 0xE9, 674 ProcessorFamilyAmdAthlonDualCore = 0xEA, 675 ProcessorFamilyAmdSempronSI = 0xEB, 676 ProcessorFamilyAmdPhenomII = 0xEC, 677 ProcessorFamilyAmdAthlonII = 0xED, 678 ProcessorFamilySixCoreAmdOpteron = 0xEE, 679 ProcessorFamilyAmdSempronM = 0xEF, 680 ProcessorFamilyi860 = 0xFA, 681 ProcessorFamilyi960 = 0xFB, 682 ProcessorFamilyIndicatorFamily2 = 0xFE, 683 ProcessorFamilyReserved1 = 0xFF 684 } PROCESSOR_FAMILY_DATA; 685 686 /// 687 /// Processor Information2 - Processor Family2. 688 /// 689 typedef enum { 690 ProcessorFamilySH3 = 0x0104, 691 ProcessorFamilySH4 = 0x0105, 692 ProcessorFamilyARM = 0x0118, 693 ProcessorFamilyStrongARM = 0x0119, 694 ProcessorFamily6x86 = 0x012C, 695 ProcessorFamilyMediaGX = 0x012D, 696 ProcessorFamilyMII = 0x012E, 697 ProcessorFamilyWinChip = 0x0140, 698 ProcessorFamilyDSP = 0x015E, 699 ProcessorFamilyVideoProcessor = 0x01F4 700 } PROCESSOR_FAMILY2_DATA; 701 702 /// 703 /// Processor Information - Voltage. 704 /// 705 typedef struct { 706 UINT8 ProcessorVoltageCapability5V :1; 707 UINT8 ProcessorVoltageCapability3_3V :1; 708 UINT8 ProcessorVoltageCapability2_9V :1; 709 UINT8 ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero. 710 UINT8 ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero. 711 UINT8 ProcessorVoltageIndicateLegacy :1; 712 } PROCESSOR_VOLTAGE; 713 714 /// 715 /// Processor Information - Processor Upgrade. 716 /// 717 typedef enum { 718 ProcessorUpgradeOther = 0x01, 719 ProcessorUpgradeUnknown = 0x02, 720 ProcessorUpgradeDaughterBoard = 0x03, 721 ProcessorUpgradeZIFSocket = 0x04, 722 ProcessorUpgradePiggyBack = 0x05, ///< Replaceable. 723 ProcessorUpgradeNone = 0x06, 724 ProcessorUpgradeLIFSocket = 0x07, 725 ProcessorUpgradeSlot1 = 0x08, 726 ProcessorUpgradeSlot2 = 0x09, 727 ProcessorUpgrade370PinSocket = 0x0A, 728 ProcessorUpgradeSlotA = 0x0B, 729 ProcessorUpgradeSlotM = 0x0C, 730 ProcessorUpgradeSocket423 = 0x0D, 731 ProcessorUpgradeSocketA = 0x0E, ///< Socket 462. 732 ProcessorUpgradeSocket478 = 0x0F, 733 ProcessorUpgradeSocket754 = 0x10, 734 ProcessorUpgradeSocket940 = 0x11, 735 ProcessorUpgradeSocket939 = 0x12, 736 ProcessorUpgradeSocketmPGA604 = 0x13, 737 ProcessorUpgradeSocketLGA771 = 0x14, 738 ProcessorUpgradeSocketLGA775 = 0x15, 739 ProcessorUpgradeSocketS1 = 0x16, 740 ProcessorUpgradeAM2 = 0x17, 741 ProcessorUpgradeF1207 = 0x18, 742 ProcessorSocketLGA1366 = 0x19, 743 ProcessorUpgradeSocketG34 = 0x1A, 744 ProcessorUpgradeSocketAM3 = 0x1B, 745 ProcessorUpgradeSocketC32 = 0x1C, 746 ProcessorUpgradeSocketLGA1156 = 0x1D, 747 ProcessorUpgradeSocketLGA1567 = 0x1E, 748 ProcessorUpgradeSocketPGA988A = 0x1F, 749 ProcessorUpgradeSocketBGA1288 = 0x20, 750 ProcessorUpgradeSocketrPGA988B = 0x21, 751 ProcessorUpgradeSocketBGA1023 = 0x22, 752 ProcessorUpgradeSocketBGA1224 = 0x23, 753 ProcessorUpgradeSocketLGA1155 = 0x24, ///< SMBIOS spec 2.8.0 updated the name 754 ProcessorUpgradeSocketLGA1356 = 0x25, 755 ProcessorUpgradeSocketLGA2011 = 0x26, 756 ProcessorUpgradeSocketFS1 = 0x27, 757 ProcessorUpgradeSocketFS2 = 0x28, 758 ProcessorUpgradeSocketFM1 = 0x29, 759 ProcessorUpgradeSocketFM2 = 0x2A, 760 ProcessorUpgradeSocketLGA2011_3 = 0x2B, 761 ProcessorUpgradeSocketLGA1356_3 = 0x2C, 762 ProcessorUpgradeSocketLGA1150 = 0x2D, 763 ProcessorUpgradeSocketBGA1168 = 0x2E, 764 ProcessorUpgradeSocketBGA1234 = 0x2F, 765 ProcessorUpgradeSocketBGA1364 = 0x30 766 } PROCESSOR_UPGRADE; 767 768 /// 769 /// Processor ID Field Description 770 /// 771 typedef struct { 772 UINT32 ProcessorSteppingId:4; 773 UINT32 ProcessorModel: 4; 774 UINT32 ProcessorFamily: 4; 775 UINT32 ProcessorType: 2; 776 UINT32 ProcessorReserved1: 2; 777 UINT32 ProcessorXModel: 4; 778 UINT32 ProcessorXFamily: 8; 779 UINT32 ProcessorReserved2: 4; 780 } PROCESSOR_SIGNATURE; 781 782 typedef struct { 783 UINT32 ProcessorFpu :1; 784 UINT32 ProcessorVme :1; 785 UINT32 ProcessorDe :1; 786 UINT32 ProcessorPse :1; 787 UINT32 ProcessorTsc :1; 788 UINT32 ProcessorMsr :1; 789 UINT32 ProcessorPae :1; 790 UINT32 ProcessorMce :1; 791 UINT32 ProcessorCx8 :1; 792 UINT32 ProcessorApic :1; 793 UINT32 ProcessorReserved1 :1; 794 UINT32 ProcessorSep :1; 795 UINT32 ProcessorMtrr :1; 796 UINT32 ProcessorPge :1; 797 UINT32 ProcessorMca :1; 798 UINT32 ProcessorCmov :1; 799 UINT32 ProcessorPat :1; 800 UINT32 ProcessorPse36 :1; 801 UINT32 ProcessorPsn :1; 802 UINT32 ProcessorClfsh :1; 803 UINT32 ProcessorReserved2 :1; 804 UINT32 ProcessorDs :1; 805 UINT32 ProcessorAcpi :1; 806 UINT32 ProcessorMmx :1; 807 UINT32 ProcessorFxsr :1; 808 UINT32 ProcessorSse :1; 809 UINT32 ProcessorSse2 :1; 810 UINT32 ProcessorSs :1; 811 UINT32 ProcessorReserved3 :1; 812 UINT32 ProcessorTm :1; 813 UINT32 ProcessorReserved4 :2; 814 } PROCESSOR_FEATURE_FLAGS; 815 816 typedef struct { 817 PROCESSOR_SIGNATURE Signature; 818 PROCESSOR_FEATURE_FLAGS FeatureFlags; 819 } PROCESSOR_ID_DATA; 820 821 /// 822 /// Processor Information (Type 4). 823 /// 824 /// The information in this structure defines the attributes of a single processor; 825 /// a separate structure instance is provided for each system processor socket/slot. 826 /// For example, a system with an IntelDX2 processor would have a single 827 /// structure instance, while a system with an IntelSX2 processor would have a structure 828 /// to describe the main CPU, and a second structure to describe the 80487 co-processor. 829 /// 830 typedef struct { 831 SMBIOS_STRUCTURE Hdr; 832 SMBIOS_TABLE_STRING Socket; 833 UINT8 ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA. 834 UINT8 ProcessorFamily; ///< The enumeration value from PROCESSOR_FAMILY_DATA. 835 SMBIOS_TABLE_STRING ProcessorManufacture; 836 PROCESSOR_ID_DATA ProcessorId; 837 SMBIOS_TABLE_STRING ProcessorVersion; 838 PROCESSOR_VOLTAGE Voltage; 839 UINT16 ExternalClock; 840 UINT16 MaxSpeed; 841 UINT16 CurrentSpeed; 842 UINT8 Status; 843 UINT8 ProcessorUpgrade; ///< The enumeration value from PROCESSOR_UPGRADE. 844 UINT16 L1CacheHandle; 845 UINT16 L2CacheHandle; 846 UINT16 L3CacheHandle; 847 SMBIOS_TABLE_STRING SerialNumber; 848 SMBIOS_TABLE_STRING AssetTag; 849 SMBIOS_TABLE_STRING PartNumber; 850 // 851 // Add for smbios 2.5 852 // 853 UINT8 CoreCount; 854 UINT8 EnabledCoreCount; 855 UINT8 ThreadCount; 856 UINT16 ProcessorCharacteristics; 857 // 858 // Add for smbios 2.6 859 // 860 UINT16 ProcessorFamily2; 861 // 862 // Add for smbios 3.0 863 // 864 UINT16 CoreCount2; 865 UINT16 EnabledCoreCount2; 866 UINT16 ThreadCount2; 867 } SMBIOS_TABLE_TYPE4; 868 869 /// 870 /// Memory Controller Error Detecting Method. 871 /// 872 typedef enum { 873 ErrorDetectingMethodOther = 0x01, 874 ErrorDetectingMethodUnknown = 0x02, 875 ErrorDetectingMethodNone = 0x03, 876 ErrorDetectingMethodParity = 0x04, 877 ErrorDetectingMethod32Ecc = 0x05, 878 ErrorDetectingMethod64Ecc = 0x06, 879 ErrorDetectingMethod128Ecc = 0x07, 880 ErrorDetectingMethodCrc = 0x08 881 } MEMORY_ERROR_DETECT_METHOD; 882 883 /// 884 /// Memory Controller Error Correcting Capability. 885 /// 886 typedef struct { 887 UINT8 Other :1; 888 UINT8 Unknown :1; 889 UINT8 None :1; 890 UINT8 SingleBitErrorCorrect :1; 891 UINT8 DoubleBitErrorCorrect :1; 892 UINT8 ErrorScrubbing :1; 893 UINT8 Reserved :2; 894 } MEMORY_ERROR_CORRECT_CAPABILITY; 895 896 /// 897 /// Memory Controller Information - Interleave Support. 898 /// 899 typedef enum { 900 MemoryInterleaveOther = 0x01, 901 MemoryInterleaveUnknown = 0x02, 902 MemoryInterleaveOneWay = 0x03, 903 MemoryInterleaveTwoWay = 0x04, 904 MemoryInterleaveFourWay = 0x05, 905 MemoryInterleaveEightWay = 0x06, 906 MemoryInterleaveSixteenWay = 0x07 907 } MEMORY_SUPPORT_INTERLEAVE_TYPE; 908 909 /// 910 /// Memory Controller Information - Memory Speeds. 911 /// 912 typedef struct { 913 UINT16 Other :1; 914 UINT16 Unknown :1; 915 UINT16 SeventyNs:1; 916 UINT16 SixtyNs :1; 917 UINT16 FiftyNs :1; 918 UINT16 Reserved :11; 919 } MEMORY_SPEED_TYPE; 920 921 /// 922 /// Memory Controller Information (Type 5, Obsolete). 923 /// 924 /// The information in this structure defines the attributes of the system's memory controller(s) 925 /// and the supported attributes of any memory-modules present in the sockets controlled by 926 /// this controller. 927 /// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete), 928 /// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16) 929 /// and Memory Device (Type 17) structures should be used instead. BIOS providers might 930 /// choose to implement both memory description types to allow existing DMI browsers 931 /// to properly display the system's memory attributes. 932 /// 933 typedef struct { 934 SMBIOS_STRUCTURE Hdr; 935 UINT8 ErrDetectMethod; ///< The enumeration value from MEMORY_ERROR_DETECT_METHOD. 936 MEMORY_ERROR_CORRECT_CAPABILITY ErrCorrectCapability; 937 UINT8 SupportInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE. 938 UINT8 CurrentInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE . 939 UINT8 MaxMemoryModuleSize; 940 MEMORY_SPEED_TYPE SupportSpeed; 941 UINT16 SupportMemoryType; 942 UINT8 MemoryModuleVoltage; 943 UINT8 AssociatedMemorySlotNum; 944 UINT16 MemoryModuleConfigHandles[1]; 945 } SMBIOS_TABLE_TYPE5; 946 947 /// 948 /// Memory Module Information - Memory Types 949 /// 950 typedef struct { 951 UINT16 Other :1; 952 UINT16 Unknown :1; 953 UINT16 Standard :1; 954 UINT16 FastPageMode:1; 955 UINT16 Edo :1; 956 UINT16 Parity :1; 957 UINT16 Ecc :1; 958 UINT16 Simm :1; 959 UINT16 Dimm :1; 960 UINT16 BurstEdo :1; 961 UINT16 Sdram :1; 962 UINT16 Reserved :5; 963 } MEMORY_CURRENT_TYPE; 964 965 /// 966 /// Memory Module Information - Memory Size. 967 /// 968 typedef struct { 969 UINT8 InstalledOrEnabledSize :7; ///< Size (n), where 2**n is the size in MB. 970 UINT8 SingleOrDoubleBank :1; 971 } MEMORY_INSTALLED_ENABLED_SIZE; 972 973 /// 974 /// Memory Module Information (Type 6, Obsolete) 975 /// 976 /// One Memory Module Information structure is included for each memory-module socket 977 /// in the system. The structure describes the speed, type, size, and error status 978 /// of each system memory module. The supported attributes of each module are described 979 /// by the "owning" Memory Controller Information structure. 980 /// Note: This structure, and its companion Memory Controller Information (Type 5, Obsolete), 981 /// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16) 982 /// and Memory Device (Type 17) structures should be used instead. 983 /// 984 typedef struct { 985 SMBIOS_STRUCTURE Hdr; 986 SMBIOS_TABLE_STRING SocketDesignation; 987 UINT8 BankConnections; 988 UINT8 CurrentSpeed; 989 MEMORY_CURRENT_TYPE CurrentMemoryType; 990 MEMORY_INSTALLED_ENABLED_SIZE InstalledSize; 991 MEMORY_INSTALLED_ENABLED_SIZE EnabledSize; 992 UINT8 ErrorStatus; 993 } SMBIOS_TABLE_TYPE6; 994 995 /// 996 /// Cache Information - SRAM Type. 997 /// 998 typedef struct { 999 UINT16 Other :1; 1000 UINT16 Unknown :1; 1001 UINT16 NonBurst :1; 1002 UINT16 Burst :1; 1003 UINT16 PipelineBurst :1; 1004 UINT16 Synchronous :1; 1005 UINT16 Asynchronous :1; 1006 UINT16 Reserved :9; 1007 } CACHE_SRAM_TYPE_DATA; 1008 1009 /// 1010 /// Cache Information - Error Correction Type. 1011 /// 1012 typedef enum { 1013 CacheErrorOther = 0x01, 1014 CacheErrorUnknown = 0x02, 1015 CacheErrorNone = 0x03, 1016 CacheErrorParity = 0x04, 1017 CacheErrorSingleBit = 0x05, ///< ECC 1018 CacheErrorMultiBit = 0x06 ///< ECC 1019 } CACHE_ERROR_TYPE_DATA; 1020 1021 /// 1022 /// Cache Information - System Cache Type. 1023 /// 1024 typedef enum { 1025 CacheTypeOther = 0x01, 1026 CacheTypeUnknown = 0x02, 1027 CacheTypeInstruction = 0x03, 1028 CacheTypeData = 0x04, 1029 CacheTypeUnified = 0x05 1030 } CACHE_TYPE_DATA; 1031 1032 /// 1033 /// Cache Information - Associativity. 1034 /// 1035 typedef enum { 1036 CacheAssociativityOther = 0x01, 1037 CacheAssociativityUnknown = 0x02, 1038 CacheAssociativityDirectMapped = 0x03, 1039 CacheAssociativity2Way = 0x04, 1040 CacheAssociativity4Way = 0x05, 1041 CacheAssociativityFully = 0x06, 1042 CacheAssociativity8Way = 0x07, 1043 CacheAssociativity16Way = 0x08, 1044 CacheAssociativity12Way = 0x09, 1045 CacheAssociativity24Way = 0x0A, 1046 CacheAssociativity32Way = 0x0B, 1047 CacheAssociativity48Way = 0x0C, 1048 CacheAssociativity64Way = 0x0D, 1049 CacheAssociativity20Way = 0x0E 1050 } CACHE_ASSOCIATIVITY_DATA; 1051 1052 /// 1053 /// Cache Information (Type 7). 1054 /// 1055 /// The information in this structure defines the attributes of CPU cache device in the system. 1056 /// One structure is specified for each such device, whether the device is internal to 1057 /// or external to the CPU module. Cache modules can be associated with a processor structure 1058 /// in one or two ways, depending on the SMBIOS version. 1059 /// 1060 typedef struct { 1061 SMBIOS_STRUCTURE Hdr; 1062 SMBIOS_TABLE_STRING SocketDesignation; 1063 UINT16 CacheConfiguration; 1064 UINT16 MaximumCacheSize; 1065 UINT16 InstalledSize; 1066 CACHE_SRAM_TYPE_DATA SupportedSRAMType; 1067 CACHE_SRAM_TYPE_DATA CurrentSRAMType; 1068 UINT8 CacheSpeed; 1069 UINT8 ErrorCorrectionType; ///< The enumeration value from CACHE_ERROR_TYPE_DATA. 1070 UINT8 SystemCacheType; ///< The enumeration value from CACHE_TYPE_DATA. 1071 UINT8 Associativity; ///< The enumeration value from CACHE_ASSOCIATIVITY_DATA. 1072 } SMBIOS_TABLE_TYPE7; 1073 1074 /// 1075 /// Port Connector Information - Connector Types. 1076 /// 1077 typedef enum { 1078 PortConnectorTypeNone = 0x00, 1079 PortConnectorTypeCentronics = 0x01, 1080 PortConnectorTypeMiniCentronics = 0x02, 1081 PortConnectorTypeProprietary = 0x03, 1082 PortConnectorTypeDB25Male = 0x04, 1083 PortConnectorTypeDB25Female = 0x05, 1084 PortConnectorTypeDB15Male = 0x06, 1085 PortConnectorTypeDB15Female = 0x07, 1086 PortConnectorTypeDB9Male = 0x08, 1087 PortConnectorTypeDB9Female = 0x09, 1088 PortConnectorTypeRJ11 = 0x0A, 1089 PortConnectorTypeRJ45 = 0x0B, 1090 PortConnectorType50PinMiniScsi = 0x0C, 1091 PortConnectorTypeMiniDin = 0x0D, 1092 PortConnectorTypeMicroDin = 0x0E, 1093 PortConnectorTypePS2 = 0x0F, 1094 PortConnectorTypeInfrared = 0x10, 1095 PortConnectorTypeHpHil = 0x11, 1096 PortConnectorTypeUsb = 0x12, 1097 PortConnectorTypeSsaScsi = 0x13, 1098 PortConnectorTypeCircularDin8Male = 0x14, 1099 PortConnectorTypeCircularDin8Female = 0x15, 1100 PortConnectorTypeOnboardIde = 0x16, 1101 PortConnectorTypeOnboardFloppy = 0x17, 1102 PortConnectorType9PinDualInline = 0x18, 1103 PortConnectorType25PinDualInline = 0x19, 1104 PortConnectorType50PinDualInline = 0x1A, 1105 PortConnectorType68PinDualInline = 0x1B, 1106 PortConnectorTypeOnboardSoundInput = 0x1C, 1107 PortConnectorTypeMiniCentronicsType14 = 0x1D, 1108 PortConnectorTypeMiniCentronicsType26 = 0x1E, 1109 PortConnectorTypeHeadPhoneMiniJack = 0x1F, 1110 PortConnectorTypeBNC = 0x20, 1111 PortConnectorType1394 = 0x21, 1112 PortConnectorTypeSasSata = 0x22, 1113 PortConnectorTypePC98 = 0xA0, 1114 PortConnectorTypePC98Hireso = 0xA1, 1115 PortConnectorTypePCH98 = 0xA2, 1116 PortConnectorTypePC98Note = 0xA3, 1117 PortConnectorTypePC98Full = 0xA4, 1118 PortConnectorTypeOther = 0xFF 1119 } MISC_PORT_CONNECTOR_TYPE; 1120 1121 /// 1122 /// Port Connector Information - Port Types 1123 /// 1124 typedef enum { 1125 PortTypeNone = 0x00, 1126 PortTypeParallelXtAtCompatible = 0x01, 1127 PortTypeParallelPortPs2 = 0x02, 1128 PortTypeParallelPortEcp = 0x03, 1129 PortTypeParallelPortEpp = 0x04, 1130 PortTypeParallelPortEcpEpp = 0x05, 1131 PortTypeSerialXtAtCompatible = 0x06, 1132 PortTypeSerial16450Compatible = 0x07, 1133 PortTypeSerial16550Compatible = 0x08, 1134 PortTypeSerial16550ACompatible = 0x09, 1135 PortTypeScsi = 0x0A, 1136 PortTypeMidi = 0x0B, 1137 PortTypeJoyStick = 0x0C, 1138 PortTypeKeyboard = 0x0D, 1139 PortTypeMouse = 0x0E, 1140 PortTypeSsaScsi = 0x0F, 1141 PortTypeUsb = 0x10, 1142 PortTypeFireWire = 0x11, 1143 PortTypePcmciaTypeI = 0x12, 1144 PortTypePcmciaTypeII = 0x13, 1145 PortTypePcmciaTypeIII = 0x14, 1146 PortTypeCardBus = 0x15, 1147 PortTypeAccessBusPort = 0x16, 1148 PortTypeScsiII = 0x17, 1149 PortTypeScsiWide = 0x18, 1150 PortTypePC98 = 0x19, 1151 PortTypePC98Hireso = 0x1A, 1152 PortTypePCH98 = 0x1B, 1153 PortTypeVideoPort = 0x1C, 1154 PortTypeAudioPort = 0x1D, 1155 PortTypeModemPort = 0x1E, 1156 PortTypeNetworkPort = 0x1F, 1157 PortTypeSata = 0x20, 1158 PortTypeSas = 0x21, 1159 PortType8251Compatible = 0xA0, 1160 PortType8251FifoCompatible = 0xA1, 1161 PortTypeOther = 0xFF 1162 } MISC_PORT_TYPE; 1163 1164 /// 1165 /// Port Connector Information (Type 8). 1166 /// 1167 /// The information in this structure defines the attributes of a system port connector, 1168 /// e.g. parallel, serial, keyboard, or mouse ports. The port's type and connector information 1169 /// are provided. One structure is present for each port provided by the system. 1170 /// 1171 typedef struct { 1172 SMBIOS_STRUCTURE Hdr; 1173 SMBIOS_TABLE_STRING InternalReferenceDesignator; 1174 UINT8 InternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE. 1175 SMBIOS_TABLE_STRING ExternalReferenceDesignator; 1176 UINT8 ExternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE. 1177 UINT8 PortType; ///< The enumeration value from MISC_PORT_TYPE. 1178 } SMBIOS_TABLE_TYPE8; 1179 1180 /// 1181 /// System Slots - Slot Type 1182 /// 1183 typedef enum { 1184 SlotTypeOther = 0x01, 1185 SlotTypeUnknown = 0x02, 1186 SlotTypeIsa = 0x03, 1187 SlotTypeMca = 0x04, 1188 SlotTypeEisa = 0x05, 1189 SlotTypePci = 0x06, 1190 SlotTypePcmcia = 0x07, 1191 SlotTypeVlVesa = 0x08, 1192 SlotTypeProprietary = 0x09, 1193 SlotTypeProcessorCardSlot = 0x0A, 1194 SlotTypeProprietaryMemoryCardSlot = 0x0B, 1195 SlotTypeIORiserCardSlot = 0x0C, 1196 SlotTypeNuBus = 0x0D, 1197 SlotTypePci66MhzCapable = 0x0E, 1198 SlotTypeAgp = 0x0F, 1199 SlotTypeApg2X = 0x10, 1200 SlotTypeAgp4X = 0x11, 1201 SlotTypePciX = 0x12, 1202 SlotTypeAgp8X = 0x13, 1203 SlotTypeM2Socket1_DP = 0x14, 1204 SlotTypeM2Socket1_SD = 0x15, 1205 SlotTypeM2Socket2 = 0x16, 1206 SlotTypeM2Socket3 = 0x17, 1207 SlotTypeMxmTypeI = 0x18, 1208 SlotTypeMxmTypeII = 0x19, 1209 SlotTypeMxmTypeIIIStandard = 0x1A, 1210 SlotTypeMxmTypeIIIHe = 0x1B, 1211 SlotTypeMxmTypeIV = 0x1C, 1212 SlotTypeMxm30TypeA = 0x1D, 1213 SlotTypeMxm30TypeB = 0x1E, 1214 SlotTypePciExpressGen2Sff_8639 = 0x1F, 1215 SlotTypePciExpressGen3Sff_8639 = 0x20, 1216 SlotTypePC98C20 = 0xA0, 1217 SlotTypePC98C24 = 0xA1, 1218 SlotTypePC98E = 0xA2, 1219 SlotTypePC98LocalBus = 0xA3, 1220 SlotTypePC98Card = 0xA4, 1221 SlotTypePciExpress = 0xA5, 1222 SlotTypePciExpressX1 = 0xA6, 1223 SlotTypePciExpressX2 = 0xA7, 1224 SlotTypePciExpressX4 = 0xA8, 1225 SlotTypePciExpressX8 = 0xA9, 1226 SlotTypePciExpressX16 = 0xAA, 1227 SlotTypePciExpressGen2 = 0xAB, 1228 SlotTypePciExpressGen2X1 = 0xAC, 1229 SlotTypePciExpressGen2X2 = 0xAD, 1230 SlotTypePciExpressGen2X4 = 0xAE, 1231 SlotTypePciExpressGen2X8 = 0xAF, 1232 SlotTypePciExpressGen2X16 = 0xB0, 1233 SlotTypePciExpressGen3 = 0xB1, 1234 SlotTypePciExpressGen3X1 = 0xB2, 1235 SlotTypePciExpressGen3X2 = 0xB3, 1236 SlotTypePciExpressGen3X4 = 0xB4, 1237 SlotTypePciExpressGen3X8 = 0xB5, 1238 SlotTypePciExpressGen3X16 = 0xB6 1239 } MISC_SLOT_TYPE; 1240 1241 /// 1242 /// System Slots - Slot Data Bus Width. 1243 /// 1244 typedef enum { 1245 SlotDataBusWidthOther = 0x01, 1246 SlotDataBusWidthUnknown = 0x02, 1247 SlotDataBusWidth8Bit = 0x03, 1248 SlotDataBusWidth16Bit = 0x04, 1249 SlotDataBusWidth32Bit = 0x05, 1250 SlotDataBusWidth64Bit = 0x06, 1251 SlotDataBusWidth128Bit = 0x07, 1252 SlotDataBusWidth1X = 0x08, ///< Or X1 1253 SlotDataBusWidth2X = 0x09, ///< Or X2 1254 SlotDataBusWidth4X = 0x0A, ///< Or X4 1255 SlotDataBusWidth8X = 0x0B, ///< Or X8 1256 SlotDataBusWidth12X = 0x0C, ///< Or X12 1257 SlotDataBusWidth16X = 0x0D, ///< Or X16 1258 SlotDataBusWidth32X = 0x0E ///< Or X32 1259 } MISC_SLOT_DATA_BUS_WIDTH; 1260 1261 /// 1262 /// System Slots - Current Usage. 1263 /// 1264 typedef enum { 1265 SlotUsageOther = 0x01, 1266 SlotUsageUnknown = 0x02, 1267 SlotUsageAvailable = 0x03, 1268 SlotUsageInUse = 0x04 1269 } MISC_SLOT_USAGE; 1270 1271 /// 1272 /// System Slots - Slot Length. 1273 /// 1274 typedef enum { 1275 SlotLengthOther = 0x01, 1276 SlotLengthUnknown = 0x02, 1277 SlotLengthShort = 0x03, 1278 SlotLengthLong = 0x04 1279 } MISC_SLOT_LENGTH; 1280 1281 /// 1282 /// System Slots - Slot Characteristics 1. 1283 /// 1284 typedef struct { 1285 UINT8 CharacteristicsUnknown :1; 1286 UINT8 Provides50Volts :1; 1287 UINT8 Provides33Volts :1; 1288 UINT8 SharedSlot :1; 1289 UINT8 PcCard16Supported :1; 1290 UINT8 CardBusSupported :1; 1291 UINT8 ZoomVideoSupported :1; 1292 UINT8 ModemRingResumeSupported:1; 1293 } MISC_SLOT_CHARACTERISTICS1; 1294 /// 1295 /// System Slots - Slot Characteristics 2. 1296 /// 1297 typedef struct { 1298 UINT8 PmeSignalSupported :1; 1299 UINT8 HotPlugDevicesSupported :1; 1300 UINT8 SmbusSignalSupported :1; 1301 UINT8 Reserved :5; ///< Set to 0. 1302 } MISC_SLOT_CHARACTERISTICS2; 1303 1304 /// 1305 /// System Slots (Type 9) 1306 /// 1307 /// The information in this structure defines the attributes of a system slot. 1308 /// One structure is provided for each slot in the system. 1309 /// 1310 /// 1311 typedef struct { 1312 SMBIOS_STRUCTURE Hdr; 1313 SMBIOS_TABLE_STRING SlotDesignation; 1314 UINT8 SlotType; ///< The enumeration value from MISC_SLOT_TYPE. 1315 UINT8 SlotDataBusWidth; ///< The enumeration value from MISC_SLOT_DATA_BUS_WIDTH. 1316 UINT8 CurrentUsage; ///< The enumeration value from MISC_SLOT_USAGE. 1317 UINT8 SlotLength; ///< The enumeration value from MISC_SLOT_LENGTH. 1318 UINT16 SlotID; 1319 MISC_SLOT_CHARACTERISTICS1 SlotCharacteristics1; 1320 MISC_SLOT_CHARACTERISTICS2 SlotCharacteristics2; 1321 // 1322 // Add for smbios 2.6 1323 // 1324 UINT16 SegmentGroupNum; 1325 UINT8 BusNum; 1326 UINT8 DevFuncNum; 1327 } SMBIOS_TABLE_TYPE9; 1328 1329 /// 1330 /// On Board Devices Information - Device Types. 1331 /// 1332 typedef enum { 1333 OnBoardDeviceTypeOther = 0x01, 1334 OnBoardDeviceTypeUnknown = 0x02, 1335 OnBoardDeviceTypeVideo = 0x03, 1336 OnBoardDeviceTypeScsiController = 0x04, 1337 OnBoardDeviceTypeEthernet = 0x05, 1338 OnBoardDeviceTypeTokenRing = 0x06, 1339 OnBoardDeviceTypeSound = 0x07, 1340 OnBoardDeviceTypePATAController = 0x08, 1341 OnBoardDeviceTypeSATAController = 0x09, 1342 OnBoardDeviceTypeSASController = 0x0A 1343 } MISC_ONBOARD_DEVICE_TYPE; 1344 1345 /// 1346 /// Device Item Entry 1347 /// 1348 typedef struct { 1349 UINT8 DeviceType; ///< Bit [6:0] - enumeration type of device from MISC_ONBOARD_DEVICE_TYPE. 1350 ///< Bit 7 - 1 : device enabled, 0 : device disabled. 1351 SMBIOS_TABLE_STRING DescriptionString; 1352 } DEVICE_STRUCT; 1353 1354 /// 1355 /// On Board Devices Information (Type 10, obsolete). 1356 /// 1357 /// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended 1358 /// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both 1359 /// types to allow existing SMBIOS browsers to properly display the system's onboard devices information. 1360 /// The information in this structure defines the attributes of devices that are onboard (soldered onto) 1361 /// a system element, usually the baseboard. In general, an entry in this table implies that the BIOS 1362 /// has some level of control over the enabling of the associated device for use by the system. 1363 /// 1364 typedef struct { 1365 SMBIOS_STRUCTURE Hdr; 1366 DEVICE_STRUCT Device[1]; 1367 } SMBIOS_TABLE_TYPE10; 1368 1369 /// 1370 /// OEM Strings (Type 11). 1371 /// This structure contains free form strings defined by the OEM. Examples of this are: 1372 /// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc. 1373 /// 1374 typedef struct { 1375 SMBIOS_STRUCTURE Hdr; 1376 UINT8 StringCount; 1377 } SMBIOS_TABLE_TYPE11; 1378 1379 /// 1380 /// System Configuration Options (Type 12). 1381 /// 1382 /// This structure contains information required to configure the base board's Jumpers and Switches. 1383 /// 1384 typedef struct { 1385 SMBIOS_STRUCTURE Hdr; 1386 UINT8 StringCount; 1387 } SMBIOS_TABLE_TYPE12; 1388 1389 1390 /// 1391 /// BIOS Language Information (Type 13). 1392 /// 1393 /// The information in this structure defines the installable language attributes of the BIOS. 1394 /// 1395 typedef struct { 1396 SMBIOS_STRUCTURE Hdr; 1397 UINT8 InstallableLanguages; 1398 UINT8 Flags; 1399 UINT8 Reserved[15]; 1400 SMBIOS_TABLE_STRING CurrentLanguages; 1401 } SMBIOS_TABLE_TYPE13; 1402 1403 /// 1404 /// Group Item Entry 1405 /// 1406 typedef struct { 1407 UINT8 ItemType; 1408 UINT16 ItemHandle; 1409 } GROUP_STRUCT; 1410 1411 /// 1412 /// Group Associations (Type 14). 1413 /// 1414 /// The Group Associations structure is provided for OEMs who want to specify 1415 /// the arrangement or hierarchy of certain components (including other Group Associations) 1416 /// within the system. 1417 /// 1418 typedef struct { 1419 SMBIOS_STRUCTURE Hdr; 1420 SMBIOS_TABLE_STRING GroupName; 1421 GROUP_STRUCT Group[1]; 1422 } SMBIOS_TABLE_TYPE14; 1423 1424 /// 1425 /// System Event Log - Event Log Types. 1426 /// 1427 typedef enum { 1428 EventLogTypeReserved = 0x00, 1429 EventLogTypeSingleBitECC = 0x01, 1430 EventLogTypeMultiBitECC = 0x02, 1431 EventLogTypeParityMemErr = 0x03, 1432 EventLogTypeBusTimeOut = 0x04, 1433 EventLogTypeIOChannelCheck = 0x05, 1434 EventLogTypeSoftwareNMI = 0x06, 1435 EventLogTypePOSTMemResize = 0x07, 1436 EventLogTypePOSTErr = 0x08, 1437 EventLogTypePCIParityErr = 0x09, 1438 EventLogTypePCISystemErr = 0x0A, 1439 EventLogTypeCPUFailure = 0x0B, 1440 EventLogTypeEISATimeOut = 0x0C, 1441 EventLogTypeMemLogDisabled = 0x0D, 1442 EventLogTypeLoggingDisabled = 0x0E, 1443 EventLogTypeSysLimitExce = 0x10, 1444 EventLogTypeAsyncHWTimer = 0x11, 1445 EventLogTypeSysConfigInfo = 0x12, 1446 EventLogTypeHDInfo = 0x13, 1447 EventLogTypeSysReconfig = 0x14, 1448 EventLogTypeUncorrectCPUErr = 0x15, 1449 EventLogTypeAreaResetAndClr = 0x16, 1450 EventLogTypeSystemBoot = 0x17, 1451 EventLogTypeUnused = 0x18, ///< 0x18 - 0x7F 1452 EventLogTypeAvailForSys = 0x80, ///< 0x80 - 0xFE 1453 EventLogTypeEndOfLog = 0xFF 1454 } EVENT_LOG_TYPE_DATA; 1455 1456 /// 1457 /// System Event Log - Variable Data Format Types. 1458 /// 1459 typedef enum { 1460 EventLogVariableNone = 0x00, 1461 EventLogVariableHandle = 0x01, 1462 EventLogVariableMutilEvent = 0x02, 1463 EventLogVariableMutilEventHandle = 0x03, 1464 EventLogVariablePOSTResultBitmap = 0x04, 1465 EventLogVariableSysManagementType = 0x05, 1466 EventLogVariableMutliEventSysManagmentType = 0x06, 1467 EventLogVariableUnused = 0x07, 1468 EventLogVariableOEMAssigned = 0x80 1469 } EVENT_LOG_VARIABLE_DATA; 1470 1471 /// 1472 /// Event Log Type Descriptors 1473 /// 1474 typedef struct { 1475 UINT8 LogType; ///< The enumeration value from EVENT_LOG_TYPE_DATA. 1476 UINT8 DataFormatType; 1477 } EVENT_LOG_TYPE; 1478 1479 /// 1480 /// System Event Log (Type 15). 1481 /// 1482 /// The presence of this structure within the SMBIOS data returned for a system indicates 1483 /// that the system supports an event log. An event log is a fixed-length area within a 1484 /// non-volatile storage element, starting with a fixed-length (and vendor-specific) header 1485 /// record, followed by one or more variable-length log records. 1486 /// 1487 typedef struct { 1488 SMBIOS_STRUCTURE Hdr; 1489 UINT16 LogAreaLength; 1490 UINT16 LogHeaderStartOffset; 1491 UINT16 LogDataStartOffset; 1492 UINT8 AccessMethod; 1493 UINT8 LogStatus; 1494 UINT32 LogChangeToken; 1495 UINT32 AccessMethodAddress; 1496 UINT8 LogHeaderFormat; 1497 UINT8 NumberOfSupportedLogTypeDescriptors; 1498 UINT8 LengthOfLogTypeDescriptor; 1499 EVENT_LOG_TYPE EventLogTypeDescriptors[1]; 1500 } SMBIOS_TABLE_TYPE15; 1501 1502 /// 1503 /// Physical Memory Array - Location. 1504 /// 1505 typedef enum { 1506 MemoryArrayLocationOther = 0x01, 1507 MemoryArrayLocationUnknown = 0x02, 1508 MemoryArrayLocationSystemBoard = 0x03, 1509 MemoryArrayLocationIsaAddonCard = 0x04, 1510 MemoryArrayLocationEisaAddonCard = 0x05, 1511 MemoryArrayLocationPciAddonCard = 0x06, 1512 MemoryArrayLocationMcaAddonCard = 0x07, 1513 MemoryArrayLocationPcmciaAddonCard = 0x08, 1514 MemoryArrayLocationProprietaryAddonCard = 0x09, 1515 MemoryArrayLocationNuBus = 0x0A, 1516 MemoryArrayLocationPc98C20AddonCard = 0xA0, 1517 MemoryArrayLocationPc98C24AddonCard = 0xA1, 1518 MemoryArrayLocationPc98EAddonCard = 0xA2, 1519 MemoryArrayLocationPc98LocalBusAddonCard = 0xA3 1520 } MEMORY_ARRAY_LOCATION; 1521 1522 /// 1523 /// Physical Memory Array - Use. 1524 /// 1525 typedef enum { 1526 MemoryArrayUseOther = 0x01, 1527 MemoryArrayUseUnknown = 0x02, 1528 MemoryArrayUseSystemMemory = 0x03, 1529 MemoryArrayUseVideoMemory = 0x04, 1530 MemoryArrayUseFlashMemory = 0x05, 1531 MemoryArrayUseNonVolatileRam = 0x06, 1532 MemoryArrayUseCacheMemory = 0x07 1533 } MEMORY_ARRAY_USE; 1534 1535 /// 1536 /// Physical Memory Array - Error Correction Types. 1537 /// 1538 typedef enum { 1539 MemoryErrorCorrectionOther = 0x01, 1540 MemoryErrorCorrectionUnknown = 0x02, 1541 MemoryErrorCorrectionNone = 0x03, 1542 MemoryErrorCorrectionParity = 0x04, 1543 MemoryErrorCorrectionSingleBitEcc = 0x05, 1544 MemoryErrorCorrectionMultiBitEcc = 0x06, 1545 MemoryErrorCorrectionCrc = 0x07 1546 } MEMORY_ERROR_CORRECTION; 1547 1548 /// 1549 /// Physical Memory Array (Type 16). 1550 /// 1551 /// This structure describes a collection of memory devices that operate 1552 /// together to form a memory address space. 1553 /// 1554 typedef struct { 1555 SMBIOS_STRUCTURE Hdr; 1556 UINT8 Location; ///< The enumeration value from MEMORY_ARRAY_LOCATION. 1557 UINT8 Use; ///< The enumeration value from MEMORY_ARRAY_USE. 1558 UINT8 MemoryErrorCorrection; ///< The enumeration value from MEMORY_ERROR_CORRECTION. 1559 UINT32 MaximumCapacity; 1560 UINT16 MemoryErrorInformationHandle; 1561 UINT16 NumberOfMemoryDevices; 1562 // 1563 // Add for smbios 2.7 1564 // 1565 UINT64 ExtendedMaximumCapacity; 1566 } SMBIOS_TABLE_TYPE16; 1567 1568 /// 1569 /// Memory Device - Form Factor. 1570 /// 1571 typedef enum { 1572 MemoryFormFactorOther = 0x01, 1573 MemoryFormFactorUnknown = 0x02, 1574 MemoryFormFactorSimm = 0x03, 1575 MemoryFormFactorSip = 0x04, 1576 MemoryFormFactorChip = 0x05, 1577 MemoryFormFactorDip = 0x06, 1578 MemoryFormFactorZip = 0x07, 1579 MemoryFormFactorProprietaryCard = 0x08, 1580 MemoryFormFactorDimm = 0x09, 1581 MemoryFormFactorTsop = 0x0A, 1582 MemoryFormFactorRowOfChips = 0x0B, 1583 MemoryFormFactorRimm = 0x0C, 1584 MemoryFormFactorSodimm = 0x0D, 1585 MemoryFormFactorSrimm = 0x0E, 1586 MemoryFormFactorFbDimm = 0x0F 1587 } MEMORY_FORM_FACTOR; 1588 1589 /// 1590 /// Memory Device - Type 1591 /// 1592 typedef enum { 1593 MemoryTypeOther = 0x01, 1594 MemoryTypeUnknown = 0x02, 1595 MemoryTypeDram = 0x03, 1596 MemoryTypeEdram = 0x04, 1597 MemoryTypeVram = 0x05, 1598 MemoryTypeSram = 0x06, 1599 MemoryTypeRam = 0x07, 1600 MemoryTypeRom = 0x08, 1601 MemoryTypeFlash = 0x09, 1602 MemoryTypeEeprom = 0x0A, 1603 MemoryTypeFeprom = 0x0B, 1604 MemoryTypeEprom = 0x0C, 1605 MemoryTypeCdram = 0x0D, 1606 MemoryType3Dram = 0x0E, 1607 MemoryTypeSdram = 0x0F, 1608 MemoryTypeSgram = 0x10, 1609 MemoryTypeRdram = 0x11, 1610 MemoryTypeDdr = 0x12, 1611 MemoryTypeDdr2 = 0x13, 1612 MemoryTypeDdr2FbDimm = 0x14, 1613 MemoryTypeDdr3 = 0x18, 1614 MemoryTypeFbd2 = 0x19, 1615 MemoryTypeDdr4 = 0x1A, 1616 MemoryTypeLpddr = 0x1B, 1617 MemoryTypeLpddr2 = 0x1C, 1618 MemoryTypeLpddr3 = 0x1D, 1619 MemoryTypeLpddr4 = 0x1E 1620 } MEMORY_DEVICE_TYPE; 1621 1622 typedef struct { 1623 UINT16 Reserved :1; 1624 UINT16 Other :1; 1625 UINT16 Unknown :1; 1626 UINT16 FastPaged :1; 1627 UINT16 StaticColumn :1; 1628 UINT16 PseudoStatic :1; 1629 UINT16 Rambus :1; 1630 UINT16 Synchronous :1; 1631 UINT16 Cmos :1; 1632 UINT16 Edo :1; 1633 UINT16 WindowDram :1; 1634 UINT16 CacheDram :1; 1635 UINT16 Nonvolatile :1; 1636 UINT16 Registered :1; 1637 UINT16 Unbuffered :1; 1638 UINT16 LrDimm :1; 1639 } MEMORY_DEVICE_TYPE_DETAIL; 1640 1641 /// 1642 /// Memory Device (Type 17). 1643 /// 1644 /// This structure describes a single memory device that is part of 1645 /// a larger Physical Memory Array (Type 16). 1646 /// Note: If a system includes memory-device sockets, the SMBIOS implementation 1647 /// includes a Memory Device structure instance for each slot, whether or not the 1648 /// socket is currently populated. 1649 /// 1650 typedef struct { 1651 SMBIOS_STRUCTURE Hdr; 1652 UINT16 MemoryArrayHandle; 1653 UINT16 MemoryErrorInformationHandle; 1654 UINT16 TotalWidth; 1655 UINT16 DataWidth; 1656 UINT16 Size; 1657 UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR. 1658 UINT8 DeviceSet; 1659 SMBIOS_TABLE_STRING DeviceLocator; 1660 SMBIOS_TABLE_STRING BankLocator; 1661 UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE. 1662 MEMORY_DEVICE_TYPE_DETAIL TypeDetail; 1663 UINT16 Speed; 1664 SMBIOS_TABLE_STRING Manufacturer; 1665 SMBIOS_TABLE_STRING SerialNumber; 1666 SMBIOS_TABLE_STRING AssetTag; 1667 SMBIOS_TABLE_STRING PartNumber; 1668 // 1669 // Add for smbios 2.6 1670 // 1671 UINT8 Attributes; 1672 // 1673 // Add for smbios 2.7 1674 // 1675 UINT32 ExtendedSize; 1676 UINT16 ConfiguredMemoryClockSpeed; 1677 // 1678 // Add for smbios 2.8.0 1679 // 1680 UINT16 MinimumVoltage; 1681 UINT16 MaximumVoltage; 1682 UINT16 ConfiguredVoltage; 1683 } SMBIOS_TABLE_TYPE17; 1684 1685 /// 1686 /// 32-bit Memory Error Information - Error Type. 1687 /// 1688 typedef enum { 1689 MemoryErrorOther = 0x01, 1690 MemoryErrorUnknown = 0x02, 1691 MemoryErrorOk = 0x03, 1692 MemoryErrorBadRead = 0x04, 1693 MemoryErrorParity = 0x05, 1694 MemoryErrorSigleBit = 0x06, 1695 MemoryErrorDoubleBit = 0x07, 1696 MemoryErrorMultiBit = 0x08, 1697 MemoryErrorNibble = 0x09, 1698 MemoryErrorChecksum = 0x0A, 1699 MemoryErrorCrc = 0x0B, 1700 MemoryErrorCorrectSingleBit = 0x0C, 1701 MemoryErrorCorrected = 0x0D, 1702 MemoryErrorUnCorrectable = 0x0E 1703 } MEMORY_ERROR_TYPE; 1704 1705 /// 1706 /// 32-bit Memory Error Information - Error Granularity. 1707 /// 1708 typedef enum { 1709 MemoryGranularityOther = 0x01, 1710 MemoryGranularityOtherUnknown = 0x02, 1711 MemoryGranularityDeviceLevel = 0x03, 1712 MemoryGranularityMemPartitionLevel = 0x04 1713 } MEMORY_ERROR_GRANULARITY; 1714 1715 /// 1716 /// 32-bit Memory Error Information - Error Operation. 1717 /// 1718 typedef enum { 1719 MemoryErrorOperationOther = 0x01, 1720 MemoryErrorOperationUnknown = 0x02, 1721 MemoryErrorOperationRead = 0x03, 1722 MemoryErrorOperationWrite = 0x04, 1723 MemoryErrorOperationPartialWrite = 0x05 1724 } MEMORY_ERROR_OPERATION; 1725 1726 /// 1727 /// 32-bit Memory Error Information (Type 18). 1728 /// 1729 /// This structure identifies the specifics of an error that might be detected 1730 /// within a Physical Memory Array. 1731 /// 1732 typedef struct { 1733 SMBIOS_STRUCTURE Hdr; 1734 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE. 1735 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY. 1736 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION. 1737 UINT32 VendorSyndrome; 1738 UINT32 MemoryArrayErrorAddress; 1739 UINT32 DeviceErrorAddress; 1740 UINT32 ErrorResolution; 1741 } SMBIOS_TABLE_TYPE18; 1742 1743 /// 1744 /// Memory Array Mapped Address (Type 19). 1745 /// 1746 /// This structure provides the address mapping for a Physical Memory Array. 1747 /// One structure is present for each contiguous address range described. 1748 /// 1749 typedef struct { 1750 SMBIOS_STRUCTURE Hdr; 1751 UINT32 StartingAddress; 1752 UINT32 EndingAddress; 1753 UINT16 MemoryArrayHandle; 1754 UINT8 PartitionWidth; 1755 // 1756 // Add for smbios 2.7 1757 // 1758 UINT64 ExtendedStartingAddress; 1759 UINT64 ExtendedEndingAddress; 1760 } SMBIOS_TABLE_TYPE19; 1761 1762 /// 1763 /// Memory Device Mapped Address (Type 20). 1764 /// 1765 /// This structure maps memory address space usually to a device-level granularity. 1766 /// One structure is present for each contiguous address range described. 1767 /// 1768 typedef struct { 1769 SMBIOS_STRUCTURE Hdr; 1770 UINT32 StartingAddress; 1771 UINT32 EndingAddress; 1772 UINT16 MemoryDeviceHandle; 1773 UINT16 MemoryArrayMappedAddressHandle; 1774 UINT8 PartitionRowPosition; 1775 UINT8 InterleavePosition; 1776 UINT8 InterleavedDataDepth; 1777 // 1778 // Add for smbios 2.7 1779 // 1780 UINT64 ExtendedStartingAddress; 1781 UINT64 ExtendedEndingAddress; 1782 } SMBIOS_TABLE_TYPE20; 1783 1784 /// 1785 /// Built-in Pointing Device - Type 1786 /// 1787 typedef enum { 1788 PointingDeviceTypeOther = 0x01, 1789 PointingDeviceTypeUnknown = 0x02, 1790 PointingDeviceTypeMouse = 0x03, 1791 PointingDeviceTypeTrackBall = 0x04, 1792 PointingDeviceTypeTrackPoint = 0x05, 1793 PointingDeviceTypeGlidePoint = 0x06, 1794 PointingDeviceTouchPad = 0x07, 1795 PointingDeviceTouchScreen = 0x08, 1796 PointingDeviceOpticalSensor = 0x09 1797 } BUILTIN_POINTING_DEVICE_TYPE; 1798 1799 /// 1800 /// Built-in Pointing Device - Interface. 1801 /// 1802 typedef enum { 1803 PointingDeviceInterfaceOther = 0x01, 1804 PointingDeviceInterfaceUnknown = 0x02, 1805 PointingDeviceInterfaceSerial = 0x03, 1806 PointingDeviceInterfacePs2 = 0x04, 1807 PointingDeviceInterfaceInfrared = 0x05, 1808 PointingDeviceInterfaceHpHil = 0x06, 1809 PointingDeviceInterfaceBusMouse = 0x07, 1810 PointingDeviceInterfaceADB = 0x08, 1811 PointingDeviceInterfaceBusMouseDB9 = 0xA0, 1812 PointingDeviceInterfaceBusMouseMicroDin = 0xA1, 1813 PointingDeviceInterfaceUsb = 0xA2 1814 } BUILTIN_POINTING_DEVICE_INTERFACE; 1815 1816 /// 1817 /// Built-in Pointing Device (Type 21). 1818 /// 1819 /// This structure describes the attributes of the built-in pointing device for the 1820 /// system. The presence of this structure does not imply that the built-in 1821 /// pointing device is active for the system's use! 1822 /// 1823 typedef struct { 1824 SMBIOS_STRUCTURE Hdr; 1825 UINT8 Type; ///< The enumeration value from BUILTIN_POINTING_DEVICE_TYPE. 1826 UINT8 Interface; ///< The enumeration value from BUILTIN_POINTING_DEVICE_INTERFACE. 1827 UINT8 NumberOfButtons; 1828 } SMBIOS_TABLE_TYPE21; 1829 1830 /// 1831 /// Portable Battery - Device Chemistry 1832 /// 1833 typedef enum { 1834 PortableBatteryDeviceChemistryOther = 0x01, 1835 PortableBatteryDeviceChemistryUnknown = 0x02, 1836 PortableBatteryDeviceChemistryLeadAcid = 0x03, 1837 PortableBatteryDeviceChemistryNickelCadmium = 0x04, 1838 PortableBatteryDeviceChemistryNickelMetalHydride = 0x05, 1839 PortableBatteryDeviceChemistryLithiumIon = 0x06, 1840 PortableBatteryDeviceChemistryZincAir = 0x07, 1841 PortableBatteryDeviceChemistryLithiumPolymer = 0x08 1842 } PORTABLE_BATTERY_DEVICE_CHEMISTRY; 1843 1844 /// 1845 /// Portable Battery (Type 22). 1846 /// 1847 /// This structure describes the attributes of the portable battery(s) for the system. 1848 /// The structure contains the static attributes for the group. Each structure describes 1849 /// a single battery pack's attributes. 1850 /// 1851 typedef struct { 1852 SMBIOS_STRUCTURE Hdr; 1853 SMBIOS_TABLE_STRING Location; 1854 SMBIOS_TABLE_STRING Manufacturer; 1855 SMBIOS_TABLE_STRING ManufactureDate; 1856 SMBIOS_TABLE_STRING SerialNumber; 1857 SMBIOS_TABLE_STRING DeviceName; 1858 UINT8 DeviceChemistry; ///< The enumeration value from PORTABLE_BATTERY_DEVICE_CHEMISTRY. 1859 UINT16 DeviceCapacity; 1860 UINT16 DesignVoltage; 1861 SMBIOS_TABLE_STRING SBDSVersionNumber; 1862 UINT8 MaximumErrorInBatteryData; 1863 UINT16 SBDSSerialNumber; 1864 UINT16 SBDSManufactureDate; 1865 SMBIOS_TABLE_STRING SBDSDeviceChemistry; 1866 UINT8 DesignCapacityMultiplier; 1867 UINT32 OEMSpecific; 1868 } SMBIOS_TABLE_TYPE22; 1869 1870 /// 1871 /// System Reset (Type 23) 1872 /// 1873 /// This structure describes whether Automatic System Reset functions enabled (Status). 1874 /// If the system has a watchdog Timer and the timer is not reset (Timer Reset) 1875 /// before the Interval elapses, an automatic system reset will occur. The system will re-boot 1876 /// according to the Boot Option. This function may repeat until the Limit is reached, at which time 1877 /// the system will re-boot according to the Boot Option at Limit. 1878 /// 1879 typedef struct { 1880 SMBIOS_STRUCTURE Hdr; 1881 UINT8 Capabilities; 1882 UINT16 ResetCount; 1883 UINT16 ResetLimit; 1884 UINT16 TimerInterval; 1885 UINT16 Timeout; 1886 } SMBIOS_TABLE_TYPE23; 1887 1888 /// 1889 /// Hardware Security (Type 24). 1890 /// 1891 /// This structure describes the system-wide hardware security settings. 1892 /// 1893 typedef struct { 1894 SMBIOS_STRUCTURE Hdr; 1895 UINT8 HardwareSecuritySettings; 1896 } SMBIOS_TABLE_TYPE24; 1897 1898 /// 1899 /// System Power Controls (Type 25). 1900 /// 1901 /// This structure describes the attributes for controlling the main power supply to the system. 1902 /// Software that interprets this structure uses the month, day, hour, minute, and second values 1903 /// to determine the number of seconds until the next power-on of the system. The presence of 1904 /// this structure implies that a timed power-on facility is available for the system. 1905 /// 1906 typedef struct { 1907 SMBIOS_STRUCTURE Hdr; 1908 UINT8 NextScheduledPowerOnMonth; 1909 UINT8 NextScheduledPowerOnDayOfMonth; 1910 UINT8 NextScheduledPowerOnHour; 1911 UINT8 NextScheduledPowerOnMinute; 1912 UINT8 NextScheduledPowerOnSecond; 1913 } SMBIOS_TABLE_TYPE25; 1914 1915 /// 1916 /// Voltage Probe - Location and Status. 1917 /// 1918 typedef struct { 1919 UINT8 VoltageProbeSite :5; 1920 UINT8 VoltageProbeStatus :3; 1921 } MISC_VOLTAGE_PROBE_LOCATION; 1922 1923 /// 1924 /// Voltage Probe (Type 26) 1925 /// 1926 /// This describes the attributes for a voltage probe in the system. 1927 /// Each structure describes a single voltage probe. 1928 /// 1929 typedef struct { 1930 SMBIOS_STRUCTURE Hdr; 1931 SMBIOS_TABLE_STRING Description; 1932 MISC_VOLTAGE_PROBE_LOCATION LocationAndStatus; 1933 UINT16 MaximumValue; 1934 UINT16 MinimumValue; 1935 UINT16 Resolution; 1936 UINT16 Tolerance; 1937 UINT16 Accuracy; 1938 UINT32 OEMDefined; 1939 UINT16 NominalValue; 1940 } SMBIOS_TABLE_TYPE26; 1941 1942 /// 1943 /// Cooling Device - Device Type and Status. 1944 /// 1945 typedef struct { 1946 UINT8 CoolingDevice :5; 1947 UINT8 CoolingDeviceStatus :3; 1948 } MISC_COOLING_DEVICE_TYPE; 1949 1950 /// 1951 /// Cooling Device (Type 27) 1952 /// 1953 /// This structure describes the attributes for a cooling device in the system. 1954 /// Each structure describes a single cooling device. 1955 /// 1956 typedef struct { 1957 SMBIOS_STRUCTURE Hdr; 1958 UINT16 TemperatureProbeHandle; 1959 MISC_COOLING_DEVICE_TYPE DeviceTypeAndStatus; 1960 UINT8 CoolingUnitGroup; 1961 UINT32 OEMDefined; 1962 UINT16 NominalSpeed; 1963 // 1964 // Add for smbios 2.7 1965 // 1966 SMBIOS_TABLE_STRING Description; 1967 } SMBIOS_TABLE_TYPE27; 1968 1969 /// 1970 /// Temperature Probe - Location and Status. 1971 /// 1972 typedef struct { 1973 UINT8 TemperatureProbeSite :5; 1974 UINT8 TemperatureProbeStatus :3; 1975 } MISC_TEMPERATURE_PROBE_LOCATION; 1976 1977 /// 1978 /// Temperature Probe (Type 28). 1979 /// 1980 /// This structure describes the attributes for a temperature probe in the system. 1981 /// Each structure describes a single temperature probe. 1982 /// 1983 typedef struct { 1984 SMBIOS_STRUCTURE Hdr; 1985 SMBIOS_TABLE_STRING Description; 1986 MISC_TEMPERATURE_PROBE_LOCATION LocationAndStatus; 1987 UINT16 MaximumValue; 1988 UINT16 MinimumValue; 1989 UINT16 Resolution; 1990 UINT16 Tolerance; 1991 UINT16 Accuracy; 1992 UINT32 OEMDefined; 1993 UINT16 NominalValue; 1994 } SMBIOS_TABLE_TYPE28; 1995 1996 /// 1997 /// Electrical Current Probe - Location and Status. 1998 /// 1999 typedef struct { 2000 UINT8 ElectricalCurrentProbeSite :5; 2001 UINT8 ElectricalCurrentProbeStatus :3; 2002 } MISC_ELECTRICAL_CURRENT_PROBE_LOCATION; 2003 2004 /// 2005 /// Electrical Current Probe (Type 29). 2006 /// 2007 /// This structure describes the attributes for an electrical current probe in the system. 2008 /// Each structure describes a single electrical current probe. 2009 /// 2010 typedef struct { 2011 SMBIOS_STRUCTURE Hdr; 2012 SMBIOS_TABLE_STRING Description; 2013 MISC_ELECTRICAL_CURRENT_PROBE_LOCATION LocationAndStatus; 2014 UINT16 MaximumValue; 2015 UINT16 MinimumValue; 2016 UINT16 Resolution; 2017 UINT16 Tolerance; 2018 UINT16 Accuracy; 2019 UINT32 OEMDefined; 2020 UINT16 NominalValue; 2021 } SMBIOS_TABLE_TYPE29; 2022 2023 /// 2024 /// Out-of-Band Remote Access (Type 30). 2025 /// 2026 /// This structure describes the attributes and policy settings of a hardware facility 2027 /// that may be used to gain remote access to a hardware system when the operating system 2028 /// is not available due to power-down status, hardware failures, or boot failures. 2029 /// 2030 typedef struct { 2031 SMBIOS_STRUCTURE Hdr; 2032 SMBIOS_TABLE_STRING ManufacturerName; 2033 UINT8 Connections; 2034 } SMBIOS_TABLE_TYPE30; 2035 2036 /// 2037 /// Boot Integrity Services (BIS) Entry Point (Type 31). 2038 /// 2039 /// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS). 2040 /// 2041 typedef struct { 2042 SMBIOS_STRUCTURE Hdr; 2043 UINT8 Checksum; 2044 UINT8 Reserved1; 2045 UINT16 Reserved2; 2046 UINT32 BisEntry16; 2047 UINT32 BisEntry32; 2048 UINT64 Reserved3; 2049 UINT32 Reserved4; 2050 } SMBIOS_TABLE_TYPE31; 2051 2052 /// 2053 /// System Boot Information - System Boot Status. 2054 /// 2055 typedef enum { 2056 BootInformationStatusNoError = 0x00, 2057 BootInformationStatusNoBootableMedia = 0x01, 2058 BootInformationStatusNormalOSFailedLoading = 0x02, 2059 BootInformationStatusFirmwareDetectedFailure = 0x03, 2060 BootInformationStatusOSDetectedFailure = 0x04, 2061 BootInformationStatusUserRequestedBoot = 0x05, 2062 BootInformationStatusSystemSecurityViolation = 0x06, 2063 BootInformationStatusPreviousRequestedImage = 0x07, 2064 BootInformationStatusWatchdogTimerExpired = 0x08, 2065 BootInformationStatusStartReserved = 0x09, 2066 BootInformationStatusStartOemSpecific = 0x80, 2067 BootInformationStatusStartProductSpecific = 0xC0 2068 } MISC_BOOT_INFORMATION_STATUS_DATA_TYPE; 2069 2070 /// 2071 /// System Boot Information (Type 32). 2072 /// 2073 /// The client system firmware, e.g. BIOS, communicates the System Boot Status to the 2074 /// client's Pre-boot Execution Environment (PXE) boot image or OS-present management 2075 /// application via this structure. When used in the PXE environment, for example, 2076 /// this code identifies the reason the PXE was initiated and can be used by boot-image 2077 /// software to further automate an enterprise's PXE sessions. For example, an enterprise 2078 /// could choose to automatically download a hardware-diagnostic image to a client whose 2079 /// reason code indicated either a firmware- or operating system-detected hardware failure. 2080 /// 2081 typedef struct { 2082 SMBIOS_STRUCTURE Hdr; 2083 UINT8 Reserved[6]; 2084 UINT8 BootStatus; ///< The enumeration value from MISC_BOOT_INFORMATION_STATUS_DATA_TYPE. 2085 } SMBIOS_TABLE_TYPE32; 2086 2087 /// 2088 /// 64-bit Memory Error Information (Type 33). 2089 /// 2090 /// This structure describes an error within a Physical Memory Array, 2091 /// when the error address is above 4G (0xFFFFFFFF). 2092 /// 2093 typedef struct { 2094 SMBIOS_STRUCTURE Hdr; 2095 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE. 2096 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY. 2097 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION. 2098 UINT32 VendorSyndrome; 2099 UINT64 MemoryArrayErrorAddress; 2100 UINT64 DeviceErrorAddress; 2101 UINT32 ErrorResolution; 2102 } SMBIOS_TABLE_TYPE33; 2103 2104 /// 2105 /// Management Device - Type. 2106 /// 2107 typedef enum { 2108 ManagementDeviceTypeOther = 0x01, 2109 ManagementDeviceTypeUnknown = 0x02, 2110 ManagementDeviceTypeLm75 = 0x03, 2111 ManagementDeviceTypeLm78 = 0x04, 2112 ManagementDeviceTypeLm79 = 0x05, 2113 ManagementDeviceTypeLm80 = 0x06, 2114 ManagementDeviceTypeLm81 = 0x07, 2115 ManagementDeviceTypeAdm9240 = 0x08, 2116 ManagementDeviceTypeDs1780 = 0x09, 2117 ManagementDeviceTypeMaxim1617 = 0x0A, 2118 ManagementDeviceTypeGl518Sm = 0x0B, 2119 ManagementDeviceTypeW83781D = 0x0C, 2120 ManagementDeviceTypeHt82H791 = 0x0D 2121 } MISC_MANAGEMENT_DEVICE_TYPE; 2122 2123 /// 2124 /// Management Device - Address Type. 2125 /// 2126 typedef enum { 2127 ManagementDeviceAddressTypeOther = 0x01, 2128 ManagementDeviceAddressTypeUnknown = 0x02, 2129 ManagementDeviceAddressTypeIOPort = 0x03, 2130 ManagementDeviceAddressTypeMemory = 0x04, 2131 ManagementDeviceAddressTypeSmbus = 0x05 2132 } MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE; 2133 2134 /// 2135 /// Management Device (Type 34). 2136 /// 2137 /// The information in this structure defines the attributes of a Management Device. 2138 /// A Management Device might control one or more fans or voltage, current, or temperature 2139 /// probes as defined by one or more Management Device Component structures. 2140 /// 2141 typedef struct { 2142 SMBIOS_STRUCTURE Hdr; 2143 SMBIOS_TABLE_STRING Description; 2144 UINT8 Type; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_TYPE. 2145 UINT32 Address; 2146 UINT8 AddressType; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE. 2147 } SMBIOS_TABLE_TYPE34; 2148 2149 /// 2150 /// Management Device Component (Type 35) 2151 /// 2152 /// This structure associates a cooling device or environmental probe with structures 2153 /// that define the controlling hardware device and (optionally) the component's thresholds. 2154 /// 2155 typedef struct { 2156 SMBIOS_STRUCTURE Hdr; 2157 SMBIOS_TABLE_STRING Description; 2158 UINT16 ManagementDeviceHandle; 2159 UINT16 ComponentHandle; 2160 UINT16 ThresholdHandle; 2161 } SMBIOS_TABLE_TYPE35; 2162 2163 /// 2164 /// Management Device Threshold Data (Type 36). 2165 /// 2166 /// The information in this structure defines threshold information for 2167 /// a component (probe or cooling-unit) contained within a Management Device. 2168 /// 2169 typedef struct { 2170 SMBIOS_STRUCTURE Hdr; 2171 UINT16 LowerThresholdNonCritical; 2172 UINT16 UpperThresholdNonCritical; 2173 UINT16 LowerThresholdCritical; 2174 UINT16 UpperThresholdCritical; 2175 UINT16 LowerThresholdNonRecoverable; 2176 UINT16 UpperThresholdNonRecoverable; 2177 } SMBIOS_TABLE_TYPE36; 2178 2179 /// 2180 /// Memory Channel Entry. 2181 /// 2182 typedef struct { 2183 UINT8 DeviceLoad; 2184 UINT16 DeviceHandle; 2185 } MEMORY_DEVICE; 2186 2187 /// 2188 /// Memory Channel - Channel Type. 2189 /// 2190 typedef enum { 2191 MemoryChannelTypeOther = 0x01, 2192 MemoryChannelTypeUnknown = 0x02, 2193 MemoryChannelTypeRambus = 0x03, 2194 MemoryChannelTypeSyncLink = 0x04 2195 } MEMORY_CHANNEL_TYPE; 2196 2197 /// 2198 /// Memory Channel (Type 37) 2199 /// 2200 /// The information in this structure provides the correlation between a Memory Channel 2201 /// and its associated Memory Devices. Each device presents one or more loads to the channel. 2202 /// The sum of all device loads cannot exceed the channel's defined maximum. 2203 /// 2204 typedef struct { 2205 SMBIOS_STRUCTURE Hdr; 2206 UINT8 ChannelType; 2207 UINT8 MaximumChannelLoad; 2208 UINT8 MemoryDeviceCount; 2209 MEMORY_DEVICE MemoryDevice[1]; 2210 } SMBIOS_TABLE_TYPE37; 2211 2212 /// 2213 /// IPMI Device Information - BMC Interface Type 2214 /// 2215 typedef enum { 2216 IPMIDeviceInfoInterfaceTypeUnknown = 0x00, 2217 IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< The Keyboard Controller Style. 2218 IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< The Server Management Interface Chip. 2219 IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< The Block Transfer 2220 IPMIDeviceInfoInterfaceTypeReserved = 0x04 2221 } BMC_INTERFACE_TYPE; 2222 2223 /// 2224 /// IPMI Device Information (Type 38). 2225 /// 2226 /// The information in this structure defines the attributes of an 2227 /// Intelligent Platform Management Interface (IPMI) Baseboard Management Controller (BMC). 2228 /// 2229 /// The Type 42 structure can also be used to describe a physical management controller 2230 /// host interface and one or more protocols that share that interface. If IPMI is not 2231 /// shared with other protocols, either the Type 38 or Type 42 structures can be used. 2232 /// Providing Type 38 is recommended for backward compatibility. 2233 /// 2234 typedef struct { 2235 SMBIOS_STRUCTURE Hdr; 2236 UINT8 InterfaceType; ///< The enumeration value from BMC_INTERFACE_TYPE. 2237 UINT8 IPMISpecificationRevision; 2238 UINT8 I2CSlaveAddress; 2239 UINT8 NVStorageDeviceAddress; 2240 UINT64 BaseAddress; 2241 UINT8 BaseAddressModifier_InterruptInfo; 2242 UINT8 InterruptNumber; 2243 } SMBIOS_TABLE_TYPE38; 2244 2245 /// 2246 /// System Power Supply - Power Supply Characteristics. 2247 /// 2248 typedef struct { 2249 UINT16 PowerSupplyHotReplaceable:1; 2250 UINT16 PowerSupplyPresent :1; 2251 UINT16 PowerSupplyUnplugged :1; 2252 UINT16 InputVoltageRangeSwitch :4; 2253 UINT16 PowerSupplyStatus :3; 2254 UINT16 PowerSupplyType :4; 2255 UINT16 Reserved :2; 2256 } SYS_POWER_SUPPLY_CHARACTERISTICS; 2257 2258 /// 2259 /// System Power Supply (Type 39). 2260 /// 2261 /// This structure identifies attributes of a system power supply. One instance 2262 /// of this record is present for each possible power supply in a system. 2263 /// 2264 typedef struct { 2265 SMBIOS_STRUCTURE Hdr; 2266 UINT8 PowerUnitGroup; 2267 SMBIOS_TABLE_STRING Location; 2268 SMBIOS_TABLE_STRING DeviceName; 2269 SMBIOS_TABLE_STRING Manufacturer; 2270 SMBIOS_TABLE_STRING SerialNumber; 2271 SMBIOS_TABLE_STRING AssetTagNumber; 2272 SMBIOS_TABLE_STRING ModelPartNumber; 2273 SMBIOS_TABLE_STRING RevisionLevel; 2274 UINT16 MaxPowerCapacity; 2275 SYS_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics; 2276 UINT16 InputVoltageProbeHandle; 2277 UINT16 CoolingDeviceHandle; 2278 UINT16 InputCurrentProbeHandle; 2279 } SMBIOS_TABLE_TYPE39; 2280 2281 /// 2282 /// Additional Information Entry Format. 2283 /// 2284 typedef struct { 2285 UINT8 EntryLength; 2286 UINT16 ReferencedHandle; 2287 UINT8 ReferencedOffset; 2288 SMBIOS_TABLE_STRING EntryString; 2289 UINT8 Value[1]; 2290 }ADDITIONAL_INFORMATION_ENTRY; 2291 2292 /// 2293 /// Additional Information (Type 40). 2294 /// 2295 /// This structure is intended to provide additional information for handling unspecified 2296 /// enumerated values and interim field updates in another structure. 2297 /// 2298 typedef struct { 2299 SMBIOS_STRUCTURE Hdr; 2300 UINT8 NumberOfAdditionalInformationEntries; 2301 ADDITIONAL_INFORMATION_ENTRY AdditionalInfoEntries[1]; 2302 } SMBIOS_TABLE_TYPE40; 2303 2304 /// 2305 /// Onboard Devices Extended Information - Onboard Device Types. 2306 /// 2307 typedef enum{ 2308 OnBoardDeviceExtendedTypeOther = 0x01, 2309 OnBoardDeviceExtendedTypeUnknown = 0x02, 2310 OnBoardDeviceExtendedTypeVideo = 0x03, 2311 OnBoardDeviceExtendedTypeScsiController = 0x04, 2312 OnBoardDeviceExtendedTypeEthernet = 0x05, 2313 OnBoardDeviceExtendedTypeTokenRing = 0x06, 2314 OnBoardDeviceExtendedTypeSound = 0x07, 2315 OnBoardDeviceExtendedTypePATAController = 0x08, 2316 OnBoardDeviceExtendedTypeSATAController = 0x09, 2317 OnBoardDeviceExtendedTypeSASController = 0x0A 2318 } ONBOARD_DEVICE_EXTENDED_INFO_TYPE; 2319 2320 /// 2321 /// Onboard Devices Extended Information (Type 41). 2322 /// 2323 /// The information in this structure defines the attributes of devices that 2324 /// are onboard (soldered onto) a system element, usually the baseboard. 2325 /// In general, an entry in this table implies that the BIOS has some level of 2326 /// control over the enabling of the associated device for use by the system. 2327 /// 2328 typedef struct { 2329 SMBIOS_STRUCTURE Hdr; 2330 SMBIOS_TABLE_STRING ReferenceDesignation; 2331 UINT8 DeviceType; ///< The enumeration value from ONBOARD_DEVICE_EXTENDED_INFO_TYPE 2332 UINT8 DeviceTypeInstance; 2333 UINT16 SegmentGroupNum; 2334 UINT8 BusNum; 2335 UINT8 DevFuncNum; 2336 } SMBIOS_TABLE_TYPE41; 2337 2338 /// 2339 /// Management Controller Host Interface (Type 42). 2340 /// 2341 /// The information in this structure defines the attributes of a Management 2342 /// Controller Host Interface that is not discoverable by "Plug and Play" mechanisms. 2343 /// 2344 /// Type 42 should be used for management controller host interfaces that use protocols 2345 /// other than IPMI or that use multiple protocols on a single host interface type. 2346 /// 2347 /// This structure should also be provided if IPMI is shared with other protocols 2348 /// over the same interface hardware. If IPMI is not shared with other protocols, 2349 /// either the Type 38 or Type 42 structures can be used. Providing Type 38 is 2350 /// recommended for backward compatibility. The structures are not required to 2351 /// be mutually exclusive. Type 38 and Type 42 structures may be implemented 2352 /// simultaneously to provide backward compatibility with IPMI applications or drivers 2353 /// that do not yet recognize the Type 42 structure. 2354 /// 2355 typedef struct { 2356 SMBIOS_STRUCTURE Hdr; 2357 UINT8 InterfaceType; 2358 UINT8 MCHostInterfaceData[1]; ///< This field has a minimum of four bytes 2359 } SMBIOS_TABLE_TYPE42; 2360 2361 /// 2362 /// Inactive (Type 126) 2363 /// 2364 typedef struct { 2365 SMBIOS_STRUCTURE Hdr; 2366 } SMBIOS_TABLE_TYPE126; 2367 2368 /// 2369 /// End-of-Table (Type 127) 2370 /// 2371 typedef struct { 2372 SMBIOS_STRUCTURE Hdr; 2373 } SMBIOS_TABLE_TYPE127; 2374 2375 /// 2376 /// Union of all the possible SMBIOS record types. 2377 /// 2378 typedef union { 2379 SMBIOS_STRUCTURE *Hdr; 2380 SMBIOS_TABLE_TYPE0 *Type0; 2381 SMBIOS_TABLE_TYPE1 *Type1; 2382 SMBIOS_TABLE_TYPE2 *Type2; 2383 SMBIOS_TABLE_TYPE3 *Type3; 2384 SMBIOS_TABLE_TYPE4 *Type4; 2385 SMBIOS_TABLE_TYPE5 *Type5; 2386 SMBIOS_TABLE_TYPE6 *Type6; 2387 SMBIOS_TABLE_TYPE7 *Type7; 2388 SMBIOS_TABLE_TYPE8 *Type8; 2389 SMBIOS_TABLE_TYPE9 *Type9; 2390 SMBIOS_TABLE_TYPE10 *Type10; 2391 SMBIOS_TABLE_TYPE11 *Type11; 2392 SMBIOS_TABLE_TYPE12 *Type12; 2393 SMBIOS_TABLE_TYPE13 *Type13; 2394 SMBIOS_TABLE_TYPE14 *Type14; 2395 SMBIOS_TABLE_TYPE15 *Type15; 2396 SMBIOS_TABLE_TYPE16 *Type16; 2397 SMBIOS_TABLE_TYPE17 *Type17; 2398 SMBIOS_TABLE_TYPE18 *Type18; 2399 SMBIOS_TABLE_TYPE19 *Type19; 2400 SMBIOS_TABLE_TYPE20 *Type20; 2401 SMBIOS_TABLE_TYPE21 *Type21; 2402 SMBIOS_TABLE_TYPE22 *Type22; 2403 SMBIOS_TABLE_TYPE23 *Type23; 2404 SMBIOS_TABLE_TYPE24 *Type24; 2405 SMBIOS_TABLE_TYPE25 *Type25; 2406 SMBIOS_TABLE_TYPE26 *Type26; 2407 SMBIOS_TABLE_TYPE27 *Type27; 2408 SMBIOS_TABLE_TYPE28 *Type28; 2409 SMBIOS_TABLE_TYPE29 *Type29; 2410 SMBIOS_TABLE_TYPE30 *Type30; 2411 SMBIOS_TABLE_TYPE31 *Type31; 2412 SMBIOS_TABLE_TYPE32 *Type32; 2413 SMBIOS_TABLE_TYPE33 *Type33; 2414 SMBIOS_TABLE_TYPE34 *Type34; 2415 SMBIOS_TABLE_TYPE35 *Type35; 2416 SMBIOS_TABLE_TYPE36 *Type36; 2417 SMBIOS_TABLE_TYPE37 *Type37; 2418 SMBIOS_TABLE_TYPE38 *Type38; 2419 SMBIOS_TABLE_TYPE39 *Type39; 2420 SMBIOS_TABLE_TYPE40 *Type40; 2421 SMBIOS_TABLE_TYPE41 *Type41; 2422 SMBIOS_TABLE_TYPE42 *Type42; 2423 SMBIOS_TABLE_TYPE126 *Type126; 2424 SMBIOS_TABLE_TYPE127 *Type127; 2425 UINT8 *Raw; 2426 } SMBIOS_STRUCTURE_POINTER; 2427 2428 #pragma pack() 2429 2430 #endif 2431
