| /frameworks/base/location/java/android/location/ |
| Address.aidl | 19 parcelable Address;
|
| /external/clang/test/Modules/Inputs/PR20399/ |
| SecondHeader.h | 7 struct Address {};
10 struct Address<std::vector<bool>>
11 : Address<std::vector<bool>::iterator> {};
|
| /external/nist-sip/java/javax/sip/header/ |
| HeaderAddress.java | 3 import javax.sip.address.Address;
6 Address getAddress();
7 void setAddress(Address address);
|
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BaseCacheMaintenanceLib/ |
| EbcCache.c | 45 Invalidates the instruction cache lines specified by Address and Length. If
46 Address is not aligned on a cache line boundary, then entire instruction
47 cache line containing Address is invalidated. If Address + Length is not
49 containing Address + Length -1 is invalidated. This function may choose to
52 lines are invalidated. Address is returned.
54 If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
56 @param Address The base address of the instruction cache lines to
58 Address is a physical address. If the CPU is in a virtual
[all...] |
| IpfCache.c | 46 Invalidates the instruction cache lines specified by Address and Length. If
47 Address is not aligned on a cache line boundary, then entire instruction
48 cache line containing Address is invalidated. If Address + Length is not
50 containing Address + Length -1 is invalidated. This function may choose to
53 lines are invalidated. Address is returned.
55 If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
57 @param Address The base address of the instruction cache lines to
59 Address is a physical address. If the CPU is in a virtual
[all...] |
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BaseIoLibIntrinsic/ |
| IoLibIpf.c | 47 UINT64 Address;
50 // Add the 64MB aligned IO Port space to the IO address
52 Address = MAP_PORT_BASE_TO_MEM (Port);
53 Address += PcdGet64(PcdIoBlockBaseAddressForIpf);
55 return MmioRead8 (Address);
76 UINT64 Address;
79 // Add the 64MB aligned IO Port space to the IO address
81 Address = MAP_PORT_BASE_TO_MEM (Port);
82 Address += PcdGet64(PcdIoBlockBaseAddressForIpf);
84 return MmioRead16 (Address);
[all...] |
| /device/linaro/bootloader/edk2/MdePkg/Library/BaseCacheMaintenanceLib/ |
| EbcCache.c | 35 Invalidates the instruction cache lines specified by Address and Length. If
36 Address is not aligned on a cache line boundary, then entire instruction
37 cache line containing Address is invalidated. If Address + Length is not
39 containing Address + Length -1 is invalidated. This function may choose to
42 lines are invalidated. Address is returned.
44 If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
46 @param Address The base address of the instruction cache lines to
48 Address is a physical address. If the CPU is in a virtual
[all...] |
| X86Cache.c | 37 Invalidates the instruction cache lines specified by Address and Length. If
38 Address is not aligned on a cache line boundary, then entire instruction
39 cache line containing Address is invalidated. If Address + Length is not
41 containing Address + Length -1 is invalidated. This function may choose to
44 lines are invalidated. Address is returned.
46 If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
48 @param Address The base address of the instruction cache lines to
50 Address is a physical address. If the CPU is in a virtual
[all...] |
| /device/linaro/bootloader/edk2/MdePkg/Library/BaseLib/Ipf/ |
| FlushCacheRange.c | 22 Flushes the cache lines specified by Address and Length. If Address is not aligned
23 on a cache line boundary, then entire cache line containing Address is flushed.
24 If Address + Length is not aligned on a cache line boundary, then the entire cache
25 line containing Address + Length - 1 is flushed. This function may choose to flush
27 Length is 0, the no cache lines are flushed. Address is returned.
30 If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
32 @param Address The base address of the instruction lines to invalidate. If
33 the CPU is in a physical addressing mode, then Address is a
[all...] |
| /packages/apps/UnifiedEmail/src/org/apache/james/mime4j/field/address/ |
| Address.java | 20 package org.apache.james.mime4j.field.address;
32 public abstract class Address {
35 * Adds any mailboxes represented by this address
41 final void addMailboxesTo(ArrayList<Address> results) {
46 * Adds any mailboxes represented by this address
50 protected abstract void doAddMailboxesTo(ArrayList<Address> results);
|
| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Library/I2CLibPei/ |
| I2CIoLibPei.c | 22 Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
28 @param Address The MMIO register to read.
36 IN UINTN Address
41 Value = *(volatile UINT8*)Address;
48 Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
53 If Address is not aligned on a 16-bit boundary, then ASSERT().
55 @param Address The MMIO register to read.
63 IN UINTN Address
68 ASSERT ((Address & 1) == 0);
69 Value = *(volatile UINT16*)Address;
[all...] |
| I2CIoLibPei.h | 24 Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
30 @param Address The MMIO register to read.
39 IN UINTN Address
46 Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
51 If Address is not aligned on a 16-bit boundary, then ASSERT().
53 @param Address The MMIO register to read.
61 IN UINTN Address
68 Writes the 16-bit MMIO register specified by Address with the value specified
73 If Address is not aligned on a 16-bit boundary, then ASSERT().
75 @param Address The MMIO register to write.
[all...] |
| /external/v8/src/ |
| v8memory.h | 16 static uint8_t& uint8_at(Address addr) {
20 static uint16_t& uint16_at(Address addr) {
24 static uint32_t& uint32_at(Address addr) {
28 static int32_t& int32_at(Address addr) {
32 static uint64_t& uint64_at(Address addr) {
36 static int& int_at(Address addr) {
40 static unsigned& unsigned_at(Address addr) {
44 static intptr_t& intptr_at(Address addr) {
48 static uintptr_t& uintptr_at(Address addr) {
52 static double& double_at(Address addr)
[all...] |
| /device/linaro/bootloader/edk2/MdePkg/Library/BaseIoLibIntrinsic/ |
| IoLib.c | 73 Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
79 @param Address The MMIO register to read.
87 IN UINTN Address
93 Value = *(volatile UINT8*)Address;
102 Writes the 8-bit MMIO register specified by Address with the value specified
108 @param Address The MMIO register to write.
117 IN UINTN Address,
122 *(volatile UINT8*)Address = Value;
131 Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
136 If Address is not aligned on a 16-bit boundary, then ASSERT().
[all...] |
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| MachineCodeInfo.h | 27 void *Address; // The address of the function in memory
30 MachineCodeInfo() : Size(0), Address(0) {}
37 Address = a;
44 void *address() const { function in class:llvm::MachineCodeInfo
45 return Address;
|
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/RuntimeDxe/EfiRuntimeLib/ |
| Io.c | 28 IN UINT64 Address
36 Address - IO address to read
46 EfiIoRead (EfiCpuIoWidthUint8, Address, 1, &Buffer);
52 IN UINT64 Address
60 Address - IO address to read
70 EfiIoRead (EfiCpuIoWidthUint16, Address, 1, &Buffer);
76 IN UINT64 Address
84 Address - IO address to read
[all...] |
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Sample/Platform/Generic/MonoStatusCode/Library/Pei/Include/ |
| SimpleCpuIoLib.h | 30 IN UINT64 Address
35 IN UINT64 Address
40 IN UINT64 Address
45 IN UINT64 Address,
51 IN UINT64 Address,
57 IN UINT64 Address,
63 IN UINT64 Address
68 IN UINT64 Address
73 IN UINT64 Address,
79 IN UINT64 Address,
[all...] |
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BasePciCf8Lib/ |
| PciLib.c | 31 // Declare macro to convert PCI Library formatted address to CF8 formatted address
33 // PCI Library formatted address CF8 Formatted Address
44 Assert the validity of a PCI address. A valid PCI address should contain 1's
47 @param A The address to validate.
55 Convert a PCI Express address to PCI CF8 address.
57 @param A The address to convert.
[all...] |
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BasePciLibCf8/ |
| PciLib.c | 28 Reads and returns the 8-bit PCI configuration register specified by Address.
32 If Address > 0x0FFFFFFF, then ASSERT().
34 @param Address Address that encodes the PCI Bus, Device, Function and
43 IN UINTN Address
46 return PciCf8Read8 (Address);
52 Writes the 8-bit PCI configuration register specified by Address with the
56 If Address > 0x0FFFFFFF, then ASSERT().
58 @param Address Address that encodes the PCI Bus, Device, Function and
[all...] |
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BasePciLibPciExpress/ |
| PciLib.c | 28 Reads and returns the 8-bit PCI configuration register specified by Address.
32 If Address > 0x0FFFFFFF, then ASSERT().
34 @param Address Address that encodes the PCI Bus, Device, Function and
43 IN UINTN Address
46 return PciExpressRead8 (Address);
52 Writes the 8-bit PCI configuration register specified by Address with the
56 If Address > 0x0FFFFFFF, then ASSERT().
58 @param Address Address that encodes the PCI Bus, Device, Function and
[all...] |
| /packages/apps/UnifiedEmail/tests/src/com/android/emailcommon/mail/ |
| AddressUnitTests.java | 24 * This is a series of unit tests for the Address class. These tests must be locally
40 + "noname@dom.com <noname@dom.com>" // personal == address
44 private static final Address ADDR_1 = new Address("john@gmail.com", "John Doe");
45 private static final Address ADDR_2 = new Address("foo@bar.com", null);
46 private static final Address ADDR_3 = new Address("mar.y+test@gmail.com", "Mar-y, B; B*arr");
47 private static final Address[][] TO_HEADER_CASES = {
54 Address mAddress1
116 Address address = new Address(bareAddress); local
127 Address address = new Address("user1@dom1.org"); local
144 Address address = new Address("user1@dom1.net", "simple name"); local
161 Address address = new Address("user1@dom1.co.jp", "=?UTF-8?B?5bK45pys?="); local
387 final Address[] address = Address.parse("noname1@dom1.com"); local
[all...] |
| /device/linaro/bootloader/edk2/MdePkg/Library/DxePciLibEsal/ |
| PciLib.c | 25 Assert the validity of a PCI address. A valid PCI address should contain 1's
28 @param A The address to validate.
36 Converts a PCI Library Address to a ESAL PCI Service Address.
37 Based on SAL Spec 3.2, there are two SAL PCI Address:
39 If address type = 0
40 Bits 0..7 - Register address
47 If address type = 1
48 Bits 0..7 - Register address
[all...] |
| /device/linaro/bootloader/edk2/MdePkg/Library/DxePciSegmentLibEsal/ |
| PciLib.c | 25 Assert the validity of a PCI Segment address.
26 A valid PCI Segment address should not contain 1's in bits 31:28
28 @param A The address to validate.
36 Converts a PCI Library Address to a ESAL PCI Service Address.
37 Based on SAL Spec 3.2, there are two SAL PCI Address:
39 If address type = 0
40 Bits 0..7 - Register address
47 If address type = 1
48 Bits 0..7 - Register address
[all...] |
| /device/linaro/bootloader/edk2/MdePkg/Library/BaseS3PciLib/ |
| S3PciLib.c | 27 #define PCILIB_TO_COMMON_ADDRESS(Address) \
28 ((UINT64) ((((UINTN) ((Address>>20) & 0xff)) << 24) + (((UINTN) ((Address>>15) & 0x1f)) << 16) + (((UINTN) ((Address>>12) & 0x07)) << 8) + ((UINTN) (Address & 0xfff ))))
39 @param Address Address that encodes the PCI Bus, Device, Function and
47 IN UINTN Address,
55 PCILIB_TO_COMMON_ADDRESS(Address),
70 @param Address Address that encodes the PCI Bus, Device, Function and
[all...] |
| /device/linaro/bootloader/edk2/MdePkg/Library/PeiPciSegmentLibPciCfg2/ |
| PciSegmentLib.c | 27 Assert the validity of a PCI Segment address.
28 A valid PCI Segment address should not contain 1's in bits 28..31 and 48..63
30 @param A The address to validate.
38 Translate PCI Lib address into format of PCI CFG2 PPI.
40 @param A The address that encodes the PCI Bus, Device, Function and
52 @param Address The address that encodes the PCI Segment, Bus, Device,
60 IN UINT64 Address
70 SegmentNumber = BitFieldRead64 (Address, 32, 63);
93 It reads and returns the PCI configuration register specified by Address,
[all...] |
