1 //===-- llvm/InlineAsm.h - Class to represent inline asm strings-*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This class represents the inline asm strings, which are Value*'s that are 11 // used as the callee operand of call instructions. InlineAsm's are uniqued 12 // like constants, and created via InlineAsm::get(...). 13 // 14 //===----------------------------------------------------------------------===// 15 16 #ifndef LLVM_INLINEASM_H 17 #define LLVM_INLINEASM_H 18 19 #include "llvm/Value.h" 20 #include <vector> 21 22 namespace llvm { 23 24 class PointerType; 25 class FunctionType; 26 class Module; 27 struct InlineAsmKeyType; 28 template<class ValType, class ValRefType, class TypeClass, class ConstantClass, 29 bool HasLargeKey> 30 class ConstantUniqueMap; 31 template<class ConstantClass, class TypeClass, class ValType> 32 struct ConstantCreator; 33 34 class InlineAsm : public Value { 35 friend struct ConstantCreator<InlineAsm, PointerType, InlineAsmKeyType>; 36 friend class ConstantUniqueMap<InlineAsmKeyType, const InlineAsmKeyType&, 37 PointerType, InlineAsm, false>; 38 39 InlineAsm(const InlineAsm &); // do not implement 40 void operator=(const InlineAsm&); // do not implement 41 42 std::string AsmString, Constraints; 43 bool HasSideEffects; 44 bool IsAlignStack; 45 46 InlineAsm(PointerType *Ty, const std::string &AsmString, 47 const std::string &Constraints, bool hasSideEffects, 48 bool isAlignStack); 49 virtual ~InlineAsm(); 50 51 /// When the ConstantUniqueMap merges two types and makes two InlineAsms 52 /// identical, it destroys one of them with this method. 53 void destroyConstant(); 54 public: 55 56 /// InlineAsm::get - Return the specified uniqued inline asm string. 57 /// 58 static InlineAsm *get(FunctionType *Ty, StringRef AsmString, 59 StringRef Constraints, bool hasSideEffects, 60 bool isAlignStack = false); 61 62 bool hasSideEffects() const { return HasSideEffects; } 63 bool isAlignStack() const { return IsAlignStack; } 64 65 /// getType - InlineAsm's are always pointers. 66 /// 67 PointerType *getType() const { 68 return reinterpret_cast<PointerType*>(Value::getType()); 69 } 70 71 /// getFunctionType - InlineAsm's are always pointers to functions. 72 /// 73 FunctionType *getFunctionType() const; 74 75 const std::string &getAsmString() const { return AsmString; } 76 const std::string &getConstraintString() const { return Constraints; } 77 78 /// Verify - This static method can be used by the parser to check to see if 79 /// the specified constraint string is legal for the type. This returns true 80 /// if legal, false if not. 81 /// 82 static bool Verify(FunctionType *Ty, StringRef Constraints); 83 84 // Constraint String Parsing 85 enum ConstraintPrefix { 86 isInput, // 'x' 87 isOutput, // '=x' 88 isClobber // '~x' 89 }; 90 91 typedef std::vector<std::string> ConstraintCodeVector; 92 93 struct SubConstraintInfo { 94 /// MatchingInput - If this is not -1, this is an output constraint where an 95 /// input constraint is required to match it (e.g. "0"). The value is the 96 /// constraint number that matches this one (for example, if this is 97 /// constraint #0 and constraint #4 has the value "0", this will be 4). 98 signed char MatchingInput; 99 /// Code - The constraint code, either the register name (in braces) or the 100 /// constraint letter/number. 101 ConstraintCodeVector Codes; 102 /// Default constructor. 103 SubConstraintInfo() : MatchingInput(-1) {} 104 }; 105 106 typedef std::vector<SubConstraintInfo> SubConstraintInfoVector; 107 struct ConstraintInfo; 108 typedef std::vector<ConstraintInfo> ConstraintInfoVector; 109 110 struct ConstraintInfo { 111 /// Type - The basic type of the constraint: input/output/clobber 112 /// 113 ConstraintPrefix Type; 114 115 /// isEarlyClobber - "&": output operand writes result before inputs are all 116 /// read. This is only ever set for an output operand. 117 bool isEarlyClobber; 118 119 /// MatchingInput - If this is not -1, this is an output constraint where an 120 /// input constraint is required to match it (e.g. "0"). The value is the 121 /// constraint number that matches this one (for example, if this is 122 /// constraint #0 and constraint #4 has the value "0", this will be 4). 123 signed char MatchingInput; 124 125 /// hasMatchingInput - Return true if this is an output constraint that has 126 /// a matching input constraint. 127 bool hasMatchingInput() const { return MatchingInput != -1; } 128 129 /// isCommutative - This is set to true for a constraint that is commutative 130 /// with the next operand. 131 bool isCommutative; 132 133 /// isIndirect - True if this operand is an indirect operand. This means 134 /// that the address of the source or destination is present in the call 135 /// instruction, instead of it being returned or passed in explicitly. This 136 /// is represented with a '*' in the asm string. 137 bool isIndirect; 138 139 /// Code - The constraint code, either the register name (in braces) or the 140 /// constraint letter/number. 141 ConstraintCodeVector Codes; 142 143 /// isMultipleAlternative - '|': has multiple-alternative constraints. 144 bool isMultipleAlternative; 145 146 /// multipleAlternatives - If there are multiple alternative constraints, 147 /// this array will contain them. Otherwise it will be empty. 148 SubConstraintInfoVector multipleAlternatives; 149 150 /// The currently selected alternative constraint index. 151 unsigned currentAlternativeIndex; 152 153 ///Default constructor. 154 ConstraintInfo(); 155 156 /// Copy constructor. 157 ConstraintInfo(const ConstraintInfo &other); 158 159 /// Parse - Analyze the specified string (e.g. "=*&{eax}") and fill in the 160 /// fields in this structure. If the constraint string is not understood, 161 /// return true, otherwise return false. 162 bool Parse(StringRef Str, ConstraintInfoVector &ConstraintsSoFar); 163 164 /// selectAlternative - Point this constraint to the alternative constraint 165 /// indicated by the index. 166 void selectAlternative(unsigned index); 167 }; 168 169 /// ParseConstraints - Split up the constraint string into the specific 170 /// constraints and their prefixes. If this returns an empty vector, and if 171 /// the constraint string itself isn't empty, there was an error parsing. 172 static ConstraintInfoVector ParseConstraints(StringRef ConstraintString); 173 174 /// ParseConstraints - Parse the constraints of this inlineasm object, 175 /// returning them the same way that ParseConstraints(str) does. 176 ConstraintInfoVector ParseConstraints() const { 177 return ParseConstraints(Constraints); 178 } 179 180 // Methods for support type inquiry through isa, cast, and dyn_cast: 181 static inline bool classof(const InlineAsm *) { return true; } 182 static inline bool classof(const Value *V) { 183 return V->getValueID() == Value::InlineAsmVal; 184 } 185 186 187 // These are helper methods for dealing with flags in the INLINEASM SDNode 188 // in the backend. 189 190 enum { 191 // Fixed operands on an INLINEASM SDNode. 192 Op_InputChain = 0, 193 Op_AsmString = 1, 194 Op_MDNode = 2, 195 Op_ExtraInfo = 3, // HasSideEffects, IsAlignStack 196 Op_FirstOperand = 4, 197 198 // Fixed operands on an INLINEASM MachineInstr. 199 MIOp_AsmString = 0, 200 MIOp_ExtraInfo = 1, // HasSideEffects, IsAlignStack 201 MIOp_FirstOperand = 2, 202 203 // Interpretation of the MIOp_ExtraInfo bit field. 204 Extra_HasSideEffects = 1, 205 Extra_IsAlignStack = 2, 206 207 // Inline asm operands map to multiple SDNode / MachineInstr operands. 208 // The first operand is an immediate describing the asm operand, the low 209 // bits is the kind: 210 Kind_RegUse = 1, // Input register, "r". 211 Kind_RegDef = 2, // Output register, "=r". 212 Kind_RegDefEarlyClobber = 3, // Early-clobber output register, "=&r". 213 Kind_Clobber = 4, // Clobbered register, "~r". 214 Kind_Imm = 5, // Immediate. 215 Kind_Mem = 6, // Memory operand, "m". 216 217 Flag_MatchingOperand = 0x80000000 218 }; 219 220 static unsigned getFlagWord(unsigned Kind, unsigned NumOps) { 221 assert(((NumOps << 3) & ~0xffff) == 0 && "Too many inline asm operands!"); 222 assert(Kind >= Kind_RegUse && Kind <= Kind_Mem && "Invalid Kind"); 223 return Kind | (NumOps << 3); 224 } 225 226 /// getFlagWordForMatchingOp - Augment an existing flag word returned by 227 /// getFlagWord with information indicating that this input operand is tied 228 /// to a previous output operand. 229 static unsigned getFlagWordForMatchingOp(unsigned InputFlag, 230 unsigned MatchedOperandNo) { 231 assert(MatchedOperandNo <= 0x7fff && "Too big matched operand"); 232 assert((InputFlag & ~0xffff) == 0 && "High bits already contain data"); 233 return InputFlag | Flag_MatchingOperand | (MatchedOperandNo << 16); 234 } 235 236 /// getFlagWordForRegClass - Augment an existing flag word returned by 237 /// getFlagWord with the required register class for the following register 238 /// operands. 239 /// A tied use operand cannot have a register class, use the register class 240 /// from the def operand instead. 241 static unsigned getFlagWordForRegClass(unsigned InputFlag, unsigned RC) { 242 // Store RC + 1, reserve the value 0 to mean 'no register class'. 243 ++RC; 244 assert(RC <= 0x7fff && "Too large register class ID"); 245 assert((InputFlag & ~0xffff) == 0 && "High bits already contain data"); 246 return InputFlag | (RC << 16); 247 } 248 249 static unsigned getKind(unsigned Flags) { 250 return Flags & 7; 251 } 252 253 static bool isRegDefKind(unsigned Flag){ return getKind(Flag) == Kind_RegDef;} 254 static bool isImmKind(unsigned Flag) { return getKind(Flag) == Kind_Imm; } 255 static bool isMemKind(unsigned Flag) { return getKind(Flag) == Kind_Mem; } 256 static bool isRegDefEarlyClobberKind(unsigned Flag) { 257 return getKind(Flag) == Kind_RegDefEarlyClobber; 258 } 259 static bool isClobberKind(unsigned Flag) { 260 return getKind(Flag) == Kind_Clobber; 261 } 262 263 /// getNumOperandRegisters - Extract the number of registers field from the 264 /// inline asm operand flag. 265 static unsigned getNumOperandRegisters(unsigned Flag) { 266 return (Flag & 0xffff) >> 3; 267 } 268 269 /// isUseOperandTiedToDef - Return true if the flag of the inline asm 270 /// operand indicates it is an use operand that's matched to a def operand. 271 static bool isUseOperandTiedToDef(unsigned Flag, unsigned &Idx) { 272 if ((Flag & Flag_MatchingOperand) == 0) 273 return false; 274 Idx = (Flag & ~Flag_MatchingOperand) >> 16; 275 return true; 276 } 277 278 /// hasRegClassConstraint - Returns true if the flag contains a register 279 /// class constraint. Sets RC to the register class ID. 280 static bool hasRegClassConstraint(unsigned Flag, unsigned &RC) { 281 if (Flag & Flag_MatchingOperand) 282 return false; 283 unsigned High = Flag >> 16; 284 // getFlagWordForRegClass() uses 0 to mean no register class, and otherwise 285 // stores RC + 1. 286 if (!High) 287 return false; 288 RC = High - 1; 289 return true; 290 } 291 292 }; 293 294 } // End llvm namespace 295 296 #endif 297
