| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| CallingConvLower.cpp | 122 unsigned NumOps = Outs.size();
123 for (unsigned i = 0; i != NumOps; ++i) {
141 unsigned NumOps = ArgVTs.size();
142 for (unsigned i = 0; i != NumOps; ++i) {
|
| /external/llvm/lib/CodeGen/ |
| CallingConvLower.cpp | 123 unsigned NumOps = Outs.size();
124 for (unsigned i = 0; i != NumOps; ++i) {
141 unsigned NumOps = ArgVTs.size();
142 for (unsigned i = 0; i != NumOps; ++i) {
|
| MachineRegisterInfo.cpp | 166 unsigned NumOps = MI->getNumOperands();
167 if (!(MO >= MO0 && MO < MO0+NumOps)) {
261 /// Move NumOps operands from Src to Dst, updating use-def lists as needed.
270 unsigned NumOps) {
271 assert(Src != Dst && NumOps && "Noop moveOperands");
275 if (Dst >= Src && Dst < Src + NumOps) {
277 Dst += NumOps - 1;
278 Src += NumOps - 1;
307 } while (--NumOps);
|
| /external/llvm/lib/IR/ |
| Instructions.cpp | 133 unsigned NumOps = e + e / 2;
134 if (NumOps < 2) NumOps = 2; // 2 op PHI nodes are VERY common.
136 ReservedSpace = NumOps;
[all...] |
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsMCTargetDesc.cpp | 127 unsigned NumOps = Inst.getNumOperands();
128 if (NumOps == 0)
130 switch (Info->get(Inst.getOpcode()).OpInfo[NumOps - 1].OperandType) {
134 Target = Inst.getOperand(NumOps - 1).getImm();
138 Target = Addr + Inst.getOperand(NumOps - 1).getImm();
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGSDNodes.cpp | 204 unsigned NumOps = Node->getNumOperands();
205 if (Node->getOperand(NumOps-1).getValueType() == MVT::Other)
206 Chain = Node->getOperand(NumOps-1).getNode();
[all...] |
| LegalizeTypes.cpp | 433 for (unsigned i = 0, NumOps = Node.getNumOperands(); i < NumOps; ++i)
[all...] |
| ScheduleDAGFast.cpp | 493 unsigned NumOps = Node->getNumOperands();
494 if (Node->getOperand(NumOps-1).getValueType() == MVT::Glue)
495 --NumOps; // Ignore the glue operand.
497 for (unsigned i = InlineAsm::Op_FirstOperand; i != NumOps;) {
681 unsigned NumOps = N->getNumOperands();
682 if (unsigned NumLeft = NumOps) {
688 if (NumLeft == NumOps && Op.getValueType() == MVT::Glue) {
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86CodeEmitter.cpp | 159 unsigned NumOps = Desc.getNumOperands();
160 if (NumOps) {
161 bool isTwoAddr = NumOps > 1 &&
166 for (unsigned e = NumOps; i != e; ++i) {
184 for (unsigned e = NumOps; i != e; ++i) {
196 for (; i != NumOps; ++i) {
213 if (NumOps > e && X86InstrInfo::isX86_64ExtendedReg(MI.getOperand(e)))
230 for (unsigned e = NumOps; i != e; ++i) {
717 unsigned NumOps = Desc->getNumOperands();
719 if (NumOps > 1 && Desc->getOperandConstraint(1, MCOI::TIED_TO) != -1
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelDAGToDAG.cpp | 161 unsigned NumOps = N->getNumOperands();
172 SDValue Glue = N->getGluedNode() ? N->getOperand(NumOps-1)
177 for(unsigned i = 0, e = N->getGluedNode() ? NumOps - 1 : NumOps; i < e; ++i) {
222 assert((i+2 < NumOps) && "Invalid number of operands in inline asm");
|
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86BaseInfo.h | 631 unsigned NumOps = Desc.getNumOperands();
633 if (NumOps > 1 && Desc.getOperandConstraint(1, MCOI::TIED_TO) == 0)
635 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 &&
640 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 &&
641 Desc.getOperandConstraint(NumOps - 1, MCOI::TIED_TO) == 1)
645 else if (NumOps > 2 && Desc.getOperandConstraint(NumOps - 2, MCOI::TIED_TO) == 0)
|
| X86MCCodeEmitter.cpp | 707 unsigned NumOps = Desc.getNumOperands();
836 unsigned RcOperand = NumOps-1;
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86CallFrameOptimization.cpp | 515 unsigned NumOps = DefMov->getDesc().getNumOperands();
516 for (unsigned i = NumOps - X86::AddrNumOperands; i != NumOps; ++i)
|
| /external/llvm/utils/TableGen/ |
| CodeGenInstruction.cpp | 74 unsigned NumOps = 1;
97 NumOps = NumArgs;
123 NumOps, MIOpInfo);
124 MIOperandNo += NumOps;
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/ |
| X86MCCodeEmitter.cpp | 631 unsigned NumOps = MI.getNumOperands();
633 bool isTwoAddr = NumOps > 1 &&
638 for (; i != NumOps; ++i) {
656 for (; i != NumOps; ++i) {
668 for (; i != NumOps; ++i) {
685 if (NumOps > e && MI.getOperand(e).isReg() &&
704 for (unsigned e = NumOps; i != e; ++i) {
850 unsigned NumOps = Desc.getNumOperands();
852 if (NumOps > 1 && Desc.getOperandConstraint(1, MCOI::TIED_TO) != -1)
854 else if (NumOps > 2 && Desc.getOperandConstraint(NumOps-1, MCOI::TIED_TO)== 0
[all...] |
| /external/swiftshader/third_party/LLVM/utils/TableGen/ |
| CodeGenInstruction.cpp | 71 unsigned NumOps = 1;
92 NumOps = NumArgs;
117 OperandType, MIOperandNo, NumOps,
119 MIOperandNo += NumOps;
|
| DAGISelMatcherEmitter.cpp | 647 unsigned NumOps = P.getNumOperands();
650 ++NumOps; // Get the chained node too.
653 OS << " Result.resize(NextRes+" << NumOps << ");\n";
668 for (unsigned i = 0; i != NumOps; ++i)
|
| AsmWriterEmitter.cpp | 352 unsigned NumOps = NumInstOpsHandled[InstIdxs[i]];
353 assert(NumOps <= Inst->Operands.size() &&
356 Inst->Operands.begin()+NumOps);
765 unsigned NumOps = 0;
769 ++NumOps;
773 return NumOps;
777 unsigned NumOps = 0;
789 ++NumOps;
794 return NumOps;
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonGenPredicate.cpp | 353 unsigned NumOps = MI->getNumOperands();
354 for (unsigned i = 0; i < NumOps; ++i) {
390 NumOps = 2;
406 for (unsigned i = 1; i < NumOps; ++i) {
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGFast.cpp | 482 unsigned NumOps = Node->getNumOperands();
483 if (Node->getOperand(NumOps-1).getValueType() == MVT::Glue)
484 --NumOps; // Ignore the glue operand.
486 for (unsigned i = InlineAsm::Op_FirstOperand; i != NumOps;) {
|
| LegalizeTypes.cpp | 419 for (unsigned i = 0, NumOps = I->getNumOperands(); i < NumOps; ++i)
[all...] |
| ScheduleDAGSDNodes.cpp | 173 unsigned NumOps = Node->getNumOperands();
174 if (Node->getOperand(NumOps-1).getValueType() == MVT::Other)
175 Chain = Node->getOperand(NumOps-1).getNode();
|
| /external/llvm/lib/Target/ARM/ |
| Thumb2SizeReduction.cpp | 767 unsigned NumOps = MCID.getNumOperands();
768 HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR);
769 if (HasCC && MI->getOperand(NumOps-1).isDead())
793 unsigned NumOps = MCID.getNumOperands();
795 if (i < NumOps && MCID.OpInfo[i].isOptionalDef())
862 unsigned NumOps = MCID.getNumOperands();
863 HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR);
864 if (HasCC && MI->getOperand(NumOps-1).isDead())
888 unsigned NumOps = MCID.getNumOperands();
890 if (i < NumOps && MCID.OpInfo[i].isOptionalDef()
[all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| Scalarizer.cpp | 579 unsigned NumOps = PHI.getNumOperands();
581 Res[I] = Builder.CreatePHI(VT->getElementType(), NumOps,
584 for (unsigned I = 0; I < NumOps; ++I) {
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| Thumb2SizeReduction.cpp | 629 unsigned NumOps = MCID.getNumOperands();
630 HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR);
631 if (HasCC && MI->getOperand(NumOps-1).isDead())
655 unsigned NumOps = MCID.getNumOperands();
657 if (i < NumOps && MCID.OpInfo[i].isOptionalDef())
719 unsigned NumOps = MCID.getNumOperands();
720 HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR);
721 if (HasCC && MI->getOperand(NumOps-1).isDead())
745 unsigned NumOps = MCID.getNumOperands();
747 if (i < NumOps && MCID.OpInfo[i].isOptionalDef()
[all...] |
