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      1 /*
      2  * Copyright  2012 Intel Corporation
      3  *
      4  * Permission is hereby granted, free of charge, to any person obtaining a
      5  * copy of this software and associated documentation files (the "Software"),
      6  * to deal in the Software without restriction, including without limitation
      7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8  * and/or sell copies of the Software, and to permit persons to whom the
      9  * Software is furnished to do so, subject to the following conditions:
     10  *
     11  * The above copyright notice and this permission notice (including the next
     12  * paragraph) shall be included in all copies or substantial portions of the
     13  * Software.
     14  *
     15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
     19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
     21  * IN THE SOFTWARE.
     22  */
     23 
     24 #ifndef BLORP_PRIV_H
     25 #define BLORP_PRIV_H
     26 
     27 #include <stdint.h>
     28 
     29 #include "compiler/nir/nir.h"
     30 #include "brw_compiler.h"
     31 
     32 #include "blorp.h"
     33 
     34 #ifdef __cplusplus
     35 extern "C" {
     36 #endif
     37 
     38 /**
     39  * Binding table indices used by BLORP.
     40  */
     41 enum {
     42    BLORP_RENDERBUFFER_BT_INDEX,
     43    BLORP_TEXTURE_BT_INDEX,
     44    BLORP_NUM_BT_ENTRIES
     45 };
     46 
     47 struct brw_blorp_surface_info
     48 {
     49    bool enabled;
     50 
     51    struct isl_surf surf;
     52    struct blorp_address addr;
     53 
     54    struct isl_surf aux_surf;
     55    struct blorp_address aux_addr;
     56    enum isl_aux_usage aux_usage;
     57 
     58    union isl_color_value clear_color;
     59 
     60    struct isl_view view;
     61 
     62    /* Z offset into a 3-D texture or slice of a 2-D array texture. */
     63    uint32_t z_offset;
     64 
     65    uint32_t tile_x_sa, tile_y_sa;
     66 };
     67 
     68 void
     69 brw_blorp_surface_info_init(struct blorp_context *blorp,
     70                             struct brw_blorp_surface_info *info,
     71                             const struct blorp_surf *surf,
     72                             unsigned int level, unsigned int layer,
     73                             enum isl_format format, bool is_render_target);
     74 
     75 
     76 struct brw_blorp_coord_transform
     77 {
     78    float multiplier;
     79    float offset;
     80 };
     81 
     82 /**
     83  * Bounding rectangle telling pixel discard which pixels are not to be
     84  * touched. This is needed in when surfaces are configured as something else
     85  * what they really are:
     86  *
     87  *    - writing W-tiled stencil as Y-tiled
     88  *    - writing interleaved multisampled as single sampled.
     89  *
     90  * See blorp_nir_discard_if_outside_rect().
     91  */
     92 struct brw_blorp_discard_rect
     93 {
     94    uint32_t x0;
     95    uint32_t x1;
     96    uint32_t y0;
     97    uint32_t y1;
     98 };
     99 
    100 /**
    101  * Grid needed for blended and scaled blits of integer formats, see
    102  * blorp_nir_manual_blend_bilinear().
    103  */
    104 struct brw_blorp_rect_grid
    105 {
    106    float x1;
    107    float y1;
    108    float pad[2];
    109 };
    110 
    111 struct blorp_surf_offset {
    112    uint32_t x;
    113    uint32_t y;
    114 };
    115 
    116 struct brw_blorp_wm_inputs
    117 {
    118    uint32_t clear_color[4];
    119 
    120    struct brw_blorp_discard_rect discard_rect;
    121    struct brw_blorp_rect_grid rect_grid;
    122    struct brw_blorp_coord_transform coord_transform[2];
    123 
    124    struct blorp_surf_offset src_offset;
    125    struct blorp_surf_offset dst_offset;
    126 
    127    /* Minimum layer setting works for all the textures types but texture_3d
    128     * for which the setting has no effect. Use the z-coordinate instead.
    129     */
    130    uint32_t src_z;
    131 
    132    /* Pad out to an integral number of registers */
    133    uint32_t pad[1];
    134 };
    135 
    136 #define BLORP_CREATE_NIR_INPUT(shader, name, type) ({ \
    137    nir_variable *input = nir_variable_create((shader), nir_var_shader_in, \
    138                                              type, #name); \
    139    if ((shader)->stage == MESA_SHADER_FRAGMENT) \
    140       input->data.interpolation = INTERP_MODE_FLAT; \
    141    input->data.location = VARYING_SLOT_VAR0 + \
    142       offsetof(struct brw_blorp_wm_inputs, name) / (4 * sizeof(float)); \
    143    input->data.location_frac = \
    144       (offsetof(struct brw_blorp_wm_inputs, name) / sizeof(float)) % 4; \
    145    input; \
    146 })
    147 
    148 struct blorp_vs_inputs {
    149    uint32_t base_layer;
    150    uint32_t _instance_id; /* Set in hardware by SGVS */
    151    uint32_t pad[2];
    152 };
    153 
    154 static inline unsigned
    155 brw_blorp_get_urb_length(const struct brw_wm_prog_data *prog_data)
    156 {
    157    if (prog_data == NULL)
    158       return 1;
    159 
    160    /* From the BSpec: 3D Pipeline - Strips and Fans - 3DSTATE_SBE
    161     *
    162     * read_length = ceiling((max_source_attr+1)/2)
    163     */
    164    return MAX2((prog_data->num_varying_inputs + 1) / 2, 1);
    165 }
    166 
    167 struct blorp_params
    168 {
    169    uint32_t x0;
    170    uint32_t y0;
    171    uint32_t x1;
    172    uint32_t y1;
    173    float z;
    174    uint8_t stencil_mask;
    175    uint8_t stencil_ref;
    176    struct brw_blorp_surface_info depth;
    177    struct brw_blorp_surface_info stencil;
    178    uint32_t depth_format;
    179    struct brw_blorp_surface_info src;
    180    struct brw_blorp_surface_info dst;
    181    enum blorp_hiz_op hiz_op;
    182    enum blorp_fast_clear_op fast_clear_op;
    183    bool color_write_disable[4];
    184    struct brw_blorp_wm_inputs wm_inputs;
    185    struct blorp_vs_inputs vs_inputs;
    186    unsigned num_samples;
    187    unsigned num_draw_buffers;
    188    unsigned num_layers;
    189    uint32_t vs_prog_kernel;
    190    struct brw_vs_prog_data *vs_prog_data;
    191    uint32_t wm_prog_kernel;
    192    struct brw_wm_prog_data *wm_prog_data;
    193 
    194    bool use_pre_baked_binding_table;
    195    uint32_t pre_baked_binding_table_offset;
    196 };
    197 
    198 void blorp_params_init(struct blorp_params *params);
    199 
    200 enum blorp_shader_type {
    201    BLORP_SHADER_TYPE_BLIT,
    202    BLORP_SHADER_TYPE_CLEAR,
    203    BLORP_SHADER_TYPE_LAYER_OFFSET_VS,
    204 };
    205 
    206 struct brw_blorp_blit_prog_key
    207 {
    208    enum blorp_shader_type shader_type; /* Must be BLORP_SHADER_TYPE_BLIT */
    209 
    210    /* Number of samples per pixel that have been configured in the surface
    211     * state for texturing from.
    212     */
    213    unsigned tex_samples;
    214 
    215    /* MSAA layout that has been configured in the surface state for texturing
    216     * from.
    217     */
    218    enum isl_msaa_layout tex_layout;
    219 
    220    enum isl_aux_usage tex_aux_usage;
    221 
    222    /* Actual number of samples per pixel in the source image. */
    223    unsigned src_samples;
    224 
    225    /* Actual MSAA layout used by the source image. */
    226    enum isl_msaa_layout src_layout;
    227 
    228    /* Number of bits per channel in the source image. */
    229    uint8_t src_bpc;
    230 
    231    /* Number of samples per pixel that have been configured in the render
    232     * target.
    233     */
    234    unsigned rt_samples;
    235 
    236    /* MSAA layout that has been configured in the render target. */
    237    enum isl_msaa_layout rt_layout;
    238 
    239    /* Actual number of samples per pixel in the destination image. */
    240    unsigned dst_samples;
    241 
    242    /* Actual MSAA layout used by the destination image. */
    243    enum isl_msaa_layout dst_layout;
    244 
    245    /* Number of bits per channel in the destination image. */
    246    uint8_t dst_bpc;
    247 
    248    /* Type of the data to be read from the texture (one of
    249     * nir_type_(int|uint|float)).
    250     */
    251    nir_alu_type texture_data_type;
    252 
    253    /* True if the source image is W tiled.  If true, the surface state for the
    254     * source image must be configured as Y tiled, and tex_samples must be 0.
    255     */
    256    bool src_tiled_w;
    257 
    258    /* True if the destination image is W tiled.  If true, the surface state
    259     * for the render target must be configured as Y tiled, and rt_samples must
    260     * be 0.
    261     */
    262    bool dst_tiled_w;
    263 
    264    /* True if the destination is an RGB format.  If true, the surface state
    265     * for the render target must be configured as red with three times the
    266     * normal width.  We need to do this because you cannot render to
    267     * non-power-of-two formats.
    268     */
    269    bool dst_rgb;
    270 
    271    /* True if all source samples should be blended together to produce each
    272     * destination pixel.  If true, src_tiled_w must be false, tex_samples must
    273     * equal src_samples, and tex_samples must be nonzero.
    274     */
    275    bool blend;
    276 
    277    /* True if the rectangle being sent through the rendering pipeline might be
    278     * larger than the destination rectangle, so the WM program should kill any
    279     * pixels that are outside the destination rectangle.
    280     */
    281    bool use_kill;
    282 
    283    /**
    284     * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
    285     * than one sample per pixel.
    286     */
    287    bool persample_msaa_dispatch;
    288 
    289    /* True for scaled blitting. */
    290    bool blit_scaled;
    291 
    292    /* True if this blit operation may involve intratile offsets on the source.
    293     * In this case, we need to add the offset before texturing.
    294     */
    295    bool need_src_offset;
    296 
    297    /* True if this blit operation may involve intratile offsets on the
    298     * destination.  In this case, we need to add the offset to gl_FragCoord.
    299     */
    300    bool need_dst_offset;
    301 
    302    /* Scale factors between the pixel grid and the grid of samples. We're
    303     * using grid of samples for bilinear filetring in multisample scaled blits.
    304     */
    305    float x_scale;
    306    float y_scale;
    307 
    308    /* True for blits with filter = GL_LINEAR. */
    309    bool bilinear_filter;
    310 };
    311 
    312 /**
    313  * \name BLORP internals
    314  * \{
    315  *
    316  * Used internally by gen6_blorp_exec() and gen7_blorp_exec().
    317  */
    318 
    319 void brw_blorp_init_wm_prog_key(struct brw_wm_prog_key *wm_key);
    320 
    321 const unsigned *
    322 blorp_compile_fs(struct blorp_context *blorp, void *mem_ctx,
    323                  struct nir_shader *nir,
    324                  const struct brw_wm_prog_key *wm_key,
    325                  bool use_repclear,
    326                  struct brw_wm_prog_data *wm_prog_data,
    327                  unsigned *program_size);
    328 
    329 const unsigned *
    330 blorp_compile_vs(struct blorp_context *blorp, void *mem_ctx,
    331                  struct nir_shader *nir,
    332                  struct brw_vs_prog_data *vs_prog_data,
    333                  unsigned *program_size);
    334 
    335 /** \} */
    336 
    337 #ifdef __cplusplus
    338 } /* end extern "C" */
    339 #endif /* __cplusplus */
    340 
    341 #endif /* BLORP_PRIV_H */
    342