| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_vs_state.c | 44 const struct brw_stage_prog_data *prog_data = stage_state->prog_data; local
46 brw_vue_prog_data(stage_state->prog_data);
63 if (prog_data->use_alt_mode)
83 prog_data->binding_table.size_bytes / 4;
85 if (prog_data->total_scratch != 0) {
96 vs->thread3.const_urb_entry_read_length = prog_data->curb_read_length;
97 vs->thread3.dispatch_grf_start_reg = prog_data->dispatch_grf_start_reg;
173 if (prog_data->total_scratch != 0) {
|
| gen8_hs_state.c | 37 const struct brw_stage_prog_data *prog_data = stage_state->prog_data; local
39 brw_tcs_prog_data(stage_state->prog_data);
46 SET_FIELD(prog_data->binding_table.size_bytes / 4,
55 if (prog_data->total_scratch) {
64 SET_FIELD(prog_data->dispatch_grf_start_reg,
|
| gen6_vs_state.c | 45 const struct brw_stage_prog_data *prog_data = brw->vs.base.prog_data; local
48 gen6_upload_push_constants(brw, &vp->program, prog_data, stage_state,
78 const struct brw_stage_prog_data *prog_data = stage_state->prog_data; local
80 brw_vue_prog_data(stage_state->prog_data);
120 if (prog_data->use_alt_mode)
128 ((prog_data->binding_table.size_bytes / 4) <<
131 if (prog_data->total_scratch) {
139 OUT_BATCH((prog_data->dispatch_grf_start_reg <
[all...] |
| gen7_hs_state.c | 40 const struct brw_stage_prog_data *prog_data = brw->tcs.base.prog_data; local
43 gen6_upload_push_constants(brw, &tcp->program, prog_data, stage_state,
71 const struct brw_stage_prog_data *prog_data = stage_state->prog_data; local
73 brw_tcs_prog_data(stage_state->prog_data);
80 SET_FIELD(prog_data->binding_table.size_bytes / 4,
88 if (prog_data->total_scratch) {
96 SET_FIELD(prog_data->dispatch_grf_start_reg,
|
| gen7_vs_state.c | 37 const struct brw_stage_prog_data *prog_data = stage_state->prog_data; local
39 brw_vue_prog_data(stage_state->prog_data);
47 if (prog_data->use_alt_mode)
56 ((prog_data->binding_table.size_bytes / 4) <<
59 if (prog_data->total_scratch) {
67 OUT_BATCH((prog_data->dispatch_grf_start_reg <<
|
| gen8_ds_state.c | 38 const struct brw_stage_prog_data *prog_data = stage_state->prog_data; local
40 brw_vue_prog_data(stage_state->prog_data);
42 brw_tes_prog_data(stage_state->prog_data);
52 SET_FIELD(prog_data->binding_table.size_bytes / 4,
54 if (prog_data->total_scratch) {
62 OUT_BATCH(SET_FIELD(prog_data->dispatch_grf_start_reg,
|
| gen8_vs_state.c | 40 const struct brw_stage_prog_data *prog_data = stage_state->prog_data; local
42 brw_vue_prog_data(stage_state->prog_data);
47 if (prog_data->use_alt_mode)
57 ((prog_data->binding_table.size_bytes / 4) <<
60 if (prog_data->total_scratch) {
69 OUT_BATCH((prog_data->dispatch_grf_start_reg <<
|
| brw_gs_surface_state.c | 50 const struct brw_stage_prog_data *prog_data = brw->gs.base.prog_data; local
55 stage_state, prog_data);
82 struct brw_stage_prog_data *prog_data = brw->gs.base.prog_data; local
85 &brw->gs.base, prog_data);
107 brw_upload_abo_surfaces(brw, gp, &brw->gs.base, brw->gs.base.prog_data);
131 brw->gs.base.prog_data);
|
| brw_tcs_surface_state.c | 50 const struct brw_stage_prog_data *prog_data = brw->tcs.base.prog_data; local
55 stage_state, prog_data);
82 struct brw_stage_prog_data *prog_data = brw->tcs.base.prog_data; local
85 &brw->tcs.base, prog_data);
108 brw->tcs.base.prog_data);
132 brw->tcs.base.prog_data);
|
| brw_tes_surface_state.c | 50 const struct brw_stage_prog_data *prog_data = brw->tes.base.prog_data; local
55 stage_state, prog_data);
82 struct brw_stage_prog_data *prog_data = brw->tes.base.prog_data; local
85 &brw->tes.base, prog_data);
108 brw->tes.base.prog_data);
132 brw->tes.base.prog_data);
|
| brw_wm_iz.cpp | 126 struct brw_wm_prog_data *prog_data = brw_wm_prog_data(this->prog_data); local
145 prog_data->uses_src_depth =
147 if (wm_iz_table[lookup].sd_present || prog_data->uses_src_depth ||
|
| brw_wm_state.c | 84 const struct brw_wm_prog_data *prog_data = local
85 brw_wm_prog_data(brw->wm.base.prog_data);
92 if (prog_data->dispatch_8 && prog_data->dispatch_16) {
97 assert(prog_data->base.dispatch_grf_start_reg ==
98 prog_data->dispatch_grf_start_reg_2);
102 wm->wm5.enable_8_pix = prog_data->dispatch_8;
103 wm->wm5.enable_16_pix = prog_data->dispatch_16;
105 if (prog_data->dispatch_8 || prog_data->dispatch_16)
[all...] |
| gen6_gs_state.c | 44 struct brw_stage_prog_data *prog_data = brw->gs.base.prog_data; local
47 gen6_upload_push_constants(brw, &gp->program, prog_data, stage_state,
79 (brw->ff_gs.prog_data->urb_read_length << GEN6_GS_URB_READ_LENGTH_SHIFT));
86 (brw->ff_gs.prog_data->svbi_postincrement_value <<
100 const struct brw_stage_prog_data *prog_data = stage_state->prog_data; local
102 brw_vue_prog_data(stage_state->prog_data);
143 ((prog_data->binding_table.size_bytes / 4) <<
146 if (prog_data->total_scratch)
[all...] |
| gen7_ds_state.c | 39 const struct brw_stage_prog_data *prog_data = brw->tes.base.prog_data; local
41 gen6_upload_push_constants(brw, &tep->program, prog_data, stage_state,
69 const struct brw_stage_prog_data *prog_data = stage_state->prog_data; local
71 brw_vue_prog_data(stage_state->prog_data);
73 brw_tes_prog_data(stage_state->prog_data);
84 SET_FIELD(prog_data->binding_table.size_bytes / 4,
86 if (prog_data->total_scratch) {
93 OUT_BATCH(SET_FIELD(prog_data->dispatch_grf_start_reg
[all...] |
| gen7_gs_state.c | 39 const struct brw_stage_prog_data *prog_data = stage_state->prog_data; local
41 brw_vue_prog_data(stage_state->prog_data);
43 brw_gs_prog_data(stage_state->prog_data);
66 ((prog_data->binding_table.size_bytes / 4) <<
69 if (prog_data->total_scratch) {
84 (prog_data->dispatch_grf_start_reg <<
|
| gen8_gs_state.c | 37 const struct brw_stage_prog_data *prog_data = stage_state->prog_data; local
39 brw_vue_prog_data(stage_state->prog_data);
41 brw_gs_prog_data(stage_state->prog_data);
58 ((prog_data->binding_table.size_bytes / 4) <<
61 if (prog_data->total_scratch) {
80 (prog_data->dispatch_grf_start_reg <<
|
| gen6_wm_state.c | 47 const struct brw_stage_prog_data *prog_data = brw->wm.base.prog_data; local
51 gen6_upload_push_constants(brw, &fp->program, prog_data,
74 const struct brw_wm_prog_data *prog_data,
91 if (prog_data->base.nr_params == 0) {
124 if (prog_data->base.use_alt_mode)
130 dw2 |= ((prog_data->base.binding_table.size_bytes / 4) <<
135 if (prog_data->dispatch_8)
138 if (prog_data->dispatch_16)
141 dw4 |= prog_data->base.dispatch_grf_start_reg <
243 const struct brw_wm_prog_data *prog_data = local
[all...] |
| gen7_wm_state.c | 41 const struct brw_wm_prog_data *prog_data = local
42 brw_wm_prog_data(brw->wm.base.prog_data);
43 bool writes_depth = prog_data->computed_depth_mode != BRW_PSCDEPTH_OFF;
62 if (prog_data->uses_src_depth)
65 if (prog_data->uses_src_w)
68 dw1 |= prog_data->computed_depth_mode << GEN7_WM_COMPUTED_DEPTH_MODE_SHIFT;
69 dw1 |= prog_data->barycentric_interp_modes <<
75 if (prog_data->uses_kill ||
78 prog_data->uses_omask) {
84 prog_data->has_side_effects || dw1 & GEN7_WM_KILL_ENABLE)
256 const struct brw_wm_prog_data *prog_data = local
[all...] |
| gen8_ps_state.c | 33 const struct brw_wm_prog_data *prog_data)
39 dw1 |= prog_data->computed_depth_mode << GEN8_PSX_COMPUTED_DEPTH_MODE_SHIFT;
41 if (prog_data->uses_kill)
44 if (prog_data->num_varying_inputs != 0)
47 if (prog_data->uses_src_depth)
50 if (prog_data->uses_src_w)
53 if (prog_data->persample_dispatch)
57 if (prog_data->uses_sample_mask) {
59 if (prog_data->post_depth_coverage)
61 else if (prog_data->inner_coverage && ctx->IntelConservativeRasterization
288 const struct brw_wm_prog_data *prog_data = local
[all...] |
| brw_compute.c | 118 const struct brw_cs_prog_data *prog_data = local
119 brw_cs_prog_data(brw->cs.base.prog_data);
133 const unsigned simd_size = prog_data->simd_size;
134 unsigned group_size = prog_data->local_size[0] *
135 prog_data->local_size[1] * prog_data->local_size[2];
|
| brw_cs.c | 40 struct brw_cs_prog_data *prog_data)
45 prog_data->binding_table.work_groups_start = next_binding_table_offset;
48 brw_assign_common_binding_table_offsets(devinfo, prog, &prog_data->base,
62 struct brw_cs_prog_data prog_data; local
66 memset(&prog_data, 0, sizeof(prog_data));
78 prog_data.base.total_shared = cp->program.info.cs.shared_size;
81 assign_cs_binding_table_offsets(devinfo, &cp->program, &prog_data);
84 * prog_data associated with the compiled program, and which will be freed
90 prog_data.thread_local_id_index = param_count++
[all...] |
| brw_ff_gs.h | 76 struct brw_ff_gs_prog_data prog_data; member in struct:brw_ff_gs_compile
|
| brw_vs_surface_state.c | 57 const struct brw_stage_prog_data *prog_data)
60 uint32_t surf_index = prog_data->binding_table.pull_constants_start;
62 if (!prog_data->nr_pull_params) {
76 uint32_t size = prog_data->nr_pull_params * 4;
84 for (i = 0; i < prog_data->nr_pull_params; i++) {
85 constants[i] = *prog_data->pull_param[i];
89 for (i = 0; i < ALIGN(prog_data->nr_pull_params, 4) / 4; i++) {
119 const struct brw_stage_prog_data *prog_data = brw->vs.base.prog_data; local
124 stage_state, prog_data);
[all...] |
| gen6_sol.c | 146 struct brw_stage_prog_data *prog_data = brw->gs.base.prog_data; local
150 prog_data->binding_table.size_bytes > 0;
|
| gen7_cs_state.c | 40 if (!brw->cs.base.prog_data)
47 struct brw_stage_prog_data *prog_data = stage_state->prog_data; local
48 struct brw_cs_prog_data *cs_prog_data = brw_cs_prog_data(prog_data);
54 prog_data->binding_table.shader_time_start],
60 prog_data->binding_table.size_bytes,
67 if (prog_data->total_scratch) {
148 prog_data->binding_table.size_bytes);
169 encode_slm_size(devinfo->gen, prog_data->total_shared);
219 const struct brw_stage_prog_data *prog_data local
321 const struct brw_stage_prog_data *prog_data = brw->cs.base.prog_data; local
[all...] |
