1 /* 2 * Copyright 2011 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 */ 23 24 #include "brw_context.h" 25 #include "brw_state.h" 26 #include "brw_defines.h" 27 #include "brw_util.h" 28 #include "program/prog_parameter.h" 29 #include "program/prog_statevars.h" 30 #include "intel_batchbuffer.h" 31 32 static void 33 upload_vs_state(struct brw_context *brw) 34 { 35 const struct gen_device_info *devinfo = &brw->screen->devinfo; 36 const struct brw_stage_state *stage_state = &brw->vs.base; 37 uint32_t floating_point_mode = 0; 38 39 /* BRW_NEW_VS_PROG_DATA */ 40 const struct brw_stage_prog_data *prog_data = stage_state->prog_data; 41 const struct brw_vue_prog_data *vue_prog_data = 42 brw_vue_prog_data(stage_state->prog_data); 43 44 assert(vue_prog_data->dispatch_mode == DISPATCH_MODE_SIMD8 || 45 vue_prog_data->dispatch_mode == DISPATCH_MODE_4X2_DUAL_OBJECT); 46 47 if (prog_data->use_alt_mode) 48 floating_point_mode = GEN6_VS_FLOATING_POINT_MODE_ALT; 49 50 BEGIN_BATCH(9); 51 OUT_BATCH(_3DSTATE_VS << 16 | (9 - 2)); 52 OUT_BATCH(stage_state->prog_offset); 53 OUT_BATCH(0); 54 OUT_BATCH(floating_point_mode | 55 ((ALIGN(stage_state->sampler_count, 4) / 4) << 56 GEN6_VS_SAMPLER_COUNT_SHIFT) | 57 ((prog_data->binding_table.size_bytes / 4) << 58 GEN6_VS_BINDING_TABLE_ENTRY_COUNT_SHIFT)); 59 60 if (prog_data->total_scratch) { 61 OUT_RELOC64(stage_state->scratch_bo, 62 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 63 ffs(stage_state->per_thread_scratch) - 11); 64 } else { 65 OUT_BATCH(0); 66 OUT_BATCH(0); 67 } 68 69 OUT_BATCH((prog_data->dispatch_grf_start_reg << 70 GEN6_VS_DISPATCH_START_GRF_SHIFT) | 71 (vue_prog_data->urb_read_length << 72 GEN6_VS_URB_READ_LENGTH_SHIFT) | 73 (0 << GEN6_VS_URB_ENTRY_READ_OFFSET_SHIFT)); 74 75 uint32_t simd8_enable = 76 vue_prog_data->dispatch_mode == DISPATCH_MODE_SIMD8 ? 77 GEN8_VS_SIMD8_ENABLE : 0; 78 OUT_BATCH(((devinfo->max_vs_threads - 1) << HSW_VS_MAX_THREADS_SHIFT) | 79 GEN6_VS_STATISTICS_ENABLE | 80 simd8_enable | 81 GEN6_VS_ENABLE); 82 83 OUT_BATCH(vue_prog_data->cull_distance_mask); 84 ADVANCE_BATCH(); 85 } 86 87 const struct brw_tracked_state gen8_vs_state = { 88 .dirty = { 89 .mesa = 0, 90 .brw = BRW_NEW_BATCH | 91 BRW_NEW_BLORP | 92 BRW_NEW_CONTEXT | 93 BRW_NEW_VS_PROG_DATA, 94 }, 95 .emit = upload_vs_state, 96 }; 97
