| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| gen7_gs_state.c | 77 uint32_t dw4 = local
135 OUT_BATCH(dw4);
|
| gen6_wm_state.c | 83 uint32_t dw2, dw4, dw5, dw6, ksp0, ksp2; local
116 dw2 = dw4 = dw5 = dw6 = ksp2 = 0;
119 dw4 |= GEN6_WM_STATISTICS_ENABLE;
141 dw4 |= prog_data->base.dispatch_grf_start_reg <<
143 dw4 |= prog_data->dispatch_grf_start_reg_2 <<
230 OUT_BATCH(dw4);
|
| gen7_wm_state.c | 155 uint32_t dw2, dw4, dw5, ksp0, ksp2; local
159 dw2 = dw4 = dw5 = ksp2 = 0;
175 dw4 |= SET_FIELD(sample_mask, HSW_PS_SAMPLE_MASK);
177 dw4 |= (devinfo->max_wm_threads - 1) << max_threads_shift;
180 dw4 |= GEN7_PS_PUSH_CONSTANT_ENABLE;
190 dw4 |= GEN7_PS_OMASK_TO_RENDER_TARGET;
204 dw4 |= GEN7_PS_POSOFFSET_SAMPLE;
206 dw4 |= GEN7_PS_POSOFFSET_NONE;
212 dw4 |= GEN7_PS_DUAL_SOURCE_BLEND_ENABLE;
216 dw4 |= GEN7_PS_ATTRIBUTE_ENABLE
[all...] |
| gen8_sf_state.c | 50 uint32_t dw4 = 0; local
106 dw4 |= (GEN9_SBE_ACTIVE_COMPONENT_XYZW << (input_index << 1));
119 OUT_BATCH(dw4);
|
| gen6_sf_state.c | 276 uint32_t dw1, dw2, dw3, dw4; local
290 dw4 = 0;
377 dw4 |= GEN6_SF_USE_STATE_POINT_WIDTH;
383 dw4 |= U_FIXED(CLAMP(point_size, 0.125f, 255.875f), 3);
398 dw4 |=
403 dw4 |=
422 OUT_BATCH(dw4);
|
| gen7_sol_state.c | 231 uint32_t dw1 = 0, dw2 = 0, dw3 = 0, dw4 = 0; local
289 dw4 |= linked_xfb_info->Buffers[2].Stride * 4;
291 dw4 |= (linked_xfb_info->Buffers[3].Stride * 4) << 16;
303 OUT_BATCH(dw4);
|
| /external/mesa3d/src/gallium/drivers/ilo/core/ |
| ilo_state_zs.c | 389 uint32_t dw1, dw2, dw3, dw4; local
417 dw4 = depth << GEN6_DEPTH_DW4_DEPTH__SHIFT |
425 zs->depth[3] = dw4;
438 uint32_t dw1, dw2, dw3, dw4, dw6; local
467 dw4 = depth << GEN7_DEPTH_DW4_DEPTH__SHIFT |
482 zs->depth[3] = dw4;
544 uint32_t dw4; local
547 dw4 = (img->walk_layer_height / 4) << GEN8_STENCIL_DW4_QPITCH__SHIFT;
549 zs->stencil[2] = dw4;
594 uint32_t dw4; local
[all...] |
| ilo_state_compute.c | 287 uint32_t dw1, dw2, dw4; local
315 dw4 = (urb.urb_entry_size - 1) << GEN6_VFE_DW4_URB_ENTRY_SIZE__SHIFT |
321 compute->vfe[2] = dw4;
376 uint32_t dw0, dw2, dw3, dw4, dw5, dw6; local
394 dw4 = per_thread_read_len << GEN6_IDRT_DW4_CURBE_READ_LEN__SHIFT |
448 compute->idrt[i][3] = dw4;
|
| ilo_state_shader.c | 200 uint32_t dw2, dw3, dw4, dw5; local
222 dw4 = ff.grf_start << GEN6_VS_DW4_URB_GRF_START__SHIFT |
241 vs->vs[2] = dw4;
284 uint32_t dw1, dw2, dw4, dw5; local
311 dw4 = ff.per_thread_scratch_space <<
325 hs->hs[2] = dw4;
389 uint32_t dw2, dw3, dw4, dw5; local
408 dw4 = ff.grf_start << GEN7_DS_DW4_URB_GRF_START__SHIFT |
427 ds->ds[2] = dw4;
520 uint32_t dw2, dw3, dw4, dw5, dw6 local
598 uint32_t dw2, dw3, dw4, dw5; local
[all...] |
| ilo_state_shader_ps.c | 426 uint32_t dw2, dw3, dw4, dw5, dw6; local
439 dw4 = ff->grf_starts[0] << GEN6_WM_DW4_URB_GRF_START0__SHIFT |
474 ps->ps[2] = dw4;
525 uint32_t dw2, dw3, dw4, dw5; local
538 dw4 = io->posoffset << GEN7_PS_DW4_POSOFFSET__SHIFT |
542 dw4 |= ff->thread_count << GEN75_PS_DW4_MAX_THREADS__SHIFT |
545 dw4 |= ff->thread_count << GEN7_PS_DW4_MAX_THREADS__SHIFT;
549 dw4 |= GEN7_PS_DW4_PUSH_CONSTANT_ENABLE;
551 dw4 |= GEN7_PS_DW4_ATTR_ENABLE;
553 dw4 |= GEN7_PS_DW4_COMPUTE_OMASK
585 uint32_t dw3, dw4, dw6, dw7; local
[all...] |
| ilo_state_surface.c | 926 uint32_t dw0, dw2, dw3, dw4, dw5; local
986 dw4 = min_lod << GEN6_SURFACE_DW4_MIN_LOD__SHIFT |
998 surf->surface[4] = dw4;
1017 uint32_t dw0, dw1, dw2, dw3, dw4, dw5, dw7; local
[all...] |
| ilo_state_raster.c | 711 uint32_t dw4, dw5, dw6; local
718 dw4 = 0;
721 dw4 |= GEN6_WM_DW4_STATISTICS;
725 dw4 |= GEN6_WM_DW4_DEPTH_CLEAR;
728 dw4 |= GEN6_WM_DW4_DEPTH_RESOLVE;
731 dw4 |= GEN6_WM_DW4_HIZ_RESOLVE;
735 dw4 |= GEN6_WM_DW4_DEPTH_CLEAR;
753 rs->wm[0] = dw4;
829 uint32_t dw1, dw4; local
852 dw4 = (scan->sample_mask & mask) << GEN8_WM_HZ_DW4_SAMPLE_MASK__SHIFT
[all...] |
