HomeSort by relevance Sort by last modified time
    Searched refs:ADDIU (Results 1 - 13 of 13) sorted by null

  /external/pcre/dist2/src/sljit/
sljitNativeMIPS_32.c 35 return push_inst(compiler, ADDIU | SA(0) | TA(dst_ar) | IMM(imm), dst_ar);
143 FAIL_IF(push_inst(compiler, ADDIU | SA(0) | T(dst) | IMM(-1), DR(dst)));
145 FAIL_IF(push_inst(compiler, ADDIU | S(dst) | T(dst) | IMM(1), DR(dst)));
162 FAIL_IF(push_inst(compiler, ADDIU | S(src1) | TA(EQUAL_FLAG) | IMM(src2), EQUAL_FLAG));
167 FAIL_IF(push_inst(compiler, ADDIU | SA(0) | TA(ULESS_FLAG) | IMM(src2), ULESS_FLAG));
173 FAIL_IF(push_inst(compiler, ADDIU | S(src1) | T(dst) | IMM(src2), DR(dst)));
203 FAIL_IF(push_inst(compiler, ADDIU | SA(0) | TA(OVERFLOW_FLAG) | IMM(src2), OVERFLOW_FLAG));
207 FAIL_IF(push_inst(compiler, ADDIU | S(src1) | T(dst) | IMM(src2), DR(dst)));
228 FAIL_IF(push_inst(compiler, ADDIU | SA(0) | T(TMP_REG2) | IMM(src2), DR(TMP_REG2)));
241 FAIL_IF(push_inst(compiler, ADDIU | S(src1) | TA(EQUAL_FLAG) | IMM(-src2), EQUAL_FLAG))
    [all...]
sljitNativeMIPS_64.c 41 return push_inst(compiler, ADDIU | SA(0) | TA(dst_ar) | IMM(imm), dst_ar);
235 FAIL_IF(push_inst(compiler, SELECT_OP(DADDIU, ADDIU) | SA(0) | T(dst) | IMM(-1), DR(dst)));
237 FAIL_IF(push_inst(compiler, SELECT_OP(DADDIU, ADDIU) | S(dst) | T(dst) | IMM(1), DR(dst)));
254 FAIL_IF(push_inst(compiler, SELECT_OP(DADDIU, ADDIU) | S(src1) | TA(EQUAL_FLAG) | IMM(src2), EQUAL_FLAG));
259 FAIL_IF(push_inst(compiler, SELECT_OP(DADDIU, ADDIU) | SA(0) | TA(ULESS_FLAG) | IMM(src2), ULESS_FLAG));
265 FAIL_IF(push_inst(compiler, SELECT_OP(DADDIU, ADDIU) | S(src1) | T(dst) | IMM(src2), DR(dst)));
295 FAIL_IF(push_inst(compiler, SELECT_OP(DADDIU, ADDIU) | SA(0) | TA(OVERFLOW_FLAG) | IMM(src2), OVERFLOW_FLAG));
299 FAIL_IF(push_inst(compiler, SELECT_OP(DADDIU, ADDIU) | S(src1) | T(dst) | IMM(src2), DR(dst)));
320 FAIL_IF(push_inst(compiler, ADDIU | SA(0) | T(TMP_REG2) | IMM(src2), DR(TMP_REG2)));
333 FAIL_IF(push_inst(compiler, SELECT_OP(DADDIU, ADDIU) | S(src1) | TA(EQUAL_FLAG) | IMM(-src2), EQUAL_FLAG))
    [all...]
sljitNativeMIPS_common.c 100 #define ADDIU (HI(9))
188 #define ADDIU_W ADDIU
    [all...]
  /system/core/libpixelflinger/codeflinger/
MIPSAssembler.cpp 164 mMips->ADDIU(R_sp, R_sp, -(5 * 4));
182 mMips->ADDIU(R_sp, R_sp, (5 * 4));
440 mMips->ADDIU(Rd, Rn, src);
778 mMips->ADDIU(Rn, Rn, amode.value);
786 mMips->ADDIU(Rn, Rn, amode.value);
809 mMips->ADDIU(Rn, Rn, amode.value);
814 mMips->ADDIU(Rn, Rn, amode.value);
842 mMips->ADDIU(Rn, Rn, amode.value);
851 mMips->ADDIU(Rn, Rn, amode.value); // post index always writes back
874 mMips->ADDIU(Rn, Rn, amode.value)
    [all...]
MIPSAssembler.h 274 void ADDIU(int Rt, int Rs, int16_t imm);
MIPS64Assembler.cpp 419 mMips->ADDIU(Rd, Rn, src);
    [all...]
  /external/valgrind/none/tests/mips64/
arithmetic_instruction.c 6 ADD=0, ADDI, ADDIU, ADDU,
45 case ADDIU:
49 TEST2("addiu $t0, $t1, 0xff", reg_val1[i], 0xff, t0, t1);
50 TEST2("addiu $t2, $t3, 0xffff", reg_val1[i], 0xffff, t2, t3);
51 TEST2("addiu $a0, $a1, 0x0", reg_val1[i], 0x0, a0, a1);
52 TEST2("addiu $s0, $s1, 0x23", reg_val1[i], 0x23, s0, s1);
  /external/v8/src/mips/
constants-mips.h 353 ADDIU = ((1U << 3) + 1) << kOpcodeShift,
841 // addiu(sp, sp, 4) aka Pop() operation or part of Pop(r)
844 // addiu(sp, sp, -4) part of Push(r) operation as pre-decrement of sp.
907 OpcodeToBitNumber(DADDI) | OpcodeToBitNumber(ADDIU) |
    [all...]
assembler-mips.cc 258 // addiu(sp, sp, 4) aka Pop() operation or part of Pop(r)
260 const Instr kPopInstruction = ADDIU | (Register::kCode_sp << kRsShift) |
263 // addiu(sp, sp, -4) part of Push(r) operation as pre-decrement of sp.
264 const Instr kPushInstruction = ADDIU | (Register::kCode_sp << kRsShift) |
689 return ((instr & kOpcodeMask) == ADDIU);
1591 void Assembler::addiu(Register rd, Register rs, int32_t j) { function in class:v8::Assembler
    [all...]
simulator-mips.cc     [all...]
  /external/v8/src/mips64/
constants-mips64.h 324 ADDIU = ((1U << 3) + 1) << kOpcodeShift,
874 // addiu(sp, sp, 4) aka Pop() operation or part of Pop(r)
877 // addiu(sp, sp, -4) part of Push(r) operation as pre-decrement of sp.
939 OpcodeToBitNumber(DADDI) | OpcodeToBitNumber(ADDIU) |
    [all...]
assembler-mips64.cc 661 return ((instr & kOpcodeMask) == ADDIU || (instr & kOpcodeMask) == DADDIU);
1590 void Assembler::addiu(Register rd, Register rs, int32_t j) { function in class:v8::internal::Assembler
    [all...]
simulator-mips64.cc     [all...]

Completed in 891 milliseconds