HomeSort by relevance Sort by last modified time
    Searched refs:Cond (Results 1 - 25 of 865) sorted by null

1 2 3 4 5 6 7 8 91011>>

  /external/clang/test/SemaTemplate/
value-dependent-null-pointer-constant.cpp 5 const char *f0(bool Cond) {
6 return Cond? "honk" : N;
9 const char *f1(bool Cond) {
10 return Cond? N : "honk";
  /external/swiftshader/third_party/subzero/src/
IceAssemblerARM32.h 181 bool SetFlags, CondARM32::Cond Cond);
184 bool SetFlags, CondARM32::Cond Cond);
187 bool SetFlags, CondARM32::Cond Cond);
190 bool SetFlags, CondARM32::Cond Cond);
192 void b(Label *L, CondARM32::Cond Cond);
    [all...]
IceConditionCodesARM32.h 31 enum Cond {
37 static bool isDefined(Cond C) { return C != kNone; }
39 static bool isUnconditional(Cond C) { return !isDefined(C) || C == AL; }
IceConditionCodesMIPS32.h 31 enum Cond {
37 static bool isDefined(Cond C) { return C != kNone; }
39 static bool isUnconditional(Cond C) { return !isDefined(C) || C == AL; }
IceAssemblerARM32.cpp 143 IValueT encodeCondition(CondARM32::Cond Cond) {
144 return static_cast<IValueT>(Cond);
673 // cccc00110T00iiiiddddiiiiiiiiiiii where cccc=Cond, dddd=Rd,
709 // cccc101liiiiiiiiiiiiiiiiiiiiiiii where cccc=Cond, l=Link, and
794 void AssemblerARM32::emitType01(CondARM32::Cond Cond, IValueT InstType,
806 assert(CondARM32::isDefined(Cond));
807 const IValueT Encoding = (encodeCondition(Cond) << kConditionShift) |
814 void AssemblerARM32::emitType01(CondARM32::Cond Cond, IValueT Opcode
    [all...]
  /external/deqp/framework/delibs/decpp/
deMeta.hpp 33 template <typename T, bool Cond>
42 template <bool Cond>
47 Value = !Cond
  /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/
MBlazeInstrInfo.cpp 118 SmallVectorImpl<MachineOperand> &Cond,
146 Cond.push_back(MachineOperand::CreateImm(LastInst->getOpcode()));
147 Cond.push_back(LastInst->getOperand(0));
165 Cond.push_back(MachineOperand::CreateImm(SecondLastInst->getOpcode()));
166 Cond.push_back(SecondLastInst->getOperand(0));
189 const SmallVectorImpl<MachineOperand> &Cond,
193 assert((Cond.size() == 2 || Cond.size() == 0) &&
197 if (!Cond.empty())
198 Opc = (unsigned)Cond[0].getImm()
    [all...]
  /external/llvm/lib/Target/WebAssembly/
WebAssemblyInstrInfo.cpp 98 SmallVectorImpl<MachineOperand> &Cond,
112 Cond.push_back(MachineOperand::CreateImm(true));
113 Cond.push_back(MI.getOperand(1));
123 Cond.push_back(MachineOperand::CreateImm(false));
124 Cond.push_back(MI.getOperand(1));
167 ArrayRef<MachineOperand> Cond,
169 if (Cond.empty()) {
177 assert(Cond.size() == 2 && "Expected a flag and a successor block");
179 if (Cond[0].getImm()) {
180 BuildMI(&MBB, DL, get(WebAssembly::BR_IF)).addMBB(TBB).addOperand(Cond[1])
    [all...]
WebAssemblyInstrInfo.h 49 SmallVectorImpl<MachineOperand> &Cond,
53 MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
56 ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;
  /external/libxcam/xcore/
xcam_mutex.h 31 friend class Cond;
66 class Cond {
68 XCAM_DEAD_COPY (Cond);
71 Cond () {
74 ~Cond () {
xcam_thread.h 59 XCam::Cond _exit_cond;
  /prebuilts/go/darwin-x86/src/sync/
cond.go 12 // Cond implements a condition variable, a rendezvous point
16 // Each Cond has an associated Locker L (often a *Mutex or *RWMutex),
20 // A Cond must not be copied after first use.
21 type Cond struct {
31 // NewCond returns a new Cond with Locker l.
32 func NewCond(l Locker) *Cond {
33 return &Cond{L: l}
52 func (c *Cond) Wait() {
64 func (c *Cond) Signal() {
73 func (c *Cond) Broadcast()
    [all...]
  /prebuilts/go/linux-x86/src/sync/
cond.go 12 // Cond implements a condition variable, a rendezvous point
16 // Each Cond has an associated Locker L (often a *Mutex or *RWMutex),
20 // A Cond must not be copied after first use.
21 type Cond struct {
31 // NewCond returns a new Cond with Locker l.
32 func NewCond(l Locker) *Cond {
33 return &Cond{L: l}
52 func (c *Cond) Wait() {
64 func (c *Cond) Signal() {
73 func (c *Cond) Broadcast()
    [all...]
  /external/python/cpython2/Misc/
valgrind-python.supp 39 Memcheck:Cond
153 ### Memcheck:Cond
183 ### Memcheck:Cond
204 Memcheck:Cond
237 Memcheck:Cond
247 Memcheck:Cond
268 Memcheck:Cond
292 ### Memcheck:Cond
303 ### Memcheck:Cond
318 Memcheck:Cond
    [all...]
  /external/spirv-llvm/lib/SPIRV/libSPIRV/
SPIRVError.h 103 SPIRVErrorLog::checkError(bool Cond, SPIRVErrorCode ErrCode,
107 if (Cond)
108 return Cond;
111 return Cond;
121 return Cond;
  /external/swiftshader/third_party/subzero/crosstest/
test_select_main.cpp 45 TyI1 Cond;
48 setElement(Cond, j, Index() % 2);
52 Ty ResultLlc = select(Cond, Value1, Value2);
53 Ty ResultSz = Subzero_::select(Cond, Value1, Value2);
59 std::cout << "select<" << Vectors<T>::TypeName << ">(Cond=";
60 std::cout << vectAsString<TI1>(Cond)
81 v4si32 Cond;
84 setElement(Cond, j, Index() % 2);
88 v4f32 ResultLlc = select(Cond, Value1, Value2);
89 v4f32 ResultSz = Subzero_::select(Cond, Value1, Value2)
    [all...]
  /external/mesa3d/src/gallium/drivers/r300/compiler/
radeon_emulate_loops.c 200 if(rc_src_reg_is_immediate(c, loop->Cond->U.I.SrcReg[0].File,
201 loop->Cond->U.I.SrcReg[0].Index)){
202 limit = &loop->Cond->U.I.SrcReg[0];
203 counter = &loop->Cond->U.I.SrcReg[1];
205 else if(rc_src_reg_is_immediate(c, loop->Cond->U.I.SrcReg[1].File,
206 loop->Cond->U.I.SrcReg[1].Index)){
207 limit = &loop->Cond->U.I.SrcReg[1];
208 counter = &loop->Cond->U.I.SrcReg[0];
286 switch(loop->Cond->U.I.Opcode){
310 rc_remove_instruction(loop->Cond);
    [all...]
  /external/llvm/lib/Target/Mips/
MipsInstrInfo.cpp 73 SmallVectorImpl<MachineOperand> &Cond) const {
80 Cond.push_back(MachineOperand::CreateImm(Opc));
83 Cond.push_back(Inst->getOperand(i));
89 SmallVectorImpl<MachineOperand> &Cond,
92 BranchType BT = analyzeBranch(MBB, TBB, FBB, Cond, AllowModify, BranchInstrs);
99 ArrayRef<MachineOperand> Cond) const {
100 unsigned Opc = Cond[0].getImm();
104 for (unsigned i = 1; i < Cond.size(); ++i) {
105 if (Cond[i].isReg())
106 MIB.addReg(Cond[i].getReg())
    [all...]
MipsInstrInfo.h 55 SmallVectorImpl<MachineOperand> &Cond,
61 MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
65 ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;
69 SmallVectorImpl<MachineOperand> &Cond,
147 SmallVectorImpl<MachineOperand> &Cond) const;
150 const DebugLoc &DL, ArrayRef<MachineOperand> Cond) const;
  /external/swiftshader/third_party/LLVM/lib/Target/XCore/
XCoreInstrInfo.cpp 189 SmallVectorImpl<MachineOperand> &Cond,
222 Cond.push_back(MachineOperand::CreateImm(BranchCode));
223 Cond.push_back(LastInst->getOperand(0));
244 Cond.push_back(MachineOperand::CreateImm(BranchCode));
245 Cond.push_back(SecondLastInst->getOperand(0));
277 const SmallVectorImpl<MachineOperand> &Cond,
281 assert((Cond.size() == 2 || Cond.size() == 0) &&
285 if (Cond.empty()) {
290 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm())
    [all...]
  /external/clang/test/SemaCXX/
vector.cpp 43 void conditional(bool Cond, char16 c16, longlong16 ll16, char16_e c16e,
46 __typeof__(Cond? c16 : c16) *c16p1 = &c16;
47 __typeof__(Cond? ll16 : ll16) *ll16p1 = &ll16;
48 __typeof__(Cond? c16e : c16e) *c16ep1 = &c16e;
49 __typeof__(Cond? ll16e : ll16e) *ll16ep1 = &ll16e;
52 __typeof__(Cond? c16 : c16e) *c16ep2 = &c16e;
53 __typeof__(Cond? c16e : c16) *c16ep3 = &c16e;
54 __typeof__(Cond? ll16 : ll16e) *ll16ep2 = &ll16e;
55 __typeof__(Cond? ll16e : ll16) *ll16ep3 = &ll16e;
58 (void)(Cond? c16 : ll16)
    [all...]
  /external/swiftshader/third_party/LLVM/lib/Target/Alpha/
AlphaInstrInfo.cpp 90 const SmallVectorImpl<MachineOperand> &Cond,
93 assert((Cond.size() == 2 || Cond.size() == 0) &&
98 if (Cond.empty()) // Unconditional branch
101 if (isAlphaIntCondCode(Cond[0].getImm()))
103 .addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB);
106 .addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB);
111 if (isAlphaIntCondCode(Cond[0].getImm())
    [all...]
  /external/llvm/lib/Target/BPF/
BPFInstrInfo.h 49 SmallVectorImpl<MachineOperand> &Cond,
54 MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
  /external/llvm/lib/Target/NVPTX/
NVPTXInstrInfo.h 64 SmallVectorImpl<MachineOperand> &Cond,
68 MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
  /external/python/cpython3/Misc/
valgrind-python.supp 39 Memcheck:Cond
153 ### Memcheck:Cond
183 ### Memcheck:Cond
204 Memcheck:Cond
237 Memcheck:Cond
247 Memcheck:Cond
268 Memcheck:Cond
292 ### Memcheck:Cond
303 ### Memcheck:Cond
317 Memcheck:Cond
    [all...]

Completed in 477 milliseconds

1 2 3 4 5 6 7 8 91011>>