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      1 //=- WebAssemblyInstrInfo.h - WebAssembly Instruction Information -*- C++ -*-=//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 ///
     10 /// \file
     11 /// \brief This file contains the WebAssembly implementation of the
     12 /// TargetInstrInfo class.
     13 ///
     14 //===----------------------------------------------------------------------===//
     15 
     16 #ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYINSTRINFO_H
     17 #define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYINSTRINFO_H
     18 
     19 #include "WebAssemblyRegisterInfo.h"
     20 #include "llvm/Target/TargetInstrInfo.h"
     21 
     22 #define GET_INSTRINFO_HEADER
     23 #include "WebAssemblyGenInstrInfo.inc"
     24 
     25 namespace llvm {
     26 
     27 class WebAssemblySubtarget;
     28 
     29 class WebAssemblyInstrInfo final : public WebAssemblyGenInstrInfo {
     30   const WebAssemblyRegisterInfo RI;
     31 
     32 public:
     33   explicit WebAssemblyInstrInfo(const WebAssemblySubtarget &STI);
     34 
     35   const WebAssemblyRegisterInfo &getRegisterInfo() const { return RI; }
     36 
     37   bool isReallyTriviallyReMaterializable(const MachineInstr &MI,
     38                                          AliasAnalysis *AA) const override;
     39 
     40   void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
     41                    const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
     42                    bool KillSrc) const override;
     43   MachineInstr *commuteInstructionImpl(MachineInstr &MI, bool NewMI,
     44                                        unsigned OpIdx1,
     45                                        unsigned OpIdx2) const override;
     46 
     47   bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
     48                      MachineBasicBlock *&FBB,
     49                      SmallVectorImpl<MachineOperand> &Cond,
     50                      bool AllowModify = false) const override;
     51   unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
     52   unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
     53                         MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
     54                         const DebugLoc &DL) const override;
     55   bool
     56   ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;
     57 };
     58 
     59 } // end namespace llvm
     60 
     61 #endif
     62