| /external/libxaac/decoder/armv7/ |
| ixheaacd_mps_synt_post_twiddle.s | 30 VPUSH {D8-D15}
34 VLD2.32 {D15, D16}, [R1]!
40 VMULL.S32 Q4, D15, D2
41 VMULL.S32 Q5, D15, D3
55 VPOP {D8-D15}
|
| ixheaacd_mps_synt_post_fft_twiddle.s | 29 VPUSH {D8-D15}
64 VPOP {D8-D15}
|
| ixheaacd_mps_synt_pre_twiddle.s | 30 VPUSH {D8-D15}
55 VPOP {D8-D15}
|
| ixheaacd_esbr_qmfsyn64_winadd.s | 20 VPUSH {D8- D15}
67 VLD1.32 {D14, D15}, [R2], R9
70 VMLAL.S32 Q14, D13, D15
105 VLD1.32 {D14, D15}, [R12], R9
108 VMLAL.S32 Q14, D13, D15
160 VLD1.32 {D14, D15}, [R2], R9
163 VMLAL.S32 Q14, D13, D15
198 VLD1.32 {D14, D15}, [R12], R9
201 VMLAL.S32 Q14, D13, D15
249 VLD1.32 {D14, D15}, [R2], R
[all...] |
| ixheaacd_esbr_fwd_modulation.s | 30 VPUSH {D8 - D15}
59 VST1.32 {D12, D13, D14, D15}, [R7]!
102 VPOP {D8-D15}
|
| ixheaacd_mps_synt_out_calc.s | 15 VPUSH {D8-D15}
50 VPOP {D8-D15}
|
| ixheaacd_sbr_qmfsyn64_winadd.s | 29 VPUSH {D8- D15}
105 VLD1.16 D15, [R12], R9
108 VMLAL.S16 Q13, D15, D14
171 VLD1.16 D15, [R12], R9
212 VMLAL.S16 Q13, D15, D14
260 VLD1.16 D15, [R12], R9
263 VMLAL.S16 Q13, D15, D14
327 VLD1.16 D15, [R12], R9
357 VMLAL.S16 Q13, D15, D14
377 VPOP {D8 - D15}
[all...] |
| ixheaacd_sbr_qmfanal32_winadds.s | 29 VPUSH {D8 - D15}
136 VLD2.16 {D15, D16}, [R3]!
178 VMLAL.S16 Q15, D14, D15
232 VLD2.16 {D15, D16}, [R3]!
257 VMLAL.S16 Q15, D14, D15
263 VPOP {D8 - D15}
|
| ixheaacd_calc_post_twid.s | 29 VPUSH {D8-D15}
80 VPOP {D8-D15}
|
| ixheaacd_calc_pre_twid.s | 29 VPUSH {D8-D15}
78 VPOP {D8-D15}
|
| ixheaacd_overlap_add1.s | 30 VPUSH {d8 - d15}
82 VMULL.S32 Q13, D5, D15
103 VMULL.S32 Q0, D15, D5
147 VMULL.S32 Q8, D5, D15
157 VMULL.S32 Q0, D5, D15
197 VMULL.S32 Q8, D5, D15
207 VMULL.S32 Q0, D5, D15
259 VMULL.S32 Q8, D5, D15
268 VMULL.S32 Q13, D5, D15
295 VPOP {d8 - d15}
[all...] |
| ixheaacd_post_twiddle_overlap.s | 29 VPUSH {d8 - d15}
366 VUZP.16 D14, D15
397 VMLAL.S16 Q15, D15, D10
414 VUZP.16 D14, D15
419 VMOV D15, D6
473 VST1.16 D15[0], [R5, : 16], R10
479 VST1.16 D15[1], [R5, : 16], R10
485 VST1.16 D15[2], [R5, : 16], R10
491 VST1.16 D15[3], [R5, : 16], R10
642 VUZP.16 D14, D15
[all...] |
| ixheaacd_no_lap1.s | 28 VPUSH {D8 - D15}
107 VPOP {D8 - D15}
|
| /external/libhevc/decoder/arm/ |
| ihevcd_fmt_conv_420sp_to_rgba8888.s | 227 VQMOVUN.S16 D15,Q9
231 VZIP.8 D14,D15
249 VST1.32 D15,[R2]!
278 VQMOVUN.S16 D15,Q9
282 VZIP.8 D14,D15
300 VST1.32 D15,[R8]!
358 VQMOVUN.S16 D15,Q9
362 VZIP.8 D14,D15
380 VST1.32 D15,[R2]!
400 VQMOVUN.S16 D15,Q
[all...] |
| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/ |
| pred_lt4_1_neon.s | 68 VQDMLAL.S16 Q15, D15, D7
85 VEXT.S16 D14, D14, D15, #1
88 VEXT.S16 D15, D15, D24, #1
|
| Filt_6k_7k_neon.s | 118 VMLAL.S16 Q10,D15,D7[0]
119 VMLAL.S16 Q11,D15,D6[0]
140 VMLAL.S16 Q10,D15,D7[1]
141 VMLAL.S16 Q11,D15,D6[1]
162 VMLAL.S16 Q10,D15,D7[2]
163 VMLAL.S16 Q11,D15,D6[2]
184 VMLAL.S16 Q10,D15,D7[3]
185 VMLAL.S16 Q11,D15,D6[3]
199 VMOV.S16 D14,D15
201 VMOV.S16 D15,D1
[all...] |
| Dot_p_neon.s | 63 VMLAL.S16 Q15, D3, D15
95 VMLAL.S16 Q15, D15, D15
|
| /art/compiler/utils/arm/ |
| constants_arm.h | 78 D15 = 15,
|
| managed_register_arm_test.cc | 174 reg = ArmManagedRegister::FromDRegister(D15);
181 EXPECT_EQ(D15, reg.AsDRegister());
366 ArmManagedRegister reg_D15 = ArmManagedRegister::FromDRegister(D15);
374 EXPECT_TRUE(reg_D15.Equals(ArmManagedRegister::FromDRegister(D15)));
386 EXPECT_TRUE(!reg_D16.Equals(ArmManagedRegister::FromDRegister(D15)));
398 EXPECT_TRUE(!reg_D30.Equals(ArmManagedRegister::FromDRegister(D15)));
411 EXPECT_TRUE(!reg_D31.Equals(ArmManagedRegister::FromDRegister(D15)));
426 EXPECT_TRUE(!reg_R0R1.Equals(ArmManagedRegister::FromDRegister(D15)));
438 EXPECT_TRUE(!reg_R4R5.Equals(ArmManagedRegister::FromDRegister(D15)));
451 EXPECT_TRUE(!reg_R6R7.Equals(ArmManagedRegister::FromDRegister(D15)));
[all...] |
| /art/compiler/utils/mips/ |
| constants_mips.h | 48 D15 = 15,
|
| /external/llvm/test/MC/MachO/ |
| x86_32-symbols.s | 50 D15:
945 // CHECK: Name: D15 (72)
[all...] |
| /external/swiftshader/third_party/LLVM/test/MC/MachO/ |
| x86_32-symbols.s | 50 D15:
821 // CHECK: ('_string', 'D15')
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| simd_by_scalar_low_regbank.s | 17 # or D0 - D15 otherwise.
|
| /external/libhevc/common/arm/ |
| ihevc_sao_edge_offset_class0_chroma.s | 85 vpush {d8 - d15}
164 VMOV.16 D15[3],r11 @vsetq_lane_u16(pu1_src_left[ht - row], pu1_cur_row_tmp, 14,15)
218 VTBL.8 D15,{D10},D15 @vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx))
222 VUZP.8 D14,D15
229 VTBL.8 D17,{D0},D15
252 VMOVN.I16 D15,Q6 @vmovn_s16(pi2_tmp_cur_row.val[1])
272 VST1.8 {D14,D15},[r12],r1 @vst1q_u8(pu1_src_cpy, pu1_cur_row)
327 VMOV.16 D15[3],r11 @vsetq_lane_u8(pu1_src_left[ht - row], pu1_cur_row_tmp, 15)
383 VTBL.8 D15,{D10},D15 @vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx)
[all...] |
| /art/compiler/utils/arm64/ |
| managed_register_arm64_test.cc | 363 Arm64ManagedRegister reg_D15 = Arm64ManagedRegister::FromDRegister(D15);
372 EXPECT_TRUE(reg_D15.Equals(Arm64ManagedRegister::FromDRegister(D15)));
396 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
418 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
440 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
460 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
478 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
499 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
520 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
544 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
[all...] |
