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    Searched refs:DstMO (Results 1 - 6 of 6) sorted by null

  /external/llvm/lib/Target/PowerPC/
PPCVSXCopy.cpp 98 MachineOperand &DstMO = MI->getOperand(0);
101 if ( IsVSReg(DstMO.getReg(), MRI) &&
126 } else if (!IsVSReg(DstMO.getReg(), MRI) &&
132 IsVRReg(DstMO.getReg(), MRI) ? &PPC::VSHRCRegClass :
134 assert((IsF8Reg(DstMO.getReg(), MRI) ||
135 IsVSFReg(DstMO.getReg(), MRI) ||
136 IsVSSReg(DstMO.getReg(), MRI) ||
137 IsVRReg(DstMO.getReg(), MRI)) &&
148 SrcMO.setSubReg(IsVRReg(DstMO.getReg(), MRI) ? PPC::sub_128 :
  /external/swiftshader/third_party/LLVM/lib/CodeGen/
ExpandPostRAPseudos.cpp 153 MachineOperand &DstMO = MI->getOperand(0);
156 if (SrcMO.getReg() == DstMO.getReg()) {
160 if (DstMO.isDead() || SrcMO.isUndef() || MI->getNumOperands() > 2) {
174 DstMO.getReg(), SrcMO.getReg(), SrcMO.isKill());
176 if (DstMO.isDead())
177 TransferDeadFlag(MI, DstMO.getReg(), TRI);
TwoAddressInstructionPass.cpp     [all...]
  /external/llvm/lib/CodeGen/
ExpandPostRAPseudos.cpp 146 MachineOperand &DstMO = MI->getOperand(0);
149 if (SrcMO.getReg() == DstMO.getReg()) {
167 DstMO.getReg(), SrcMO.getReg(), SrcMO.isKill());
TwoAddressInstructionPass.cpp     [all...]
  /external/llvm/lib/Target/AArch64/
AArch64LoadStoreOptimizer.cpp 887 MachineOperand &DstMO = MIB->getOperand(SExtIdx);
888 // Right now, DstMO has the extended register, since it comes from an
890 unsigned DstRegX = DstMO.getReg();
894 DstMO.setReg(DstRegW);
    [all...]

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