| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| test_vec4_register_coalesce.cpp | 81 virtual void emit_urb_write_header(int mrf)
134 dst_reg m0 = dst_reg(MRF, 0);
143 EXPECT_EQ(mul->dst.file, MRF);
153 dst_reg m0 = dst_reg(MRF, 0);
157 dst_reg m1 = dst_reg(MRF, 1);
170 EXPECT_NE(mul->dst.file, MRF);
179 dst_reg m0 = dst_reg(MRF, 0);
190 EXPECT_EQ(dp4->dst.file, MRF);
212 v->emit(v->MOV(dst_reg(MRF, 0), src));
238 v->emit(v->MOV(dst_reg(MRF, 0), src))
[all...] |
| brw_ir_fs.h | 82 case MRF: {
115 case MRF:
138 case MRF:
209 if (r.file == MRF && (r.nr & BRW_MRF_COMPR4)) {
218 } else if (s.file == MRF && (s.nr & BRW_MRF_COMPR4)) {
|
| brw_shader.h | 47 assert(file == ARF || file == FIXED_GRF || file == MRF || file == IMM);
54 assert(file == ARF || file == FIXED_GRF || file == MRF || file == IMM);
154 int8_t base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */
|
| brw_vec4_visitor.cpp | 866 dst_reg(MRF, inst->base_mrf));
882 emit(MOV(dst_reg(MRF, param_base, coordinate_type, coord_mask),
885 emit(MOV(dst_reg(MRF, param_base, coordinate_type, zero_mask),
982 /* MRF for the first parameter */
987 emit(MOV(dst_reg(MRF, param_base, lod.type, writemask), lod));
997 emit(MOV(dst_reg(MRF, param_base, coordinate.type, coord_mask),
1002 emit(MOV(dst_reg(MRF, param_base, coordinate.type, zero_mask),
1007 emit(MOV(dst_reg(MRF, param_base + 1, shadow_comparator.type,
1015 int mrf, writemask; local
1017 mrf = param_base + 1
1372 int mrf = base_mrf; local
[all...] |
| gen6_gs_visitor.cpp | 71 /* MRF 1 will be the header for all messages (FF_SYNC and URB_WRITES),
74 vec4_instruction *inst = emit(MOV(dst_reg(MRF, 1),
254 gen6_gs_visitor::emit_urb_write_header(int mrf)
274 emit(GS_OPCODE_SET_DWORD_2, dst_reg(MRF, mrf), flags_data);
310 inst->dst = dst_reg(MRF, base_mrf);
341 /* MRF 0 is reserved for the debugger, so start with message header
342 * in MRF 1.
394 int mrf = base_mrf + 1; local
414 dst_reg reg = dst_reg(MRF, mrf)
[all...] |
| brw_ir_vec4.h | 77 case MRF: {
245 if (r.file == MRF && (r.nr & BRW_MRF_COMPR4)) {
256 } else if (s.file == MRF && (s.nr & BRW_MRF_COMPR4)) {
|
| brw_vec4_gs_visitor.cpp | 203 /* MRF 0 is reserved for the debugger, so start with message header
204 * in MRF 1.
226 dst_reg mrf_reg(MRF, base_mrf);
241 vec4_gs_visitor::emit_urb_write_header(int mrf)
251 dst_reg mrf_reg(MRF, mrf);
345 /* Start building the URB write message. The first MRF gets a copy of
349 dst_reg mrf_reg(MRF, base_mrf);
387 dst_reg mrf_reg2(MRF, base_mrf + 1);
[all...] |
| brw_fs.cpp | 77 case MRF:
842 case MRF:
843 unreachable("MRF registers are not allowed as sources");
[all...] |
| brw_vec4.cpp | 1015 assert(inst->src[i].file != MRF);
1040 } else if (inst->dst.file == MRF) {
[all...] |
| brw_schedule_instructions.cpp | [all...] |
| brw_fs_generator.cpp | 44 case MRF:
62 case MRF:
438 * "[Errata: DevSNB(SNB)] If MRF register is updated by any
441 * race condition where send may dispatch before MRF is updated."
843 /* Set up an implied move from g0 to the MRF. */
859 /* Explicitly set up the message header by copying g0 to the MRF. */
[all...] |
| brw_fs_reg_allocate.cpp | 465 * see if we can actually use MRFs to do spills without overwriting normal MRF
476 if (inst->dst.file == MRF) {
509 /* Mark each MRF reg node as being allocated to its physical register.
622 * conflict with any used MRF hack registers.
744 * First MRF register available for spilling.
[all...] |
| brw_fs_visitor.cpp | 143 bld.MOV(fs_reg(MRF, 2 + i * reg_width, BRW_REGISTER_TYPE_F),
[all...] |
| brw_defines.h | [all...] |
| brw_vec4_nir.cpp | 493 /* MRF for the first parameter */
497 emit(MOV(dst_reg(MRF, param_base, glsl_type::int_type, writemask), lod));
[all...] |
