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Searched
refs:RefI
(Results
1 - 4
of
4
) sorted by null
/external/llvm/lib/Target/Hexagon/
BitTracker.h
110
Ref // Bit value same as the one described in
RefI
.
132
// as the
RefI
.Reg is not 0, it may actually be the same register as the
133
// one in which V will be contained. If the
RefI
.Pos refers to the posi-
137
// If
RefI
.Reg is 0, however, such a reference to the same register is
138
// not possible. Any value V that is a "ref", and whose
RefI
.Reg is 0
142
BitRef
RefI
;
146
BitValue(unsigned Reg, uint16_t Pos) : Type(Ref),
RefI
(Reg, Pos) {}
151
if (Type == Ref && !(
RefI
== V.
RefI
))
180
if (Type == Ref &&
RefI
== Self) // Bottom.meet(V) = Bottom (i.e. This
[
all
...]
BitTracker.cpp
100
OS << printv(BV.
RefI
.Reg) << '[' << BV.
RefI
.Pos << ']';
124
if (IsRef && SV.Type == BT::BitValue::Ref && V.
RefI
.Reg == SV.
RefI
.Reg) {
126
SeqRef = (V.
RefI
.Pos == SV.
RefI
.Pos+1);
127
ConstRef = (V.
RefI
.Pos == SV.
RefI
.Pos);
129
if (SeqRef && V.
RefI
.Pos == SV.
RefI
.Pos+(i-Start)
[
all
...]
HexagonBitSimplify.cpp
273
if (RC1[B1+i].Type == BitTracker::BitValue::Ref && RC1[B1+i].
RefI
.Reg == 0)
276
if (RC2[B2+i].Type == BitTracker::BitValue::Ref && RC2[B2+i].
RefI
.Reg == 0)
[
all
...]
HexagonGenInsert.cpp
236
unsigned Ind1 = BaseOrd[V1.
RefI
.Reg], Ind2 = BaseOrd[V2.
RefI
.Reg];
240
assert(V1.
RefI
.Pos != V2.
RefI
.Pos && "Bit values should be different");
241
return V1.
RefI
.Pos < V2.
RefI
.Pos;
664
if (V.Type == BitTracker::BitValue::Ref && V.
RefI
.Reg == VR)
675
if (V.Type == BitTracker::BitValue::Ref && V.
RefI
.Reg != VR)
[
all
...]
Completed in 84 milliseconds