| /device/linaro/bootloader/edk2/CorebootPayloadPkg/Library/PlatformHookLib/ |
| PlatformHookLib.c | 55 UINT32 RegWidth;
62 &RegWidth, &BaudRate, &InputHertz,
81 Status = PcdSet32S (PcdSerialRegisterStride, RegWidth);
107 SerialParam->RegisterStride = (UINT8)RegWidth;
|
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64AddressingModes.h | 756 inline static bool isAnyMOVZMovAlias(uint64_t Value, int RegWidth) {
757 for (int Shift = 0; Shift <= RegWidth - 16; Shift += 16)
764 inline static bool isMOVZMovAlias(uint64_t Value, int Shift, int RegWidth) {
765 if (RegWidth == 32)
775 inline static bool isMOVNMovAlias(uint64_t Value, int Shift, int RegWidth) {
777 if (isAnyMOVZMovAlias(Value, RegWidth))
781 if (RegWidth == 32)
784 return isMOVZMovAlias(Value, Shift, RegWidth);
787 inline static bool isAnyMOVWMovAlias(uint64_t Value, int RegWidth) {
788 if (isAnyMOVZMovAlias(Value, RegWidth))
[all...] |
| /external/llvm/lib/Target/AMDGPU/AsmParser/ |
| AMDGPUAsmParser.cpp | 586 bool AddNextRegisterToList(unsigned& Reg, unsigned& RegWidth, RegisterKind RegKind, unsigned Reg1, unsigned RegNum);
587 bool ParseAMDGPURegister(RegisterKind& RegKind, unsigned& Reg, unsigned& RegNum, unsigned& RegWidth);
741 static int getRegClass(RegisterKind Is, unsigned RegWidth) {
743 switch (RegWidth) {
753 switch (RegWidth) {
760 switch (RegWidth) {
804 bool AMDGPUAsmParser::AddNextRegisterToList(unsigned& Reg, unsigned& RegWidth, RegisterKind RegKind, unsigned Reg1, unsigned RegNum)
808 if (Reg == AMDGPU::EXEC_LO && Reg1 == AMDGPU::EXEC_HI) { Reg = AMDGPU::EXEC; RegWidth = 2; return true; }
809 if (Reg == AMDGPU::FLAT_SCR_LO && Reg1 == AMDGPU::FLAT_SCR_HI) { Reg = AMDGPU::FLAT_SCR; RegWidth = 2; return true; }
810 if (Reg == AMDGPU::VCC_LO && Reg1 == AMDGPU::VCC_HI) { Reg = AMDGPU::VCC; RegWidth = 2; return true;
[all...] |
| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| AArch64InstPrinter.cpp | 229 int RegWidth = Opcode == AArch64::MOVZXi ? 64 : 32;
236 << formatImm(SignExtend64(Value, RegWidth));
243 int RegWidth = Opcode == AArch64::MOVNXi ? 64 : 32;
246 if (RegWidth == 32)
249 if (AArch64_AM::isMOVNMovAlias(Value, Shift, RegWidth)) {
251 << formatImm(SignExtend64(Value, RegWidth));
260 int RegWidth = Opcode == AArch64::ORRXri ? 64 : 32;
262 MI->getOperand(2).getImm(), RegWidth);
263 if (!AArch64_AM::isAnyMOVWMovAlias(Value, RegWidth)) {
265 << formatImm(SignExtend64(Value, RegWidth));
[all...] |
| /external/llvm/lib/Target/AArch64/AsmParser/ |
| AArch64AsmParser.cpp | 863 template<int RegWidth, int Shift>
871 return AArch64_AM::isMOVZMovAlias(Value, Shift, RegWidth);
874 template<int RegWidth, int Shift>
882 return AArch64_AM::isMOVNMovAlias(Value, Shift, RegWidth);
[all...] |
| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| TargetLowering.h | 580 unsigned RegWidth = getRegisterType(Context, VT).getSizeInBits();
581 return (BitWidth + RegWidth - 1) / RegWidth;
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetLowering.h | [all...] |
| /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/Target/ |
| TargetLowering.h | [all...] |
| /prebuilts/clang/host/darwin-x86/clang-4393122/include/llvm/Target/ |
| TargetLowering.h | [all...] |
| /prebuilts/clang/host/darwin-x86/clang-4479392/include/llvm/Target/ |
| TargetLowering.h | [all...] |
| /prebuilts/clang/host/darwin-x86/clang-4579689/include/llvm/Target/ |
| TargetLowering.h | [all...] |
| /prebuilts/clang/host/darwin-x86/clang-4630689/include/llvm/Target/ |
| TargetLowering.h | [all...] |
| /prebuilts/clang/host/darwin-x86/clang-4639204/include/llvm/Target/ |
| TargetLowering.h | [all...] |
| /prebuilts/clang/host/darwin-x86/clang-4691093/include/llvm/Target/ |
| TargetLowering.h | [all...] |
| /prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/Target/ |
| TargetLowering.h | [all...] |
| /prebuilts/clang/host/linux-x86/clang-4393122/include/llvm/Target/ |
| TargetLowering.h | [all...] |
| /prebuilts/clang/host/linux-x86/clang-4479392/include/llvm/Target/ |
| TargetLowering.h | [all...] |
| /prebuilts/clang/host/linux-x86/clang-4579689/include/llvm/Target/ |
| TargetLowering.h | [all...] |
| /prebuilts/clang/host/linux-x86/clang-4630689/include/llvm/Target/ |
| TargetLowering.h | [all...] |
| /prebuilts/clang/host/linux-x86/clang-4639204/include/llvm/Target/ |
| TargetLowering.h | [all...] |
| /prebuilts/clang/host/linux-x86/clang-4691093/include/llvm/Target/ |
| TargetLowering.h | [all...] |
| /external/capstone/arch/AArch64/ |
| AArch64BaseInfo.h | [all...] |
| /external/llvm/lib/CodeGen/ |
| CodeGenPrepare.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelDAGToDAG.cpp | 196 template<unsigned RegWidth>
198 return SelectCVTFixedPosOperand(N, FixedPos, RegWidth);
[all...] |
