/external/clang/test/CodeGenCXX/ |
microsoft-abi-rtti.cpp | 18 struct W1 : virtual V1 {}; 19 struct Y1 : W1, virtual V1 {} y1; 69 // CHECK-DAG: @"\01??_R2Y1@@8" = linkonce_odr constant [7 x %rtti.BaseClassDescriptor*] [%rtti.BaseClassDescriptor* @"\01??_R1A@?0A@EA@Y1@@8", %rtti.BaseClassDescriptor* @"\01??_R1A@?0A@EA@W1@@8", %rtti.BaseClassDescriptor* @"\01??_R1A@A@3FA@V1@@8", %rtti.BaseClassDescriptor* @"\01??_R1A@A@3EA@X1@@8", %rtti.BaseClassDescriptor* @"\01??_R1A@A@3FA@V1@@8", %rtti.BaseClassDescriptor* @"\01??_R1A@A@3EA@X1@@8", %rtti.BaseClassDescriptor* null], comdat 71 // CHECK-DAG: @"\01??_R1A@?0A@EA@W1@@8" = linkonce_odr constant %rtti.BaseClassDescriptor { i8* bitcast (%rtti.TypeDescriptor8* @"\01??_R0?AUW1@@@8" to i8*), i32 2, i32 0, i32 -1, i32 0, i32 64, %rtti.ClassHierarchyDescriptor* @"\01??_R3W1@@8" }, comdat 74 // CHECK-DAG: @"\01??_R2W1@@8" = linkonce_odr constant [4 x %rtti.BaseClassDescriptor*] [%rtti.BaseClassDescriptor* @"\01??_R1A@?0A@EA@W1@@8", %rtti.BaseClassDescriptor* @"\01??_R1A@A@3FA@V1@@8", %rtti.BaseClassDescriptor* @"\01??_R1A@A@3EA@X1@@8", %rtti.BaseClassDescriptor* null], comdat [all...] |
/external/arm-neon-tests/ |
ref_vcvt.c | 56 #define TEST_VCVT_FP16(T1, T2, W1, W2, N) \ 57 VECT_VAR(vector_res, T1, W1, N) = \ 58 vcvt_##T2##W1##_##T2##W2(VECT_VAR(vector, T1, W2, N)); \ 59 vst1q_##T2##W1(VECT_VAR(result, T1, W1, N), \ 60 VECT_VAR(vector_res, T1, W1, N)); \ 61 DUMP_FP(TEST_MSG, T1, W1, N, PRIx##W1); 63 #define TEST_VCVT_2FP16(T1, T2, W1, W2, N) \ 64 VECT_VAR(vector_res, T1, W1, N) = [all...] |
/external/libxaac/decoder/armv8/ |
ixheaacd_calcmaxspectralline.s | 26 LSR W4, W1, #3 48 SUBS W7, W1, W6 51 MOV W1, V3.S[1] 53 ORR W4, W4, W1
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/external/boringssl/src/crypto/fipsmodule/sha/asm/ |
sha512-armv8.pl | 351 my ($W0,$W1)=("v16.4s","v17.4s"); 379 ld1.32 {$W1},[$Ktbl],#16 387 ($W0,$W1)=($W1,$W0); push(@MSG,shift(@MSG)); 390 ld1.32 {$W1},[$Ktbl],#16 397 add.i32 $W1,$W1,@MSG[1] 399 sha256h $ABCD,$EFGH,$W1 400 sha256h2 $EFGH,$abcd,$W1 402 ld1.32 {$W1},[$Ktbl [all...] |
sha1-armv8.pl | 246 my ($W0,$W1)=("v20.4s","v21.4s"); 274 add.i32 $W1,@Kxx[0],@MSG[1] 285 sha1$f $ABCD,$E1,$W1 286 add.i32 $W1,@Kxx[$j],@MSG[3] 292 ($E0,$E1)=($E1,$E0); ($W0,$W1)=($W1,$W0); 297 sha1p $ABCD,$E1,$W1 298 add.i32 $W1,@Kxx[$j],@MSG[3] 304 sha1p $ABCD,$E1,$W1
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sha256-armv4.pl | 604 my ($W0,$W1,$ABCD_SAVE,$EFGH_SAVE)=map("q$_",(12..15)); 640 vld1.32 {$W1},[$Ktbl]! 648 ($W0,$W1)=($W1,$W0); push(@MSG,shift(@MSG)); 651 vld1.32 {$W1},[$Ktbl]! 658 vadd.i32 $W1,$W1,@MSG[1] 660 sha256h $ABCD,$EFGH,$W1 661 sha256h2 $EFGH,$abcd,$W1 663 vld1.32 {$W1},[$Ktbl [all...] |
sha1-armv4-large.pl | 615 my ($W0,$W1,$ABCD_SAVE)=map("q$_",(12..14)); 653 vadd.i32 $W1,@Kxx[0],@MSG[1] 664 sha1$f $ABCD,$E1,$W1 665 vadd.i32 $W1,@Kxx[$j],@MSG[3] 671 ($E0,$E1)=($E1,$E0); ($W0,$W1)=($W1,$W0); 676 sha1p $ABCD,$E1,$W1 677 vadd.i32 $W1,@Kxx[$j],@MSG[3] 683 sha1p $ABCD,$E1,$W1
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/external/libxaac/decoder/ |
ixheaacd_esbr_fft.c | 103 FLOAT32 W1, W2, W3, W4, W5, W6; 167 W1 = *(twiddles + j); 192 tmp = (FLOAT32)(((FLOAT32)x1r * W1) + ((FLOAT32)x1i * W4)); 193 x1i = (FLOAT32)(-((FLOAT32)x1r * W4) + (FLOAT32)x1i * W1); 245 W1 = *(twiddles + j); 270 tmp = (FLOAT32)(((FLOAT32)x1r * W1) + ((FLOAT32)x1i * W4)); 271 x1i = (FLOAT32)(-((FLOAT32)x1r * W4) + (FLOAT32)x1i * W1); 323 W1 = *(twiddles + j); 348 tmp = (FLOAT32)(((FLOAT32)x1r * W1) + ((FLOAT32)x1i * W4)); 349 x1i = (FLOAT32)(-((FLOAT32)x1r * W4) + (FLOAT32)x1i * W1); [all...] |
/frameworks/av/media/libstagefright/codecs/m4v_h263/dec/src/ |
idct.cpp | 183 r4 = (r8 + (W1 - W7) * r4); 186 r5 = (r8 - (W1 + W7) * r5); 235 /* scale as that of coefficients (W1,...W7) */ 275 r4 = (r8 + (W1 - W7) * r4) >> 3; 276 r5 = (r8 - (W1 + W7) * r5) >> 3; 406 r4 = (r8 + (W1 - W7) * r4); 409 r5 = (r8 - (W1 + W7) * r5); 458 /* scale as that of coefficients (W1,...W7) */ 496 r4 = (r8 + (W1 - W7) * r4) >> 3; 497 r5 = (r8 - (W1 + W7) * r5) >> 3 [all...] |
idct.h | 75 #define W1 2841 /* 2048*sqrt(2)*cos(1*pi/16) */ 89 /* for the transform coefficients (W1,...W7) */
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idct_vca.cpp | 120 x4 = (W1 * x4 + 4) >> 3; 167 x1 = W1 * x1; 220 x1 = (W1 * x1 + 4) >> 3; 276 x1 = W1 * x1; 329 x1 = (W1 * x1 + 4) >> 3; 390 x1 = W1 * x1; 466 x4 = (W1 * x4 + 4) >> 3; 536 x1 = (W1 * x1 + 4) >> 3; 609 x1 = (W1 * x1 + 4) >> 3;
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block_idct.cpp | 558 x4 = (x8 + (W1 - W7) * x4) >> 3; 559 x5 = (x8 - (W1 + W7) * x5) >> 3; 670 x4 = (x8 + (W1 - W7) * x4) >> 3; 671 x5 = (x8 - (W1 + W7) * x5) >> 3; 869 x4 = x8 + (W1 - W7) * x4; 870 x5 = x8 - (W1 + W7) * x5;
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/external/libopus/src/ |
mlp_train.c | 117 double *W0, *W1; 131 W1 = net->weights[1]; 155 double sum = W1[i*(hiddenDim+1)]; 157 sum += W1[i*(hiddenDim+1)+j+1]*hidden[j]; 179 grad += error[j]*W1[j*(hiddenDim+1)+i+1]; 237 double *W0, *W1, *best_W0, *best_W1; 257 W1 = net->weights[1]; 329 best_W1[i] = W1[i]; 350 W1[i] = best_W1[i]; 388 W1[i] += W1_grad[i]*W1_rate[i] [all...] |
/external/bouncycastle/bcprov/src/main/java/org/bouncycastle/util/ |
Strings.java | 87 char W1 = (char)(0xD800 | (U >> 10)); 89 cs[length++] = W1; 170 char W1 = ch; 175 if (W1 > 0xDBFF) 179 int codePoint = (((W1 & 0x03FF) << 10) | (W2 & 0x03FF)) + 0x10000;
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/libcore/luni/src/test/java/libcore/java/lang/ |
ClassCastExceptionTest.java | 82 A1, B1, C1, D1, E1, F1, G1, H1, I1, J1, K1, L1, M1, N1, O1, P1, Q1, R1, S1, T1, U1, V1, W1, X1, Y1, Z1, 87 A1, B1, C1, D1, E1, F1, G1, H1, I1, J1, K1, L1, M1, N1, O1, P1, Q1, R1, S1, T1, U1, V1, W1, X1, Y1, Z1,
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/art/runtime/arch/mips/ |
registers_mips.h | 114 W1 = 1,
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/art/runtime/arch/mips64/ |
registers_mips64.h | 115 W1 = 1,
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/external/llvm/lib/Target/Hexagon/ |
HexagonBitTracker.cpp | 297 uint16_t W1 = getRegBitWidth(Reg[1]); 298 assert(W0 == 64 && W1 == 32); 299 RegisterCell CW = RegisterCell(W0).insert(rc(1), BT::BitMask(0, W1-1)); 300 RegisterCell RC = eADD(eSXT(CW, W1), rc(2)); 626 uint16_t W1 = getRegBitWidth(Reg[1]); 630 RegisterCell RZ = RegisterCell(W0).fill(BX, W1, Zero) 631 .fill(W1+(W1-BX), W0, Zero); 632 RegisterCell BF1 = eXTR(rc(1), 0, BX), BF2 = eXTR(rc(1), BX, W1); 633 RegisterCell RC = eINS(eINS(RZ, BF1, 0), BF2, W1); [all...] |
/frameworks/av/media/libstagefright/codecs/m4v_h263/enc/src/ |
fastidct.cpp | 88 x1 = W1 * x1; 124 x1 = W1 * x1; 159 x1 = W1 * x1; 191 x1 = W1 * x1; 274 x4 = x8 + (W1 - W7) * x4; 275 x5 = x8 - (W1 + W7) * x5; 392 x4 = (W1 * x4 + 4) >> 3; 463 x1 = (W1 * x1 + 4) >> 3; 533 x1 = (W1 * x1 + 4) >> 3; 595 x4 = (W1 * x4 + 4) >> 3 [all...] |
/art/compiler/utils/arm64/ |
managed_register_arm64_test.cc | 45 wreg = Arm64ManagedRegister::FromWRegister(W1); 275 EXPECT_TRUE(!no_reg.Equals(Arm64ManagedRegister::FromWRegister(W1))); 291 EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::FromWRegister(W1))); 356 EXPECT_TRUE(!reg_D0.Equals(Arm64ManagedRegister::FromWRegister(W1))); 382 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1))); 404 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1))); 426 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1))); 446 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1))); 467 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1))); 480 reg = Arm64ManagedRegister::FromWRegister(W1); [all...] |
/art/runtime/arch/arm64/ |
registers_arm64.h | 76 W1 = 1,
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/external/bouncycastle/bcprov/src/main/java/org/bouncycastle/math/ec/ |
ECPoint.java | 776 ECFieldElement W1 = X1.multiply(C), W2 = X2.multiply(C); 777 ECFieldElement A1 = W1.subtract(W2).multiply(Y1); 779 X3 = dy.square().subtract(W1).subtract(W2); 780 Y3 = W1.subtract(X3).multiply(dy).subtract(A1); [all...] |
/external/libyuv/files/util/ |
ssim.cc | 72 } W0 = MAKE_WEIGHT(0), W1 = MAKE_WEIGHT(1), W2 = MAKE_WEIGHT(2), 251 const __m128i w1 = _mm_unpacklo_epi8(v1, zero); \ 253 const __m128i ww1 = _mm_mullo_epi16(w1, (WEIGHT).values_.m_); \ 259 xy = _mm_add_epi32(xy, _mm_madd_epi16(ww0, w1)); \ 260 yy = _mm_add_epi32(yy, _mm_madd_epi16(ww1, w1)); \ 271 LOAD_LINE_PAIR(1, W1); 275 LOAD_LINE_PAIR(5, W1);
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/external/vulkan-validation-layers/libs/glm/detail/ |
type_mat2x4.hpp | 71 T const & x1, T const & y1, T const & z1, T const & w1); 79 typename X1, typename Y1, typename Z1, typename W1, 82 X1 const & x1, Y1 const & y1, Z1 const & z1, W1 const & w1,
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type_mat3x4.hpp | 71 T const & x1, T const & y1, T const & z1, T const & w1, 81 typename X1, typename Y1, typename Z1, typename W1, 85 X1 const & x1, Y1 const & y1, Z1 const & z1, W1 const & w1,
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