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    Searched refs:isFP64bit (Results 1 - 14 of 14) sorted by null

  /external/swiftshader/third_party/LLVM/lib/Target/Mips/
MipsSubtarget.h 55 // IsFP64bit - The target processor has 64-bit floating point registers.
56 bool IsFP64bit;
58 // IsFP64bit - General-purpose registers are 64 bits wide
115 bool isFP64bit() const { return IsFP64bit; }
MipsISelLowering.cpp     [all...]
  /external/llvm/lib/Target/Mips/MCTargetDesc/
MipsABIFlagsSection.h 140 CPR1Size = P.isFP64bit() ? Mips::AFL_REG_64 : Mips::AFL_REG_32;
178 else if (P.isFP64bit())
  /external/llvm/lib/Target/Mips/
MipsSubtarget.cpp 67 NoABICalls(false), IsFP64bit(false), UseOddSPReg(true),
97 if (hasMSA() && !isFP64bit())
111 assert(isFP64bit());
MipsRegisterInfo.cpp 118 if (Subtarget.isFP64bit())
140 if (Subtarget.isFP64bit())
186 if (Subtarget.isFP64bit()) {
MipsSubtarget.h 71 // IsFP64bit - The target processor has 64-bit floating point registers.
72 bool IsFP64bit;
81 // IsFP64bit - General-purpose registers are 64 bits wide
223 bool isFP64bit() const { return IsFP64bit; }
MipsSEInstrInfo.cpp 626 assert(!(Subtarget.isFP64bit() && !Subtarget.useOddSPReg()));
677 assert(!(Subtarget.isFP64bit() && !Subtarget.useOddSPReg()));
MipsSEFrameLowering.cpp 291 !Subtarget.isFP64bit());
354 !Subtarget.isFP64bit());
    [all...]
MipsAsmPrinter.cpp 720 if (ABI.IsO32() && (STI.isABI_FPXX() || STI.isFP64bit()))
    [all...]
MipsSEISelDAGToDAG.cpp 756 } else if (Subtarget->isFP64bit()) {
    [all...]
MipsSEISelLowering.cpp 107 if (Subtarget.isFP64bit())
183 assert(Subtarget.isFP64bit() && "FR=1 is required for MIPS32r6");
    [all...]
MipsFastISel.cpp 213 UnsupportedFPMode = Subtarget->isFP64bit();
    [all...]
MipsISelLowering.cpp     [all...]
  /external/llvm/lib/Target/Mips/AsmParser/
MipsAsmParser.cpp 449 bool isFP64bit() const {
565 /// isFP64bit())
    [all...]

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