| /external/v8/src/arm64/ |
| assembler-arm64-inl.h | 50 return reg_size;
57 return reg_size / 8;
63 return reg_size == 32;
69 return reg_size == 64;
86 ((reg_size == kWRegSizeInBits) || (reg_size == kXRegSizeInBits)) &&
93 ((reg_size == kSRegSizeInBits) || (reg_size == kDRegSizeInBits)) &&
101 DCHECK((reg_type != kNoRegister) || (reg_size == 0));
109 return Aliases(other) && (reg_size == other.reg_size)
[all...] |
| instructions-arm64.cc | 75 static uint64_t RepeatBitsAcrossReg(unsigned reg_size,
80 DCHECK((reg_size == kWRegSizeInBits) || (reg_size == kXRegSizeInBits));
82 for (unsigned i = width; i < reg_size; i *= 2) {
93 unsigned reg_size = SixtyFourBits() ? kXRegSizeInBits : kWRegSizeInBits; local
132 return RepeatBitsAcrossReg(reg_size,
|
| disasm-arm64.h | 64 bool IsMovzMovnImm(unsigned reg_size, uint64_t value);
|
| assembler-arm64.h | 131 int reg_size; member in struct:v8::internal::CPURegister
143 reg_size = 0;
149 reg_size = r.reg_size;
156 reg_size = r.reg_size;
219 reg_size = 0;
225 reg_size = r.reg_size;
232 reg_size = r.reg_size
1191 int reg_size = rd.SizeInBits(); local
[all...] |
| disasm-arm64.cc | 231 unsigned reg_size = (instr->SixtyFourBits() == 1) ? kXRegSizeInBits local
233 if (rn_is_zr && !IsMovzMovnImm(reg_size, instr->ImmLogical())) {
256 bool DisassemblingDecoder::IsMovzMovnImm(unsigned reg_size, uint64_t value) {
257 DCHECK((reg_size == kXRegSizeInBits) ||
258 ((reg_size == kWRegSizeInBits) && (value <= 0xffffffff)));
269 if ((reg_size == kXRegSizeInBits) &&
276 if ((reg_size == kWRegSizeInBits) &&
1510 unsigned reg_size = (instr->SixtyFourBits() == 1) ? kXRegSizeInBits local
[all...] |
| macro-assembler-arm64.cc | 68 unsigned reg_size = rd.SizeInBits(); local
123 if (IsImmLogical(immediate, reg_size, &n, &imm_s, &imm_r)) {
186 unsigned reg_size = rd.SizeInBits(); local
197 if (CountClearHalfWords(~imm, reg_size) >
198 CountClearHalfWords(imm, reg_size)) {
210 DCHECK((reg_size % 16) == 0);
320 unsigned MacroAssembler::CountClearHalfWords(uint64_t imm, unsigned reg_size) {
321 DCHECK((reg_size % 8) == 0);
323 for (unsigned i = 0; i < (reg_size / 16); i++) {
335 bool MacroAssembler::IsImmMovz(uint64_t imm, unsigned reg_size) {
418 int reg_size = dst.SizeInBits(); local
440 int reg_size = dst.SizeInBits(); local
[all...] |
| /external/jemalloc/src/ |
| android_je_mallinfo.c | 37 mi.uordblks += arena_bin_info[j].reg_size * bin->stats.curregs;
73 mi.fsmblks += arena_bin_info[j].reg_size * bin->stats.curregs;
92 mi.ordblks = arena_bin_info[bidx].reg_size * bin->stats.curregs;
|
| android_je_iterate.c | 143 callback(ptr, bin_info->reg_size, arg);
|
| stats.c | 69 size_t reg_size, run_size, curregs; local
85 CTL_M2_GET("arenas.bin.0.size", j, ®_size, size_t);
159 reg_size, j, curregs * reg_size, nmalloc,
169 reg_size, j, curregs * reg_size, nmalloc,
[all...] |
| /external/vixl/src/ |
| utils-vixl.cc | 131 unsigned CountClearHalfWords(uint64_t imm, unsigned reg_size) {
132 VIXL_ASSERT((reg_size % 8) == 0);
134 for (unsigned i = 0; i < (reg_size / 16); i++) {
|
| /art/compiler/debug/dwarf/ |
| debug_frame_opcode_writer.h | 84 uint32_t reg_mask, int reg_size) {
85 DCHECK(reg_size == 4 || reg_size == 8);
93 offset += reg_size;
|
| /external/vixl/src/aarch64/ |
| simulator-aarch64.cc | 298 uint64_t Simulator::AddWithCarry(unsigned reg_size,
304 VIXL_ASSERT((reg_size == kXRegSize) || (reg_size == kWRegSize));
306 uint64_t max_uint = (reg_size == kWRegSize) ? kWMaxUInt : kXMaxUInt;
307 uint64_t reg_mask = (reg_size == kWRegSize) ? kWRegMask : kXRegMask;
308 uint64_t sign_mask = (reg_size == kWRegSize) ? kWSignMask : kXSignMask;
315 ReadNzcv().SetN(CalcNFlag(result, reg_size));
337 int64_t Simulator::ShiftOperand(unsigned reg_size,
341 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize))
950 int reg_size = GetPrintRegSizeInBytes(format); local
1084 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; local
1124 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; local
1141 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; local
1151 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; local
1171 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; local
1191 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; local
1232 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; local
1244 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; local
1857 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; local
1940 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; local
2110 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; local
2159 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; local
2213 unsigned reg_size = (instr->GetSixtyFourBits() == 1) ? kXRegSize : kWRegSize; local
3928 int reg_size = RegisterSizeInBytesFromFormat(vf); local
[all...] |
| instructions-aarch64.cc | 51 static uint64_t RepeatBitsAcrossReg(unsigned reg_size,
56 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize));
58 for (unsigned i = width; i < reg_size; i *= 2) {
128 unsigned reg_size = GetSixtyFourBits() ? kXRegSize : kWRegSize; local
167 return RepeatBitsAcrossReg(reg_size,
|
| macro-assembler-aarch64.cc | 444 unsigned reg_size = rd.GetSizeInBits(); local
455 if (CountClearHalfWords(~imm, reg_size) >
456 CountClearHalfWords(imm, reg_size)) {
472 VIXL_ASSERT((reg_size % 16) == 0);
474 for (unsigned i = 0; i < (reg_size / 16); i++) {
512 int reg_size = dst.GetSizeInBits(); local
514 if (IsImmMovz(imm, reg_size) && !dst.IsSP()) {
521 } else if (IsImmMovn(imm, reg_size) && !dst.IsSP()) {
528 } else if (IsImmLogical(imm, reg_size, &n, &imm_s, &imm_r)) {
813 unsigned reg_size = rd.GetSizeInBits() local
1571 int reg_size = dst.GetSizeInBits(); local
1990 int reg_size = registers.GetRegisterSizeInBytes(); local
2022 int reg_size = registers.GetRegisterSizeInBytes(); local
2321 const int reg_size = registers.GetRegisterSizeInBytes(); local
2372 int reg_size = registers.GetRegisterSizeInBytes(); local
[all...] |
| disasm-aarch64.h | 148 bool IsMovzMovnImm(unsigned reg_size, uint64_t value);
|
| assembler-aarch64.h | 768 unsigned reg_size = rd.GetSizeInBits(); local
769 VIXL_ASSERT(shift < reg_size);
770 ubfm(rd, rn, (reg_size - shift) % reg_size, reg_size - shift - 1);
[all...] |
| /external/jemalloc/test/unit/ |
| junk.c | 31 for (i = 0; i < bin_info->reg_size; i++) {
34 i, bin_info->reg_size);
|
| /external/vixl/test/aarch64/ |
| test-utils-aarch64.h | 225 // r array will be populated with <reg_size>-sized registers,
237 int reg_size,
245 int reg_size,
|
| test-utils-aarch64.cc | 276 int reg_size,
285 r[i] = Register(n, reg_size);
307 int reg_size,
316 v[i] = FPRegister(n, reg_size);
|
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_fs_reg_allocate.cpp | 39 reg->nr = reg_hw_locations[reg->nr] + reg->offset / REG_SIZE;
40 reg->offset %= REG_SIZE;
758 const unsigned reg_size = dst.component_size(bld.dispatch_width()) / local
759 REG_SIZE;
760 assert(count % reg_size == 0);
762 for (unsigned i = 0; i < count / reg_size; i++) {
771 spill_offset < (1 << 12) * REG_SIZE);
783 dst.offset += reg_size * REG_SIZE;
784 spill_offset += reg_size * REG_SIZE
792 const unsigned reg_size = src.component_size(bld.dispatch_width()) \/ local
[all...] |
| brw_ir_fs.h | 84 reg.nr += suboffset / REG_SIZE;
85 reg.offset = suboffset % REG_SIZE;
91 reg.nr += suboffset / REG_SIZE;
92 reg.subnr = suboffset % REG_SIZE;
183 (r.file == UNIFORM ? 4 : REG_SIZE) + r.offset +
216 regions_overlap(byte_offset(t, 4 * REG_SIZE), dr / 2, s, ds);
428 return DIV_ROUND_UP(reg_offset(inst->dst) % REG_SIZE +
431 REG_SIZE);
443 const unsigned reg_size =
444 inst->src[i].file == UNIFORM || inst->src[i].file == IMM ? 4 : REG_SIZE;
[all...] |
| brw_ir_vec4.h | 79 reg->nr += suboffset / REG_SIZE;
80 reg->offset = suboffset % REG_SIZE;
87 reg->nr += suboffset / REG_SIZE;
88 reg->subnr = suboffset % REG_SIZE;
232 (r.file == UNIFORM ? 16 : REG_SIZE) + r.offset +
252 t1.offset += 4 * REG_SIZE;
389 return DIV_ROUND_UP(reg_offset(inst->dst) % REG_SIZE + inst->size_written,
390 REG_SIZE);
402 const unsigned reg_size = local
403 inst->src[i].file == UNIFORM || inst->src[i].file == IMM ? 16 : REG_SIZE;
[all...] |
| /toolchain/binutils/binutils-2.27/include/opcode/ |
| cris.h | 92 unsigned int reg_size; member in struct:cris_spec_reg
|
| /external/mesa3d/src/gallium/drivers/etnaviv/ |
| etnaviv_compiler.c | 130 size_t reg_size; member in struct:etna_compile_file
256 for (int idx = 0; idx < file->reg_size; ++idx) {
302 for (int idx = 0; idx < file->reg_size; ++idx)
512 c->file[x].reg_size = c->info.file_max[x] + 1;
514 for (int sub = 0; sub < c->file[x].reg_size; ++sub) {
[all...] |
| /toolchain/binutils/binutils-2.27/opcodes/ |
| cris-dis.c | 502 if (sregp && sregp->reg_size == (unsigned int) -pushsize)
691 distype == cris_dis_v32 ? 4 : (sregp->reg_size + 1) & ~1;
917 ? 4 : (sregp->reg_size + 1) & ~1;
1013 size = sregp->reg_size;
[all...] |
