| /toolchain/binutils/binutils-2.27/ld/testsuite/ld-arm/ |
| stm32l4xx-fix-ldm.s | 18 @ in reglist)
41 @ in reglist)
49 @ in reglist)
66 @ in reglist)
72 @ LDM CASE #4 (used when pc is not in reglist and rx is in
79 @ LDM CASE #5 (used when pc is not in reglist and rx is not in
89 @ LDM CASE #5 bis (used when pc is not in reglist and rx is in
98 @ LDM CASE #6 (used when pc is in reglist and rx is in
107 @ LDM CASE #6 bis (used when pc is in reglist and rx is in
115 @ LDM CASE #7 (used when pc is in reglist and rx is not i
[all...] |
| /external/vixl/src/aarch32/ |
| instructions-aarch32.cc | 156 std::ostream& operator<<(std::ostream& os, SRegisterList reglist) {
157 SRegister first = reglist.GetFirstSRegister();
158 SRegister last = reglist.GetLastSRegister();
167 std::ostream& operator<<(std::ostream& os, DRegisterList reglist) {
168 DRegister first = reglist.GetFirstDRegister();
169 DRegister last = reglist.GetLastDRegister();
|
| /toolchain/binutils/binutils-2.27/opcodes/ |
| nios2-dis.c | 841 unsigned long reglist = 0; local
852 reglist = ((i << 14) & 0x00ffc000);
854 reglist |= (1 << 28);
856 reglist |= (1 << 31);
859 reglist = i << 2;
865 reglist |= (1 << 31);
867 reglist |= (1 << 28);
871 reglist |= nios2_r2_reg_range_mappings[val];
885 if (reglist & (1 << k))
|
| aarch64-asm.c | 136 insert_field (self->fields[0], code, info->reglist.first_regno, 0);
138 insert_field (FLD_len, code, info->reglist.num_regs - 1, 0);
154 insert_field (FLD_Rt, code, info->reglist.first_regno, 0);
159 switch (info->reglist.num_regs)
169 value = info->reglist.num_regs == 4 ? 0x3 : 0x8;
198 insert_field (FLD_Rt, code, info->reglist.first_regno, 0);
201 if (is_ld1r && info->reglist.num_regs == 2)
221 assert (info->reglist.has_index);
224 insert_field (FLD_Rt, code, info->reglist.first_regno, 0);
230 QSsize = info->reglist.index
[all...] |
| aarch64-dis.c | 347 info->reglist.first_regno = extract_field (self->fields[0], code, 0);
349 info->reglist.num_regs = extract_field (FLD_len, code, 0) + 1;
383 info->reglist.first_regno = extract_field (FLD_Rt, code, 0);
388 info->reglist.num_regs = data[value].num_regs;
403 info->reglist.first_regno = extract_field (FLD_Rt, code, 0);
409 info->reglist.num_regs = get_opcode_dependent_value (inst->opcode);
410 assert (info->reglist.num_regs >= 1 && info->reglist.num_regs <= 4);
413 if (info->reglist.num_regs == 1 && value == (aarch64_insn) 1)
414 info->reglist.num_regs = 2
[all...] |
| aarch64-opc.c | [all...] |
| aarch64-tbl.h | [all...] |
| /system/core/libpixelflinger/codeflinger/ |
| GGLAssembler.h | 133 Spill(RegisterFile& regFile, ARMAssemblerInterface& gen, uint32_t reglist)
134 : mRegFile(regFile), mGen(gen), mRegList(reglist), mCount(0)
136 if (reglist) {
138 while (reglist) {
140 reglist &= ~(1 << (31 - __builtin_clz(reglist)));
|
| /toolchain/binutils/binutils-2.27/gas/config/ |
| m68k-parse.y | 111 %type <mask> reglist ireglist reglistpair
192 | reglist
607 reglist: label
619 /* We use ireglist when we know we are looking at a reglist, and we
621 reglist to reduce to reglistreg, it would be ambiguous whether a
|
| tc-nios2.c | 2698 unsigned long reglist = nios2_parse_reglist (buf, op); local
[all...] |
| tc-aarch64.c | [all...] |
| tc-mips.c | 5346 unsigned int reglist, sregs, ra, regno1, regno2; local
[all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| VirtRegRewriter.cpp | 123 SmallVector<std::pair<MachineInstr*, unsigned>, 32> reglist; local
126 reglist.push_back(std::make_pair(&*I, I.getOperandNo()));
127 for (unsigned N=0; N != reglist.size(); ++N)
128 substitutePhysReg(reglist[N].first->getOperand(reglist[N].second),
130 changed |= !reglist.empty();
[all...] |
| /toolchain/binutils/binutils-2.27/include/opcode/ |
| aarch64.h | 766 } reglist;
763 } reglist; member in union:aarch64_opnd_info::__anon4771
|
| /external/v8/src/ |
| frames.cc | [all...] |
| /external/capstone/arch/ARM/ |
| ARMDisassembler.c | 1917 unsigned reglist = fieldFromInstruction_4(Insn, 0, 16); local
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/Disassembler/ |
| ARMDisassembler.cpp | 1627 unsigned reglist = fieldFromInstruction32(Insn, 0, 16); local
[all...] |
| /external/llvm/lib/Target/ARM/Disassembler/ |
| ARMDisassembler.cpp | 1870 unsigned reglist = fieldFromInstruction(Insn, 0, 16); local
[all...] |
