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  /external/llvm/test/MC/AArch64/
armv8.2a-persistent-memory.s 4 dc cvap, x7
5 // CHECK: dc cvap, x7 // encoding: [0x27,0x7c,0x0b,0xd5]
  /toolchain/binutils/binutils-2.27/gas/testsuite/gas/aarch64/
virthostext.s 33 rw_sys_reg spsr_el12 x7
34 rw_sys_reg elr_el12 x7
36 rw_sys_reg sctlr_el12 x7
37 rw_sys_reg cpacr_el12 x7
39 rw_sys_reg ttbr1_el2 x7
40 rw_sys_reg ttbr0_el12 x7
41 rw_sys_reg ttbr1_el12 x7
43 rw_sys_reg tcr_el12 x7
45 rw_sys_reg afsr0_el12 x7
46 rw_sys_reg afsr1_el12 x7
    [all...]
pr19721.s 3 mov x7, x17
4 mov x7, x17, lsl 25
5 orr x7, xzr, x17, lsl 25
ldst-exclusive.d 8 0: 080f7ce1 stxrb w15, w1, \[x7\]
9 4: 080f7ce1 stxrb w15, w1, \[x7\]
10 8: 080f7ce1 stxrb w15, w1, \[x7\]
11 c: 480f7ce1 stxrh w15, w1, \[x7\]
12 10: 480f7ce1 stxrh w15, w1, \[x7\]
13 14: 480f7ce1 stxrh w15, w1, \[x7\]
14 18: 880f7ce1 stxr w15, w1, \[x7\]
15 1c: 880f7ce1 stxr w15, w1, \[x7\]
16 20: 880f7ce1 stxr w15, w1, \[x7\]
17 24: c80f7ce1 stxr w15, x1, \[x7\]
    [all...]
tlbi_op.d 8 0: d50c8027 tlbi ipas2e1is, x7
9 4: d50c80a7 tlbi ipas2le1is, x7
13 14: d5088327 tlbi vae1is, x7
14 18: d50c8327 tlbi vae2is, x7
15 1c: d50e8327 tlbi vae3is, x7
16 20: d5088347 tlbi aside1is, x7
17 24: d5088367 tlbi vaae1is, x7
19 2c: d50883a7 tlbi vale1is, x7
20 30: d50c83a7 tlbi vale2is, x7
21 34: d50e83a7 tlbi vale3is, x7
    [all...]
fp_cvt_int.d 9 4: 9e2000e7 fcvtns x7, s7
11 c: 9e2100e7 fcvtnu x7, s7
13 14: 9e2800e7 fcvtps x7, s7
15 1c: 9e2900e7 fcvtpu x7, s7
17 24: 9e3000e7 fcvtms x7, s7
19 2c: 9e3100e7 fcvtmu x7, s7
21 34: 9e3800e7 fcvtzs x7, s7
23 3c: 9e3900e7 fcvtzu x7, s7
25 44: 9e2200e7 scvtf s7, x7
27 4c: 9e2300e7 ucvtf s7, x7
    [all...]
reloc-dtprel_lo12-1.s 5 add x7, x26, #:dtprel_lo12:x
reloc-dtprel_lo12_nc-ldst32.s 5 ldrsw x20, [x7, #:dtprel_lo12_nc:sym]
reloc-dtprel_lo12_nc.s 5 add x7, x26, #:dtprel_lo12_nc:x
virthostext-directive.d 12 [0-9a-f]+: d51d4007 msr spsr_el12, x7
13 [0-9a-f]+: d53d4007 mrs x7, spsr_el12
14 [0-9a-f]+: d51d4027 msr elr_el12, x7
15 [0-9a-f]+: d53d4027 mrs x7, elr_el12
16 [0-9a-f]+: d51d1007 msr sctlr_el12, x7
17 [0-9a-f]+: d53d1007 mrs x7, sctlr_el12
18 [0-9a-f]+: d51d1047 msr cpacr_el12, x7
19 [0-9a-f]+: d53d1047 mrs x7, cpacr_el12
20 [0-9a-f]+: d51c2027 msr ttbr1_el2, x7
21 [0-9a-f]+: d53c2027 mrs x7, ttbr1_el
    [all...]
virthostext.d 12 [0-9a-f]+: d51d4007 msr spsr_el12, x7
13 [0-9a-f]+: d53d4007 mrs x7, spsr_el12
14 [0-9a-f]+: d51d4027 msr elr_el12, x7
15 [0-9a-f]+: d53d4027 mrs x7, elr_el12
16 [0-9a-f]+: d51d1007 msr sctlr_el12, x7
17 [0-9a-f]+: d53d1007 mrs x7, sctlr_el12
18 [0-9a-f]+: d51d1047 msr cpacr_el12, x7
19 [0-9a-f]+: d53d1047 mrs x7, cpacr_el12
20 [0-9a-f]+: d51c2027 msr ttbr1_el2, x7
21 [0-9a-f]+: d53c2027 mrs x7, ttbr1_el
    [all...]
pr19721.d 8 0: aa1103e7 mov x7, x17
9 4: aa1167e7 mov x7, x17, lsl #25
10 8: aa1167e7 mov x7, x17, lsl #25
ldst-exclusive.s 26 \op w1, [x7]
27 \op w1, [x7, #0]
28 \op w1, [x7, 0]
33 \op x1, [x7]
34 \op x1, [x7, #0]
35 \op x1, [x7, 0]
40 \op w15, w1, [x7]
41 \op w15, w1, [x7, #0]
42 \op w15, w1, [x7, 0]
47 \op w15, x1, [x7]
    [all...]
sysreg-2.d 11 [0-9a-f]+: d5380747 mrs x7, id_aa64mmfr2_el1
13 [0-9a-f]+: d5185327 msr errselr_el1, x7
14 [0-9a-f]+: d5385327 mrs x7, errselr_el1
35 [0-9a-f]+: d5189a07 msr pmblimitr_el1, x7
36 [0-9a-f]+: d5389a07 mrs x7, pmblimitr_el1
37 [0-9a-f]+: d5189a27 msr pmbptr_el1, x7
38 [0-9a-f]+: d5389a27 mrs x7, pmbptr_el1
39 [0-9a-f]+: d5189a67 msr pmbsr_el1, x7
40 [0-9a-f]+: d5389a67 mrs x7, pmbsr_el1
41 [0-9a-f]+: d5189ae7 msr pmbidr_el1, x7
    [all...]
sysreg-1.s 33 rw_sys_reg sys_reg=id_aa64afr0_el1 xreg=x7 r=1 w=0
34 rw_sys_reg sys_reg=id_aa64afr1_el1 xreg=x7 r=1 w=0
35 rw_sys_reg sys_reg=mvfr2_el1 xreg=x7 r=1 w=0
36 rw_sys_reg sys_reg=dlr_el0 xreg=x7 r=1 w=1
37 rw_sys_reg sys_reg=dspsr_el0 xreg=x7 r=1 w=1
39 rw_sys_reg sys_reg=sder32_el3 xreg=x7 r=1 w=1
40 rw_sys_reg sys_reg=mdcr_el3 xreg=x7 r=1 w=1
42 rw_sys_reg sys_reg=mdccint_el1 xreg=x7 r=1 w=1
44 rw_sys_reg sys_reg=dbgvcr32_el2 xreg=x7 r=1 w=1
46 rw_sys_reg sys_reg=fpexc32_el2 xreg=x7 r=1 w=
    [all...]
bitfield-no-aliases.d 10 4: 93401cff sbfm xzr, x7, #0, #7
12 c: 93403cff sbfm xzr, x7, #0, #15
13 10: 93407cff sbfm xzr, x7, #0, #31
23 38: 9340fcff sbfm xzr, x7, #0, #63
24 3c: 935ffcff sbfm xzr, x7, #31, #63
25 40: 937ffcff sbfm xzr, x7, #63, #63
29 50: d340fcff ubfm xzr, x7, #0, #63
30 54: d35ffcff ubfm xzr, x7, #31, #63
31 58: d37ffcff ubfm xzr, x7, #63, #63
35 68: d340fcff ubfm xzr, x7, #0, #6
    [all...]
  /external/libavc/common/
ih264_common_tables.c 443 { 0x0, 0x1, 0xc, 0x7, 0x1, 0x1, 0xf, 0x7, 0xc, 0xf, 0xc, 0x7, 0xf, 0x7, 0xf, 0x7 },
444 { 0x1, 0x1, 0xf, 0x7, 0x1, 0x1, 0xf, 0x7, 0xf, 0xf, 0xf, 0x7, 0xf, 0x7, 0xf, 0x7 },
    [all...]
  /prebuilts/go/darwin-x86/test/dwarf/dwarf.dir/
z7.go 2 //line x7.go:4
  /prebuilts/go/linux-x86/test/dwarf/dwarf.dir/
z7.go 2 //line x7.go:4
  /toolchain/binutils/binutils-2.27/gas/testsuite/gas/h8300/
t12_bit.s 7 bset #0x7,r1h ;7071
8 bset #0x7,@er1 ;7d107070
9 bset #0x7,@0xffffff12:8 ;7f127070
10 bset #0x7,@0x1234:16 ;6a1812347070
11 bset #0x7,@0x12345678:32 ;6a38123456787070
19 bset/eq #0x7,@er1 ;7d107077
20 bset/eq #0x7,@0xffffff12:8 ;7f127077
21 bset/eq #0x7,@0x1234:16 ;6a1812347077
22 bset/eq #0x7,@0x12345678:32 ;6a38123456787077
29 bset/ne #0x7,@er1 ;7d107076
    [all...]
  /external/libgsm/src/
gsm_decode.c 37 LARc[6] = sr & 0x7; sr >>= 3;
38 LARc[7] = sr & 0x7; sr >>= 3;
45 xmc[0] = sr & 0x7; sr >>= 3;
47 xmc[1] = sr & 0x7; sr >>= 3;
48 xmc[2] = sr & 0x7; sr >>= 3;
50 xmc[3] = sr & 0x7; sr >>= 3;
51 xmc[4] = sr & 0x7; sr >>= 3;
52 xmc[5] = sr & 0x7; sr >>= 3;
54 xmc[6] = sr & 0x7; sr >>= 3;
55 xmc[7] = sr & 0x7; sr >>= 3
    [all...]
gsm_explode.c 40 LARc[6] = sr & 0x7; sr >>= 3;
41 LARc[7] = sr & 0x7; sr >>= 3;
50 xmc[0] = sr & 0x7; sr >>= 3;
52 xmc[1] = sr & 0x7; sr >>= 3;
53 xmc[2] = sr & 0x7; sr >>= 3;
55 xmc[3] = sr & 0x7; sr >>= 3;
56 xmc[4] = sr & 0x7; sr >>= 3;
57 xmc[5] = sr & 0x7; sr >>= 3;
59 xmc[6] = sr & 0x7; sr >>= 3;
60 xmc[7] = sr & 0x7; sr >>= 3
    [all...]
gsm_print.c 28 LARc[3] = (*c++ & 0x7) << 2;
33 LARc[6] = (*c >> 3) & 0x7;
34 LARc[7] = *c++ & 0x7;
43 xmc[0] = (*c >> 4) & 0x7;
44 xmc[1] = (*c >> 1) & 0x7;
47 xmc[3] = (*c >> 3) & 0x7;
48 xmc[4] = *c++ & 0x7;
49 xmc[5] = (*c >> 5) & 0x7;
50 xmc[6] = (*c >> 2) & 0x7;
53 xmc[8] = (*c >> 4) & 0x7;
    [all...]
  /device/linaro/bootloader/arm-trusted-firmware/include/plat/arm/common/aarch64/
cci_macros.S 25 /* Store in x7 the base address of the first interface */
26 mov_imm x7, (PLAT_ARM_CCI_BASE + SLAVE_IFACE_OFFSET( \
28 ldr w8, [x7, #SNOOP_CTRL_REG]
29 /* Store in x7 the base address of the second interface */
30 mov_imm x7, (PLAT_ARM_CCI_BASE + SLAVE_IFACE_OFFSET( \
32 ldr w9, [x7, #SNOOP_CTRL_REG]
  /device/linaro/bootloader/edk2/ArmPlatformPkg/Include/Drivers/
PL35xSmc.h 31 #define PL350_SMC_DIRECT_CMD_ADDR_CS(ChipSelect) (((ChipSelect) & 0x7) << 23)
61 #define PL350_SMC_SET_CYCLE_NAND_T_REA(t) (((t) & 0x7) << 8)
62 #define PL350_SMC_SET_CYCLE_NAND_T_WP(t) (((t) & 0x7) << 11)
63 #define PL350_SMC_SET_CYCLE_NAND_T_CLR(t) (((t) & 0x7) << 14)
64 #define PL350_SMC_SET_CYCLE_NAND_T_AR(t) (((t) & 0x7) << 17)
65 #define PL350_SMC_SET_CYCLE_NAND_T_RR(t) (((t) & 0x7) << 20)
69 #define PL350_SMC_SET_CYCLE_SRAM_T_CEOE(t) (((t) & 0x7) << 8)
70 #define PL350_SMC_SET_CYCLE_SRAM_T_WP(t) (((t) & 0x7) << 11)
71 #define PL350_SMC_SET_CYCLE_SRAM_T_PC(t) (((t) & 0x7) << 14)
72 #define PL350_SMC_SET_CYCLE_SRAM_T_TR(t) (((t) & 0x7) << 17)
    [all...]

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