| /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
| BlackfinAsmPrinter.cpp | 76 const MachineOperand &MO = MI->getOperand(opNum);
77 switch (MO.getType()) {
79 assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) &&
81 O << getRegisterName(MO.getReg());
85 O << MO.getImm();
88 O << *MO.getMBB()->getSymbol();
91 O << *Mang->getSymbol(MO.getGlobal());
92 printOffset(MO.getOffset(), O);
95 O << *GetExternalSymbolSymbol(MO.getSymbolName());
99 << MO.getIndex()
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| MBlazeMCInstLower.cpp | 33 GetGlobalAddressSymbol(const MachineOperand &MO) const {
34 switch (MO.getTargetFlags()) {
39 return Printer.Mang->getSymbol(MO.getGlobal());
43 GetExternalSymbolSymbol(const MachineOperand &MO) const {
44 switch (MO.getTargetFlags()) {
49 return Printer.GetExternalSymbolSymbol(MO.getSymbolName());
53 GetJumpTableSymbol(const MachineOperand &MO) const {
57 << MO.getIndex();
58 switch (MO.getTargetFlags()) {
68 GetConstantPoolIndexSymbol(const MachineOperand &MO) const
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
| MSP430AsmPrinter.cpp | 66 const MachineOperand &MO = MI->getOperand(OpNum);
67 switch (MO.getType()) {
70 O << MSP430InstPrinter::getRegisterName(MO.getReg());
75 O << MO.getImm();
78 O << *MO.getMBB()->getSymbol();
82 uint64_t Offset = MO.getOffset();
95 O << *Mang->getSymbol(MO.getGlobal());
105 O << MAI->getGlobalPrefix() << MO.getSymbolName();
|
| MSP430MCInstLower.cpp | 30 GetGlobalAddressSymbol(const MachineOperand &MO) const {
31 switch (MO.getTargetFlags()) {
36 return Printer.Mang->getSymbol(MO.getGlobal());
40 GetExternalSymbolSymbol(const MachineOperand &MO) const {
41 switch (MO.getTargetFlags()) {
46 return Printer.GetExternalSymbolSymbol(MO.getSymbolName());
50 GetJumpTableSymbol(const MachineOperand &MO) const {
54 << MO.getIndex();
56 switch (MO.getTargetFlags()) {
66 GetConstantPoolIndexSymbol(const MachineOperand &MO) const
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/InstPrinter/ |
| MipsInstPrinter.cpp | 97 const MCOperand &MO = MI->getOperand(opNum);
98 if (MO.isImm())
99 O << (unsigned short int)MO.getImm();
127 const MCOperand& MO = MI->getOperand(opNum);
128 O << MipsFCCToString((Mips::CondCode)MO.getImm());
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86VZeroUpper.cpp | 69 const MachineOperand &MO = MI->getOperand(i);
71 if (!MO.isGlobal())
74 const GlobalValue *GV = MO.getGlobal();
|
| X86FrameLowering.cpp | 118 MachineOperand &MO = MBBI->getOperand(i);
119 if (!MO.isReg() || MO.isDef())
121 unsigned Reg = MO.getReg();
[all...] |
| /prebuilts/ndk/r16/sources/cxx-stl/llvm-libc++/test/libcxx/utilities/tuple/tuple.tuple/tuple.cnstr/ |
| enable_reduced_arity_initialization_extension.pass.cpp | 41 typedef MoveOnly MO;
44 typedef std::tuple<MO, ND> Tuple;
45 static_assert(!std::is_constructible<Tuple, MO>::value, "");
46 static_assert(std::is_constructible<Tuple, MO, ND>::value, "");
47 static_assert(test_convertible<Tuple, MO, ND>(), "");
50 typedef std::tuple<MO, MO, ND> Tuple;
51 static_assert(!std::is_constructible<Tuple, MO, MO>::value, "");
52 static_assert(std::is_constructible<Tuple, MO, MO, ND>::value, "")
[all...] |
| /toolchain/binutils/binutils-2.27/opcodes/ |
| mmix-opc.c | 84 #define MO mmix_type_memaccess_octa
212 {"ldo", Z (0x8c), OP (regs_z_opt), MO},
215 {"ldou", Z (0x8e), OP (regs_z_opt), MO},
227 {"cswap", Z (0x94), OP (regs_z_opt), MO},
230 {"ldunc", Z (0x96), OP (regs_z_opt), MO},
241 {"sto", Z (0xac), OP (regs_z_opt), MO},
244 {"stou", Z (0xae), OP (regs_z_opt), MO},
252 {"stco", Z (0xb4), OP (x_regs_z), MO},
255 {"stunc", Z (0xb6), OP (regs_z_opt), MO},
|
| /external/llvm/lib/CodeGen/ |
| StackMapLivenessAnalysis.cpp | 156 MachineOperand MO = MachineOperand::CreateRegLiveOut(Mask);
157 MI.addOperand(MF, MO);
|
| ExpandPostRAPseudos.cpp | 73 MachineOperand &MO = MI->getOperand(i);
74 if (!MO.isReg() || !MO.isImplicit() || MO.isUse())
76 CopyMI->addOperand(MachineOperand::CreateReg(MO.getReg(), true, true));
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64ExpandPseudoInsts.cpp | 76 const MachineOperand &MO = OldMI.getOperand(i);
77 assert(MO.isReg() && MO.getReg());
78 if (MO.isUse())
79 UseMI.addOperand(MO);
81 DefMI.addOperand(MO);
[all...] |
| /external/llvm/lib/Target/Mips/InstPrinter/ |
| MipsInstPrinter.cpp | 144 const MCOperand &MO = MI->getOperand(opNum);
145 if (MO.isImm()) {
146 uint64_t Imm = MO.getImm();
196 const MCOperand& MO = MI->getOperand(opNum);
197 O << MipsFCCToString((Mips::CondCode)MO.getImm());
|
| /external/llvm/lib/Target/NVPTX/InstPrinter/ |
| NVPTXInstPrinter.cpp | 94 const MCOperand &MO = MI->getOperand(OpNum);
95 int64_t Imm = MO.getImm();
144 const MCOperand &MO = MI->getOperand(OpNum);
145 int64_t Imm = MO.getImm();
218 const MCOperand &MO = MI->getOperand(OpNum);
219 int Imm = (int) MO.getImm();
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| DeadMachineInstructionElim.cpp | 70 const MachineOperand &MO = MI->getOperand(i);
71 if (MO.isReg() && MO.isDef()) {
72 unsigned Reg = MO.getReg();
135 const MachineOperand &MO = MI->getOperand(i);
136 if (!MO.isReg() || !MO.isDef())
138 unsigned Reg = MO.getReg();
164 const MachineOperand &MO = MI->getOperand(i);
165 if (MO.isReg() && MO.isDef())
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/MCTargetDesc/ |
| PPCMCCodeEmitter.cpp | 55 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
88 const MCOperand &MO = MI.getOperand(OpNo);
89 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups);
92 Fixups.push_back(MCFixup::Create(0, MO.getExpr(),
99 const MCOperand &MO = MI.getOperand(OpNo);
100 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups)
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| PPCMCInstLower.cpp | 31 static MCSymbol *GetSymbolFromOperand(const MachineOperand &MO, AsmPrinter &AP){
35 if (!MO.isGlobal()) {
36 assert(MO.isSymbol() && "Isn't a symbol reference");
38 Name += MO.getSymbolName();
40 const GlobalValue *GV = MO.getGlobal();
42 if (MO.getTargetFlags() == PPCII::MO_DARWIN_STUB ||
43 (MO.getTargetFlags() & PPCII::MO_NLP_FLAG))
51 if (MO.getTargetFlags() == PPCII::MO_DARWIN_STUB) {
59 if (MO.isGlobal()) {
62 StubValueTy(AP.Mang->getSymbol(MO.getGlobal())
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| SparcAsmPrinter.cpp | 73 const MachineOperand &MO = MI->getOperand (opNum);
75 if (MI->getOpcode() == SP::SETHIi && !MO.isReg() && !MO.isImm()) {
79 !MO.isReg() && !MO.isImm()) {
83 switch (MO.getType()) {
85 O << "%" << LowercaseString(getRegisterName(MO.getReg()));
89 O << (int)MO.getImm();
92 O << *MO.getMBB()->getSymbol();
95 O << *Mang->getSymbol(MO.getGlobal())
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| SystemZAsmPrinter.cpp | 84 const MachineOperand &MO = MI->getOperand(OpNum);
85 switch (MO.getType()) {
87 O << MO.getImm();
90 O << *MO.getMBB()->getSymbol();
93 const GlobalValue *GV = MO.getGlobal();
102 printOffset(MO.getOffset(), O);
107 Name += MO.getSymbolName();
123 const MachineOperand &MO = MI->getOperand(OpNum);
124 switch (MO.getType()) {
126 assert (TargetRegisterInfo::isPhysicalRegister(MO.getReg()) &
[all...] |
| /external/capstone/arch/Sparc/ |
| SparcInstPrinter.c | 169 MCOperand *MO = MCInst_getOperand(MI, opNum);
171 if (MCOperand_isReg(MO)) {
172 reg = MCOperand_getReg(MO);
192 if (MCOperand_isImm(MO)) {
193 Imm = (int)MCOperand_getImm(MO);
293 MCOperand *MO;
306 MO = MCInst_getOperand(MI, opNum + 1);
308 if (MCOperand_isReg(MO) && (MCOperand_getReg(MO) == SP_G0)) {
313 if (MCOperand_isImm(MO) && (MCOperand_getImm(MO) == 0))
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| LiveVariables.h | 218 MachineOperand &MO = MI.getOperand(i);
219 if (MO.isReg() && MO.isKill() && MO.getReg() == reg) {
220 MO.setIsKill(false);
254 MachineOperand &MO = MI.getOperand(i);
255 if (MO.isReg() && MO.isDef() && MO.getReg() == reg) {
256 MO.setIsDead(false)
[all...] |
| /external/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| SIMCCodeEmitter.cpp | 44 uint32_t getLitEncoding(const MCOperand &MO, unsigned OpSize) const;
59 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
163 uint32_t SIMCCodeEmitter::getLitEncoding(const MCOperand &MO,
167 if (MO.isExpr()) {
168 const MCConstantExpr *C = dyn_cast<MCConstantExpr>(MO.getExpr());
175 assert(!MO.isFPImm());
177 if (!MO.isImm())
180 Imm = MO.getImm();
245 const MCOperand &MO = MI.getOperand(OpNo);
247 if (MO.isExpr())
[all...] |
| /external/llvm/lib/Target/BPF/MCTargetDesc/ |
| BPFMCCodeEmitter.cpp | 50 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
77 const MCOperand &MO,
80 if (MO.isReg())
81 return MRI.getEncodingValue(MO.getReg());
82 if (MO.isImm())
83 return static_cast<unsigned>(MO.getImm());
85 assert(MO.isExpr());
87 const MCExpr *Expr = MO.getExpr();
128 const MCOperand &MO = MI.getOperand(1);
129 uint64_t Imm = MO.isImm() ? MO.getImm() : 0
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonBitTracker.cpp | 107 const MachineOperand &MO = MI.getOperand(i);
108 if (MO.isReg())
109 Vector[i] = BT::RegisterRef(MO);
131 const MachineOperand &MO = MI.getOperand(i);
132 if (!MO.isReg() || !MO.isDef())
135 assert(MO.getSubReg() == 0);
170 const MachineOperand &MO = MI.getOperand(i);
171 if (MO.isGlobal() || MO.isBlockAddress() || MO.isSymbol() || MO.isJTI() |
[all...] |
| HexagonBranchRelaxation.cpp | 199 MachineOperand &MO = MI.getOperand(ExtOpNum);
203 assert(MO.isMBB() && "Branch with unknown expandable field type");
205 MO.addTargetFlag(HexagonII::HMOTF_ConstExtended);
|
