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Searched
defs:OpIdx
(Results
51 - 61
of
61
) sorted by null
1
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3
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
ARMExpandPseudoInsts.cpp
419
unsigned
OpIdx
= 0;
421
bool DstIsDead = MI.getOperand(
OpIdx
).isDead();
422
unsigned DstReg = MI.getOperand(
OpIdx
++).getReg();
433
MIB.addOperand(MI.getOperand(
OpIdx
++));
436
MIB.addOperand(MI.getOperand(
OpIdx
++));
437
MIB.addOperand(MI.getOperand(
OpIdx
++));
440
MIB.addOperand(MI.getOperand(
OpIdx
++));
447
SrcOpIdx =
OpIdx
++;
450
MIB.addOperand(MI.getOperand(
OpIdx
++));
451
MIB.addOperand(MI.getOperand(
OpIdx
++))
[
all
...]
ARMCodeEmitter.cpp
101
unsigned
OpIdx
);
152
unsigned getMachineOpValue(const MachineInstr &MI, unsigned
OpIdx
) const {
153
return getMachineOpValue(MI, MI.getOperand(
OpIdx
));
239
uint32_t getLdStmModeOpValue(const MachineInstr &MI, unsigned
OpIdx
)
241
uint32_t getLdStSORegOpValue(const MachineInstr &MI, unsigned
OpIdx
)
269
uint32_t getAddrMode2OpValue(const MachineInstr &MI, unsigned
OpIdx
)
271
uint32_t getAddrMode2OffsetOpValue(const MachineInstr &MI, unsigned
OpIdx
)
273
uint32_t getPostIdxRegOpValue(const MachineInstr &MI, unsigned
OpIdx
)
275
uint32_t getAddrMode3OffsetOpValue(const MachineInstr &MI, unsigned
OpIdx
)
[
all
...]
/external/llvm/lib/CodeGen/
TargetInstrInfo.cpp
679
unsigned
OpIdx
[4][4] = {
695
MachineOperand &OpA = Prev.getOperand(
OpIdx
[Row][0]);
696
MachineOperand &OpB = Root.getOperand(
OpIdx
[Row][1]);
697
MachineOperand &OpX = Prev.getOperand(
OpIdx
[Row][2]);
698
MachineOperand &OpY = Root.getOperand(
OpIdx
[Row][3]);
[
all
...]
/external/llvm/lib/Target/ARM/
ARMExpandPseudoInsts.cpp
403
unsigned
OpIdx
= 0;
405
bool DstIsDead = MI.getOperand(
OpIdx
).isDead();
406
unsigned DstReg = MI.getOperand(
OpIdx
++).getReg();
418
MIB.addOperand(MI.getOperand(
OpIdx
++));
421
MIB.addOperand(MI.getOperand(
OpIdx
++));
422
MIB.addOperand(MI.getOperand(
OpIdx
++));
425
MIB.addOperand(MI.getOperand(
OpIdx
++));
432
SrcOpIdx =
OpIdx
++;
435
MIB.addOperand(MI.getOperand(
OpIdx
++));
436
MIB.addOperand(MI.getOperand(
OpIdx
++))
[
all
...]
ARMBaseInstrInfo.cpp
[
all
...]
/external/swiftshader/third_party/LLVM/lib/CodeGen/
MachineInstr.cpp
829
int MachineInstr::findInlineAsmFlagIdx(unsigned
OpIdx
,
832
assert(
OpIdx
< getNumOperands() && "
OpIdx
out of range");
835
if (
OpIdx
< InlineAsm::MIOp_FirstOperand)
847
if (i + NumOps >
OpIdx
) {
858
MachineInstr::getRegClassConstraint(unsigned
OpIdx
,
863
return TII->getRegClass(getDesc(),
OpIdx
, TRI);
865
if (!getOperand(
OpIdx
).isReg())
870
if (getOperand(
OpIdx
).isUse() && isRegTiedToDefOperand(
OpIdx
, &DefIdx)
[
all
...]
LiveIntervalAnalysis.cpp
[
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...]
RegisterCoalescer.cpp
724
unsigned
OpIdx
= NewMI->findRegisterUseOperandIdx(IntA.reg, false);
725
NewMI->getOperand(
OpIdx
).setIsKill();
[
all
...]
/external/llvm/lib/Target/AMDGPU/
AMDGPUISelDAGToDAG.cpp
197
unsigned
OpIdx
= Desc.getNumDefs() + OpNo;
198
if (
OpIdx
>= Desc.getNumOperands())
200
int RegClass = Desc.OpInfo[
OpIdx
].RegClass;
[
all
...]
/external/llvm/lib/Target/Hexagon/
HexagonISelLowering.cpp
[
all
...]
/external/llvm/lib/Target/X86/
X86ISelLowering.cpp
[
all
...]
Completed in 640 milliseconds
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