| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| basic-thumb-instructions.s | 304 @ LDRSB/LDRSH
306 ldrsb r6, [r2, r6]
309 @ CHECK: ldrsb r6, [r2, r6] @ encoding: [0x96,0x57]
|
| /external/v8/src/compiler/arm/ |
| code-generator-arm.cc | [all...] |
| /external/vixl/test/aarch64/ |
| test-disasm-aarch64.cc | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrInfo.td | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMInstrThumb2.td | [all...] |
| ARMBaseInstrInfo.cpp | [all...] |
| /external/vixl/test/test-trace-reference/ |
| log-disasm | 141 0x~~~~~~~~~~~~~~~~ 39c00007 ldrsb w7, [x0]
142 0x~~~~~~~~~~~~~~~~ 38c01427 ldrsb w7, [x1], #1
143 0x~~~~~~~~~~~~~~~~ 38c01c27 ldrsb w7, [x1, #1]!
144 0x~~~~~~~~~~~~~~~~ 39800008 ldrsb x8, [x0]
145 0x~~~~~~~~~~~~~~~~ 38801428 ldrsb x8, [x1], #1
146 0x~~~~~~~~~~~~~~~~ 38801c28 ldrsb x8, [x1, #1]!
[all...] |
| log-disasm-colour | 141 0x~~~~~~~~~~~~~~~~ 39c00007 ldrsb w7, [x0]
142 0x~~~~~~~~~~~~~~~~ 38c01427 ldrsb w7, [x1], #1
143 0x~~~~~~~~~~~~~~~~ 38c01c27 ldrsb w7, [x1, #1]!
144 0x~~~~~~~~~~~~~~~~ 39800008 ldrsb x8, [x0]
145 0x~~~~~~~~~~~~~~~~ 38801428 ldrsb x8, [x1], #1
146 0x~~~~~~~~~~~~~~~~ 38801c28 ldrsb x8, [x1, #1]!
[all...] |
| /toolchain/binutils/binutils-2.27/opcodes/ |
| aarch64-dis-2.c | [all...] |
| aarch64-asm.c | 952 /* e.g. LDRSB <Wt>, [<Xn|SP>, <R><m>{, <extend> {<amount>}}]. */
[all...] |
| /external/swiftshader/third_party/subzero/src/DartARM32/ |
| assembler_arm.h | 571 void ldrsb(Register rd, Address ad, Condition cond = AL);
[all...] |
| /external/valgrind/VEX/priv/ |
| guest_arm64_toIR.c | [all...] |
| /prebuilts/vndk/v27/x86/arch-x86-x86/shared/vndk-core/ |
| libvixl-arm64.so | |
| /prebuilts/vndk/v27/x86_64/arch-x86-x86_64/shared/vndk-core/ |
| libvixl-arm64.so | |
| /external/pcre/dist2/src/sljit/ |
| sljitNativeARM_32.c | 935 /* l s b */ 0xe11000d0 /* ldrsb */,
943 Type2: ldrsb, ldrh, ldrsh */
[all...] |
| /external/v8/src/arm/ |
| macro-assembler-arm.cc | 408 ldrsb(dst, src);
[all...] |
| /external/vixl/doc/aarch64/ |
| supported-instructions-aarch64.md | 612 ### LDRSB ###
616 void ldrsb(const Register& rt,
[all...] |
| /external/vixl/test/aarch32/ |
| test-assembler-cond-rd-memop-immediate-512-a32.cc | 54 M(ldrsb) \
[all...] |
| test-assembler-cond-rd-memop-rs-a32.cc | 55 M(ldrsb) \
[all...] |
| test-simulator-cond-rd-memop-immediate-512-a32.cc | 118 M(Ldrsb) \
[all...] |
| test-simulator-cond-rd-memop-rs-a32.cc | 119 M(Ldrsb) \
[all...] |
| /external/capstone/arch/ARM/ |
| ARMGenAsmWriter.inc | 192 30225U, // LDRSB
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.cpp | [all...] |
| ARMInstrInfo.td | [all...] |
| ARMInstrThumb.td | 720 "ldrsb", "\t$Rt, $addr",
[all...] |
