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  /external/clang/test/OpenMP/
target_update_from_messages.cpp 90 #pragma omp target update from(I) // expected-error 2 {{expected expression containing only member accesses and/or array sections based on named variables}}
95 #pragma omp target update from(argc > 0 ? x : y) // expected-error 2 {{expected expression containing only member accesses and/or array sections based on named variables}}
107 #pragma omp target update from(x, (m+1)[2]) // expected-error 2 {{expected expression containing only member accesses and/or array sections based on named variables}}
149 #pragma omp target update from(argc > 0 ? x : y) // expected-error {{expected expression containing only member accesses and/or array sections based on named variables}} expected-error {{expected at least one 'to' clause or 'from' clause specified to '#pragma omp target update'}}
161 #pragma omp target update from(x, (m+1)[2]) // expected-error {{expected expression containing only member accesses and/or array sections based on named variables}}
target_update_to_messages.cpp 90 #pragma omp target update to(I) // expected-error 2 {{expected expression containing only member accesses and/or array sections based on named variables}}
95 #pragma omp target update to(argc > 0 ? x : y) // expected-error 2 {{expected expression containing only member accesses and/or array sections based on named variables}}
107 #pragma omp target update to(x, (m+1)[2]) // expected-error 2 {{expected expression containing only member accesses and/or array sections based on named variables}}
148 #pragma omp target update to(argc > 0 ? x : y) // expected-error {{expected expression containing only member accesses and/or array sections based on named variables}} expected-error {{expected at least one 'to' clause or 'from' clause specified to '#pragma omp target update'}}
160 #pragma omp target update to(x, (m+1)[2]) // expected-error {{expected expression containing only member accesses and/or array sections based on named variables}}
  /external/llvm/lib/Transforms/Instrumentation/
ThreadSanitizer.cpp 17 // - Optimizations may apply to avoid instrumenting some of the accesses.
54 "tsan-instrument-memory-accesses", cl::init(true),
55 cl::desc("Instrument memory accesses"), cl::Hidden);
70 STATISTIC(NumAccessesWithBadSize, "Number of accesses with bad size");
76 STATISTIC(NumOmittedNonCaptured, "Number of accesses ignored due to capturing");
108 // Accesses sizes are powers of two: 1, 2, 4, 8, 16.
312 // Instrumenting some of the accesses may be proven redundant.
421 // FIXME: many of these accesses do not need to be checked for races
424 // Instrument memory accesses only if we want to report bugs in the function.
430 // Instrument atomic memory accesses in any case (they can be used t
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  /external/valgrind/drd/
drd.h 88 * Tell DRD to trace all memory accesses for the specified variable
96 * Tell DRD to stop tracing memory accesses for the specified variable.
122 * Tell DRD that the memory accesses executed after this annotation will
123 * happen after all memory accesses performed before all preceding
345 * accesses that occurred before the corresponding ANNOTATE_PCQ_PUT(pcq)
346 * annotation and the memory accesses after this annotation. Correspondence
387 /** Tell DRD to ignore all memory accesses performed by the current thread. */
392 * Tell DRD to no longer ignore the memory accesses performed by the current
426 /* Ask the DRD tool to discard all information about memory accesses */
448 /* To ask the DRD tool to trace all accesses to the specified range. *
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  /external/mesa3d/src/gallium/drivers/vc4/
vc4_qpu.c 270 int accesses = 0; local
295 accesses++;
297 accesses++;
301 accesses++;
304 accesses++;
312 accesses++;
315 return accesses;
  /external/swiftshader/third_party/LLVM/lib/Analysis/
LoopDependenceAnalysis.cpp 11 // framework, which is used to detect dependences in memory accesses in loops.
43 STATISTIC(NumDependent, "Number of pairs with dependent accesses");
44 STATISTIC(NumIndependent, "Number of pairs with independent accesses");
45 STATISTIC(NumUnknown, "Number of pairs with unknown accesses");
220 // We only analyse loads and stores but no possible memory accesses by e.g.
238 // If the objects noalias, they are distinct, accesses are independent.
243 break; // The underlying objects alias, test accesses for dependence.
  /external/valgrind/helgrind/docs/
hg-manual.xml 375 usually able to show both accesses involved in a race. At least
417 constraints upon the order in which memory accesses can
501 accesses to memory locations. If a location -- in this example,
504 two accesses are ordered by the happens-before relation. If so,
525 <para>What does it mean to say that two accesses from different
528 cause those accesses to happen in a particular order, irrespective of
538 immediately) locked by thread T2, then the memory accesses in T1
548 on the same CV, then the memory accesses in T1 prior to the
572 That is, all memory accesses performed by the parent prior to
573 creating the child are regarded as happening-before all the accesses
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  /external/llvm/lib/CodeGen/
InterleavedAccessPass.cpp 11 // interleaved memory accesses and transforms them into target specific
18 // As interleaved accesses are difficult to identified in CodeGen (mainly
56 "lower-interleaved-accesses",
57 cl::desc("Enable lowering interleaved accesses to intrinsics"),
107 "Lower interleaved memory accesses to target specific intrinsics", false,
112 "Lower interleaved memory accesses to target specific intrinsics", false,
  /external/llvm/test/Analysis/LoopAccessAnalysis/
number-of-memchecks.ll 1 ; RUN: opt -loop-accesses -analyze < %s | FileCheck %s
63 ; memory checks of accesses which differ by a constant value.
97 ; CHECK-NEXT: Grouped accesses:
152 ; accesses, so we cannot overflow the GEPs.
169 ; CHECK-NEXT: Grouped accesses:
248 ; CHECK-NEXT: Grouped accesses:
backward-dep-different-types.ll 1 ; RUN: opt -loop-accesses -analyze < %s | FileCheck %s
  /toolchain/binutils/binutils-2.27/gas/doc/
c-tilegx.texi 268 accesses.
279 TLS accesses. It also checks that the value does not overflow.
285 for initial-exec TLS accesses.
296 be used for initial-exec TLS accesses. It also checks that the value
302 address from the TCB, to be used for local-exec TLS accesses.
312 address from the TCB, to be used for local-exec TLS accesses. It
  /external/walt/android/WALT/app/src/main/java/org/chromium/latency/walt/
WaltTcpConnection.java 128 // All network accesses must occur on a separate thread.
142 // All network accesses must occur on a separate thread.
159 // All network accesses must occur on a separate thread.
  /bionic/libc/arch-arm/krait/bionic/
memset.S 34 * unaligned neon instruction accesses to memory.
  /device/google/contexthub/firmware/external/freebsd/inc/sys/
endian.h 79 * accesses
  /device/google/marlin/dataservices/datatop/src/
datatop_str.h 49 * Value that the key accesses.
  /device/linaro/bootloader/arm-trusted-firmware/drivers/arm/gic/common/
gic_common_private.h 66 * operations or appropriate register accesses to modify or return
  /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Protocol/IsaIo/
IsaIo.h 53 #define EFI_ISA_IO_ATTRIBUTE_MEMORY_CACHED 0x800 // Map a memory range so all r/w accesses are cached
  /device/linaro/bootloader/edk2/IntelFrameworkPkg/Include/Protocol/
SmmCpuIo.h 30 Provides the basic memory and I/O interfaces used to abstract accesses to devices.
  /device/linaro/bootloader/edk2/MdePkg/Include/IndustryStandard/
SerialPortConsoleRedirectionTable.h 90 /// ARM SBSA Generic UART (2.x) supporting 32-bit only accesses [deprecated]
  /external/compiler-rt/lib/tsan/rtl/
tsan_update_shadow_word_inl.h 63 // The accesses do not intersect.
  /external/compiler-rt/test/asan/TestCases/Posix/
global-registration.c 5 // the third is loaded at runtime. We make sure that out-of-bounds accesses
  /external/curl/lib/
conncache.h 27 * All accesses to struct fields and changing of data in the connection cache
  /external/fio/examples/
pmemblk.fio 40 # accesses the underlying NVDIMM directly, bypassing the kernel block
  /external/libnl/include/netlink/
utils.h 108 * Indicate that the local port is unspecified until the user accesses
  /external/llvm/lib/Target/SystemZ/
SystemZSubtarget.cpp 49 // PC32DBL accesses require the low bit to be clear. Note that a zero

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