/external/llvm/test/CodeGen/Mips/llvm-ir/ |
sub.ll | 151 ; GP64: daddu $[[T1:[0-9]+]], $[[T0]], $6
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/external/llvm/lib/Target/Mips/ |
MipsLongBranch.cpp | 364 // daddu $at, $ra, $at 408 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::DADDu), Mips::AT_64)
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/system/core/libpixelflinger/codeflinger/ |
mips64_disassem.c | 73 /*40 */ "?", "?", "slt", "sltu", "dadd", "daddu", "dsub", "dsubu", 175 * answer - never decode addu/daddu as "move"?
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mips_disassem.c | 86 /*40 */ "spec50","spec51","slt","sltu", "dadd","daddu","dsub","dsubu", 210 * answer - never decode addu/daddu as "move"?
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MIPS64Assembler.h | 273 void DADDU(int Rd, int Rs, int Rt);
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/external/llvm/lib/Target/Mips/MCTargetDesc/ |
MipsTargetStreamer.cpp | 195 emitRRR(Is64Bit ? Mips::DADDu : Mips::ADDu, DstReg, SrcReg, TrgReg, SMLoc(), [all...] |
/external/gemmlowp/internal/ |
kernel_msa.h | 34 #define GEMMLOWP_MIPS_XADDU "daddu"
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/external/google-breakpad/src/common/android/ |
breakpad_getcontext.S | 390 daddu a2, a0, UCONTEXT_SIGMASK_OFFSET
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/external/llvm/test/MC/Mips/mips1/ |
invalid-mips4.s | 21 daddu $s3,$at,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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invalid-mips5.s | 21 daddu $s3,$at,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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/external/llvm/test/MC/Mips/mips2/ |
invalid-mips4.s | 19 daddu $s3,$at,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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invalid-mips5.s | 19 daddu $s3,$at,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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/external/valgrind/coregrind/m_dispatch/ |
dispatch-mips64-linux.S | 196 daddu $13, $13, $14
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/external/llvm/test/MC/Disassembler/Mips/mips64/ |
valid-mips64-el.txt | 78 0x2d 0x98 0x3f 0x00 # CHECK: daddu $19, $1, $ra 224 0x2d 0xd0 0x2b 0x00 # CHECK: daddu $26, $1, $11
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valid-mips64.txt | 51 0x00 0x2b 0xd0 0x2d # CHECK: daddu $26, $1, $11 54 0x00 0x3f 0x98 0x2d # CHECK: daddu $19, $1, $ra
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/external/llvm/test/MC/Disassembler/Mips/mips64r2/ |
valid-mips64r2-el.txt | 84 0x2d 0x98 0x3f 0x00 # CHECK: daddu $19, $1, $ra 245 0x2d 0xd0 0x2b 0x00 # CHECK: daddu $26, $1, $11
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/art/compiler/optimizing/ |
intrinsics_mips64.cc | 444 __ Daddu(TMP, out, TMP); 446 __ Daddu(out, out, TMP); [all...] |
code_generator_mips64.cc | 656 __ Daddu(tmp_ptr, base, offset); [all...] |
/external/v8/src/full-codegen/mips64/ |
full-codegen-mips64.cc | 148 __ Daddu(a4, a4, Operand(Smi::FromInt(1))); 453 __ Daddu(sp, sp, Operand(sp_delta)); [all...] |
/external/v8/src/mips64/ |
assembler-mips64.cc | 1702 void Assembler::daddu(Register rd, Register rs, Register rt) { function in class:v8::internal::Assembler [all...] |
constants-mips64.h | 442 DADDU = ((5U << 3) + 5), 978 FunctionFieldToBitNumber(ADDU) | FunctionFieldToBitNumber(DADDU) | [all...] |
/external/llvm/test/MC/Mips/mips64r6/ |
valid.s | 104 daddu $19,26943 # CHECK: daddiu $19, $19, 26943 # encoding: [0x66,0x73,0x69,0x3f] 105 daddu $24,$2,18079 # CHECK: daddiu $24, $2, 18079 # encoding: [0x64,0x58,0x46,0x9f]
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/external/llvm/test/MC/Disassembler/Mips/mips3/ |
valid-mips3-el.txt | 60 0x2d 0x98 0x3f 0x00 # CHECK: daddu $19, $1, $ra
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valid-mips3.txt | 44 0x00 0x3f 0x98 0x2d # CHECK: daddu $19, $1, $ra
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/external/llvm/test/MC/Disassembler/Mips/mips4/ |
valid-mips4-el.txt | 64 0x2d 0x98 0x3f 0x00 # CHECK: daddu $19, $1, $ra
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